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| author | MichaelZhuxx <78013124+MichaelZhuxx@users.noreply.github.com> | 2022-01-04 18:47:44 +0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-01-04 18:47:44 +0300 |
| commit | 1847d43b2dd85da06f1df0c34a84cbcab1bec1c5 (patch) | |
| tree | 0f56a2075fe25ee67cd385f8b04fb4b2c5bc7f7f | |
| parent | 45d1740c6893e4b89f33c1b391f8372608b997b8 (diff) | |
| parent | 29386f3be40fa43ecc88c958d32a0dc2cf3d07d2 (diff) | |
| download | linux-1847d43b2dd85da06f1df0c34a84cbcab1bec1c5.tar.xz | |
Merge pull request #42 from SFxingyuwu/visionfive-5.15.y-devel_td
dts: starfive: Amend Vdec module device tree
| -rwxr-xr-x[-rw-r--r--] | arch/riscv/boot/dts/starfive/jh7100.dtsi | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 9ce9d0c6f316..076623953908 100644..100755 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -642,8 +642,18 @@ vpu_dec: vpu_dec@118f0000 { compatible = "c&m,cm511-vpu"; reg = <0 0x118f0000 0 0x10000>; - clocks = <&clkgen JH7100_CLK_VP6_CORE>; - clock-names = "vcodec"; + clocks =<&clkgen JH7100_CLK_VDEC_AXI>, + <&clkgen JH7100_CLK_VDECBRG_MAIN>, + <&clkgen JH7100_CLK_VDEC_BCLK>, + <&clkgen JH7100_CLK_VDEC_CCLK>, + <&clkgen JH7100_CLK_VDEC_APB>; + clock-names = "vdec_axi", "vdecbrg_main", "vdec_bclk", "vdec_cclk", "vdec_apb"; + resets = <&rstgen JH7100_RSTN_VDEC_AXI>, + <&rstgen JH7100_RSTN_VDECBRG_MAIN>, + <&rstgen JH7100_RSTN_VDEC_BCLK>, + <&rstgen JH7100_RSTN_VDEC_CCLK>, + <&rstgen JH7100_RSTN_VDEC_APB>; + reset-names = "vdec_axi", "vdecbrg_main", "vdec_bclk", "vdec_cclk", "vdec_apb"; interrupts = <23>; //memory-region = <&vpu_reserved>; }; |