diff options
| author | andy.hu <andy.hu@starfivetech.com> | 2024-05-31 14:49:05 +0300 |
|---|---|---|
| committer | andy.hu <andy.hu@starfivetech.com> | 2024-05-31 14:49:05 +0300 |
| commit | 7fc8a72478dcc7420e3633ea8bc9b82001a847a9 (patch) | |
| tree | 803f848abad327385978e316b2cb61d195f1014c | |
| parent | a7cf7e446ecd207d0517727d7e08f93a1ac79b14 (diff) | |
| parent | 515031d70f67bff70bb21361917bb74b0d34ed09 (diff) | |
| download | linux-7fc8a72478dcc7420e3633ea8bc9b82001a847a9.tar.xz | |
Merge branch 'CR_10877_AMP_RPMSG_minda' into 'vf2-6.6.y-devel'
CR_10877 sbi: riscv: add AMP ipi support
See merge request sbc/linux!213
| -rw-r--r-- | arch/riscv/boot/dts/starfive/Makefile | 1 | ||||
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-amp.dts | 59 | ||||
| -rw-r--r-- | arch/riscv/configs/starfive_visionfive2_defconfig | 4 |
3 files changed, 64 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile index 479e6b59c7d3..e75298cb833d 100644 --- a/arch/riscv/boot/dts/starfive/Makefile +++ b/arch/riscv/boot/dts/starfive/Makefile @@ -13,6 +13,7 @@ subdir-y += vf2-overlay dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb \ jh7110-starfive-visionfive-2-ac108.dtb \ + jh7110-starfive-visionfive-2-amp.dtb \ jh7110-starfive-visionfive-2-tdm.dtb \ jh7110-starfive-visionfive-2-wm8960.dtb diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-amp.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-amp.dts new file mode 100644 index 000000000000..88b26b292541 --- /dev/null +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-amp.dts @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + */ + +/dts-v1/; +#include "jh7110-starfive-visionfive-2-v1.3b.dts" + +/ { + reserved-memory { + rpmsg_share_mem: rpmsg-shmem { + reg = <0x0 0x6e400000 0x0 0x400000>; + }; + + rtthread_reserved: rt@6e800000 { + reg = <0x0 0x6e800000 0x0 0x1800000>; + }; + }; + + ipimb: ipimb@0 { + compatible = "starfive,ipi-amp-mailbox"; + reg = <0x0 0x6e402000 0x0 0x2000>; + #mbox-cells = <2>; + rtos-hart-id = <4>; + }; + + rpmsg0: rpmsg@0 { + compatible = "starfive,amp-virtio-rpmsg"; + reg = <0x0 0x6e404000 0x0 0x20000>, + <0x0 0x6e500000 0x0 0x200000>; + mbox-names = "rx", "tx"; + mboxes = <&ipimb 0 0>, <&ipimb 1 0>; + vdev-nums = <8>; + }; +}; + +&cpu1_intc { + enable-ipi-amp; +}; + +&cpu2_intc { + enable-ipi-amp; +}; + +&cpu3_intc { + enable-ipi-amp; +}; + +&gmac1 { + status = "disabled"; +}; + +&pcie1 { + status = "disabled"; +}; + +&U74_4 { + status = "disabled"; +}; diff --git a/arch/riscv/configs/starfive_visionfive2_defconfig b/arch/riscv/configs/starfive_visionfive2_defconfig index 7feee6e84d74..f465ebb59cd4 100644 --- a/arch/riscv/configs/starfive_visionfive2_defconfig +++ b/arch/riscv/configs/starfive_visionfive2_defconfig @@ -22,6 +22,7 @@ CONFIG_PERF_EVENTS=y CONFIG_SOC_STARFIVE=y CONFIG_NONPORTABLE=y CONFIG_SMP=y +CONFIG_RISCV_AMP=y CONFIG_HZ_100=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="PARTLABEL=hibernation" @@ -348,10 +349,13 @@ CONFIG_CLK_STARFIVE_JH7110_STG=y CONFIG_CLK_STARFIVE_JH7110_ISP=y CONFIG_CLK_STARFIVE_JH7110_VOUT=y CONFIG_MAILBOX=y +CONFIG_STARFIVE_IPI_MBOX=y CONFIG_STARFIVE_MBOX=m CONFIG_STARFIVE_MBOX_TEST=m # CONFIG_IOMMU_SUPPORT is not set CONFIG_RPMSG_CHAR=y +CONFIG_RPMSG_CTRL=y +CONFIG_RPMSG_STARFIVE=m CONFIG_RPMSG_VIRTIO=y CONFIG_SIFIVE_CCACHE=y CONFIG_PM_DEVFREQ=y |