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authorThomas Gleixner <tglx@linutronix.de>2014-05-07 19:44:06 +0400
committerThomas Gleixner <tglx@linutronix.de>2014-05-16 16:05:18 +0400
commitb1ee544174fd0eb28a7770403b9577fd70f1cd3d (patch)
tree1eedb15e5d93d76ee341f3eeeab9d8198912cf79
parent7b6ef1262549f6afc5c881aaef80beb8fd15f908 (diff)
downloadlinux-b1ee544174fd0eb28a7770403b9577fd70f1cd3d.tar.xz
x86: Implement arch_setup/teardown_hwirq()
This is just a cleanup to get rid of the create/destroy_irq variants which were designed in hell. The long term solution for x86 is to switch over to irq domains and cleanup the whole vector allocation mess. The generic irq_alloc_hwirqs() interface deliberately prevents multi-MSI vector allocation to further enforce the irq domain conversion (aside of the desire to support ioapic hotplug). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: x86@kernel.org Link: http://lkml.kernel.org/r/20140507154334.482904047@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/x86/Kconfig1
-rw-r--r--arch/x86/kernel/apic/io_apic.c33
2 files changed, 34 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 25d2c6f7325e..47247708c9eb 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -831,6 +831,7 @@ config X86_LOCAL_APIC
config X86_IO_APIC
def_bool y
depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_IOAPIC || PCI_MSI
+ select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
config X86_REROUTE_FOR_BROKEN_BOOT_IRQS
bool "Reroute for broken boot IRQs"
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 992060e09897..b7175c0c552c 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -3010,6 +3010,39 @@ void destroy_irqs(unsigned int irq, unsigned int count)
destroy_irq(irq + i);
}
+int arch_setup_hwirq(unsigned int irq, int node)
+{
+ struct irq_cfg *cfg;
+ unsigned long flags;
+ int ret;
+
+ cfg = alloc_irq_cfg(irq, node);
+ if (!cfg)
+ return -ENOMEM;
+
+ raw_spin_lock_irqsave(&vector_lock, flags);
+ ret = __assign_irq_vector(irq, cfg, apic->target_cpus());
+ raw_spin_unlock_irqrestore(&vector_lock, flags);
+
+ if (!ret)
+ irq_set_chip_data(irq, cfg);
+ else
+ free_irq_cfg(irq, cfg);
+ return ret;
+}
+
+void arch_teardown_hwirq(unsigned int irq)
+{
+ struct irq_cfg *cfg = irq_get_chip_data(irq);
+ unsigned long flags;
+
+ free_remapped_irq(irq);
+ raw_spin_lock_irqsave(&vector_lock, flags);
+ __clear_irq_vector(irq, cfg);
+ raw_spin_unlock_irqrestore(&vector_lock, flags);
+ free_irq_cfg(irq, cfg);
+}
+
/*
* MSI message composition
*/