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author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2015-05-26 15:42:57 +0300 |
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committer | Michael Turquette <mturquette@linaro.org> | 2015-06-04 01:17:07 +0300 |
commit | 4d52b2acefdfceae0e47ed08324a96f511dc80b1 (patch) | |
tree | 7348889850e9f896bda2842ad0e3c15165832fad | |
parent | 5343325ff3dd299f459fa9dacbd95dca5c9bf215 (diff) | |
download | linux-4d52b2acefdfceae0e47ed08324a96f511dc80b1.tar.xz |
clk: mvebu: add missing CESA gate clk
Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
-rw-r--r-- | Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt | 1 | ||||
-rw-r--r-- | drivers/clk/mvebu/armada-370.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt index 31c7c0c1ce8f..660e64912cce 100644 --- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt +++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt @@ -19,6 +19,7 @@ ID Clock Peripheral 9 pex1 PCIe Cntrl 1 15 sata0 SATA Host 0 17 sdio SDHCI Host +23 crypto CESA (crypto engine) 25 tdm Time Division Mplx 28 ddr DDR Cntrl 30 sata1 SATA Host 0 diff --git a/drivers/clk/mvebu/armada-370.c b/drivers/clk/mvebu/armada-370.c index 756f0f39d6a3..c19fd77e6c27 100644 --- a/drivers/clk/mvebu/armada-370.c +++ b/drivers/clk/mvebu/armada-370.c @@ -163,6 +163,7 @@ static const struct clk_gating_soc_desc a370_gating_desc[] __initconst = { { "pex1", "pex1_en", 9, 0 }, { "sata0", NULL, 15, 0 }, { "sdio", NULL, 17, 0 }, + { "crypto", NULL, 23, 0 }, { "tdm", NULL, 25, 0 }, { "ddr", NULL, 28, CLK_IGNORE_UNUSED }, { "sata1", NULL, 30, 0 }, |