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| author | Dilip Kota <eswara.kota@linux.intel.com> | 2019-12-20 12:53:24 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2020-02-05 01:42:20 +0300 |
| commit | 34129bb831cc27e5368270562d11d12f73db1e49 (patch) | |
| tree | dd29d8d62e945a38a5e43ee5d505b45cff94b400 | |
| parent | 4ae87b17cc327f32335608f953681906cdcf69fc (diff) | |
| download | linux-34129bb831cc27e5368270562d11d12f73db1e49.tar.xz | |
dt-bindings: PCI: intel: Fix dt_binding_check compilation failure
Remove <dt-bindings/clock/intel,lgm-clk.h> dependency as
it is not present in the mainline tree. Use numeric value
instead of LGM_GCLK_PCIE10 macro.
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
[robh: Also drop interrupt-parent from example]
Signed-off-by: Rob Herring <robh@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml index db605d8a387d..48a98dae00de 100644 --- a/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml @@ -107,7 +107,6 @@ additionalProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> - #include <dt-bindings/clock/intel,lgm-clk.h> pcie10: pcie@d0e00000 { compatible = "intel,lgm-pcie", "snps,dw-pcie"; device_type = "pci"; @@ -120,7 +119,6 @@ examples: linux,pci-domain = <0>; max-link-speed = <4>; bus-range = <0x00 0x08>; - interrupt-parent = <&ioapic1>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &ioapic1 27 1>, @@ -129,7 +127,7 @@ examples: <0 0 0 4 &ioapic1 30 1>; ranges = <0x02000000 0 0xd4000000 0xd4000000 0 0x04000000>; resets = <&rcu0 0x50 0>; - clocks = <&cgu0 LGM_GCLK_PCIE10>; + clocks = <&cgu0 120>; phys = <&cb0phy0>; phy-names = "pcie"; reset-assert-ms = <500>; |