diff options
| author | keith.zhao <keith.zhao@starfivetech.com> | 2023-12-15 05:04:18 +0300 |
|---|---|---|
| committer | Andy Hu <andy.hu@starfivetech.com> | 2024-01-04 13:21:34 +0300 |
| commit | a64eee37e734fb95b32fb36510f173559acd3788 (patch) | |
| tree | 632bda5d6314abebde050ae9528e2908cb690b82 | |
| parent | 1e48db4ca973e1a62efd3dd892514ea70c2f08f0 (diff) | |
| download | linux-a64eee37e734fb95b32fb36510f173559acd3788.tar.xz | |
dts:mipi: clocks re-match
jh7110 mipi pix clock should be sysclock in driver code
in dts, pix clock should be DPI clock
Signed-off-by: keith.zhao <keith.zhao@starfivetech.com>
| -rwxr-xr-x[-rw-r--r--] | arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 79a2f934ede7..1afd18c13cb2 100644..100755 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -1691,7 +1691,7 @@ <&clkvout JH7110_U0_CDNS_DSITX_CLK_APB>, <&clkvout JH7110_U0_CDNS_DSITX_CLK_TXESC>, <&clkvout JH7110_U0_CDNS_DSITX_CLK_DPI>; - clock-names = "sys", "apb", "txesc", "dpi"; + clock-names = "dpi", "apb", "txesc", "sys"; resets = <&rstgen RSTN_U0_CDNS_DSITX_DPI>, <&rstgen RSTN_U0_CDNS_DSITX_APB>, <&rstgen RSTN_U0_CDNS_DSITX_RXESC>, |