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authorjianlong.huang <jianlong.huang@starfivetech.com>2022-04-27 09:19:55 +0300
committerjianlong.huang <jianlong.huang@starfivetech.com>2022-04-27 09:19:55 +0300
commit984974d03367e5f3c1bd16c1464b9f0643584608 (patch)
treeb1e2f66f14bb6d59a236d3266b0bc1a173c911c4
parent4dc4c55cf1b10c43c1f43998380940bd6a5b12dc (diff)
downloadlinux-984974d03367e5f3c1bd16c1464b9f0643584608.tar.xz
modify pwm to starfive adn modify serial interface
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
-rw-r--r--drivers/pwm/pwm-sifive-ptc.c4
-rw-r--r--drivers/tty/serial/8250/8250_dw.c2
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-sifive-ptc.c b/drivers/pwm/pwm-sifive-ptc.c
index 874ad2b89201..8cefe6072391 100644
--- a/drivers/pwm/pwm-sifive-ptc.c
+++ b/drivers/pwm/pwm-sifive-ptc.c
@@ -219,7 +219,7 @@ static int sifive_pwm_ptc_probe(struct platform_device *pdev)
printk("[sifive_pwm_ptc_probe] npwm:0x%lx....\r\n",chip->npwm);
#endif
/* get apb clock frequency */
- ret = of_property_read_u32(node, "sifive,approx-period", &pwm->approx_period);
+ ret = of_property_read_u32(node, "starfive,approx-period", &pwm->approx_period);
#if PTC_DEBUG
printk("[sifive_pwm_ptc_probe] approx_period:%d....\r\n",pwm->approx_period);
@@ -245,6 +245,8 @@ static int sifive_pwm_ptc_probe(struct platform_device *pdev)
if (IS_ERR(pwm->clk)) {
dev_err(dev, "Unable to find controller clock\n");
return PTR_ERR(pwm->clk);
+ } else {
+ pwm->approx_period = (unsigned int)clk_get_rate(pwm->clk);
}
/* after add,it will display as /sys/class/pwm/pwmchip0,0 is chip->base
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index c415ecf3f77f..41c2e97440f4 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -419,7 +419,7 @@ static void dw8250_quirks(struct uart_port *p, struct dw8250_data *data)
p->serial_out = dw8250_serial_out38x;
if (of_device_is_compatible(np, "starfive,jh7100-hsuart") ||
of_device_is_compatible(np, "starfive,jh7100-uart"))
- p->set_termios = serial8250_do_set_termios;
+ p->set_termios = dw8250_do_set_termios;
} else if (acpi_dev_present("APMC0D08", NULL, -1)) {
p->iotype = UPIO_MEM32;