starfive-tech/linux.git/drivers/soc, branch VF2_v3.4.5StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)https://git.radix-linux.su/starfive-tech/linux.git/atom?h=VF2_v3.4.52023-06-27T06:09:29+00:00soc: sifive: l2_cache: Add sifive_ccache_flush_range2023-06-27T06:09:29+00:00Samin Guosamin.guo@starfivetech.com2023-06-27T06:04:15+00:00urn:sha1:f2277bebd1141f78dbaa0bd1cbb793030f487d2f
Add sifive_ccache_flush_range to be compatible with new code
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
soc: sifive: ccache: Add non-coherent DMA handling2023-06-26T10:38:36+00:00Emil Renner Berthingkernel@esmil.dk2022-07-06T10:26:09+00:00urn:sha1:8ef9414156a3c95b8a20e2533a73a2b26ea21acc
Add functions to flush the caches and handle non-coherent DMA.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
pmu: starfive: Fix some power domain can not be disabled2022-09-28T08:13:25+00:00Walker Chenwalker.chen@linux.starfivetech.com2022-09-28T08:08:44+00:00urn:sha1:9732dc60fe1f66160758c3e82977100cb2ce7653
Vout and isp domain can not be disabled during clock tree
is running probe function. This bug has been fixed.
Signed-off-by: Walker Chen <walker.chen@linux.starfivetech.com>
Add a pm function for GPU2022-07-01T07:01:36+00:00Walker Chenwalker.chen@starfivetech.com2022-07-01T06:50:55+00:00urn:sha1:74339056fffc597f379a112a756503837ef20894
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
PMU: Power Domain Controller Driver for JH7110 SOC2022-07-01T02:44:20+00:00Walker Chenwalker.chen@starfivetech.com2022-07-01T01:49:32+00:00urn:sha1:adc191a80f36d926d640a0fcfd9204f44b734953
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
soc: starfive: Remove pmic driver2022-06-07T10:33:10+00:00mason.huomason.huo@starfivetech.com2022-06-07T03:51:34+00:00urn:sha1:544da706959ca4cbcc38f7e2c811297e67ba9ffd
The pmic driver should employ regulator framework,
rather than a driver in soc.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
pmic: pmic use fs_initcall init2022-05-26T01:46:59+00:00changhuang.liangchanghuang.liang@starfivetech.com2022-05-22T04:34:23+00:00urn:sha1:a35f91d90f9d446fb92b624c193894a12a03cf00
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
pmic: modify pmic function2022-05-26T01:41:25+00:00changhuang.liangchanghuang.liang@starfivetech.com2022-05-20T07:52:30+00:00urn:sha1:b22c843ee441208c3d26df0835a5faccc3306f07
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
soc/pmic: add pmic support2022-05-26T01:41:25+00:00changhuang.liangchanghuang.liang@starfivetech.com2022-05-20T07:28:50+00:00urn:sha1:79b90da6fb96935732ae4d6f9c6216de0d107275
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
pmu:starfive: Mask PMU_INT_PCH_FAIL interrupt2022-05-19T03:21:38+00:00saminsamin.guo@starfivetech.com2022-05-19T03:14:20+00:00urn:sha1:635c5dc375f1a1dc300b9640b92fcb89367427ab
p-ch fail interrupt can be ignored.
Signed-off-by: samin <samin.guo@starfivetech.com>