<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/linux.git/drivers/platform/chrome, branch rt-linux-release</title>
<subtitle>StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/linux.git/atom?h=rt-linux-release</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/linux.git/atom?h=rt-linux-release'/>
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<updated>2021-08-31T00:46:55+00:00</updated>
<entry>
<title>platform/chrome: cros_ec_trace: Fix format warnings</title>
<updated>2021-08-31T00:46:55+00:00</updated>
<author>
<name>Gwendal Grignou</name>
<email>gwendal@chromium.org</email>
</author>
<published>2021-08-30T18:00:50+00:00</published>
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<id>urn:sha1:4665584888ad2175831c972c004115741ec799e9</id>
<content type='text'>
Fix printf format issues in new tracing events.

Fixes: 814318242687 ("platform/chrome: cros_ec_trace: Add fields to command traces")

Signed-off-by: Gwendal Grignou &lt;gwendal@chromium.org&gt;
Link: https://lore.kernel.org/r/20210830180050.2077261-1-gwendal@chromium.org
Signed-off-by: Benson Leung &lt;bleung@chromium.org&gt;
</content>
</entry>
<entry>
<title>platform/chrome: cros_ec_typec: Use existing feature check</title>
<updated>2021-08-23T17:24:46+00:00</updated>
<author>
<name>Prashant Malani</name>
<email>pmalani@chromium.org</email>
</author>
<published>2021-08-03T17:36:21+00:00</published>
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<id>urn:sha1:a8db7a3f8ac69e558c7bfbd04802201c39a104ad</id>
<content type='text'>
Replace the cros_typec_feature_supported() function with the
pre-existing cros_ec_check_features() function which does the same
thing.

Signed-off-by: Prashant Malani &lt;pmalani@chromium.org&gt;
Link: https://lore.kernel.org/r/20210803173619.91539-2-pmalani@chromium.org
Signed-off-by: Benson Leung &lt;bleung@chromium.org&gt;
</content>
</entry>
<entry>
<title>platform/chrome: cros_ec_proto: Send command again when timeout occurs</title>
<updated>2021-07-26T23:15:55+00:00</updated>
<author>
<name>Patryk Duda</name>
<email>pdk@semihalf.com</email>
</author>
<published>2021-05-18T14:07:58+00:00</published>
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<id>urn:sha1:3abc16af57c9939724df92fcbda296b25cc95168</id>
<content type='text'>
Sometimes kernel is trying to probe Fingerprint MCU (FPMCU) when it
hasn't initialized SPI yet. This can happen because FPMCU is restarted
during system boot and kernel can send message in short window
eg. between sysjump to RW and SPI initialization.

Cc: &lt;stable@vger.kernel.org&gt; # 4.4+
Signed-off-by: Patryk Duda &lt;pdk@semihalf.com&gt;
Link: https://lore.kernel.org/r/20210518140758.29318-1-pdk@semihalf.com
Signed-off-by: Benson Leung &lt;bleung@chromium.org&gt;
</content>
</entry>
<entry>
<title>platform/chrome: sensorhub: Add trace events for sample</title>
<updated>2021-07-26T11:24:46+00:00</updated>
<author>
<name>Gwendal Grignou</name>
<email>gwendal@chromium.org</email>
</author>
<published>2021-05-14T00:57:33+00:00</published>
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<id>urn:sha1:d453ceb6549af8798913de6a20444cb7200fdb69</id>
<content type='text'>
Add trace event to report samples and their timestamp coming from the
EC. It allows to check if the timestamps are correct and the filter is
working correctly without introducing too much latency.

To enable these events:

cd /sys/kernel/debug/tracing/
echo 1 &gt; events/cros_ec/enable
echo 0 &gt; events/cros_ec/cros_ec_request_start/enable
echo 0 &gt; events/cros_ec/cros_ec_request_done/enable
echo 1 &gt; tracing_on
cat trace_pipe
Observe event flowing:
irq/105-chromeo-95      [000] ....   613.659758: cros_ec_sensorhub_timestamp: ...
irq/105-chromeo-95      [000] ....   613.665219: cros_ec_sensorhub_filter: dx: ...

Signed-off-by: Gwendal Grignou &lt;gwendal@chromium.org&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-5.14/intel-ish' into for-linus</title>
<updated>2021-06-30T07:06:53+00:00</updated>
<author>
<name>Jiri Kosina</name>
<email>jkosina@suse.cz</email>
</author>
<published>2021-06-30T07:06:53+00:00</published>
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<id>urn:sha1:33197bd3e82f5c60487e53d4a291dc2e6031833f</id>
<content type='text'>
- support for ISH DMA on EHL platform from Even Xu
- various code style fixes and cleanups from Lee Jones and Uwe Kleine-König
</content>
</entry>
<entry>
<title>Merge tag 'tag-chrome-platform-for-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux</title>
<updated>2021-05-07T21:49:18+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-05-07T21:49:18+00:00</published>
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<id>urn:sha1:dd860052c99b1e088352bdd4fb7aef46f8d2ef47</id>
<content type='text'>
Pull chrome platform updates from Benson Leung:
 "cros_ec_typec:

   - Changes around DP mode check, hard reset, tracking port change.

  cros_ec misc:

   - wilco_ec: Convert stream-like files from nonseekable to stream open

   - cros_usbpd_notify: Listen to EC_HSOT_EVENT_USB_MUX host event

   - fix format warning in cros_ec_typec"

* tag 'tag-chrome-platform-for-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux:
  platform/chrome: cros_ec_lpc: Use DEFINE_MUTEX() for mutex lock
  platform/chrome: cros_usbpd_notify: Listen to EC_HOST_EVENT_USB_MUX host event
  platform/chrome: cros_ec_typec: Add DP mode check
  platform/chrome: cros_ec_typec: Handle hard reset
  platform/chrome: cros_ec: Add Type C hard reset
  platform/chrome: cros_ec_typec: Track port role
  platform/chrome: cros_ec_typec: fix clang -Wformat warning
  platform/chrome: cros_ec_typec: Check for device within remove function
  platform/chrome: wilco_ec: convert stream-like files from nonseekable_open -&gt; stream_open
</content>
</entry>
<entry>
<title>platform/chrome: cros_ec_lpc: Use DEFINE_MUTEX() for mutex lock</title>
<updated>2021-04-21T08:00:30+00:00</updated>
<author>
<name>Ye Bin</name>
<email>yebin10@huawei.com</email>
</author>
<published>2021-04-09T09:51:38+00:00</published>
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<id>urn:sha1:d61b3f9b91be32f714b218377ab5081932e3ebc2</id>
<content type='text'>
mutex lock can be initialized automatically with DEFINE_MUTEX()
rather than explicitly calling mutex_init().

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: Ye Bin &lt;yebin10@huawei.com&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210409095138.2293869-1-yebin10@huawei.com
</content>
</entry>
<entry>
<title>platform/chrome: cros_usbpd_notify: Listen to EC_HOST_EVENT_USB_MUX host event</title>
<updated>2021-04-21T07:40:37+00:00</updated>
<author>
<name>Pi-Hsun Shih</name>
<email>pihsun@chromium.org</email>
</author>
<published>2021-04-14T06:45:24+00:00</published>
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<id>urn:sha1:4423ee65f76818c8a8994e6f5821372661ea7f89</id>
<content type='text'>
On system that use ACPI, cros_usbpd_notify gets notifications of USB MUX
host event same as PD host events [1]. But currently on system that use
DT, the driver only listen on EC_HOST_EVENT_PD_MCU.

Add EC_HOST_EVENT_USB_MUX to the list of host events, so we have same
behavior on all platforms.

[1]: https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/heads/chromeos-2016.05/src/ec/google/chromeec/acpi/ec.asl#382

Signed-off-by: Pi-Hsun Shih &lt;pihsun@chromium.org&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210414064524.2450908-1-pihsun@chromium.org
</content>
</entry>
<entry>
<title>platform/chrome: cros_ec_typec: Add DP mode check</title>
<updated>2021-04-21T07:33:35+00:00</updated>
<author>
<name>Prashant Malani</name>
<email>pmalani@chromium.org</email>
</author>
<published>2021-04-21T04:21:09+00:00</published>
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<id>urn:sha1:c5bb32f57bf3a30ed03be51f7be0840325ba8b4a</id>
<content type='text'>
There are certain transitional situations where the dp_mode field in the
PD_CONTROL response might not be populated with the right DP pin
assignment value yet. Add a check for that to avoid sending an invalid
value to the Type C mode switch.

Signed-off-by: Prashant Malani &lt;pmalani@chromium.org&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210421042108.2002-1-pmalani@chromium.org
</content>
</entry>
<entry>
<title>platform/chrome: cros_ec_typec: Handle hard reset</title>
<updated>2021-04-20T17:35:42+00:00</updated>
<author>
<name>Prashant Malani</name>
<email>pmalani@chromium.org</email>
</author>
<published>2021-04-20T17:16:13+00:00</published>
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<id>urn:sha1:944b3a639573796debe3cd47298a5dd79810be73</id>
<content type='text'>
The Chrome Embedded Controller (EC) generates a hard reset type C event
when a USB Power Delivery (PD) hard reset is encountered. Handle this
event by unregistering the partner and cable on the associated port and
clearing the event flag.

Cc: Benson Leung &lt;bleung@chromium.org&gt;
Signed-off-by: Prashant Malani &lt;pmalani@chromium.org&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20210420171617.3830902-2-pmalani@chromium.org
</content>
</entry>
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