starfive-tech/linux.git/drivers/net, branch JH7110_VisionFive2_multi_rtos

Merge remote-tracking branch 'sdk/jh7110-6.6.y-devel' into vf2-6.6.y-devel

2024-12-06T06:24:17+00:00

ipms: CAN: Solve CAN packet leakage problem

2024-12-06T05:49:13+00:00

Improve RX interrupt trigger mechanism, reduce buffer trigger condition, and increase polling value to solve the problem of CAN packet leakage. Signed-off-by: William Qiu

net: stmmac: Extend waiting time of dma reset

2024-10-10T03:05:20+00:00

Fix dma reset failure happening when disabling network. Signed-off-by: Hal Feng

Merge tag 'JH7110_SDK_6.6_v5.12.3' into vf2-6.6.y-devel

2024-06-21T09:31:05+00:00

net: phy: motorcomm: Add fe_tx_delay configuration support

2024-06-19T06:00:22+00:00

fe_tx_delay configuration is necessary for 100/10Mbps transmission in some cases such as JH7110 Devkits board. Signed-off-by: Hal Feng

driver: net: wireless: VF2 support eswin wifi module for kernel 6.6

2024-03-13T10:42:12+00:00

VF2 support eswin wifi module for kernel 6.6 Signed-off-by: Ziv Xu

driver: net: wireless: VF2 support aic8800 wifi module for kernel 6.6

2024-03-13T10:40:29+00:00

VF2 support aic8800 wifi module for kernel 6.6 Signed-off-by: Ziv Xu

CAN: starfive - Add CAN engine support

2024-03-05T07:18:29+00:00

Adding device probe StarFive CAN module. Signed-off-by: William Qiu Signed-off-by: Hal Feng

net: phy: realtek: Fix rtl8211f_config_init() for RTL8211F(D)(I)-VD-CG PHY

2024-03-01T12:35:10+00:00

[ Upstream commit 3489182b11d35f1944c1245fc9c4867cf622c50f ] Commit bb726b753f75 ("net: phy: realtek: add support for RTL8211F(D)(I)-VD-CG") extended support of the driver from the existing support for RTL8211F(D)(I)-CG PHY to the newer RTL8211F(D)(I)-VD-CG PHY. While that commit indicated that the RTL8211F_PHYCR2 register is not supported by the "VD-CG" PHY model and therefore updated the corresponding section in rtl8211f_config_init() to be invoked conditionally, the call to "genphy_soft_reset()" was left as-is, when it should have also been invoked conditionally. This is because the call to "genphy_soft_reset()" was first introduced by the commit 0a4355c2b7f8 ("net: phy: realtek: add dt property to disable CLKOUT clock") since the RTL8211F guide indicates that a PHY reset should be issued after setting bits in the PHYCR2 register. As the PHYCR2 register is not applicable to the "VD-CG" PHY model, fix the rtl8211f_config_init() function by invoking "genphy_soft_reset()" conditionally based on the presence of the "PHYCR2" register. Fixes: bb726b753f75 ("net: phy: realtek: add support for RTL8211F(D)(I)-VD-CG") Signed-off-by: Siddharth Vadapalli Reviewed-by: Simon Horman Link: https://lore.kernel.org/r/20240220070007.968762-1-s-vadapalli@ti.com Signed-off-by: Paolo Abeni Signed-off-by: Sasha Levin

net: sparx5: Add spinlock for frame transmission from CPU

2024-03-01T12:35:09+00:00

[ Upstream commit 603ead96582d85903baec2d55f021b8dac5c25d2 ] Both registers used when doing manual injection or fdma injection are shared between all the net devices of the switch. It was noticed that when having two process which each of them trying to inject frames on different ethernet ports, that the HW started to behave strange, by sending out more frames then expected. When doing fdma injection it is required to set the frame in the DCB and then make sure that the next pointer of the last DCB is invalid. But because there is no locks for this, then easily this pointer between the DCB can be broken and then it would create a loop of DCBs. And that means that the HW will continuously transmit these frames in a loop. Until the SW will break this loop. Therefore to fix this issue, add a spin lock for when accessing the registers for manual or fdma injection. Signed-off-by: Horatiu Vultur Reviewed-by: Daniel Machon Fixes: f3cad2611a77 ("net: sparx5: add hostmode with phylink support") Link: https://lore.kernel.org/r/20240219080043.1561014-1-horatiu.vultur@microchip.com Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin