starfive-tech/linux.git/drivers/mmc, branch VF2_v3.4.5

mmc: starfive: Unify the MMC code on evb/vf2/devkits

2023-08-02T08:14:50+00:00

Unify the MMC code on evb/vf2/devkits to resolve conflicts when merging the code. Signed-off-by: William Qiu

mmc: starfive: change the tuning method

2023-07-26T08:26:42+00:00

Previously, the system controller register was used to do tuning, but it was only useful for HS200, so now change the tuning mode to use the UHS_REG_EXT register, and delete the previous code about syscon Signed-off-by: William Qiu

starfive: copyright: modify related description

2023-04-14T09:01:26+00:00

Modify related description. Signed-off-by: William Qiu

hibernation: mmc: change the runtime PM API

2023-02-13T02:04:21+00:00

Use the common API to do the runtime PM. Signed-off-by: William Qiu

SDIO:starfive:modify SDIO/EMMC runtime PM callback function

2022-10-27T05:57:27+00:00

modify SDIO/EMMC runtime PM callback function. Signed-off-by: William Qiu

SDIO:starfive:add SDIO/EMMC runtime pm ops

2022-10-27T05:56:39+00:00

add SDIO/EMMC runtime pm ops. Signed-off-by: William Qiu

SDIO:starfive:Add the starfive private driver for SDIO

2022-09-09T04:39:12+00:00

Add the starfive private driver for SDIO Signed-off-by: William Qiu

mmc: tmio: reenable card irqs after the reset callback

2021-10-28T21:19:32+00:00

The reset callback may clear the internal card detect interrupts, so make sure to reenable them if needed. Fixes: b4d86f37eacb ("mmc: renesas_sdhi: do hard reset if possible") Reported-by: Biju Das Signed-off-by: Wolfram Sang Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20211028195149.8003-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson

mmc: mediatek: Move cqhci init behind ungate clock

2021-10-28T09:55:20+00:00

We must enable clock before cqhci init, because crypto needs read information from CQHCI registers, otherwise, it will hang in MediaTek mmc host controller. Signed-off-by: Wenbin Mei Fixes: 88bd652b3c74 ("mmc: mediatek: command queue support") Cc: stable@vger.kernel.org Acked-by: Chaotian Jing Link: https://lore.kernel.org/r/20211028022049.22129-1-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson

mmc: cqhci: clear HALT state after CQE enable

2021-10-26T15:34:57+00:00

While mmc0 enter suspend state, we need halt CQE to send legacy cmd(flush cache) and disable cqe, for resume back, we enable CQE and not clear HALT state. In this case MediaTek mmc host controller will keep the value for HALT state after CQE disable/enable flow, so the next CQE transfer after resume will be timeout due to CQE is in HALT state, the log as below: <4>.(4)[318:kworker/4:1H]mmc0: cqhci: timeout for tag 2 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: ============ CQHCI REGISTER DUMP =========== <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Caps: 0x100020b6 | Version: 0x00000510 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Config: 0x00001103 | Control: 0x00000001 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Int stat: 0x00000000 | Int enab: 0x00000006 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Int sig: 0x00000006 | Int Coal: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: TDL base: 0xfd05f000 | TDL up32: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Doorbell: 0x8000203c | TCN: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Task clr: 0x00000000 | SSC1: 0x00001000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: SSC2: 0x00000001 | DCMD rsp: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: Resp idx: 0x00000000 | Resp arg: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: CRNQP: 0x00000000 | CRNQDUN: 0x00000000 <4>.(4)[318:kworker/4:1H]mmc0: cqhci: CRNQIS: 0x00000000 | CRNQIE: 0x00000000 This change check HALT state after CQE enable, if CQE is in HALT state, we will clear it. Signed-off-by: Wenbin Mei Cc: stable@vger.kernel.org Acked-by: Adrian Hunter Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Link: https://lore.kernel.org/r/20211026070812.9359-1-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson