starfive-tech/linux.git/Documentation/devicetree/bindings/dma/xilinx, branch visionfive

dt-bindings: xilinx: Deprecate header with firmware constants

2025-02-21T06:58:35+00:00

Firmware contants do not fit the purpose of bindings because they are not independent IDs for abstractions. They are more or less just contants which better to wire via header with DT which is using it. That's why add deprecated message to dt binding header and also update existing dt bindings not to use macros from the header and replace them by it's value. Actually value is not relevant because it is only example. The similar changes have been done by commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header with register constants"). Acked-by: Jonathan Cameron Acked-by: Vinod Koul Acked-by: Conor Dooley Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/2a6f0229522327939e6893565e540b75f854a37b.1738600745.git.michal.simek@amd.com

dt-bindings: dmaengine: zynqmp_dma: Add a new compatible string

2024-08-29T17:16:16+00:00

Add compatible string "amd,versal2-dma-1.0" to support AMD Versal Gen 2 platform. AMD Versal Gen 2 has 8 LPD DMA IPs in PS that can be used as general purpose DMAs which is designed to support memory to memory and memory to IO buffer transfer. Versal Gen 2 DMA IP has different interrupt register offset. Signed-off-by: Abin Joseph Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240808100024.317497-2-abin.joseph@amd.com Signed-off-by: Vinod Koul

dt-bindings: dmaengine: zynqmp_dma: add xlnx,bus-width required property

2023-09-28T11:22:40+00:00

xlnx,bus-width is a required property. In yaml conversion somehow it got missed out. Bring it back and mention it in required list. Also add Harini and myself to the maintainer list. Fixes: 5a04982df8da ("dt-bindings: dmaengine: zynqmp_dma: convert to yaml") Signed-off-by: Radhey Shyam Pandey Acked-by: Krzysztof Kozlowski Reviewed-by: Michael Tretter Reviewed-by: Peter Korsgaard Link: https://lore.kernel.org/r/1695216326-3841352-1-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul

dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property

2023-08-21T13:10:36+00:00

Add an optional AXI DMA property 'xlnx,irq-delay'. It specifies interrupt timeout value and causes the DMA engine to generate an interrupt after the delay time period has expired. Timer begins counting at the end of a packet and resets with receipt of a new packet or a timeout event occurs. This property is useful when AXI DMA is connected to the streaming IP i.e axiethernet where inter packet latency is critical while still taking the benefit of interrupt coalescing. Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Link: https://lore.kernel.org/r/1691387509-2113129-3-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul

dt-bindings: dmaengine: xilinx_dma:Add xlnx,axistream-connected property

2023-08-21T13:10:36+00:00

Add an optional AXI DMA property 'xlnx,axistream-connected'. This can be specified to indicate that DMA is connected to a streaming IP in the hardware design and dma driver needs to do some additional handling i.e pass metadata and perform streaming IP specific configuration. Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Link: https://lore.kernel.org/r/1691387509-2113129-2-git-send-email-radhey.shyam.pandey@amd.com Signed-off-by: Vinod Koul

dt-bindings: dma: xilinx: Add power-domains to xlnx,zynqmp-dpdma

2023-05-16T17:46:54+00:00

DP DMA has own power domain that's why describe required power-domain property. Signed-off-by: Michal Simek Acked-by: Conor Dooley Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/8f5651634df338743f95a7253a741f9ddc92487d.1683891609.git.michal.simek@amd.com Signed-off-by: Vinod Koul

dt-bindings: dma: Drop unneeded quotes

2023-04-12T17:48:44+00:00

Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring Acked-by: Peter Ujfalusi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230331182141.1900348-1-robh@kernel.org Signed-off-by: Vinod Koul

dt-bindings: drop redundant part of title (end)

2022-12-16T17:41:49+00:00

The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop trailing "Devicetree bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: $.*$ [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski Acked-by: Alexandre Belloni Acked-by: Jonathan Cameron # IIO Reviewed-by: Jonathan Cameron Acked-by: Ulf Hansson # MMC Acked-by: Stephen Boyd # clk Acked-by: Dmitry Torokhov # input Acked-by: Mark Brown Acked-by: Hans Verkuil # media Acked-by: Sebastian Reichel # power Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring

dt-bindings: dmaengine: xilinx_dma: Add MCMDA channel ID index description

2022-04-20T10:14:37+00:00

MCDMA IP provides up to 16 multiple channels of data movement each on MM2S and S2MM paths. Inline with implementation, in the binding add description for the channel ID start index and mention that it's fixed irrespective of the MCDMA IP configuration(number of read/write channels). Signed-off-by: Radhey Shyam Pandey Acked-by: Rob Herring Link: https://lore.kernel.org/r/1649939061-6675-1-git-send-email-radhey.shyam.pandey@xilinx.com Signed-off-by: Vinod Koul

dt-bindings: dmaengine: zynqmp_dma: convert to yaml

2022-01-23T15:10:01+00:00

Convert the Xilinx ZynqMP DMA engine bindings to Yaml. Signed-off-by: Michael Tretter Signed-off-by: Rob Herring Link: https://lore.kernel.org/r/20220112151541.1328732-2-m.tretter@pengutronix.de