summaryrefslogtreecommitdiff
path: root/tools/build/Makefile.build
blob: 10df57237a66d26913a4baabd5949f3459f0a534 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
###
# Main build makefile.
#
#  Lots of this code have been borrowed or heavily inspired from parts
#  of kbuild code, which is not credited, but mostly developed by:
#
#  Copyright (C) Sam Ravnborg <sam@mars.ravnborg.org>, 2015
#  Copyright (C) Linus Torvalds <torvalds@linux-foundation.org>, 2015
#

PHONY := __build
__build:

ifeq ($(V),1)
  quiet =
  Q =
else
  quiet=quiet_
  Q=@
endif

build-dir := $(srctree)/tools/build

# Generic definitions
include $(build-dir)/Build.include

# do not force detected configuration
-include .config-detected

# Init all relevant variables used in build files so
# 1) they have correct type
# 2) they do not inherit any value from the environment
subdir-y     :=
obj-y        :=
subdir-y     :=
subdir-obj-y :=

# Build definitions
build-file := $(dir)/Build
include $(build-file)

quiet_cmd_flex  = FLEX     $@
quiet_cmd_bison = BISON    $@

# Create directory unless it exists
quiet_cmd_mkdir = MKDIR    $(dir $@)
      cmd_mkdir = mkdir -p $(dir $@)
     rule_mkdir = $(if $(wildcard $(dir $@)),,@$(call echo-cmd,mkdir) $(cmd_mkdir))

# Compile command
quiet_cmd_cc_o_c = CC       $@
      cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<

quiet_cmd_cc_i_c = CPP      $@
      cmd_cc_i_c = $(CC) $(c_flags) -E -o $@ $<

quiet_cmd_cc_s_c = AS       $@
      cmd_cc_s_c = $(CC) $(c_flags) -S -o $@ $<

# Link agregate command
# If there's nothing to link, create empty $@ object.
quiet_cmd_ld_multi = LD       $@
      cmd_ld_multi = $(if $(strip $(obj-y)),\
		       $(LD) -r -o $@ $(obj-y),rm -f $@; $(AR) rcs $@)

# Build rules
$(OUTPUT)%.o: %.c FORCE
	$(call rule_mkdir)
	$(call if_changed_dep,cc_o_c)

$(OUTPUT)%.o: %.S FORCE
	$(call rule_mkdir)
	$(call if_changed_dep,cc_o_c)

$(OUTPUT)%.i: %.c FORCE
	$(call rule_mkdir)
	$(call if_changed_dep,cc_i_c)

$(OUTPUT)%.i: %.S FORCE
	$(call rule_mkdir)
	$(call if_changed_dep,cc_i_c)

$(OUTPUT)%.s: %.c FORCE
	$(call rule_mkdir)
	$(call if_changed_dep,cc_s_c)

# Gather build data:
#   obj-y        - list of build objects
#   subdir-y     - list of directories to nest
#   subdir-obj-y - list of directories objects 'dir/$(obj)-in.o'
obj-y        := $($(obj)-y)
subdir-y     := $(patsubst %/,%,$(filter %/, $(obj-y)))
obj-y        := $(patsubst %/, %/$(obj)-in.o, $(obj-y))
subdir-obj-y := $(filter %/$(obj)-in.o, $(obj-y))

# '$(OUTPUT)/dir' prefix to all objects
prefix       := $(subst ./,,$(OUTPUT)$(dir)/)
obj-y        := $(addprefix $(prefix),$(obj-y))
subdir-obj-y := $(addprefix $(prefix),$(subdir-obj-y))

# Final '$(obj)-in.o' object
in-target := $(prefix)$(obj)-in.o

PHONY += $(subdir-y)

$(subdir-y):
	$(Q)$(MAKE) -f $(build-dir)/Makefile.build dir=$(dir)/$@ obj=$(obj)

$(sort $(subdir-obj-y)): $(subdir-y) ;

$(in-target): $(obj-y) FORCE
	$(call rule_mkdir)
	$(call if_changed,ld_multi)

__build: $(in-target)
	@:

PHONY += FORCE
FORCE:

# Include all cmd files to get all the dependency rules
# for all objects included
targets   := $(wildcard $(sort $(obj-y) $(in-target) $(MAKECMDGOALS)))
cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))

ifneq ($(cmd_files),)
  include $(cmd_files)
endif

.PHONY: $(PHONY)