1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
4534
4535
4536
4537
4538
4539
4540
4541
4542
4543
4544
4545
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561
4562
4563
4564
4565
4566
4567
4568
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578
4579
4580
4581
4582
4583
4584
4585
4586
4587
4588
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600
4601
4602
4603
4604
4605
4606
4607
4608
4609
4610
4611
4612
4613
4614
4615
4616
4617
4618
4619
4620
4621
4622
4623
4624
4625
4626
4627
4628
4629
4630
4631
4632
4633
4634
4635
4636
4637
4638
4639
4640
4641
4642
4643
4644
4645
4646
4647
4648
4649
4650
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662
4663
4664
4665
4666
4667
4668
4669
4670
4671
4672
4673
4674
4675
4676
4677
4678
4679
4680
4681
4682
4683
4684
4685
4686
4687
4688
4689
4690
4691
4692
4693
4694
4695
4696
4697
4698
4699
4700
4701
4702
4703
4704
4705
4706
4707
4708
4709
4710
4711
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728
4729
4730
4731
4732
4733
4734
4735
4736
4737
4738
4739
4740
4741
4742
4743
4744
4745
4746
4747
4748
4749
4750
4751
4752
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762
4763
4764
4765
4766
4767
4768
4769
4770
4771
4772
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785
4786
4787
4788
4789
4790
4791
4792
4793
4794
4795
4796
4797
4798
4799
4800
4801
4802
4803
4804
4805
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816
4817
4818
4819
4820
4821
4822
4823
4824
4825
4826
4827
4828
4829
4830
4831
4832
4833
4834
4835
4836
4837
4838
4839
4840
4841
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853
4854
4855
4856
4857
4858
4859
4860
4861
4862
4863
4864
4865
4866
4867
4868
4869
4870
4871
4872
4873
4874
4875
4876
4877
4878
4879
4880
4881
4882
4883
4884
4885
4886
4887
4888
4889
4890
4891
4892
4893
4894
4895
4896
4897
4898
4899
4900
4901
4902
4903
4904
4905
4906
4907
4908
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921
4922
4923
4924
4925
4926
4927
4928
4929
4930
4931
4932
4933
4934
4935
4936
4937
4938
4939
4940
4941
4942
4943
4944
4945
4946
4947
4948
4949
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959
4960
4961
4962
4963
4964
4965
4966
4967
4968
4969
4970
4971
4972
4973
4974
4975
4976
4977
4978
4979
4980
4981
4982
4983
4984
4985
4986
4987
4988
4989
4990
4991
4992
4993
4994
4995
4996
4997
4998
4999
5000
5001
5002
5003
5004
5005
5006
5007
5008
5009
5010
5011
5012
5013
5014
5015
5016
5017
5018
5019
5020
5021
5022
5023
5024
5025
5026
5027
5028
5029
5030
5031
5032
5033
5034
5035
5036
5037
5038
5039
5040
5041
5042
5043
5044
5045
5046
5047
5048
5049
5050
5051
5052
5053
5054
5055
5056
5057
5058
5059
5060
5061
5062
5063
5064
5065
5066
5067
5068
5069
5070
5071
5072
5073
5074
5075
5076
5077
5078
5079
5080
5081
5082
5083
5084
5085
5086
5087
5088
5089
5090
5091
5092
5093
5094
5095
5096
5097
5098
5099
5100
5101
5102
5103
5104
5105
5106
5107
5108
5109
5110
5111
5112
5113
5114
5115
5116
5117
5118
5119
5120
5121
5122
5123
5124
5125
5126
5127
5128
5129
5130
5131
5132
5133
5134
5135
5136
5137
5138
5139
5140
5141
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151
5152
5153
5154
5155
5156
5157
5158
5159
5160
5161
5162
5163
5164
5165
5166
5167
5168
5169
5170
5171
5172
5173
5174
5175
5176
5177
5178
5179
5180
5181
5182
5183
5184
5185
5186
5187
5188
5189
5190
5191
5192
5193
5194
5195
5196
5197
5198
5199
5200
5201
5202
5203
5204
5205
5206
5207
5208
5209
5210
5211
5212
5213
5214
5215
5216
5217
5218
5219
5220
5221
5222
5223
5224
5225
5226
5227
5228
5229
5230
5231
5232
5233
5234
5235
5236
5237
5238
5239
5240
5241
5242
5243
5244
5245
5246
5247
5248
5249
5250
5251
5252
5253
5254
5255
5256
5257
5258
5259
5260
5261
5262
5263
5264
5265
5266
5267
5268
5269
5270
5271
5272
5273
5274
5275
5276
5277
5278
5279
5280
5281
5282
5283
5284
5285
5286
5287
5288
5289
5290
5291
5292
5293
5294
5295
5296
5297
5298
5299
5300
5301
5302
5303
5304
5305
5306
5307
5308
5309
5310
5311
5312
5313
5314
5315
5316
5317
5318
5319
5320
5321
5322
5323
5324
5325
5326
5327
5328
5329
5330
5331
5332
5333
5334
5335
5336
5337
5338
5339
5340
5341
5342
5343
5344
5345
5346
5347
5348
5349
5350
5351
5352
5353
5354
5355
5356
5357
5358
5359
5360
5361
5362
5363
5364
5365
5366
5367
5368
5369
5370
5371
5372
5373
5374
5375
5376
5377
5378
5379
5380
5381
5382
5383
5384
5385
5386
5387
5388
5389
5390
5391
5392
5393
5394
5395
5396
5397
5398
5399
5400
5401
5402
5403
5404
5405
5406
5407
5408
5409
5410
5411
5412
5413
5414
5415
5416
5417
5418
5419
5420
5421
5422
5423
5424
5425
5426
5427
5428
5429
5430
5431
5432
5433
5434
5435
5436
5437
5438
5439
5440
5441
5442
5443
5444
5445
5446
5447
5448
5449
5450
5451
5452
5453
5454
5455
5456
5457
5458
5459
5460
5461
5462
5463
5464
5465
5466
5467
5468
5469
5470
5471
5472
5473
5474
5475
5476
5477
5478
5479
5480
5481
5482
5483
5484
5485
5486
5487
5488
5489
5490
5491
5492
5493
5494
5495
5496
5497
5498
5499
5500
5501
5502
5503
5504
5505
5506
5507
5508
5509
5510
5511
5512
5513
5514
5515
5516
5517
5518
5519
5520
5521
5522
5523
5524
5525
5526
5527
5528
5529
5530
5531
5532
5533
5534
5535
5536
5537
5538
5539
5540
5541
5542
5543
5544
5545
5546
5547
5548
5549
5550
5551
5552
5553
5554
5555
5556
5557
5558
5559
5560
5561
5562
5563
5564
5565
5566
5567
5568
5569
5570
5571
5572
5573
5574
5575
5576
5577
5578
5579
5580
5581
5582
5583
5584
5585
5586
5587
5588
5589
5590
5591
5592
5593
5594
5595
5596
5597
5598
5599
5600
5601
5602
5603
5604
5605
5606
5607
5608
5609
5610
5611
5612
5613
5614
5615
5616
5617
5618
5619
5620
5621
5622
5623
5624
5625
5626
5627
5628
5629
5630
5631
5632
5633
5634
5635
5636
5637
5638
5639
5640
5641
5642
5643
5644
5645
5646
5647
5648
5649
5650
5651
5652
5653
5654
5655
5656
5657
5658
5659
5660
5661
5662
5663
5664
5665
5666
5667
5668
5669
5670
5671
5672
5673
5674
5675
5676
5677
5678
5679
5680
5681
5682
5683
5684
5685
5686
5687
5688
5689
5690
5691
5692
5693
5694
5695
5696
5697
5698
5699
5700
5701
5702
5703
5704
5705
5706
5707
5708
5709
5710
5711
5712
5713
5714
5715
5716
5717
5718
5719
5720
5721
5722
5723
5724
5725
5726
5727
5728
5729
5730
5731
5732
5733
5734
5735
5736
5737
5738
5739
5740
5741
5742
5743
5744
5745
5746
5747
5748
5749
5750
5751
5752
5753
5754
5755
5756
5757
5758
5759
5760
5761
5762
5763
5764
5765
5766
5767
5768
5769
5770
5771
5772
5773
5774
5775
5776
5777
5778
5779
5780
5781
5782
5783
5784
5785
5786
5787
5788
5789
5790
5791
5792
5793
5794
5795
5796
5797
5798
5799
5800
5801
5802
5803
5804
5805
5806
5807
5808
5809
5810
5811
5812
5813
5814
5815
5816
5817
5818
5819
5820
5821
5822
5823
5824
5825
5826
5827
5828
5829
5830
5831
5832
5833
5834
5835
5836
5837
5838
5839
5840
5841
5842
5843
5844
5845
5846
5847
5848
5849
5850
5851
5852
5853
5854
5855
5856
5857
5858
5859
5860
5861
5862
5863
5864
5865
5866
5867
5868
5869
5870
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880
5881
5882
5883
5884
5885
5886
5887
5888
5889
5890
5891
5892
5893
5894
5895
5896
5897
5898
5899
5900
5901
5902
5903
5904
5905
5906
5907
5908
5909
5910
5911
5912
5913
5914
5915
5916
5917
5918
5919
5920
5921
5922
5923
5924
5925
5926
5927
5928
5929
5930
5931
5932
5933
5934
5935
5936
5937
5938
5939
5940
5941
5942
5943
5944
5945
5946
5947
5948
5949
5950
5951
5952
5953
5954
5955
5956
5957
5958
5959
5960
5961
5962
5963
5964
5965
5966
5967
5968
5969
5970
5971
5972
5973
5974
5975
5976
5977
5978
5979
5980
5981
5982
5983
5984
5985
5986
5987
5988
5989
5990
5991
5992
5993
5994
5995
5996
5997
5998
5999
6000
6001
6002
6003
6004
6005
6006
6007
6008
6009
6010
6011
6012
6013
6014
6015
6016
6017
6018
6019
6020
6021
6022
6023
6024
6025
6026
6027
6028
6029
6030
6031
6032
6033
6034
6035
6036
6037
6038
6039
6040
6041
6042
6043
6044
6045
6046
6047
6048
6049
6050
6051
6052
6053
6054
6055
6056
6057
6058
6059
6060
6061
6062
6063
6064
6065
6066
6067
6068
6069
6070
6071
6072
6073
6074
6075
6076
6077
6078
6079
6080
6081
6082
6083
6084
6085
6086
6087
6088
6089
6090
6091
6092
6093
6094
6095
6096
6097
6098
6099
6100
6101
6102
6103
6104
6105
6106
6107
6108
6109
6110
6111
6112
6113
6114
6115
6116
6117
6118
6119
6120
6121
6122
6123
6124
6125
6126
6127
6128
6129
6130
6131
6132
6133
6134
6135
6136
6137
6138
6139
6140
6141
6142
6143
6144
6145
6146
6147
6148
6149
6150
6151
6152
6153
6154
6155
6156
6157
6158
6159
6160
6161
6162
6163
6164
6165
6166
6167
6168
6169
6170
6171
6172
6173
6174
6175
6176
6177
6178
6179
6180
6181
6182
6183
6184
6185
6186
6187
6188
6189
6190
6191
6192
6193
6194
6195
6196
6197
6198
6199
6200
6201
6202
6203
6204
6205
6206
6207
6208
6209
6210
6211
6212
6213
6214
6215
6216
6217
6218
6219
6220
6221
6222
6223
6224
6225
6226
6227
6228
6229
6230
6231
6232
6233
6234
6235
6236
6237
6238
6239
6240
6241
6242
6243
6244
6245
6246
6247
6248
6249
6250
6251
6252
6253
6254
6255
6256
6257
6258
6259
6260
6261
6262
6263
6264
6265
6266
6267
6268
6269
6270
6271
6272
6273
6274
6275
6276
6277
6278
6279
6280
6281
6282
6283
6284
6285
6286
6287
6288
6289
6290
6291
6292
6293
6294
6295
6296
6297
6298
6299
6300
6301
6302
6303
6304
6305
6306
6307
6308
6309
6310
6311
6312
6313
6314
6315
6316
6317
6318
6319
6320
6321
6322
6323
6324
6325
6326
6327
6328
6329
6330
6331
6332
6333
6334
6335
6336
6337
6338
6339
6340
6341
6342
6343
6344
6345
6346
6347
6348
6349
6350
6351
6352
6353
6354
6355
6356
6357
6358
6359
6360
6361
6362
6363
6364
6365
6366
6367
6368
6369
6370
6371
6372
6373
6374
6375
6376
6377
6378
6379
6380
6381
6382
6383
6384
6385
6386
6387
6388
6389
6390
6391
6392
6393
6394
6395
6396
6397
6398
6399
6400
6401
6402
6403
6404
6405
6406
6407
6408
6409
6410
6411
6412
6413
6414
6415
6416
6417
6418
6419
6420
6421
6422
6423
6424
6425
6426
6427
6428
6429
6430
6431
6432
6433
6434
6435
6436
6437
6438
6439
6440
6441
6442
6443
6444
6445
6446
6447
6448
6449
6450
6451
6452
6453
6454
6455
6456
6457
6458
6459
6460
6461
6462
6463
6464
6465
6466
6467
6468
6469
6470
6471
6472
6473
6474
6475
6476
6477
6478
6479
6480
6481
6482
6483
6484
6485
6486
6487
6488
6489
6490
6491
6492
6493
6494
6495
6496
6497
6498
6499
6500
6501
6502
6503
6504
6505
6506
6507
6508
6509
6510
6511
6512
6513
6514
6515
6516
6517
6518
6519
6520
6521
6522
6523
6524
6525
6526
6527
6528
6529
6530
6531
6532
6533
6534
6535
6536
6537
6538
6539
6540
6541
6542
6543
6544
6545
6546
6547
6548
6549
6550
6551
6552
6553
6554
6555
6556
6557
6558
6559
6560
6561
6562
6563
6564
6565
6566
6567
6568
6569
6570
6571
6572
6573
6574
6575
6576
6577
6578
6579
6580
6581
6582
6583
6584
6585
6586
6587
6588
6589
6590
6591
6592
6593
6594
6595
6596
6597
6598
6599
6600
6601
6602
6603
6604
6605
6606
6607
6608
6609
6610
6611
6612
6613
6614
6615
6616
6617
6618
6619
6620
6621
6622
6623
6624
6625
6626
6627
6628
|
/*
* Copyright (c) 2005-2011 Atheros Communications Inc.
* Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef _WMI_H_
#define _WMI_H_
#include <linux/types.h>
#include <net/mac80211.h>
/*
* This file specifies the WMI interface for the Unified Software
* Architecture.
*
* It includes definitions of all the commands and events. Commands are
* messages from the host to the target. Events and Replies are messages
* from the target to the host.
*
* Ownership of correctness in regards to WMI commands belongs to the host
* driver and the target is not required to validate parameters for value,
* proper range, or any other checking.
*
* Guidelines for extending this interface are below.
*
* 1. Add new WMI commands ONLY within the specified range - 0x9000 - 0x9fff
*
* 2. Use ONLY u32 type for defining member variables within WMI
* command/event structures. Do not use u8, u16, bool or
* enum types within these structures.
*
* 3. DO NOT define bit fields within structures. Implement bit fields
* using masks if necessary. Do not use the programming language's bit
* field definition.
*
* 4. Define macros for encode/decode of u8, u16 fields within
* the u32 variables. Use these macros for set/get of these fields.
* Try to use this to optimize the structure without bloating it with
* u32 variables for every lower sized field.
*
* 5. Do not use PACK/UNPACK attributes for the structures as each member
* variable is already 4-byte aligned by virtue of being a u32
* type.
*
* 6. Comment each parameter part of the WMI command/event structure by
* using the 2 stars at the begining of C comment instead of one star to
* enable HTML document generation using Doxygen.
*
*/
/* Control Path */
struct wmi_cmd_hdr {
__le32 cmd_id;
} __packed;
#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
#define WMI_CMD_HDR_CMD_ID_LSB 0
#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
#define WMI_CMD_HDR_PLT_PRIV_LSB 24
#define HTC_PROTOCOL_VERSION 0x0002
#define WMI_PROTOCOL_VERSION 0x0002
/*
* There is no signed version of __le32, so for a temporary solution come
* up with our own version. The idea is from fs/ntfs/types.h.
*
* Use a_ prefix so that it doesn't conflict if we get proper support to
* linux/types.h.
*/
typedef __s32 __bitwise a_sle32;
static inline a_sle32 a_cpu_to_sle32(s32 val)
{
return (__force a_sle32)cpu_to_le32(val);
}
static inline s32 a_sle32_to_cpu(a_sle32 val)
{
return le32_to_cpu((__force __le32)val);
}
enum wmi_service {
WMI_SERVICE_BEACON_OFFLOAD = 0,
WMI_SERVICE_SCAN_OFFLOAD,
WMI_SERVICE_ROAM_OFFLOAD,
WMI_SERVICE_BCN_MISS_OFFLOAD,
WMI_SERVICE_STA_PWRSAVE,
WMI_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_SERVICE_AP_UAPSD,
WMI_SERVICE_AP_DFS,
WMI_SERVICE_11AC,
WMI_SERVICE_BLOCKACK,
WMI_SERVICE_PHYERR,
WMI_SERVICE_BCN_FILTER,
WMI_SERVICE_RTT,
WMI_SERVICE_RATECTRL,
WMI_SERVICE_WOW,
WMI_SERVICE_RATECTRL_CACHE,
WMI_SERVICE_IRAM_TIDS,
WMI_SERVICE_ARPNS_OFFLOAD,
WMI_SERVICE_NLO,
WMI_SERVICE_GTK_OFFLOAD,
WMI_SERVICE_SCAN_SCH,
WMI_SERVICE_CSA_OFFLOAD,
WMI_SERVICE_CHATTER,
WMI_SERVICE_COEX_FREQAVOID,
WMI_SERVICE_PACKET_POWER_SAVE,
WMI_SERVICE_FORCE_FW_HANG,
WMI_SERVICE_GPIO,
WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
WMI_SERVICE_STA_KEEP_ALIVE,
WMI_SERVICE_TX_ENCAP,
WMI_SERVICE_BURST,
WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
WMI_SERVICE_ROAM_SCAN_OFFLOAD,
WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
WMI_SERVICE_EARLY_RX,
WMI_SERVICE_STA_SMPS,
WMI_SERVICE_FWTEST,
WMI_SERVICE_STA_WMMAC,
WMI_SERVICE_TDLS,
WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
WMI_SERVICE_ADAPTIVE_OCS,
WMI_SERVICE_BA_SSN_SUPPORT,
WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
WMI_SERVICE_WLAN_HB,
WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
WMI_SERVICE_BATCH_SCAN,
WMI_SERVICE_QPOWER,
WMI_SERVICE_PLMREQ,
WMI_SERVICE_THERMAL_MGMT,
WMI_SERVICE_RMC,
WMI_SERVICE_MHF_OFFLOAD,
WMI_SERVICE_COEX_SAR,
WMI_SERVICE_BCN_TXRATE_OVERRIDE,
WMI_SERVICE_NAN,
WMI_SERVICE_L1SS_STAT,
WMI_SERVICE_ESTIMATE_LINKSPEED,
WMI_SERVICE_OBSS_SCAN,
WMI_SERVICE_TDLS_OFFCHAN,
WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
WMI_SERVICE_IBSS_PWRSAVE,
WMI_SERVICE_LPASS,
WMI_SERVICE_EXTSCAN,
WMI_SERVICE_D0WOW,
WMI_SERVICE_HSOFFLOAD,
WMI_SERVICE_ROAM_HO_OFFLOAD,
WMI_SERVICE_RX_FULL_REORDER,
WMI_SERVICE_DHCP_OFFLOAD,
WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
WMI_SERVICE_MDNS_OFFLOAD,
WMI_SERVICE_SAP_AUTH_OFFLOAD,
WMI_SERVICE_ATF,
WMI_SERVICE_COEX_GPIO,
WMI_SERVICE_ENHANCED_PROXY_STA,
WMI_SERVICE_TT,
WMI_SERVICE_PEER_CACHING,
WMI_SERVICE_AUX_SPECTRAL_INTF,
WMI_SERVICE_AUX_CHAN_LOAD_INTF,
WMI_SERVICE_BSS_CHANNEL_INFO_64,
WMI_SERVICE_EXT_RES_CFG_SUPPORT,
WMI_SERVICE_MESH_11S,
WMI_SERVICE_MESH_NON_11S,
WMI_SERVICE_PEER_STATS,
WMI_SERVICE_RESTRT_CHNL_SUPPORT,
WMI_SERVICE_TX_MODE_PUSH_ONLY,
WMI_SERVICE_TX_MODE_PUSH_PULL,
WMI_SERVICE_TX_MODE_DYNAMIC,
/* keep last */
WMI_SERVICE_MAX,
};
enum wmi_10x_service {
WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
WMI_10X_SERVICE_SCAN_OFFLOAD,
WMI_10X_SERVICE_ROAM_OFFLOAD,
WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
WMI_10X_SERVICE_STA_PWRSAVE,
WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_10X_SERVICE_AP_UAPSD,
WMI_10X_SERVICE_AP_DFS,
WMI_10X_SERVICE_11AC,
WMI_10X_SERVICE_BLOCKACK,
WMI_10X_SERVICE_PHYERR,
WMI_10X_SERVICE_BCN_FILTER,
WMI_10X_SERVICE_RTT,
WMI_10X_SERVICE_RATECTRL,
WMI_10X_SERVICE_WOW,
WMI_10X_SERVICE_RATECTRL_CACHE,
WMI_10X_SERVICE_IRAM_TIDS,
WMI_10X_SERVICE_BURST,
/* introduced in 10.2 */
WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
WMI_10X_SERVICE_FORCE_FW_HANG,
WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
WMI_10X_SERVICE_ATF,
WMI_10X_SERVICE_COEX_GPIO,
WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
WMI_10X_SERVICE_MESH,
WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
WMI_10X_SERVICE_PEER_STATS,
};
enum wmi_main_service {
WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
WMI_MAIN_SERVICE_SCAN_OFFLOAD,
WMI_MAIN_SERVICE_ROAM_OFFLOAD,
WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
WMI_MAIN_SERVICE_STA_PWRSAVE,
WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_MAIN_SERVICE_AP_UAPSD,
WMI_MAIN_SERVICE_AP_DFS,
WMI_MAIN_SERVICE_11AC,
WMI_MAIN_SERVICE_BLOCKACK,
WMI_MAIN_SERVICE_PHYERR,
WMI_MAIN_SERVICE_BCN_FILTER,
WMI_MAIN_SERVICE_RTT,
WMI_MAIN_SERVICE_RATECTRL,
WMI_MAIN_SERVICE_WOW,
WMI_MAIN_SERVICE_RATECTRL_CACHE,
WMI_MAIN_SERVICE_IRAM_TIDS,
WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
WMI_MAIN_SERVICE_NLO,
WMI_MAIN_SERVICE_GTK_OFFLOAD,
WMI_MAIN_SERVICE_SCAN_SCH,
WMI_MAIN_SERVICE_CSA_OFFLOAD,
WMI_MAIN_SERVICE_CHATTER,
WMI_MAIN_SERVICE_COEX_FREQAVOID,
WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
WMI_MAIN_SERVICE_FORCE_FW_HANG,
WMI_MAIN_SERVICE_GPIO,
WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
WMI_MAIN_SERVICE_TX_ENCAP,
};
enum wmi_10_4_service {
WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
WMI_10_4_SERVICE_SCAN_OFFLOAD,
WMI_10_4_SERVICE_ROAM_OFFLOAD,
WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
WMI_10_4_SERVICE_STA_PWRSAVE,
WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_10_4_SERVICE_AP_UAPSD,
WMI_10_4_SERVICE_AP_DFS,
WMI_10_4_SERVICE_11AC,
WMI_10_4_SERVICE_BLOCKACK,
WMI_10_4_SERVICE_PHYERR,
WMI_10_4_SERVICE_BCN_FILTER,
WMI_10_4_SERVICE_RTT,
WMI_10_4_SERVICE_RATECTRL,
WMI_10_4_SERVICE_WOW,
WMI_10_4_SERVICE_RATECTRL_CACHE,
WMI_10_4_SERVICE_IRAM_TIDS,
WMI_10_4_SERVICE_BURST,
WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
WMI_10_4_SERVICE_GTK_OFFLOAD,
WMI_10_4_SERVICE_SCAN_SCH,
WMI_10_4_SERVICE_CSA_OFFLOAD,
WMI_10_4_SERVICE_CHATTER,
WMI_10_4_SERVICE_COEX_FREQAVOID,
WMI_10_4_SERVICE_PACKET_POWER_SAVE,
WMI_10_4_SERVICE_FORCE_FW_HANG,
WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
WMI_10_4_SERVICE_GPIO,
WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
WMI_10_4_SERVICE_STA_KEEP_ALIVE,
WMI_10_4_SERVICE_TX_ENCAP,
WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
WMI_10_4_SERVICE_EARLY_RX,
WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
WMI_10_4_SERVICE_TT,
WMI_10_4_SERVICE_ATF,
WMI_10_4_SERVICE_PEER_CACHING,
WMI_10_4_SERVICE_COEX_GPIO,
WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
WMI_10_4_SERVICE_MESH_NON_11S,
WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
WMI_10_4_SERVICE_PEER_STATS,
WMI_10_4_SERVICE_MESH_11S,
WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
};
static inline char *wmi_service_name(int service_id)
{
#define SVCSTR(x) case x: return #x
switch (service_id) {
SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
SVCSTR(WMI_SERVICE_STA_PWRSAVE);
SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
SVCSTR(WMI_SERVICE_AP_UAPSD);
SVCSTR(WMI_SERVICE_AP_DFS);
SVCSTR(WMI_SERVICE_11AC);
SVCSTR(WMI_SERVICE_BLOCKACK);
SVCSTR(WMI_SERVICE_PHYERR);
SVCSTR(WMI_SERVICE_BCN_FILTER);
SVCSTR(WMI_SERVICE_RTT);
SVCSTR(WMI_SERVICE_RATECTRL);
SVCSTR(WMI_SERVICE_WOW);
SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
SVCSTR(WMI_SERVICE_IRAM_TIDS);
SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
SVCSTR(WMI_SERVICE_NLO);
SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
SVCSTR(WMI_SERVICE_SCAN_SCH);
SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
SVCSTR(WMI_SERVICE_CHATTER);
SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
SVCSTR(WMI_SERVICE_GPIO);
SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
SVCSTR(WMI_SERVICE_TX_ENCAP);
SVCSTR(WMI_SERVICE_BURST);
SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
SVCSTR(WMI_SERVICE_EARLY_RX);
SVCSTR(WMI_SERVICE_STA_SMPS);
SVCSTR(WMI_SERVICE_FWTEST);
SVCSTR(WMI_SERVICE_STA_WMMAC);
SVCSTR(WMI_SERVICE_TDLS);
SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
SVCSTR(WMI_SERVICE_WLAN_HB);
SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
SVCSTR(WMI_SERVICE_BATCH_SCAN);
SVCSTR(WMI_SERVICE_QPOWER);
SVCSTR(WMI_SERVICE_PLMREQ);
SVCSTR(WMI_SERVICE_THERMAL_MGMT);
SVCSTR(WMI_SERVICE_RMC);
SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
SVCSTR(WMI_SERVICE_COEX_SAR);
SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
SVCSTR(WMI_SERVICE_NAN);
SVCSTR(WMI_SERVICE_L1SS_STAT);
SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
SVCSTR(WMI_SERVICE_OBSS_SCAN);
SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
SVCSTR(WMI_SERVICE_LPASS);
SVCSTR(WMI_SERVICE_EXTSCAN);
SVCSTR(WMI_SERVICE_D0WOW);
SVCSTR(WMI_SERVICE_HSOFFLOAD);
SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
SVCSTR(WMI_SERVICE_ATF);
SVCSTR(WMI_SERVICE_COEX_GPIO);
SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
SVCSTR(WMI_SERVICE_TT);
SVCSTR(WMI_SERVICE_PEER_CACHING);
SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
SVCSTR(WMI_SERVICE_EXT_RES_CFG_SUPPORT);
SVCSTR(WMI_SERVICE_MESH_11S);
SVCSTR(WMI_SERVICE_MESH_NON_11S);
SVCSTR(WMI_SERVICE_PEER_STATS);
SVCSTR(WMI_SERVICE_RESTRT_CHNL_SUPPORT);
SVCSTR(WMI_SERVICE_TX_MODE_PUSH_ONLY);
SVCSTR(WMI_SERVICE_TX_MODE_PUSH_PULL);
SVCSTR(WMI_SERVICE_TX_MODE_DYNAMIC);
default:
return NULL;
}
#undef SVCSTR
}
#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
((svc_id) < (len) && \
__le32_to_cpu((wmi_svc_bmap)[(svc_id) / (sizeof(u32))]) & \
BIT((svc_id) % (sizeof(u32))))
#define SVCMAP(x, y, len) \
do { \
if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \
__set_bit(y, out); \
} while (0)
static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
size_t len)
{
SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
WMI_SERVICE_BEACON_OFFLOAD, len);
SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
WMI_SERVICE_SCAN_OFFLOAD, len);
SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
WMI_SERVICE_ROAM_OFFLOAD, len);
SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
WMI_SERVICE_BCN_MISS_OFFLOAD, len);
SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
WMI_SERVICE_STA_PWRSAVE, len);
SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
WMI_SERVICE_AP_UAPSD, len);
SVCMAP(WMI_10X_SERVICE_AP_DFS,
WMI_SERVICE_AP_DFS, len);
SVCMAP(WMI_10X_SERVICE_11AC,
WMI_SERVICE_11AC, len);
SVCMAP(WMI_10X_SERVICE_BLOCKACK,
WMI_SERVICE_BLOCKACK, len);
SVCMAP(WMI_10X_SERVICE_PHYERR,
WMI_SERVICE_PHYERR, len);
SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
WMI_SERVICE_BCN_FILTER, len);
SVCMAP(WMI_10X_SERVICE_RTT,
WMI_SERVICE_RTT, len);
SVCMAP(WMI_10X_SERVICE_RATECTRL,
WMI_SERVICE_RATECTRL, len);
SVCMAP(WMI_10X_SERVICE_WOW,
WMI_SERVICE_WOW, len);
SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
WMI_SERVICE_RATECTRL_CACHE, len);
SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
WMI_SERVICE_IRAM_TIDS, len);
SVCMAP(WMI_10X_SERVICE_BURST,
WMI_SERVICE_BURST, len);
SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
WMI_SERVICE_FORCE_FW_HANG, len);
SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
SVCMAP(WMI_10X_SERVICE_ATF,
WMI_SERVICE_ATF, len);
SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
WMI_SERVICE_COEX_GPIO, len);
SVCMAP(WMI_10X_SERVICE_AUX_SPECTRAL_INTF,
WMI_SERVICE_AUX_SPECTRAL_INTF, len);
SVCMAP(WMI_10X_SERVICE_AUX_CHAN_LOAD_INTF,
WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
SVCMAP(WMI_10X_SERVICE_BSS_CHANNEL_INFO_64,
WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
SVCMAP(WMI_10X_SERVICE_MESH,
WMI_SERVICE_MESH_11S, len);
SVCMAP(WMI_10X_SERVICE_EXT_RES_CFG_SUPPORT,
WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
SVCMAP(WMI_10X_SERVICE_PEER_STATS,
WMI_SERVICE_PEER_STATS, len);
}
static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
size_t len)
{
SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
WMI_SERVICE_BEACON_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
WMI_SERVICE_SCAN_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
WMI_SERVICE_ROAM_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
WMI_SERVICE_BCN_MISS_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
WMI_SERVICE_STA_PWRSAVE, len);
SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
WMI_SERVICE_AP_UAPSD, len);
SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
WMI_SERVICE_AP_DFS, len);
SVCMAP(WMI_MAIN_SERVICE_11AC,
WMI_SERVICE_11AC, len);
SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
WMI_SERVICE_BLOCKACK, len);
SVCMAP(WMI_MAIN_SERVICE_PHYERR,
WMI_SERVICE_PHYERR, len);
SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
WMI_SERVICE_BCN_FILTER, len);
SVCMAP(WMI_MAIN_SERVICE_RTT,
WMI_SERVICE_RTT, len);
SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
WMI_SERVICE_RATECTRL, len);
SVCMAP(WMI_MAIN_SERVICE_WOW,
WMI_SERVICE_WOW, len);
SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
WMI_SERVICE_RATECTRL_CACHE, len);
SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
WMI_SERVICE_IRAM_TIDS, len);
SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
WMI_SERVICE_ARPNS_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_NLO,
WMI_SERVICE_NLO, len);
SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
WMI_SERVICE_GTK_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
WMI_SERVICE_SCAN_SCH, len);
SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
WMI_SERVICE_CSA_OFFLOAD, len);
SVCMAP(WMI_MAIN_SERVICE_CHATTER,
WMI_SERVICE_CHATTER, len);
SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
WMI_SERVICE_COEX_FREQAVOID, len);
SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
WMI_SERVICE_PACKET_POWER_SAVE, len);
SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
WMI_SERVICE_FORCE_FW_HANG, len);
SVCMAP(WMI_MAIN_SERVICE_GPIO,
WMI_SERVICE_GPIO, len);
SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
WMI_SERVICE_STA_KEEP_ALIVE, len);
SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
WMI_SERVICE_TX_ENCAP, len);
}
static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
size_t len)
{
SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
WMI_SERVICE_BEACON_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
WMI_SERVICE_SCAN_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
WMI_SERVICE_ROAM_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
WMI_SERVICE_BCN_MISS_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
WMI_SERVICE_STA_PWRSAVE, len);
SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
WMI_SERVICE_AP_UAPSD, len);
SVCMAP(WMI_10_4_SERVICE_AP_DFS,
WMI_SERVICE_AP_DFS, len);
SVCMAP(WMI_10_4_SERVICE_11AC,
WMI_SERVICE_11AC, len);
SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
WMI_SERVICE_BLOCKACK, len);
SVCMAP(WMI_10_4_SERVICE_PHYERR,
WMI_SERVICE_PHYERR, len);
SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
WMI_SERVICE_BCN_FILTER, len);
SVCMAP(WMI_10_4_SERVICE_RTT,
WMI_SERVICE_RTT, len);
SVCMAP(WMI_10_4_SERVICE_RATECTRL,
WMI_SERVICE_RATECTRL, len);
SVCMAP(WMI_10_4_SERVICE_WOW,
WMI_SERVICE_WOW, len);
SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
WMI_SERVICE_RATECTRL_CACHE, len);
SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
WMI_SERVICE_IRAM_TIDS, len);
SVCMAP(WMI_10_4_SERVICE_BURST,
WMI_SERVICE_BURST, len);
SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
WMI_SERVICE_GTK_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
WMI_SERVICE_SCAN_SCH, len);
SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
WMI_SERVICE_CSA_OFFLOAD, len);
SVCMAP(WMI_10_4_SERVICE_CHATTER,
WMI_SERVICE_CHATTER, len);
SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
WMI_SERVICE_COEX_FREQAVOID, len);
SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
WMI_SERVICE_PACKET_POWER_SAVE, len);
SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
WMI_SERVICE_FORCE_FW_HANG, len);
SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
SVCMAP(WMI_10_4_SERVICE_GPIO,
WMI_SERVICE_GPIO, len);
SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
WMI_SERVICE_STA_KEEP_ALIVE, len);
SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
WMI_SERVICE_TX_ENCAP, len);
SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
WMI_SERVICE_EARLY_RX, len);
SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
WMI_SERVICE_ENHANCED_PROXY_STA, len);
SVCMAP(WMI_10_4_SERVICE_TT,
WMI_SERVICE_TT, len);
SVCMAP(WMI_10_4_SERVICE_ATF,
WMI_SERVICE_ATF, len);
SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
WMI_SERVICE_PEER_CACHING, len);
SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
WMI_SERVICE_COEX_GPIO, len);
SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
WMI_SERVICE_AUX_SPECTRAL_INTF, len);
SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
SVCMAP(WMI_10_4_SERVICE_EXT_RES_CFG_SUPPORT,
WMI_SERVICE_EXT_RES_CFG_SUPPORT, len);
SVCMAP(WMI_10_4_SERVICE_MESH_NON_11S,
WMI_SERVICE_MESH_NON_11S, len);
SVCMAP(WMI_10_4_SERVICE_RESTRT_CHNL_SUPPORT,
WMI_SERVICE_RESTRT_CHNL_SUPPORT, len);
SVCMAP(WMI_10_4_SERVICE_PEER_STATS,
WMI_SERVICE_PEER_STATS, len);
SVCMAP(WMI_10_4_SERVICE_MESH_11S,
WMI_SERVICE_MESH_11S, len);
SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_ONLY,
WMI_SERVICE_TX_MODE_PUSH_ONLY, len);
SVCMAP(WMI_10_4_SERVICE_TX_MODE_PUSH_PULL,
WMI_SERVICE_TX_MODE_PUSH_PULL, len);
SVCMAP(WMI_10_4_SERVICE_TX_MODE_DYNAMIC,
WMI_SERVICE_TX_MODE_DYNAMIC, len);
}
#undef SVCMAP
/* 2 word representation of MAC addr */
struct wmi_mac_addr {
union {
u8 addr[6];
struct {
u32 word0;
u32 word1;
} __packed;
} __packed;
} __packed;
struct wmi_cmd_map {
u32 init_cmdid;
u32 start_scan_cmdid;
u32 stop_scan_cmdid;
u32 scan_chan_list_cmdid;
u32 scan_sch_prio_tbl_cmdid;
u32 pdev_set_regdomain_cmdid;
u32 pdev_set_channel_cmdid;
u32 pdev_set_param_cmdid;
u32 pdev_pktlog_enable_cmdid;
u32 pdev_pktlog_disable_cmdid;
u32 pdev_set_wmm_params_cmdid;
u32 pdev_set_ht_cap_ie_cmdid;
u32 pdev_set_vht_cap_ie_cmdid;
u32 pdev_set_dscp_tid_map_cmdid;
u32 pdev_set_quiet_mode_cmdid;
u32 pdev_green_ap_ps_enable_cmdid;
u32 pdev_get_tpc_config_cmdid;
u32 pdev_set_base_macaddr_cmdid;
u32 vdev_create_cmdid;
u32 vdev_delete_cmdid;
u32 vdev_start_request_cmdid;
u32 vdev_restart_request_cmdid;
u32 vdev_up_cmdid;
u32 vdev_stop_cmdid;
u32 vdev_down_cmdid;
u32 vdev_set_param_cmdid;
u32 vdev_install_key_cmdid;
u32 peer_create_cmdid;
u32 peer_delete_cmdid;
u32 peer_flush_tids_cmdid;
u32 peer_set_param_cmdid;
u32 peer_assoc_cmdid;
u32 peer_add_wds_entry_cmdid;
u32 peer_remove_wds_entry_cmdid;
u32 peer_mcast_group_cmdid;
u32 bcn_tx_cmdid;
u32 pdev_send_bcn_cmdid;
u32 bcn_tmpl_cmdid;
u32 bcn_filter_rx_cmdid;
u32 prb_req_filter_rx_cmdid;
u32 mgmt_tx_cmdid;
u32 prb_tmpl_cmdid;
u32 addba_clear_resp_cmdid;
u32 addba_send_cmdid;
u32 addba_status_cmdid;
u32 delba_send_cmdid;
u32 addba_set_resp_cmdid;
u32 send_singleamsdu_cmdid;
u32 sta_powersave_mode_cmdid;
u32 sta_powersave_param_cmdid;
u32 sta_mimo_ps_mode_cmdid;
u32 pdev_dfs_enable_cmdid;
u32 pdev_dfs_disable_cmdid;
u32 roam_scan_mode;
u32 roam_scan_rssi_threshold;
u32 roam_scan_period;
u32 roam_scan_rssi_change_threshold;
u32 roam_ap_profile;
u32 ofl_scan_add_ap_profile;
u32 ofl_scan_remove_ap_profile;
u32 ofl_scan_period;
u32 p2p_dev_set_device_info;
u32 p2p_dev_set_discoverability;
u32 p2p_go_set_beacon_ie;
u32 p2p_go_set_probe_resp_ie;
u32 p2p_set_vendor_ie_data_cmdid;
u32 ap_ps_peer_param_cmdid;
u32 ap_ps_peer_uapsd_coex_cmdid;
u32 peer_rate_retry_sched_cmdid;
u32 wlan_profile_trigger_cmdid;
u32 wlan_profile_set_hist_intvl_cmdid;
u32 wlan_profile_get_profile_data_cmdid;
u32 wlan_profile_enable_profile_id_cmdid;
u32 wlan_profile_list_profile_id_cmdid;
u32 pdev_suspend_cmdid;
u32 pdev_resume_cmdid;
u32 add_bcn_filter_cmdid;
u32 rmv_bcn_filter_cmdid;
u32 wow_add_wake_pattern_cmdid;
u32 wow_del_wake_pattern_cmdid;
u32 wow_enable_disable_wake_event_cmdid;
u32 wow_enable_cmdid;
u32 wow_hostwakeup_from_sleep_cmdid;
u32 rtt_measreq_cmdid;
u32 rtt_tsf_cmdid;
u32 vdev_spectral_scan_configure_cmdid;
u32 vdev_spectral_scan_enable_cmdid;
u32 request_stats_cmdid;
u32 set_arp_ns_offload_cmdid;
u32 network_list_offload_config_cmdid;
u32 gtk_offload_cmdid;
u32 csa_offload_enable_cmdid;
u32 csa_offload_chanswitch_cmdid;
u32 chatter_set_mode_cmdid;
u32 peer_tid_addba_cmdid;
u32 peer_tid_delba_cmdid;
u32 sta_dtim_ps_method_cmdid;
u32 sta_uapsd_auto_trig_cmdid;
u32 sta_keepalive_cmd;
u32 echo_cmdid;
u32 pdev_utf_cmdid;
u32 dbglog_cfg_cmdid;
u32 pdev_qvit_cmdid;
u32 pdev_ftm_intg_cmdid;
u32 vdev_set_keepalive_cmdid;
u32 vdev_get_keepalive_cmdid;
u32 force_fw_hang_cmdid;
u32 gpio_config_cmdid;
u32 gpio_output_cmdid;
u32 pdev_get_temperature_cmdid;
u32 vdev_set_wmm_params_cmdid;
u32 tdls_set_state_cmdid;
u32 tdls_peer_update_cmdid;
u32 adaptive_qcs_cmdid;
u32 scan_update_request_cmdid;
u32 vdev_standby_response_cmdid;
u32 vdev_resume_response_cmdid;
u32 wlan_peer_caching_add_peer_cmdid;
u32 wlan_peer_caching_evict_peer_cmdid;
u32 wlan_peer_caching_restore_peer_cmdid;
u32 wlan_peer_caching_print_all_peers_info_cmdid;
u32 peer_update_wds_entry_cmdid;
u32 peer_add_proxy_sta_entry_cmdid;
u32 rtt_keepalive_cmdid;
u32 oem_req_cmdid;
u32 nan_cmdid;
u32 vdev_ratemask_cmdid;
u32 qboost_cfg_cmdid;
u32 pdev_smart_ant_enable_cmdid;
u32 pdev_smart_ant_set_rx_antenna_cmdid;
u32 peer_smart_ant_set_tx_antenna_cmdid;
u32 peer_smart_ant_set_train_info_cmdid;
u32 peer_smart_ant_set_node_config_ops_cmdid;
u32 pdev_set_antenna_switch_table_cmdid;
u32 pdev_set_ctl_table_cmdid;
u32 pdev_set_mimogain_table_cmdid;
u32 pdev_ratepwr_table_cmdid;
u32 pdev_ratepwr_chainmsk_table_cmdid;
u32 pdev_fips_cmdid;
u32 tt_set_conf_cmdid;
u32 fwtest_cmdid;
u32 vdev_atf_request_cmdid;
u32 peer_atf_request_cmdid;
u32 pdev_get_ani_cck_config_cmdid;
u32 pdev_get_ani_ofdm_config_cmdid;
u32 pdev_reserve_ast_entry_cmdid;
u32 pdev_get_nfcal_power_cmdid;
u32 pdev_get_tpc_cmdid;
u32 pdev_get_ast_info_cmdid;
u32 vdev_set_dscp_tid_map_cmdid;
u32 pdev_get_info_cmdid;
u32 vdev_get_info_cmdid;
u32 vdev_filter_neighbor_rx_packets_cmdid;
u32 mu_cal_start_cmdid;
u32 set_cca_params_cmdid;
u32 pdev_bss_chan_info_request_cmdid;
u32 pdev_enable_adaptive_cca_cmdid;
u32 ext_resource_cfg_cmdid;
};
/*
* wmi command groups.
*/
enum wmi_cmd_group {
/* 0 to 2 are reserved */
WMI_GRP_START = 0x3,
WMI_GRP_SCAN = WMI_GRP_START,
WMI_GRP_PDEV,
WMI_GRP_VDEV,
WMI_GRP_PEER,
WMI_GRP_MGMT,
WMI_GRP_BA_NEG,
WMI_GRP_STA_PS,
WMI_GRP_DFS,
WMI_GRP_ROAM,
WMI_GRP_OFL_SCAN,
WMI_GRP_P2P,
WMI_GRP_AP_PS,
WMI_GRP_RATE_CTRL,
WMI_GRP_PROFILE,
WMI_GRP_SUSPEND,
WMI_GRP_BCN_FILTER,
WMI_GRP_WOW,
WMI_GRP_RTT,
WMI_GRP_SPECTRAL,
WMI_GRP_STATS,
WMI_GRP_ARP_NS_OFL,
WMI_GRP_NLO_OFL,
WMI_GRP_GTK_OFL,
WMI_GRP_CSA_OFL,
WMI_GRP_CHATTER,
WMI_GRP_TID_ADDBA,
WMI_GRP_MISC,
WMI_GRP_GPIO,
};
#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
#define WMI_CMD_UNSUPPORTED 0
/* Command IDs and command events for MAIN FW. */
enum wmi_cmd_id {
WMI_INIT_CMDID = 0x1,
/* Scan specific commands */
WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
WMI_STOP_SCAN_CMDID,
WMI_SCAN_CHAN_LIST_CMDID,
WMI_SCAN_SCH_PRIO_TBL_CMDID,
/* PDEV (physical device) specific commands */
WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
WMI_PDEV_SET_CHANNEL_CMDID,
WMI_PDEV_SET_PARAM_CMDID,
WMI_PDEV_PKTLOG_ENABLE_CMDID,
WMI_PDEV_PKTLOG_DISABLE_CMDID,
WMI_PDEV_SET_WMM_PARAMS_CMDID,
WMI_PDEV_SET_HT_CAP_IE_CMDID,
WMI_PDEV_SET_VHT_CAP_IE_CMDID,
WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
WMI_PDEV_SET_QUIET_MODE_CMDID,
WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
WMI_PDEV_GET_TPC_CONFIG_CMDID,
WMI_PDEV_SET_BASE_MACADDR_CMDID,
/* VDEV (virtual device) specific commands */
WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
WMI_VDEV_DELETE_CMDID,
WMI_VDEV_START_REQUEST_CMDID,
WMI_VDEV_RESTART_REQUEST_CMDID,
WMI_VDEV_UP_CMDID,
WMI_VDEV_STOP_CMDID,
WMI_VDEV_DOWN_CMDID,
WMI_VDEV_SET_PARAM_CMDID,
WMI_VDEV_INSTALL_KEY_CMDID,
/* peer specific commands */
WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
WMI_PEER_DELETE_CMDID,
WMI_PEER_FLUSH_TIDS_CMDID,
WMI_PEER_SET_PARAM_CMDID,
WMI_PEER_ASSOC_CMDID,
WMI_PEER_ADD_WDS_ENTRY_CMDID,
WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
WMI_PEER_MCAST_GROUP_CMDID,
/* beacon/management specific commands */
WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
WMI_PDEV_SEND_BCN_CMDID,
WMI_BCN_TMPL_CMDID,
WMI_BCN_FILTER_RX_CMDID,
WMI_PRB_REQ_FILTER_RX_CMDID,
WMI_MGMT_TX_CMDID,
WMI_PRB_TMPL_CMDID,
/* commands to directly control BA negotiation directly from host. */
WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
WMI_ADDBA_SEND_CMDID,
WMI_ADDBA_STATUS_CMDID,
WMI_DELBA_SEND_CMDID,
WMI_ADDBA_SET_RESP_CMDID,
WMI_SEND_SINGLEAMSDU_CMDID,
/* Station power save specific config */
WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
WMI_STA_POWERSAVE_PARAM_CMDID,
WMI_STA_MIMO_PS_MODE_CMDID,
/** DFS-specific commands */
WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
WMI_PDEV_DFS_DISABLE_CMDID,
/* Roaming specific commands */
WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
WMI_ROAM_SCAN_RSSI_THRESHOLD,
WMI_ROAM_SCAN_PERIOD,
WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_ROAM_AP_PROFILE,
/* offload scan specific commands */
WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
WMI_OFL_SCAN_REMOVE_AP_PROFILE,
WMI_OFL_SCAN_PERIOD,
/* P2P specific commands */
WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
WMI_P2P_DEV_SET_DISCOVERABILITY,
WMI_P2P_GO_SET_BEACON_IE,
WMI_P2P_GO_SET_PROBE_RESP_IE,
WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
/* AP power save specific config */
WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
/* Rate-control specific commands */
WMI_PEER_RATE_RETRY_SCHED_CMDID =
WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
/* WLAN Profiling commands. */
WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
/* Suspend resume command Ids */
WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
WMI_PDEV_RESUME_CMDID,
/* Beacon filter commands */
WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
WMI_RMV_BCN_FILTER_CMDID,
/* WOW Specific WMI commands*/
WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
WMI_WOW_DEL_WAKE_PATTERN_CMDID,
WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
WMI_WOW_ENABLE_CMDID,
WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
/* RTT measurement related cmd */
WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
WMI_RTT_TSF_CMDID,
/* spectral scan commands */
WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
/* F/W stats */
WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
/* ARP OFFLOAD REQUEST*/
WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
/* NS offload confid*/
WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
/* GTK offload Specific WMI commands*/
WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
/* CSA offload Specific WMI commands*/
WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
/* Chatter commands*/
WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
/* addba specific commands */
WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
WMI_PEER_TID_DELBA_CMDID,
/* set station mimo powersave method */
WMI_STA_DTIM_PS_METHOD_CMDID,
/* Configure the Station UAPSD AC Auto Trigger Parameters */
WMI_STA_UAPSD_AUTO_TRIG_CMDID,
/* STA Keep alive parameter configuration,
Requires WMI_SERVICE_STA_KEEP_ALIVE */
WMI_STA_KEEPALIVE_CMD,
/* misc command group */
WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
WMI_PDEV_UTF_CMDID,
WMI_DBGLOG_CFG_CMDID,
WMI_PDEV_QVIT_CMDID,
WMI_PDEV_FTM_INTG_CMDID,
WMI_VDEV_SET_KEEPALIVE_CMDID,
WMI_VDEV_GET_KEEPALIVE_CMDID,
WMI_FORCE_FW_HANG_CMDID,
/* GPIO Configuration */
WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
WMI_GPIO_OUTPUT_CMDID,
};
enum wmi_event_id {
WMI_SERVICE_READY_EVENTID = 0x1,
WMI_READY_EVENTID,
/* Scan specific events */
WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
/* PDEV specific events */
WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
WMI_CHAN_INFO_EVENTID,
WMI_PHYERR_EVENTID,
/* VDEV specific events */
WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
WMI_VDEV_STOPPED_EVENTID,
WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
/* peer specific events */
WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
/* beacon/mgmt specific events */
WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
WMI_HOST_SWBA_EVENTID,
WMI_TBTTOFFSET_UPDATE_EVENTID,
/* ADDBA Related WMI Events*/
WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
WMI_TX_ADDBA_COMPLETE_EVENTID,
/* Roam event to trigger roaming on host */
WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
WMI_PROFILE_MATCH,
/* WoW */
WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
/* RTT */
WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
WMI_TSF_MEASUREMENT_REPORT_EVENTID,
WMI_RTT_ERROR_REPORT_EVENTID,
/* GTK offload */
WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
WMI_GTK_REKEY_FAIL_EVENTID,
/* CSA IE received event */
WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
/* Misc events */
WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
WMI_PDEV_UTF_EVENTID,
WMI_DEBUG_MESG_EVENTID,
WMI_UPDATE_STATS_EVENTID,
WMI_DEBUG_PRINT_EVENTID,
WMI_DCS_INTERFERENCE_EVENTID,
WMI_PDEV_QVIT_EVENTID,
WMI_WLAN_PROFILE_DATA_EVENTID,
WMI_PDEV_FTM_INTG_EVENTID,
WMI_WLAN_FREQ_AVOID_EVENTID,
WMI_VDEV_GET_KEEPALIVE_EVENTID,
/* GPIO Event */
WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
};
/* Command IDs and command events for 10.X firmware */
enum wmi_10x_cmd_id {
WMI_10X_START_CMDID = 0x9000,
WMI_10X_END_CMDID = 0x9FFF,
/* initialize the wlan sub system */
WMI_10X_INIT_CMDID,
/* Scan specific commands */
WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
WMI_10X_STOP_SCAN_CMDID,
WMI_10X_SCAN_CHAN_LIST_CMDID,
WMI_10X_ECHO_CMDID,
/* PDEV(physical device) specific commands */
WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
WMI_10X_PDEV_SET_CHANNEL_CMDID,
WMI_10X_PDEV_SET_PARAM_CMDID,
WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
/* VDEV(virtual device) specific commands */
WMI_10X_VDEV_CREATE_CMDID,
WMI_10X_VDEV_DELETE_CMDID,
WMI_10X_VDEV_START_REQUEST_CMDID,
WMI_10X_VDEV_RESTART_REQUEST_CMDID,
WMI_10X_VDEV_UP_CMDID,
WMI_10X_VDEV_STOP_CMDID,
WMI_10X_VDEV_DOWN_CMDID,
WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
WMI_10X_VDEV_SET_PARAM_CMDID,
WMI_10X_VDEV_INSTALL_KEY_CMDID,
/* peer specific commands */
WMI_10X_PEER_CREATE_CMDID,
WMI_10X_PEER_DELETE_CMDID,
WMI_10X_PEER_FLUSH_TIDS_CMDID,
WMI_10X_PEER_SET_PARAM_CMDID,
WMI_10X_PEER_ASSOC_CMDID,
WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
WMI_10X_PEER_MCAST_GROUP_CMDID,
/* beacon/management specific commands */
WMI_10X_BCN_TX_CMDID,
WMI_10X_BCN_PRB_TMPL_CMDID,
WMI_10X_BCN_FILTER_RX_CMDID,
WMI_10X_PRB_REQ_FILTER_RX_CMDID,
WMI_10X_MGMT_TX_CMDID,
/* commands to directly control ba negotiation directly from host. */
WMI_10X_ADDBA_CLEAR_RESP_CMDID,
WMI_10X_ADDBA_SEND_CMDID,
WMI_10X_ADDBA_STATUS_CMDID,
WMI_10X_DELBA_SEND_CMDID,
WMI_10X_ADDBA_SET_RESP_CMDID,
WMI_10X_SEND_SINGLEAMSDU_CMDID,
/* Station power save specific config */
WMI_10X_STA_POWERSAVE_MODE_CMDID,
WMI_10X_STA_POWERSAVE_PARAM_CMDID,
WMI_10X_STA_MIMO_PS_MODE_CMDID,
/* set debug log config */
WMI_10X_DBGLOG_CFG_CMDID,
/* DFS-specific commands */
WMI_10X_PDEV_DFS_ENABLE_CMDID,
WMI_10X_PDEV_DFS_DISABLE_CMDID,
/* QVIT specific command id */
WMI_10X_PDEV_QVIT_CMDID,
/* Offload Scan and Roaming related commands */
WMI_10X_ROAM_SCAN_MODE,
WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
WMI_10X_ROAM_SCAN_PERIOD,
WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_10X_ROAM_AP_PROFILE,
WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
WMI_10X_OFL_SCAN_PERIOD,
/* P2P specific commands */
WMI_10X_P2P_DEV_SET_DEVICE_INFO,
WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
WMI_10X_P2P_GO_SET_BEACON_IE,
WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
/* AP power save specific config */
WMI_10X_AP_PS_PEER_PARAM_CMDID,
WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
/* Rate-control specific commands */
WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
/* WLAN Profiling commands. */
WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
/* Suspend resume command Ids */
WMI_10X_PDEV_SUSPEND_CMDID,
WMI_10X_PDEV_RESUME_CMDID,
/* Beacon filter commands */
WMI_10X_ADD_BCN_FILTER_CMDID,
WMI_10X_RMV_BCN_FILTER_CMDID,
/* WOW Specific WMI commands*/
WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
WMI_10X_WOW_ENABLE_CMDID,
WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
/* RTT measurement related cmd */
WMI_10X_RTT_MEASREQ_CMDID,
WMI_10X_RTT_TSF_CMDID,
/* transmit beacon by value */
WMI_10X_PDEV_SEND_BCN_CMDID,
/* F/W stats */
WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
WMI_10X_REQUEST_STATS_CMDID,
/* GPIO Configuration */
WMI_10X_GPIO_CONFIG_CMDID,
WMI_10X_GPIO_OUTPUT_CMDID,
WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
};
enum wmi_10x_event_id {
WMI_10X_SERVICE_READY_EVENTID = 0x8000,
WMI_10X_READY_EVENTID,
WMI_10X_START_EVENTID = 0x9000,
WMI_10X_END_EVENTID = 0x9FFF,
/* Scan specific events */
WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
WMI_10X_ECHO_EVENTID,
WMI_10X_DEBUG_MESG_EVENTID,
WMI_10X_UPDATE_STATS_EVENTID,
/* Instantaneous RSSI event */
WMI_10X_INST_RSSI_STATS_EVENTID,
/* VDEV specific events */
WMI_10X_VDEV_START_RESP_EVENTID,
WMI_10X_VDEV_STANDBY_REQ_EVENTID,
WMI_10X_VDEV_RESUME_REQ_EVENTID,
WMI_10X_VDEV_STOPPED_EVENTID,
/* peer specific events */
WMI_10X_PEER_STA_KICKOUT_EVENTID,
/* beacon/mgmt specific events */
WMI_10X_HOST_SWBA_EVENTID,
WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
WMI_10X_MGMT_RX_EVENTID,
/* Channel stats event */
WMI_10X_CHAN_INFO_EVENTID,
/* PHY Error specific WMI event */
WMI_10X_PHYERR_EVENTID,
/* Roam event to trigger roaming on host */
WMI_10X_ROAM_EVENTID,
/* matching AP found from list of profiles */
WMI_10X_PROFILE_MATCH,
/* debug print message used for tracing FW code while debugging */
WMI_10X_DEBUG_PRINT_EVENTID,
/* VI spoecific event */
WMI_10X_PDEV_QVIT_EVENTID,
/* FW code profile data in response to profile request */
WMI_10X_WLAN_PROFILE_DATA_EVENTID,
/*RTT related event ID*/
WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
WMI_10X_RTT_ERROR_REPORT_EVENTID,
WMI_10X_WOW_WAKEUP_HOST_EVENTID,
WMI_10X_DCS_INTERFERENCE_EVENTID,
/* TPC config for the current operating channel */
WMI_10X_PDEV_TPC_CONFIG_EVENTID,
WMI_10X_GPIO_INPUT_EVENTID,
WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID - 1,
};
enum wmi_10_2_cmd_id {
WMI_10_2_START_CMDID = 0x9000,
WMI_10_2_END_CMDID = 0x9FFF,
WMI_10_2_INIT_CMDID,
WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
WMI_10_2_STOP_SCAN_CMDID,
WMI_10_2_SCAN_CHAN_LIST_CMDID,
WMI_10_2_ECHO_CMDID,
WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
WMI_10_2_PDEV_SET_CHANNEL_CMDID,
WMI_10_2_PDEV_SET_PARAM_CMDID,
WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
WMI_10_2_VDEV_CREATE_CMDID,
WMI_10_2_VDEV_DELETE_CMDID,
WMI_10_2_VDEV_START_REQUEST_CMDID,
WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
WMI_10_2_VDEV_UP_CMDID,
WMI_10_2_VDEV_STOP_CMDID,
WMI_10_2_VDEV_DOWN_CMDID,
WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
WMI_10_2_VDEV_SET_PARAM_CMDID,
WMI_10_2_VDEV_INSTALL_KEY_CMDID,
WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
WMI_10_2_PEER_CREATE_CMDID,
WMI_10_2_PEER_DELETE_CMDID,
WMI_10_2_PEER_FLUSH_TIDS_CMDID,
WMI_10_2_PEER_SET_PARAM_CMDID,
WMI_10_2_PEER_ASSOC_CMDID,
WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
WMI_10_2_PEER_MCAST_GROUP_CMDID,
WMI_10_2_BCN_TX_CMDID,
WMI_10_2_BCN_PRB_TMPL_CMDID,
WMI_10_2_BCN_FILTER_RX_CMDID,
WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
WMI_10_2_MGMT_TX_CMDID,
WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
WMI_10_2_ADDBA_SEND_CMDID,
WMI_10_2_ADDBA_STATUS_CMDID,
WMI_10_2_DELBA_SEND_CMDID,
WMI_10_2_ADDBA_SET_RESP_CMDID,
WMI_10_2_SEND_SINGLEAMSDU_CMDID,
WMI_10_2_STA_POWERSAVE_MODE_CMDID,
WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
WMI_10_2_STA_MIMO_PS_MODE_CMDID,
WMI_10_2_DBGLOG_CFG_CMDID,
WMI_10_2_PDEV_DFS_ENABLE_CMDID,
WMI_10_2_PDEV_DFS_DISABLE_CMDID,
WMI_10_2_PDEV_QVIT_CMDID,
WMI_10_2_ROAM_SCAN_MODE,
WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
WMI_10_2_ROAM_SCAN_PERIOD,
WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_10_2_ROAM_AP_PROFILE,
WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
WMI_10_2_OFL_SCAN_PERIOD,
WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
WMI_10_2_P2P_GO_SET_BEACON_IE,
WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
WMI_10_2_AP_PS_PEER_PARAM_CMDID,
WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
WMI_10_2_PDEV_SUSPEND_CMDID,
WMI_10_2_PDEV_RESUME_CMDID,
WMI_10_2_ADD_BCN_FILTER_CMDID,
WMI_10_2_RMV_BCN_FILTER_CMDID,
WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
WMI_10_2_WOW_ENABLE_CMDID,
WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
WMI_10_2_RTT_MEASREQ_CMDID,
WMI_10_2_RTT_TSF_CMDID,
WMI_10_2_RTT_KEEPALIVE_CMDID,
WMI_10_2_PDEV_SEND_BCN_CMDID,
WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
WMI_10_2_REQUEST_STATS_CMDID,
WMI_10_2_GPIO_CONFIG_CMDID,
WMI_10_2_GPIO_OUTPUT_CMDID,
WMI_10_2_VDEV_RATEMASK_CMDID,
WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
WMI_10_2_FORCE_FW_HANG_CMDID,
WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
WMI_10_2_PDEV_GET_INFO,
WMI_10_2_VDEV_GET_INFO,
WMI_10_2_VDEV_ATF_REQUEST_CMDID,
WMI_10_2_PEER_ATF_REQUEST_CMDID,
WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
WMI_10_2_MU_CAL_START_CMDID,
WMI_10_2_SET_LTEU_CONFIG_CMDID,
WMI_10_2_SET_CCA_PARAMS,
WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
};
enum wmi_10_2_event_id {
WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
WMI_10_2_READY_EVENTID,
WMI_10_2_DEBUG_MESG_EVENTID,
WMI_10_2_START_EVENTID = 0x9000,
WMI_10_2_END_EVENTID = 0x9FFF,
WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
WMI_10_2_ECHO_EVENTID,
WMI_10_2_UPDATE_STATS_EVENTID,
WMI_10_2_INST_RSSI_STATS_EVENTID,
WMI_10_2_VDEV_START_RESP_EVENTID,
WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
WMI_10_2_VDEV_RESUME_REQ_EVENTID,
WMI_10_2_VDEV_STOPPED_EVENTID,
WMI_10_2_PEER_STA_KICKOUT_EVENTID,
WMI_10_2_HOST_SWBA_EVENTID,
WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
WMI_10_2_MGMT_RX_EVENTID,
WMI_10_2_CHAN_INFO_EVENTID,
WMI_10_2_PHYERR_EVENTID,
WMI_10_2_ROAM_EVENTID,
WMI_10_2_PROFILE_MATCH,
WMI_10_2_DEBUG_PRINT_EVENTID,
WMI_10_2_PDEV_QVIT_EVENTID,
WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
WMI_10_2_RTT_ERROR_REPORT_EVENTID,
WMI_10_2_RTT_KEEPALIVE_EVENTID,
WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
WMI_10_2_DCS_INTERFERENCE_EVENTID,
WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
WMI_10_2_GPIO_INPUT_EVENTID,
WMI_10_2_PEER_RATECODE_LIST_EVENTID,
WMI_10_2_GENERIC_BUFFER_EVENTID,
WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
WMI_10_2_WDS_PEER_EVENTID,
WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
WMI_10_2_PDEV_TEMPERATURE_EVENTID,
WMI_10_2_MU_REPORT_EVENTID,
WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID,
WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
};
enum wmi_10_4_cmd_id {
WMI_10_4_START_CMDID = 0x9000,
WMI_10_4_END_CMDID = 0x9FFF,
WMI_10_4_INIT_CMDID,
WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
WMI_10_4_STOP_SCAN_CMDID,
WMI_10_4_SCAN_CHAN_LIST_CMDID,
WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
WMI_10_4_ECHO_CMDID,
WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
WMI_10_4_PDEV_SET_CHANNEL_CMDID,
WMI_10_4_PDEV_SET_PARAM_CMDID,
WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
WMI_10_4_VDEV_CREATE_CMDID,
WMI_10_4_VDEV_DELETE_CMDID,
WMI_10_4_VDEV_START_REQUEST_CMDID,
WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
WMI_10_4_VDEV_UP_CMDID,
WMI_10_4_VDEV_STOP_CMDID,
WMI_10_4_VDEV_DOWN_CMDID,
WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
WMI_10_4_VDEV_SET_PARAM_CMDID,
WMI_10_4_VDEV_INSTALL_KEY_CMDID,
WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
WMI_10_4_PEER_CREATE_CMDID,
WMI_10_4_PEER_DELETE_CMDID,
WMI_10_4_PEER_FLUSH_TIDS_CMDID,
WMI_10_4_PEER_SET_PARAM_CMDID,
WMI_10_4_PEER_ASSOC_CMDID,
WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
WMI_10_4_PEER_MCAST_GROUP_CMDID,
WMI_10_4_BCN_TX_CMDID,
WMI_10_4_PDEV_SEND_BCN_CMDID,
WMI_10_4_BCN_PRB_TMPL_CMDID,
WMI_10_4_BCN_FILTER_RX_CMDID,
WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
WMI_10_4_MGMT_TX_CMDID,
WMI_10_4_PRB_TMPL_CMDID,
WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
WMI_10_4_ADDBA_SEND_CMDID,
WMI_10_4_ADDBA_STATUS_CMDID,
WMI_10_4_DELBA_SEND_CMDID,
WMI_10_4_ADDBA_SET_RESP_CMDID,
WMI_10_4_SEND_SINGLEAMSDU_CMDID,
WMI_10_4_STA_POWERSAVE_MODE_CMDID,
WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
WMI_10_4_STA_MIMO_PS_MODE_CMDID,
WMI_10_4_DBGLOG_CFG_CMDID,
WMI_10_4_PDEV_DFS_ENABLE_CMDID,
WMI_10_4_PDEV_DFS_DISABLE_CMDID,
WMI_10_4_PDEV_QVIT_CMDID,
WMI_10_4_ROAM_SCAN_MODE,
WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
WMI_10_4_ROAM_SCAN_PERIOD,
WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
WMI_10_4_ROAM_AP_PROFILE,
WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
WMI_10_4_OFL_SCAN_PERIOD,
WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
WMI_10_4_P2P_GO_SET_BEACON_IE,
WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
WMI_10_4_AP_PS_PEER_PARAM_CMDID,
WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
WMI_10_4_PDEV_SUSPEND_CMDID,
WMI_10_4_PDEV_RESUME_CMDID,
WMI_10_4_ADD_BCN_FILTER_CMDID,
WMI_10_4_RMV_BCN_FILTER_CMDID,
WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
WMI_10_4_WOW_ENABLE_CMDID,
WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
WMI_10_4_RTT_MEASREQ_CMDID,
WMI_10_4_RTT_TSF_CMDID,
WMI_10_4_RTT_KEEPALIVE_CMDID,
WMI_10_4_OEM_REQ_CMDID,
WMI_10_4_NAN_CMDID,
WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
WMI_10_4_REQUEST_STATS_CMDID,
WMI_10_4_GPIO_CONFIG_CMDID,
WMI_10_4_GPIO_OUTPUT_CMDID,
WMI_10_4_VDEV_RATEMASK_CMDID,
WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
WMI_10_4_GTK_OFFLOAD_CMDID,
WMI_10_4_QBOOST_CFG_CMDID,
WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
WMI_10_4_FORCE_FW_HANG_CMDID,
WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
WMI_10_4_PDEV_FIPS_CMDID,
WMI_10_4_TT_SET_CONF_CMDID,
WMI_10_4_FWTEST_CMDID,
WMI_10_4_VDEV_ATF_REQUEST_CMDID,
WMI_10_4_PEER_ATF_REQUEST_CMDID,
WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
WMI_10_4_PDEV_GET_TPC_CMDID,
WMI_10_4_PDEV_GET_AST_INFO_CMDID,
WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
WMI_10_4_PDEV_GET_INFO_CMDID,
WMI_10_4_VDEV_GET_INFO_CMDID,
WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
WMI_10_4_MU_CAL_START_CMDID,
WMI_10_4_SET_CCA_PARAMS_CMDID,
WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
WMI_10_4_EXT_RESOURCE_CFG_CMDID,
WMI_10_4_VDEV_SET_IE_CMDID,
WMI_10_4_SET_LTEU_CONFIG_CMDID,
WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
};
enum wmi_10_4_event_id {
WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
WMI_10_4_READY_EVENTID,
WMI_10_4_DEBUG_MESG_EVENTID,
WMI_10_4_START_EVENTID = 0x9000,
WMI_10_4_END_EVENTID = 0x9FFF,
WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
WMI_10_4_ECHO_EVENTID,
WMI_10_4_UPDATE_STATS_EVENTID,
WMI_10_4_INST_RSSI_STATS_EVENTID,
WMI_10_4_VDEV_START_RESP_EVENTID,
WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
WMI_10_4_VDEV_RESUME_REQ_EVENTID,
WMI_10_4_VDEV_STOPPED_EVENTID,
WMI_10_4_PEER_STA_KICKOUT_EVENTID,
WMI_10_4_HOST_SWBA_EVENTID,
WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
WMI_10_4_MGMT_RX_EVENTID,
WMI_10_4_CHAN_INFO_EVENTID,
WMI_10_4_PHYERR_EVENTID,
WMI_10_4_ROAM_EVENTID,
WMI_10_4_PROFILE_MATCH,
WMI_10_4_DEBUG_PRINT_EVENTID,
WMI_10_4_PDEV_QVIT_EVENTID,
WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
WMI_10_4_RTT_ERROR_REPORT_EVENTID,
WMI_10_4_RTT_KEEPALIVE_EVENTID,
WMI_10_4_OEM_CAPABILITY_EVENTID,
WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
WMI_10_4_OEM_ERROR_REPORT_EVENTID,
WMI_10_4_NAN_EVENTID,
WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
WMI_10_4_GTK_REKEY_FAIL_EVENTID,
WMI_10_4_DCS_INTERFERENCE_EVENTID,
WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
WMI_10_4_CSA_HANDLING_EVENTID,
WMI_10_4_GPIO_INPUT_EVENTID,
WMI_10_4_PEER_RATECODE_LIST_EVENTID,
WMI_10_4_GENERIC_BUFFER_EVENTID,
WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
WMI_10_4_WDS_PEER_EVENTID,
WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
WMI_10_4_PDEV_FIPS_EVENTID,
WMI_10_4_TT_STATS_EVENTID,
WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
WMI_10_4_PDEV_TPC_EVENTID,
WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
WMI_10_4_PDEV_TEMPERATURE_EVENTID,
WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
WMI_10_4_MU_REPORT_EVENTID,
WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
};
enum wmi_phy_mode {
MODE_11A = 0, /* 11a Mode */
MODE_11G = 1, /* 11b/g Mode */
MODE_11B = 2, /* 11b Mode */
MODE_11GONLY = 3, /* 11g only Mode */
MODE_11NA_HT20 = 4, /* 11a HT20 mode */
MODE_11NG_HT20 = 5, /* 11g HT20 mode */
MODE_11NA_HT40 = 6, /* 11a HT40 mode */
MODE_11NG_HT40 = 7, /* 11g HT40 mode */
MODE_11AC_VHT20 = 8,
MODE_11AC_VHT40 = 9,
MODE_11AC_VHT80 = 10,
/* MODE_11AC_VHT160 = 11, */
MODE_11AC_VHT20_2G = 11,
MODE_11AC_VHT40_2G = 12,
MODE_11AC_VHT80_2G = 13,
MODE_UNKNOWN = 14,
MODE_MAX = 14
};
static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
{
switch (mode) {
case MODE_11A:
return "11a";
case MODE_11G:
return "11g";
case MODE_11B:
return "11b";
case MODE_11GONLY:
return "11gonly";
case MODE_11NA_HT20:
return "11na-ht20";
case MODE_11NG_HT20:
return "11ng-ht20";
case MODE_11NA_HT40:
return "11na-ht40";
case MODE_11NG_HT40:
return "11ng-ht40";
case MODE_11AC_VHT20:
return "11ac-vht20";
case MODE_11AC_VHT40:
return "11ac-vht40";
case MODE_11AC_VHT80:
return "11ac-vht80";
case MODE_11AC_VHT20_2G:
return "11ac-vht20-2g";
case MODE_11AC_VHT40_2G:
return "11ac-vht40-2g";
case MODE_11AC_VHT80_2G:
return "11ac-vht80-2g";
case MODE_UNKNOWN:
/* skip */
break;
/* no default handler to allow compiler to check that the
* enum is fully handled */
};
return "<unknown>";
}
#define WMI_CHAN_LIST_TAG 0x1
#define WMI_SSID_LIST_TAG 0x2
#define WMI_BSSID_LIST_TAG 0x3
#define WMI_IE_TAG 0x4
struct wmi_channel {
__le32 mhz;
__le32 band_center_freq1;
__le32 band_center_freq2; /* valid for 11ac, 80plus80 */
union {
__le32 flags; /* WMI_CHAN_FLAG_ */
struct {
u8 mode; /* only 6 LSBs */
} __packed;
} __packed;
union {
__le32 reginfo0;
struct {
/* note: power unit is 0.5 dBm */
u8 min_power;
u8 max_power;
u8 reg_power;
u8 reg_classid;
} __packed;
} __packed;
union {
__le32 reginfo1;
struct {
u8 antenna_max;
u8 max_tx_power;
} __packed;
} __packed;
} __packed;
struct wmi_channel_arg {
u32 freq;
u32 band_center_freq1;
bool passive;
bool allow_ibss;
bool allow_ht;
bool allow_vht;
bool ht40plus;
bool chan_radar;
/* note: power unit is 0.5 dBm */
u32 min_power;
u32 max_power;
u32 max_reg_power;
u32 max_antenna_gain;
u32 reg_class_id;
enum wmi_phy_mode mode;
};
enum wmi_channel_change_cause {
WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
WMI_CHANNEL_CHANGE_CAUSE_CSA,
};
#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
#define WMI_CHAN_FLAG_DFS (1 << 10)
#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
/* Indicate reason for channel switch */
#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
#define WMI_MAX_SPATIAL_STREAM 3 /* default max ss */
/* HT Capabilities*/
#define WMI_HT_CAP_ENABLED 0x0001 /* HT Enabled/ disabled */
#define WMI_HT_CAP_HT20_SGI 0x0002 /* Short Guard Interval with HT20 */
#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 /* Dynamic MIMO powersave */
#define WMI_HT_CAP_TX_STBC 0x0008 /* B3 TX STBC */
#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
#define WMI_HT_CAP_RX_STBC 0x0030 /* B4-B5 RX STBC */
#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
#define WMI_HT_CAP_LDPC 0x0040 /* LDPC supported */
#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 /* L-SIG TXOP Protection */
#define WMI_HT_CAP_MPDU_DENSITY 0x0700 /* MPDU Density */
#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
#define WMI_HT_CAP_HT40_SGI 0x0800
#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
WMI_HT_CAP_HT20_SGI | \
WMI_HT_CAP_HT40_SGI | \
WMI_HT_CAP_TX_STBC | \
WMI_HT_CAP_RX_STBC | \
WMI_HT_CAP_LDPC)
/*
* WMI_VHT_CAP_* these maps to ieee 802.11ac vht capability information
* field. The fields not defined here are not supported, or reserved.
* Do not change these masks and if you have to add new one follow the
* bitmask as specified by 802.11ac draft.
*/
#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
#define WMI_VHT_CAP_RX_LDPC 0x00000010
#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
#define WMI_VHT_CAP_TX_STBC 0x00000080
#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
/* The following also refer for max HT AMSDU */
#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
WMI_VHT_CAP_RX_LDPC | \
WMI_VHT_CAP_SGI_80MHZ | \
WMI_VHT_CAP_TX_STBC | \
WMI_VHT_CAP_RX_STBC_MASK | \
WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
WMI_VHT_CAP_RX_FIXED_ANT | \
WMI_VHT_CAP_TX_FIXED_ANT)
/*
* Interested readers refer to Rx/Tx MCS Map definition as defined in
* 802.11ac
*/
#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
enum {
REGDMN_MODE_11A = 0x00001, /* 11a channels */
REGDMN_MODE_TURBO = 0x00002, /* 11a turbo-only channels */
REGDMN_MODE_11B = 0x00004, /* 11b channels */
REGDMN_MODE_PUREG = 0x00008, /* 11g channels (OFDM only) */
REGDMN_MODE_11G = 0x00008, /* XXX historical */
REGDMN_MODE_108G = 0x00020, /* 11a+Turbo channels */
REGDMN_MODE_108A = 0x00040, /* 11g+Turbo channels */
REGDMN_MODE_XR = 0x00100, /* XR channels */
REGDMN_MODE_11A_HALF_RATE = 0x00200, /* 11A half rate channels */
REGDMN_MODE_11A_QUARTER_RATE = 0x00400, /* 11A quarter rate channels */
REGDMN_MODE_11NG_HT20 = 0x00800, /* 11N-G HT20 channels */
REGDMN_MODE_11NA_HT20 = 0x01000, /* 11N-A HT20 channels */
REGDMN_MODE_11NG_HT40PLUS = 0x02000, /* 11N-G HT40 + channels */
REGDMN_MODE_11NG_HT40MINUS = 0x04000, /* 11N-G HT40 - channels */
REGDMN_MODE_11NA_HT40PLUS = 0x08000, /* 11N-A HT40 + channels */
REGDMN_MODE_11NA_HT40MINUS = 0x10000, /* 11N-A HT40 - channels */
REGDMN_MODE_11AC_VHT20 = 0x20000, /* 5Ghz, VHT20 */
REGDMN_MODE_11AC_VHT40PLUS = 0x40000, /* 5Ghz, VHT40 + channels */
REGDMN_MODE_11AC_VHT40MINUS = 0x80000, /* 5Ghz VHT40 - channels */
REGDMN_MODE_11AC_VHT80 = 0x100000, /* 5Ghz, VHT80 channels */
REGDMN_MODE_ALL = 0xffffffff
};
#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
/* regulatory capabilities */
#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
struct hal_reg_capabilities {
/* regdomain value specified in EEPROM */
__le32 eeprom_rd;
/*regdomain */
__le32 eeprom_rd_ext;
/* CAP1 capabilities bit map. */
__le32 regcap1;
/* REGDMN EEPROM CAP. */
__le32 regcap2;
/* REGDMN MODE */
__le32 wireless_modes;
__le32 low_2ghz_chan;
__le32 high_2ghz_chan;
__le32 low_5ghz_chan;
__le32 high_5ghz_chan;
} __packed;
enum wlan_mode_capability {
WHAL_WLAN_11A_CAPABILITY = 0x1,
WHAL_WLAN_11G_CAPABILITY = 0x2,
WHAL_WLAN_11AG_CAPABILITY = 0x3,
};
/* structure used by FW for requesting host memory */
struct wlan_host_mem_req {
/* ID of the request */
__le32 req_id;
/* size of the of each unit */
__le32 unit_size;
/* flags to indicate that
* the number units is dependent
* on number of resources(num vdevs num peers .. etc)
*/
__le32 num_unit_info;
/*
* actual number of units to allocate . if flags in the num_unit_info
* indicate that number of units is tied to number of a particular
* resource to allocate then num_units filed is set to 0 and host
* will derive the number units from number of the resources it is
* requesting.
*/
__le32 num_units;
} __packed;
/*
* The following struct holds optional payload for
* wmi_service_ready_event,e.g., 11ac pass some of the
* device capability to the host.
*/
struct wmi_service_ready_event {
__le32 sw_version;
__le32 sw_version_1;
__le32 abi_version;
/* WMI_PHY_CAPABILITY */
__le32 phy_capability;
/* Maximum number of frag table entries that SW will populate less 1 */
__le32 max_frag_entry;
__le32 wmi_service_bitmap[16];
__le32 num_rf_chains;
/*
* The following field is only valid for service type
* WMI_SERVICE_11AC
*/
__le32 ht_cap_info; /* WMI HT Capability */
__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
__le32 hw_min_tx_power;
__le32 hw_max_tx_power;
struct hal_reg_capabilities hal_reg_capabilities;
__le32 sys_cap_info;
__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
/*
* Max beacon and Probe Response IE offload size
* (includes optional P2P IEs)
*/
__le32 max_bcn_ie_size;
/*
* request to host to allocate a chuck of memory and pss it down to FW
* via WM_INIT. FW uses this as FW extesnsion memory for saving its
* data structures. Only valid for low latency interfaces like PCIE
* where FW can access this memory directly (or) by DMA.
*/
__le32 num_mem_reqs;
struct wlan_host_mem_req mem_reqs[0];
} __packed;
/* This is the definition from 10.X firmware branch */
struct wmi_10x_service_ready_event {
__le32 sw_version;
__le32 abi_version;
/* WMI_PHY_CAPABILITY */
__le32 phy_capability;
/* Maximum number of frag table entries that SW will populate less 1 */
__le32 max_frag_entry;
__le32 wmi_service_bitmap[16];
__le32 num_rf_chains;
/*
* The following field is only valid for service type
* WMI_SERVICE_11AC
*/
__le32 ht_cap_info; /* WMI HT Capability */
__le32 vht_cap_info; /* VHT capability info field of 802.11ac */
__le32 vht_supp_mcs; /* VHT Supported MCS Set field Rx/Tx same */
__le32 hw_min_tx_power;
__le32 hw_max_tx_power;
struct hal_reg_capabilities hal_reg_capabilities;
__le32 sys_cap_info;
__le32 min_pkt_size_enable; /* Enterprise mode short pkt enable */
/*
* request to host to allocate a chuck of memory and pss it down to FW
* via WM_INIT. FW uses this as FW extesnsion memory for saving its
* data structures. Only valid for low latency interfaces like PCIE
* where FW can access this memory directly (or) by DMA.
*/
__le32 num_mem_reqs;
struct wlan_host_mem_req mem_reqs[0];
} __packed;
#define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ)
#define WMI_UNIFIED_READY_TIMEOUT_HZ (5 * HZ)
struct wmi_ready_event {
__le32 sw_version;
__le32 abi_version;
struct wmi_mac_addr mac_addr;
__le32 status;
} __packed;
struct wmi_resource_config {
/* number of virtual devices (VAPs) to support */
__le32 num_vdevs;
/* number of peer nodes to support */
__le32 num_peers;
/*
* In offload mode target supports features like WOW, chatter and
* other protocol offloads. In order to support them some
* functionalities like reorder buffering, PN checking need to be
* done in target. This determines maximum number of peers suported
* by target in offload mode
*/
__le32 num_offload_peers;
/* For target-based RX reordering */
__le32 num_offload_reorder_bufs;
/* number of keys per peer */
__le32 num_peer_keys;
/* total number of TX/RX data TIDs */
__le32 num_tids;
/*
* max skid for resolving hash collisions
*
* The address search table is sparse, so that if two MAC addresses
* result in the same hash value, the second of these conflicting
* entries can slide to the next index in the address search table,
* and use it, if it is unoccupied. This ast_skid_limit parameter
* specifies the upper bound on how many subsequent indices to search
* over to find an unoccupied space.
*/
__le32 ast_skid_limit;
/*
* the nominal chain mask for transmit
*
* The chain mask may be modified dynamically, e.g. to operate AP
* tx with a reduced number of chains if no clients are associated.
* This configuration parameter specifies the nominal chain-mask that
* should be used when not operating with a reduced set of tx chains.
*/
__le32 tx_chain_mask;
/*
* the nominal chain mask for receive
*
* The chain mask may be modified dynamically, e.g. for a client
* to use a reduced number of chains for receive if the traffic to
* the client is low enough that it doesn't require downlink MIMO
* or antenna diversity.
* This configuration parameter specifies the nominal chain-mask that
* should be used when not operating with a reduced set of rx chains.
*/
__le32 rx_chain_mask;
/*
* what rx reorder timeout (ms) to use for the AC
*
* Each WMM access class (voice, video, best-effort, background) will
* have its own timeout value to dictate how long to wait for missing
* rx MPDUs to arrive before flushing subsequent MPDUs that have
* already been received.
* This parameter specifies the timeout in milliseconds for each
* class.
*/
__le32 rx_timeout_pri_vi;
__le32 rx_timeout_pri_vo;
__le32 rx_timeout_pri_be;
__le32 rx_timeout_pri_bk;
/*
* what mode the rx should decap packets to
*
* MAC can decap to RAW (no decap), native wifi or Ethernet types
* THis setting also determines the default TX behavior, however TX
* behavior can be modified on a per VAP basis during VAP init
*/
__le32 rx_decap_mode;
/* what is the maximum number of scan requests that can be queued */
__le32 scan_max_pending_reqs;
/* maximum VDEV that could use BMISS offload */
__le32 bmiss_offload_max_vdev;
/* maximum VDEV that could use offload roaming */
__le32 roam_offload_max_vdev;
/* maximum AP profiles that would push to offload roaming */
__le32 roam_offload_max_ap_profiles;
/*
* how many groups to use for mcast->ucast conversion
*
* The target's WAL maintains a table to hold information regarding
* which peers belong to a given multicast group, so that if
* multicast->unicast conversion is enabled, the target can convert
* multicast tx frames to a series of unicast tx frames, to each
* peer within the multicast group.
This num_mcast_groups configuration parameter tells the target how
* many multicast groups to provide storage for within its multicast
* group membership table.
*/
__le32 num_mcast_groups;
/*
* size to alloc for the mcast membership table
*
* This num_mcast_table_elems configuration parameter tells the
* target how many peer elements it needs to provide storage for in
* its multicast group membership table.
* These multicast group membership table elements are shared by the
* multicast groups stored within the table.
*/
__le32 num_mcast_table_elems;
/*
* whether/how to do multicast->unicast conversion
*
* This configuration parameter specifies whether the target should
* perform multicast --> unicast conversion on transmit, and if so,
* what to do if it finds no entries in its multicast group
* membership table for the multicast IP address in the tx frame.
* Configuration value:
* 0 -> Do not perform multicast to unicast conversion.
* 1 -> Convert multicast frames to unicast, if the IP multicast
* address from the tx frame is found in the multicast group
* membership table. If the IP multicast address is not found,
* drop the frame.
* 2 -> Convert multicast frames to unicast, if the IP multicast
* address from the tx frame is found in the multicast group
* membership table. If the IP multicast address is not found,
* transmit the frame as multicast.
*/
__le32 mcast2ucast_mode;
/*
* how much memory to allocate for a tx PPDU dbg log
*
* This parameter controls how much memory the target will allocate
* to store a log of tx PPDU meta-information (how large the PPDU
* was, when it was sent, whether it was successful, etc.)
*/
__le32 tx_dbg_log_size;
/* how many AST entries to be allocated for WDS */
__le32 num_wds_entries;
/*
* MAC DMA burst size, e.g., For target PCI limit can be
* 0 -default, 1 256B
*/
__le32 dma_burst_size;
/*
* Fixed delimiters to be inserted after every MPDU to
* account for interface latency to avoid underrun.
*/
__le32 mac_aggr_delim;
/*
* determine whether target is responsible for detecting duplicate
* non-aggregate MPDU and timing out stale fragments.
*
* A-MPDU reordering is always performed on the target.
*
* 0: target responsible for frag timeout and dup checking
* 1: host responsible for frag timeout and dup checking
*/
__le32 rx_skip_defrag_timeout_dup_detection_check;
/*
* Configuration for VoW :
* No of Video Nodes to be supported
* and Max no of descriptors for each Video link (node).
*/
__le32 vow_config;
/* maximum VDEV that could use GTK offload */
__le32 gtk_offload_max_vdev;
/* Number of msdu descriptors target should use */
__le32 num_msdu_desc;
/*
* Max. number of Tx fragments per MSDU
* This parameter controls the max number of Tx fragments per MSDU.
* This is sent by the target as part of the WMI_SERVICE_READY event
* and is overriden by the OS shim as required.
*/
__le32 max_frag_entries;
} __packed;
struct wmi_resource_config_10x {
/* number of virtual devices (VAPs) to support */
__le32 num_vdevs;
/* number of peer nodes to support */
__le32 num_peers;
/* number of keys per peer */
__le32 num_peer_keys;
/* total number of TX/RX data TIDs */
__le32 num_tids;
/*
* max skid for resolving hash collisions
*
* The address search table is sparse, so that if two MAC addresses
* result in the same hash value, the second of these conflicting
* entries can slide to the next index in the address search table,
* and use it, if it is unoccupied. This ast_skid_limit parameter
* specifies the upper bound on how many subsequent indices to search
* over to find an unoccupied space.
*/
__le32 ast_skid_limit;
/*
* the nominal chain mask for transmit
*
* The chain mask may be modified dynamically, e.g. to operate AP
* tx with a reduced number of chains if no clients are associated.
* This configuration parameter specifies the nominal chain-mask that
* should be used when not operating with a reduced set of tx chains.
*/
__le32 tx_chain_mask;
/*
* the nominal chain mask for receive
*
* The chain mask may be modified dynamically, e.g. for a client
* to use a reduced number of chains for receive if the traffic to
* the client is low enough that it doesn't require downlink MIMO
* or antenna diversity.
* This configuration parameter specifies the nominal chain-mask that
* should be used when not operating with a reduced set of rx chains.
*/
__le32 rx_chain_mask;
/*
* what rx reorder timeout (ms) to use for the AC
*
* Each WMM access class (voice, video, best-effort, background) will
* have its own timeout value to dictate how long to wait for missing
* rx MPDUs to arrive before flushing subsequent MPDUs that have
* already been received.
* This parameter specifies the timeout in milliseconds for each
* class.
*/
__le32 rx_timeout_pri_vi;
__le32 rx_timeout_pri_vo;
__le32 rx_timeout_pri_be;
__le32 rx_timeout_pri_bk;
/*
* what mode the rx should decap packets to
*
* MAC can decap to RAW (no decap), native wifi or Ethernet types
* THis setting also determines the default TX behavior, however TX
* behavior can be modified on a per VAP basis during VAP init
*/
__le32 rx_decap_mode;
/* what is the maximum number of scan requests that can be queued */
__le32 scan_max_pending_reqs;
/* maximum VDEV that could use BMISS offload */
__le32 bmiss_offload_max_vdev;
/* maximum VDEV that could use offload roaming */
__le32 roam_offload_max_vdev;
/* maximum AP profiles that would push to offload roaming */
__le32 roam_offload_max_ap_profiles;
/*
* how many groups to use for mcast->ucast conversion
*
* The target's WAL maintains a table to hold information regarding
* which peers belong to a given multicast group, so that if
* multicast->unicast conversion is enabled, the target can convert
* multicast tx frames to a series of unicast tx frames, to each
* peer within the multicast group.
This num_mcast_groups configuration parameter tells the target how
* many multicast groups to provide storage for within its multicast
* group membership table.
*/
__le32 num_mcast_groups;
/*
* size to alloc for the mcast membership table
*
* This num_mcast_table_elems configuration parameter tells the
* target how many peer elements it needs to provide storage for in
* its multicast group membership table.
* These multicast group membership table elements are shared by the
* multicast groups stored within the table.
*/
__le32 num_mcast_table_elems;
/*
* whether/how to do multicast->unicast conversion
*
* This configuration parameter specifies whether the target should
* perform multicast --> unicast conversion on transmit, and if so,
* what to do if it finds no entries in its multicast group
* membership table for the multicast IP address in the tx frame.
* Configuration value:
* 0 -> Do not perform multicast to unicast conversion.
* 1 -> Convert multicast frames to unicast, if the IP multicast
* address from the tx frame is found in the multicast group
* membership table. If the IP multicast address is not found,
* drop the frame.
* 2 -> Convert multicast frames to unicast, if the IP multicast
* address from the tx frame is found in the multicast group
* membership table. If the IP multicast address is not found,
* transmit the frame as multicast.
*/
__le32 mcast2ucast_mode;
/*
* how much memory to allocate for a tx PPDU dbg log
*
* This parameter controls how much memory the target will allocate
* to store a log of tx PPDU meta-information (how large the PPDU
* was, when it was sent, whether it was successful, etc.)
*/
__le32 tx_dbg_log_size;
/* how many AST entries to be allocated for WDS */
__le32 num_wds_entries;
/*
* MAC DMA burst size, e.g., For target PCI limit can be
* 0 -default, 1 256B
*/
__le32 dma_burst_size;
/*
* Fixed delimiters to be inserted after every MPDU to
* account for interface latency to avoid underrun.
*/
__le32 mac_aggr_delim;
/*
* determine whether target is responsible for detecting duplicate
* non-aggregate MPDU and timing out stale fragments.
*
* A-MPDU reordering is always performed on the target.
*
* 0: target responsible for frag timeout and dup checking
* 1: host responsible for frag timeout and dup checking
*/
__le32 rx_skip_defrag_timeout_dup_detection_check;
/*
* Configuration for VoW :
* No of Video Nodes to be supported
* and Max no of descriptors for each Video link (node).
*/
__le32 vow_config;
/* Number of msdu descriptors target should use */
__le32 num_msdu_desc;
/*
* Max. number of Tx fragments per MSDU
* This parameter controls the max number of Tx fragments per MSDU.
* This is sent by the target as part of the WMI_SERVICE_READY event
* and is overriden by the OS shim as required.
*/
__le32 max_frag_entries;
} __packed;
enum wmi_10_2_feature_mask {
WMI_10_2_RX_BATCH_MODE = BIT(0),
WMI_10_2_ATF_CONFIG = BIT(1),
WMI_10_2_COEX_GPIO = BIT(3),
WMI_10_2_BSS_CHAN_INFO = BIT(6),
WMI_10_2_PEER_STATS = BIT(7),
};
struct wmi_resource_config_10_2 {
struct wmi_resource_config_10x common;
__le32 max_peer_ext_stats;
__le32 smart_ant_cap; /* 0-disable, 1-enable */
__le32 bk_min_free;
__le32 be_min_free;
__le32 vi_min_free;
__le32 vo_min_free;
__le32 feature_mask;
} __packed;
#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
#define NUM_UNITS_IS_NUM_PEERS BIT(1)
#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
struct wmi_resource_config_10_4 {
/* Number of virtual devices (VAPs) to support */
__le32 num_vdevs;
/* Number of peer nodes to support */
__le32 num_peers;
/* Number of active peer nodes to support */
__le32 num_active_peers;
/* In offload mode, target supports features like WOW, chatter and other
* protocol offloads. In order to support them some functionalities like
* reorder buffering, PN checking need to be done in target.
* This determines maximum number of peers supported by target in
* offload mode.
*/
__le32 num_offload_peers;
/* Number of reorder buffers available for doing target based reorder
* Rx reorder buffering
*/
__le32 num_offload_reorder_buffs;
/* Number of keys per peer */
__le32 num_peer_keys;
/* Total number of TX/RX data TIDs */
__le32 num_tids;
/* Max skid for resolving hash collisions.
* The address search table is sparse, so that if two MAC addresses
* result in the same hash value, the second of these conflicting
* entries can slide to the next index in the address search table,
* and use it, if it is unoccupied. This ast_skid_limit parameter
* specifies the upper bound on how many subsequent indices to search
* over to find an unoccupied space.
*/
__le32 ast_skid_limit;
/* The nominal chain mask for transmit.
* The chain mask may be modified dynamically, e.g. to operate AP tx
* with a reduced number of chains if no clients are associated.
* This configuration parameter specifies the nominal chain-mask that
* should be used when not operating with a reduced set of tx chains.
*/
__le32 tx_chain_mask;
/* The nominal chain mask for receive.
* The chain mask may be modified dynamically, e.g. for a client to use
* a reduced number of chains for receive if the traffic to the client
* is low enough that it doesn't require downlink MIMO or antenna
* diversity. This configuration parameter specifies the nominal
* chain-mask that should be used when not operating with a reduced
* set of rx chains.
*/
__le32 rx_chain_mask;
/* What rx reorder timeout (ms) to use for the AC.
* Each WMM access class (voice, video, best-effort, background) will
* have its own timeout value to dictate how long to wait for missing
* rx MPDUs to arrive before flushing subsequent MPDUs that have already
* been received. This parameter specifies the timeout in milliseconds
* for each class.
*/
__le32 rx_timeout_pri[4];
/* What mode the rx should decap packets to.
* MAC can decap to RAW (no decap), native wifi or Ethernet types.
* This setting also determines the default TX behavior, however TX
* behavior can be modified on a per VAP basis during VAP init
*/
__le32 rx_decap_mode;
__le32 scan_max_pending_req;
__le32 bmiss_offload_max_vdev;
__le32 roam_offload_max_vdev;
__le32 roam_offload_max_ap_profiles;
/* How many groups to use for mcast->ucast conversion.
* The target's WAL maintains a table to hold information regarding
* which peers belong to a given multicast group, so that if
* multicast->unicast conversion is enabled, the target can convert
* multicast tx frames to a series of unicast tx frames, to each peer
* within the multicast group. This num_mcast_groups configuration
* parameter tells the target how many multicast groups to provide
* storage for within its multicast group membership table.
*/
__le32 num_mcast_groups;
/* Size to alloc for the mcast membership table.
* This num_mcast_table_elems configuration parameter tells the target
* how many peer elements it needs to provide storage for in its
* multicast group membership table. These multicast group membership
* table elements are shared by the multicast groups stored within
* the table.
*/
__le32 num_mcast_table_elems;
/* Whether/how to do multicast->unicast conversion.
* This configuration parameter specifies whether the target should
* perform multicast --> unicast conversion on transmit, and if so,
* what to do if it finds no entries in its multicast group membership
* table for the multicast IP address in the tx frame.
* Configuration value:
* 0 -> Do not perform multicast to unicast conversion.
* 1 -> Convert multicast frames to unicast, if the IP multicast address
* from the tx frame is found in the multicast group membership
* table. If the IP multicast address is not found, drop the frame
* 2 -> Convert multicast frames to unicast, if the IP multicast address
* from the tx frame is found in the multicast group membership
* table. If the IP multicast address is not found, transmit the
* frame as multicast.
*/
__le32 mcast2ucast_mode;
/* How much memory to allocate for a tx PPDU dbg log.
* This parameter controls how much memory the target will allocate to
* store a log of tx PPDU meta-information (how large the PPDU was,
* when it was sent, whether it was successful, etc.)
*/
__le32 tx_dbg_log_size;
/* How many AST entries to be allocated for WDS */
__le32 num_wds_entries;
/* MAC DMA burst size. 0 -default, 1 -256B */
__le32 dma_burst_size;
/* Fixed delimiters to be inserted after every MPDU to account for
* interface latency to avoid underrun.
*/
__le32 mac_aggr_delim;
/* Determine whether target is responsible for detecting duplicate
* non-aggregate MPDU and timing out stale fragments. A-MPDU reordering
* is always performed on the target.
*
* 0: target responsible for frag timeout and dup checking
* 1: host responsible for frag timeout and dup checking
*/
__le32 rx_skip_defrag_timeout_dup_detection_check;
/* Configuration for VoW : No of Video nodes to be supported and max
* no of descriptors for each video link (node).
*/
__le32 vow_config;
/* Maximum vdev that could use gtk offload */
__le32 gtk_offload_max_vdev;
/* Number of msdu descriptors target should use */
__le32 num_msdu_desc;
/* Max number of tx fragments per MSDU.
* This parameter controls the max number of tx fragments per MSDU.
* This will passed by target as part of the WMI_SERVICE_READY event
* and is overridden by the OS shim as required.
*/
__le32 max_frag_entries;
/* Max number of extended peer stats.
* This parameter controls the max number of peers for which extended
* statistics are supported by target
*/
__le32 max_peer_ext_stats;
/* Smart antenna capabilities information.
* 1 - Smart antenna is enabled
* 0 - Smart antenna is disabled
* In future this can contain smart antenna specific capabilities.
*/
__le32 smart_ant_cap;
/* User can configure the buffers allocated for each AC (BE, BK, VI, VO)
* during init.
*/
__le32 bk_minfree;
__le32 be_minfree;
__le32 vi_minfree;
__le32 vo_minfree;
/* Rx batch mode capability.
* 1 - Rx batch mode enabled
* 0 - Rx batch mode disabled
*/
__le32 rx_batchmode;
/* Thermal throttling capability.
* 1 - Capable of thermal throttling
* 0 - Not capable of thermal throttling
*/
__le32 tt_support;
/* ATF configuration.
* 1 - Enable ATF
* 0 - Disable ATF
*/
__le32 atf_config;
/* Configure padding to manage IP header un-alignment
* 1 - Enable padding
* 0 - Disable padding
*/
__le32 iphdr_pad_config;
/* qwrap configuration (bits 15-0)
* 1 - This is qwrap configuration
* 0 - This is not qwrap
*
* Bits 31-16 is alloc_frag_desc_for_data_pkt (1 enables, 0 disables)
* In order to get ack-RSSI reporting and to specify the tx-rate for
* individual frames, this option must be enabled. This uses an extra
* 4 bytes per tx-msdu descriptor, so don't enable it unless you need it.
*/
__le32 qwrap_config;
} __packed;
/**
* enum wmi_10_4_feature_mask - WMI 10.4 feature enable/disable flags
* @WMI_10_4_LTEU_SUPPORT: LTEU config
* @WMI_10_4_COEX_GPIO_SUPPORT: COEX GPIO config
* @WMI_10_4_AUX_RADIO_SPECTRAL_INTF: AUX Radio Enhancement for spectral scan
* @WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF: AUX Radio Enhancement for chan load scan
* @WMI_10_4_BSS_CHANNEL_INFO_64: BSS channel info stats
* @WMI_10_4_PEER_STATS: Per station stats
*/
enum wmi_10_4_feature_mask {
WMI_10_4_LTEU_SUPPORT = BIT(0),
WMI_10_4_COEX_GPIO_SUPPORT = BIT(1),
WMI_10_4_AUX_RADIO_SPECTRAL_INTF = BIT(2),
WMI_10_4_AUX_RADIO_CHAN_LOAD_INTF = BIT(3),
WMI_10_4_BSS_CHANNEL_INFO_64 = BIT(4),
WMI_10_4_PEER_STATS = BIT(5),
};
struct wmi_ext_resource_config_10_4_cmd {
/* contains enum wmi_host_platform_type */
__le32 host_platform_config;
/* see enum wmi_10_4_feature_mask */
__le32 fw_feature_bitmap;
};
/* strucutre describing host memory chunk. */
struct host_memory_chunk {
/* id of the request that is passed up in service ready */
__le32 req_id;
/* the physical address the memory chunk */
__le32 ptr;
/* size of the chunk */
__le32 size;
} __packed;
struct wmi_host_mem_chunks {
__le32 count;
/* some fw revisions require at least 1 chunk regardless of count */
struct host_memory_chunk items[1];
} __packed;
struct wmi_init_cmd {
struct wmi_resource_config resource_config;
struct wmi_host_mem_chunks mem_chunks;
} __packed;
/* _10x stucture is from 10.X FW API */
struct wmi_init_cmd_10x {
struct wmi_resource_config_10x resource_config;
struct wmi_host_mem_chunks mem_chunks;
} __packed;
struct wmi_init_cmd_10_2 {
struct wmi_resource_config_10_2 resource_config;
struct wmi_host_mem_chunks mem_chunks;
} __packed;
struct wmi_init_cmd_10_4 {
struct wmi_resource_config_10_4 resource_config;
struct wmi_host_mem_chunks mem_chunks;
} __packed;
struct wmi_chan_list_entry {
__le16 freq;
u8 phy_mode; /* valid for 10.2 only */
u8 reserved;
} __packed;
/* TLV for channel list */
struct wmi_chan_list {
__le32 tag; /* WMI_CHAN_LIST_TAG */
__le32 num_chan;
struct wmi_chan_list_entry channel_list[0];
} __packed;
struct wmi_bssid_list {
__le32 tag; /* WMI_BSSID_LIST_TAG */
__le32 num_bssid;
struct wmi_mac_addr bssid_list[0];
} __packed;
struct wmi_ie_data {
__le32 tag; /* WMI_IE_TAG */
__le32 ie_len;
u8 ie_data[0];
} __packed;
struct wmi_ssid {
__le32 ssid_len;
u8 ssid[32];
} __packed;
struct wmi_ssid_list {
__le32 tag; /* WMI_SSID_LIST_TAG */
__le32 num_ssids;
struct wmi_ssid ssids[0];
} __packed;
/* prefix used by scan requestor ids on the host */
#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
/* prefix used by scan request ids generated on the host */
/* host cycles through the lower 12 bits to generate ids */
#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
#define WLAN_SCAN_PARAMS_MAX_SSID 16
#define WLAN_SCAN_PARAMS_MAX_BSSID 4
#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
/* Values lower than this may be refused by some firmware revisions with a scan
* completion with a timedout reason.
*/
#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
/* Scan priority numbers must be sequential, starting with 0 */
enum wmi_scan_priority {
WMI_SCAN_PRIORITY_VERY_LOW = 0,
WMI_SCAN_PRIORITY_LOW,
WMI_SCAN_PRIORITY_MEDIUM,
WMI_SCAN_PRIORITY_HIGH,
WMI_SCAN_PRIORITY_VERY_HIGH,
WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */
};
struct wmi_start_scan_common {
/* Scan ID */
__le32 scan_id;
/* Scan requestor ID */
__le32 scan_req_id;
/* VDEV id(interface) that is requesting scan */
__le32 vdev_id;
/* Scan Priority, input to scan scheduler */
__le32 scan_priority;
/* Scan events subscription */
__le32 notify_scan_events;
/* dwell time in msec on active channels */
__le32 dwell_time_active;
/* dwell time in msec on passive channels */
__le32 dwell_time_passive;
/*
* min time in msec on the BSS channel,only valid if atleast one
* VDEV is active
*/
__le32 min_rest_time;
/*
* max rest time in msec on the BSS channel,only valid if at least
* one VDEV is active
*/
/*
* the scanner will rest on the bss channel at least min_rest_time
* after min_rest_time the scanner will start checking for tx/rx
* activity on all VDEVs. if there is no activity the scanner will
* switch to off channel. if there is activity the scanner will let
* the radio on the bss channel until max_rest_time expires.at
* max_rest_time scanner will switch to off channel irrespective of
* activity. activity is determined by the idle_time parameter.
*/
__le32 max_rest_time;
/*
* time before sending next set of probe requests.
* The scanner keeps repeating probe requests transmission with
* period specified by repeat_probe_time.
* The number of probe requests specified depends on the ssid_list
* and bssid_list
*/
__le32 repeat_probe_time;
/* time in msec between 2 consequetive probe requests with in a set. */
__le32 probe_spacing_time;
/*
* data inactivity time in msec on bss channel that will be used by
* scanner for measuring the inactivity.
*/
__le32 idle_time;
/* maximum time in msec allowed for scan */
__le32 max_scan_time;
/*
* delay in msec before sending first probe request after switching
* to a channel
*/
__le32 probe_delay;
/* Scan control flags */
__le32 scan_ctrl_flags;
} __packed;
struct wmi_start_scan_tlvs {
/* TLV parameters. These includes channel list, ssid list, bssid list,
* extra ies.
*/
u8 tlvs[0];
} __packed;
struct wmi_start_scan_cmd {
struct wmi_start_scan_common common;
__le32 burst_duration_ms;
struct wmi_start_scan_tlvs tlvs;
} __packed;
/* This is the definition from 10.X firmware branch */
struct wmi_10x_start_scan_cmd {
struct wmi_start_scan_common common;
struct wmi_start_scan_tlvs tlvs;
} __packed;
struct wmi_ssid_arg {
int len;
const u8 *ssid;
};
struct wmi_bssid_arg {
const u8 *bssid;
};
struct wmi_start_scan_arg {
u32 scan_id;
u32 scan_req_id;
u32 vdev_id;
u32 scan_priority;
u32 notify_scan_events;
u32 dwell_time_active;
u32 dwell_time_passive;
u32 min_rest_time;
u32 max_rest_time;
u32 repeat_probe_time;
u32 probe_spacing_time;
u32 idle_time;
u32 max_scan_time;
u32 probe_delay;
u32 scan_ctrl_flags;
u32 burst_duration_ms;
u32 ie_len;
u32 n_channels;
u32 n_ssids;
u32 n_bssids;
u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
u16 channels[64];
struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
};
/* scan control flags */
/* passively scan all channels including active channels */
#define WMI_SCAN_FLAG_PASSIVE 0x1
/* add wild card ssid probe request even though ssid_list is specified. */
#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
/* add cck rates to rates/xrate ie for the generated probe request */
#define WMI_SCAN_ADD_CCK_RATES 0x4
/* add ofdm rates to rates/xrate ie for the generated probe request */
#define WMI_SCAN_ADD_OFDM_RATES 0x8
/* To enable indication of Chan load and Noise floor to host */
#define WMI_SCAN_CHAN_STAT_EVENT 0x10
/* Filter Probe request frames */
#define WMI_SCAN_FILTER_PROBE_REQ 0x20
/* When set, DFS channels will not be scanned */
#define WMI_SCAN_BYPASS_DFS_CHN 0x40
/* Different FW scan engine may choose to bail out on errors.
* Allow the driver to have influence over that. */
#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
/* WMI_SCAN_CLASS_MASK must be the same value as IEEE80211_SCAN_CLASS_MASK */
#define WMI_SCAN_CLASS_MASK 0xFF000000
enum wmi_stop_scan_type {
WMI_SCAN_STOP_ONE = 0x00000000, /* stop by scan_id */
WMI_SCAN_STOP_VDEV_ALL = 0x01000000, /* stop by vdev_id */
WMI_SCAN_STOP_ALL = 0x04000000, /* stop all scans */
};
struct wmi_stop_scan_cmd {
__le32 scan_req_id;
__le32 scan_id;
__le32 req_type;
__le32 vdev_id;
} __packed;
struct wmi_stop_scan_arg {
u32 req_id;
enum wmi_stop_scan_type req_type;
union {
u32 scan_id;
u32 vdev_id;
} u;
};
struct wmi_scan_chan_list_cmd {
__le32 num_scan_chans;
struct wmi_channel chan_info[0];
} __packed;
struct wmi_scan_chan_list_arg {
u32 n_channels;
struct wmi_channel_arg *channels;
};
enum wmi_bss_filter {
WMI_BSS_FILTER_NONE = 0, /* no beacons forwarded */
WMI_BSS_FILTER_ALL, /* all beacons forwarded */
WMI_BSS_FILTER_PROFILE, /* only beacons matching profile */
WMI_BSS_FILTER_ALL_BUT_PROFILE, /* all but beacons matching profile */
WMI_BSS_FILTER_CURRENT_BSS, /* only beacons matching current BSS */
WMI_BSS_FILTER_ALL_BUT_BSS, /* all but beacons matching BSS */
WMI_BSS_FILTER_PROBED_SSID, /* beacons matching probed ssid */
WMI_BSS_FILTER_LAST_BSS, /* marker only */
};
enum wmi_scan_event_type {
WMI_SCAN_EVENT_STARTED = BIT(0),
WMI_SCAN_EVENT_COMPLETED = BIT(1),
WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
WMI_SCAN_EVENT_DEQUEUED = BIT(4),
/* possibly by high-prio scan */
WMI_SCAN_EVENT_PREEMPTED = BIT(5),
WMI_SCAN_EVENT_START_FAILED = BIT(6),
WMI_SCAN_EVENT_RESTARTED = BIT(7),
WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
WMI_SCAN_EVENT_MAX = BIT(15),
};
enum wmi_scan_completion_reason {
WMI_SCAN_REASON_COMPLETED,
WMI_SCAN_REASON_CANCELLED,
WMI_SCAN_REASON_PREEMPTED,
WMI_SCAN_REASON_TIMEDOUT,
WMI_SCAN_REASON_INTERNAL_FAILURE,
WMI_SCAN_REASON_MAX,
};
struct wmi_scan_event {
__le32 event_type; /* %WMI_SCAN_EVENT_ */
__le32 reason; /* %WMI_SCAN_REASON_ */
__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
__le32 scan_req_id;
__le32 scan_id;
__le32 vdev_id;
} __packed;
/*
* This defines how much headroom is kept in the
* receive frame between the descriptor and the
* payload, in order for the WMI PHY error and
* management handler to insert header contents.
*
* This is in bytes.
*/
#define WMI_MGMT_RX_HDR_HEADROOM 52
/*
* This event will be used for sending scan results
* as well as rx mgmt frames to the host. The rx buffer
* will be sent as part of this WMI event. It would be a
* good idea to pass all the fields in the RX status
* descriptor up to the host.
*/
struct wmi_mgmt_rx_hdr_v1 {
__le32 channel;
__le32 snr;
__le32 rate;
__le32 phy_mode;
__le32 buf_len;
__le32 status; /* %WMI_RX_STATUS_ */
} __packed;
struct wmi_mgmt_rx_hdr_v2 {
struct wmi_mgmt_rx_hdr_v1 v1;
__le32 rssi_ctl[4];
} __packed;
struct wmi_mgmt_rx_event_v1 {
struct wmi_mgmt_rx_hdr_v1 hdr;
u8 buf[0];
} __packed;
struct wmi_mgmt_rx_event_v2 {
struct wmi_mgmt_rx_hdr_v2 hdr;
u8 buf[0];
} __packed;
struct wmi_10_4_mgmt_rx_hdr {
__le32 channel;
__le32 snr;
u8 rssi_ctl[4];
__le32 rate;
__le32 phy_mode;
__le32 buf_len;
__le32 status;
} __packed;
struct wmi_10_4_mgmt_rx_event {
struct wmi_10_4_mgmt_rx_hdr hdr;
u8 buf[0];
} __packed;
struct wmi_mgmt_rx_ext_info {
__le64 rx_mac_timestamp;
} __packed __aligned(4);
#define WMI_RX_STATUS_OK 0x00
#define WMI_RX_STATUS_ERR_CRC 0x01
#define WMI_RX_STATUS_ERR_DECRYPT 0x08
#define WMI_RX_STATUS_ERR_MIC 0x10
#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
/* Extension data at the end of mgmt frame */
#define WMI_RX_STATUS_EXT_INFO 0x40
#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
#define PHY_ERROR_GEN_RADAR 0x05
#define PHY_ERROR_10_4_RADAR_MASK 0x4
#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
enum phy_err_type {
PHY_ERROR_UNKNOWN,
PHY_ERROR_SPECTRAL_SCAN,
PHY_ERROR_FALSE_RADAR_EXT,
PHY_ERROR_RADAR
};
struct wmi_phyerr {
__le32 tsf_timestamp;
__le16 freq1;
__le16 freq2;
u8 rssi_combined;
u8 chan_width_mhz;
u8 phy_err_code;
u8 rsvd0;
__le32 rssi_chains[4];
__le16 nf_chains[4];
__le32 buf_len;
u8 buf[0];
} __packed;
struct wmi_phyerr_event {
__le32 num_phyerrs;
__le32 tsf_l32;
__le32 tsf_u32;
struct wmi_phyerr phyerrs[0];
} __packed;
struct wmi_10_4_phyerr_event {
__le32 tsf_l32;
__le32 tsf_u32;
__le16 freq1;
__le16 freq2;
u8 rssi_combined;
u8 chan_width_mhz;
u8 phy_err_code;
u8 rsvd0;
__le32 rssi_chains[4];
__le16 nf_chains[4];
__le32 phy_err_mask[2];
__le32 tsf_timestamp;
__le32 buf_len;
u8 buf[0];
} __packed;
#define PHYERR_TLV_SIG 0xBB
#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
struct phyerr_radar_report {
__le32 reg0; /* RADAR_REPORT_REG0_* */
__le32 reg1; /* REDAR_REPORT_REG1_* */
} __packed;
#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
struct phyerr_fft_report {
__le32 reg0; /* SEARCH_FFT_REPORT_REG0_ * */
__le32 reg1; /* SEARCH_FFT_REPORT_REG1_ * */
} __packed;
#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
struct phyerr_tlv {
__le16 len;
u8 tag;
u8 sig;
} __packed;
#define DFS_RSSI_POSSIBLY_FALSE 50
#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
struct wmi_mgmt_tx_hdr {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
__le32 tx_rate;
__le32 tx_power;
__le32 buf_len;
} __packed;
struct wmi_mgmt_tx_cmd {
struct wmi_mgmt_tx_hdr hdr;
u8 buf[0];
} __packed;
struct wmi_echo_event {
__le32 value;
} __packed;
struct wmi_echo_cmd {
__le32 value;
} __packed;
struct wmi_pdev_set_regdomain_cmd {
__le32 reg_domain;
__le32 reg_domain_2G;
__le32 reg_domain_5G;
__le32 conformance_test_limit_2G;
__le32 conformance_test_limit_5G;
} __packed;
enum wmi_dfs_region {
/* Uninitialized dfs domain */
WMI_UNINIT_DFS_DOMAIN = 0,
/* FCC3 dfs domain */
WMI_FCC_DFS_DOMAIN = 1,
/* ETSI dfs domain */
WMI_ETSI_DFS_DOMAIN = 2,
/*Japan dfs domain */
WMI_MKK4_DFS_DOMAIN = 3,
};
struct wmi_pdev_set_regdomain_cmd_10x {
__le32 reg_domain;
__le32 reg_domain_2G;
__le32 reg_domain_5G;
__le32 conformance_test_limit_2G;
__le32 conformance_test_limit_5G;
/* dfs domain from wmi_dfs_region */
__le32 dfs_domain;
} __packed;
/* Command to set/unset chip in quiet mode */
struct wmi_pdev_set_quiet_cmd {
/* period in TUs */
__le32 period;
/* duration in TUs */
__le32 duration;
/* offset in TUs */
__le32 next_start;
/* enable/disable */
__le32 enabled;
} __packed;
/*
* 802.11g protection mode.
*/
enum ath10k_protmode {
ATH10K_PROT_NONE = 0, /* no protection */
ATH10K_PROT_CTSONLY = 1, /* CTS to self */
ATH10K_PROT_RTSCTS = 2, /* RTS-CTS */
};
enum wmi_rtscts_profile {
WMI_RTSCTS_FOR_NO_RATESERIES = 0,
WMI_RTSCTS_FOR_SECOND_RATESERIES,
WMI_RTSCTS_ACROSS_SW_RETRIES
};
#define WMI_RTSCTS_ENABLED 1
#define WMI_RTSCTS_SET_MASK 0x0f
#define WMI_RTSCTS_SET_LSB 0
#define WMI_RTSCTS_PROFILE_MASK 0xf0
#define WMI_RTSCTS_PROFILE_LSB 4
enum wmi_beacon_gen_mode {
WMI_BEACON_STAGGERED_MODE = 0,
WMI_BEACON_BURST_MODE = 1
};
enum wmi_csa_event_ies_present_flag {
WMI_CSA_IE_PRESENT = 0x00000001,
WMI_XCSA_IE_PRESENT = 0x00000002,
WMI_WBW_IE_PRESENT = 0x00000004,
WMI_CSWARP_IE_PRESENT = 0x00000008,
};
/* wmi CSA receive event from beacon frame */
struct wmi_csa_event {
__le32 i_fc_dur;
/* Bit 0-15: FC */
/* Bit 16-31: DUR */
struct wmi_mac_addr i_addr1;
struct wmi_mac_addr i_addr2;
__le32 csa_ie[2];
__le32 xcsa_ie[2];
__le32 wb_ie[2];
__le32 cswarp_ie;
__le32 ies_present_flag; /* wmi_csa_event_ies_present_flag */
} __packed;
/* the definition of different PDEV parameters */
#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
struct wmi_pdev_param_map {
u32 tx_chain_mask;
u32 rx_chain_mask;
u32 txpower_limit2g;
u32 txpower_limit5g;
u32 txpower_scale;
u32 beacon_gen_mode;
u32 beacon_tx_mode;
u32 resmgr_offchan_mode;
u32 protection_mode;
u32 dynamic_bw;
u32 non_agg_sw_retry_th;
u32 agg_sw_retry_th;
u32 sta_kickout_th;
u32 ac_aggrsize_scaling;
u32 ltr_enable;
u32 ltr_ac_latency_be;
u32 ltr_ac_latency_bk;
u32 ltr_ac_latency_vi;
u32 ltr_ac_latency_vo;
u32 ltr_ac_latency_timeout;
u32 ltr_sleep_override;
u32 ltr_rx_override;
u32 ltr_tx_activity_timeout;
u32 l1ss_enable;
u32 dsleep_enable;
u32 pcielp_txbuf_flush;
u32 pcielp_txbuf_watermark;
u32 pcielp_txbuf_tmo_en;
u32 pcielp_txbuf_tmo_value;
u32 pdev_stats_update_period;
u32 vdev_stats_update_period;
u32 peer_stats_update_period;
u32 bcnflt_stats_update_period;
u32 pmf_qos;
u32 arp_ac_override;
u32 dcs;
u32 ani_enable;
u32 ani_poll_period;
u32 ani_listen_period;
u32 ani_ofdm_level;
u32 ani_cck_level;
u32 dyntxchain;
u32 proxy_sta;
u32 idle_ps_config;
u32 power_gating_sleep;
u32 fast_channel_reset;
u32 burst_dur;
u32 burst_enable;
u32 cal_period;
u32 aggr_burst;
u32 rx_decap_mode;
u32 smart_antenna_default_antenna;
u32 igmpmld_override;
u32 igmpmld_tid;
u32 antenna_gain;
u32 rx_filter;
u32 set_mcast_to_ucast_tid;
u32 proxy_sta_mode;
u32 set_mcast2ucast_mode;
u32 set_mcast2ucast_buffer;
u32 remove_mcast2ucast_buffer;
u32 peer_sta_ps_statechg_enable;
u32 igmpmld_ac_override;
u32 block_interbss;
u32 set_disable_reset_cmdid;
u32 set_msdu_ttl_cmdid;
u32 set_ppdu_duration_cmdid;
u32 txbf_sound_period_cmdid;
u32 set_promisc_mode_cmdid;
u32 set_burst_mode_cmdid;
u32 en_stats;
u32 mu_group_policy;
u32 noise_detection;
u32 noise_threshold;
u32 dpd_enable;
u32 set_mcast_bcast_echo;
u32 atf_strict_sch;
u32 atf_sched_duration;
u32 ant_plzn;
u32 mgmt_retry_limit;
u32 sensitivity_level;
u32 signed_txpower_2g;
u32 signed_txpower_5g;
u32 enable_per_tid_amsdu;
u32 enable_per_tid_ampdu;
u32 cca_threshold;
u32 rts_fixed_rate;
u32 pdev_reset;
u32 wapi_mbssid_offset;
u32 arp_srcaddr;
u32 arp_dstaddr;
u32 enable_btcoex;
};
#define WMI_PDEV_PARAM_UNSUPPORTED 0
enum wmi_pdev_param {
/* TX chain mask */
WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
/* RX chain mask */
WMI_PDEV_PARAM_RX_CHAIN_MASK,
/* TX power limit for 2G Radio */
WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
/* TX power limit for 5G Radio */
WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
/* TX power scale */
WMI_PDEV_PARAM_TXPOWER_SCALE,
/* Beacon generation mode . 0: host, 1: target */
WMI_PDEV_PARAM_BEACON_GEN_MODE,
/* Beacon generation mode . 0: staggered 1: bursted */
WMI_PDEV_PARAM_BEACON_TX_MODE,
/*
* Resource manager off chan mode .
* 0: turn off off chan mode. 1: turn on offchan mode
*/
WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
/*
* Protection mode:
* 0: no protection 1:use CTS-to-self 2: use RTS/CTS
*/
WMI_PDEV_PARAM_PROTECTION_MODE,
/*
* Dynamic bandwidth - 0: disable, 1: enable
*
* When enabled HW rate control tries different bandwidths when
* retransmitting frames.
*/
WMI_PDEV_PARAM_DYNAMIC_BW,
/* Non aggregrate/ 11g sw retry threshold.0-disable */
WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
/* aggregrate sw retry threshold. 0-disable*/
WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
/* Station kickout threshold (non of consecutive failures).0-disable */
WMI_PDEV_PARAM_STA_KICKOUT_TH,
/* Aggerate size scaling configuration per AC */
WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
/* LTR enable */
WMI_PDEV_PARAM_LTR_ENABLE,
/* LTR latency for BE, in us */
WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
/* LTR latency for BK, in us */
WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
/* LTR latency for VI, in us */
WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
/* LTR latency for VO, in us */
WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
/* LTR AC latency timeout, in ms */
WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
/* LTR platform latency override, in us */
WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
/* LTR-RX override, in us */
WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
/* Tx activity timeout for LTR, in us */
WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
/* L1SS state machine enable */
WMI_PDEV_PARAM_L1SS_ENABLE,
/* Deep sleep state machine enable */
WMI_PDEV_PARAM_DSLEEP_ENABLE,
/* RX buffering flush enable */
WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
/* RX buffering matermark */
WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
/* RX buffering timeout enable */
WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
/* RX buffering timeout value */
WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
/* pdev level stats update period in ms */
WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
/* vdev level stats update period in ms */
WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
/* peer level stats update period in ms */
WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
/* beacon filter status update period */
WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
WMI_PDEV_PARAM_PMF_QOS,
/* Access category on which ARP frames are sent */
WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
/* DCS configuration */
WMI_PDEV_PARAM_DCS,
/* Enable/Disable ANI on target */
WMI_PDEV_PARAM_ANI_ENABLE,
/* configure the ANI polling period */
WMI_PDEV_PARAM_ANI_POLL_PERIOD,
/* configure the ANI listening period */
WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
/* configure OFDM immunity level */
WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
/* configure CCK immunity level */
WMI_PDEV_PARAM_ANI_CCK_LEVEL,
/* Enable/Disable CDD for 1x1 STAs in rate control module */
WMI_PDEV_PARAM_DYNTXCHAIN,
/* Enable/Disable proxy STA */
WMI_PDEV_PARAM_PROXY_STA,
/* Enable/Disable low power state when all VDEVs are inactive/idle. */
WMI_PDEV_PARAM_IDLE_PS_CONFIG,
/* Enable/Disable power gating sleep */
WMI_PDEV_PARAM_POWER_GATING_SLEEP,
};
enum wmi_10x_pdev_param {
/* TX chian mask */
WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
/* RX chian mask */
WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
/* TX power limit for 2G Radio */
WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
/* TX power limit for 5G Radio */
WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
/* TX power scale */
WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
/* Beacon generation mode . 0: host, 1: target */
WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
/* Beacon generation mode . 0: staggered 1: bursted */
WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
/*
* Resource manager off chan mode .
* 0: turn off off chan mode. 1: turn on offchan mode
*/
WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
/*
* Protection mode:
* 0: no protection 1:use CTS-to-self 2: use RTS/CTS
*/
WMI_10X_PDEV_PARAM_PROTECTION_MODE,
/* Dynamic bandwidth 0: disable 1: enable */
WMI_10X_PDEV_PARAM_DYNAMIC_BW,
/* Non aggregrate/ 11g sw retry threshold.0-disable */
WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
/* aggregrate sw retry threshold. 0-disable*/
WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
/* Station kickout threshold (non of consecutive failures).0-disable */
WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
/* Aggerate size scaling configuration per AC */
WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
/* LTR enable */
WMI_10X_PDEV_PARAM_LTR_ENABLE,
/* LTR latency for BE, in us */
WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
/* LTR latency for BK, in us */
WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
/* LTR latency for VI, in us */
WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
/* LTR latency for VO, in us */
WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
/* LTR AC latency timeout, in ms */
WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
/* LTR platform latency override, in us */
WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
/* LTR-RX override, in us */
WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
/* Tx activity timeout for LTR, in us */
WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
/* L1SS state machine enable */
WMI_10X_PDEV_PARAM_L1SS_ENABLE,
/* Deep sleep state machine enable */
WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
/* pdev level stats update period in ms */
WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
/* vdev level stats update period in ms */
WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
/* peer level stats update period in ms */
WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
/* beacon filter status update period */
WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
/* QOS Mgmt frame protection MFP/PMF 0: disable, 1: enable */
WMI_10X_PDEV_PARAM_PMF_QOS,
/* Access category on which ARP and DHCP frames are sent */
WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
/* DCS configuration */
WMI_10X_PDEV_PARAM_DCS,
/* Enable/Disable ANI on target */
WMI_10X_PDEV_PARAM_ANI_ENABLE,
/* configure the ANI polling period */
WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
/* configure the ANI listening period */
WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
/* configure OFDM immunity level */
WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
/* configure CCK immunity level */
WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
/* Enable/Disable CDD for 1x1 STAs in rate control module */
WMI_10X_PDEV_PARAM_DYNTXCHAIN,
/* Enable/Disable Fast channel reset*/
WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
/* Set Bursting DUR */
WMI_10X_PDEV_PARAM_BURST_DUR,
/* Set Bursting Enable*/
WMI_10X_PDEV_PARAM_BURST_ENABLE,
/* following are available as of firmware 10.2 */
WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
WMI_10X_PDEV_PARAM_IGMPMLD_TID,
WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
WMI_10X_PDEV_PARAM_RX_FILTER,
WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
WMI_10X_PDEV_PARAM_CAL_PERIOD
};
enum wmi_10_4_pdev_param {
WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
WMI_10_4_PDEV_PARAM_LTR_ENABLE,
WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
WMI_10_4_PDEV_PARAM_PMF_QOS,
WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
WMI_10_4_PDEV_PARAM_DCS,
WMI_10_4_PDEV_PARAM_ANI_ENABLE,
WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
WMI_10_4_PDEV_PARAM_PROXY_STA,
WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
WMI_10_4_PDEV_PARAM_AGGR_BURST,
WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
WMI_10_4_PDEV_PARAM_BURST_DUR,
WMI_10_4_PDEV_PARAM_BURST_ENABLE,
WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
WMI_10_4_PDEV_PARAM_RX_FILTER,
WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
WMI_10_4_PDEV_PARAM_EN_STATS,
WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
WMI_10_4_PDEV_PARAM_DPD_ENABLE,
WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
WMI_10_4_PDEV_PARAM_ANT_PLZN,
WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
WMI_10_4_PDEV_PARAM_CAL_PERIOD,
WMI_10_4_PDEV_PARAM_PDEV_RESET,
WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
WMI_10_4_PDEV_PARAM_TXPOWER_DECR_DB,
WMI_10_4_PDEV_PARAM_RX_BATCHMODE,
WMI_10_4_PDEV_PARAM_PACKET_AGGR_DELAY,
WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCH,
WMI_10_4_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR,
WMI_10_4_PDEV_PARAM_CUST_TXPOWER_SCALE,
WMI_10_4_PDEV_PARAM_ATF_DYNAMIC_ENABLE,
WMI_10_4_PDEV_PARAM_ATF_SSID_GROUP_POLICY,
WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
};
struct wmi_pdev_set_param_cmd {
__le32 param_id;
__le32 param_value;
} __packed;
/* valid period is 1 ~ 60000ms, unit in millisecond */
#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
struct wmi_pdev_get_tpc_config_cmd {
/* parameter */
__le32 param;
} __packed;
#define WMI_TPC_CONFIG_PARAM 1
#define WMI_TPC_RATE_MAX 160
#define WMI_TPC_TX_N_CHAIN 4
#define WMI_TPC_PREAM_TABLE_MAX 10
#define WMI_TPC_FLAG 3
#define WMI_TPC_BUF_SIZE 10
enum wmi_tpc_table_type {
WMI_TPC_TABLE_TYPE_CDD = 0,
WMI_TPC_TABLE_TYPE_STBC = 1,
WMI_TPC_TABLE_TYPE_TXBF = 2,
};
enum wmi_tpc_config_event_flag {
WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
};
struct wmi_pdev_tpc_config_event {
__le32 reg_domain;
__le32 chan_freq;
__le32 phy_mode;
__le32 twice_antenna_reduction;
__le32 twice_max_rd_power;
a_sle32 twice_antenna_gain;
__le32 power_limit;
__le32 rate_max;
__le32 num_tx_chain;
__le32 ctl;
__le32 flags;
s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
u8 rates_array[WMI_TPC_RATE_MAX];
} __packed;
/* Transmit power scale factor. */
enum wmi_tp_scale {
WMI_TP_SCALE_MAX = 0, /* no scaling (default) */
WMI_TP_SCALE_50 = 1, /* 50% of max (-3 dBm) */
WMI_TP_SCALE_25 = 2, /* 25% of max (-6 dBm) */
WMI_TP_SCALE_12 = 3, /* 12% of max (-9 dBm) */
WMI_TP_SCALE_MIN = 4, /* min, but still on */
WMI_TP_SCALE_SIZE = 5, /* max num of enum */
};
struct wmi_pdev_chanlist_update_event {
/* number of channels */
__le32 num_chan;
/* array of channels */
struct wmi_channel channel_list[1];
} __packed;
#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
struct wmi_debug_mesg_event {
/* message buffer, NULL terminated */
char bufp[WMI_MAX_DEBUG_MESG];
} __packed;
enum {
/* P2P device */
VDEV_SUBTYPE_P2PDEV = 0,
/* P2P client */
VDEV_SUBTYPE_P2PCLI,
/* P2P GO */
VDEV_SUBTYPE_P2PGO,
/* BT3.0 HS */
VDEV_SUBTYPE_BT,
};
struct wmi_pdev_set_channel_cmd {
/* idnore power , only use flags , mode and freq */
struct wmi_channel chan;
} __packed;
struct wmi_pdev_pktlog_enable_cmd {
__le32 ev_bitmap;
} __packed;
/* Customize the DSCP (bit) to TID (0-7) mapping for QOS */
#define WMI_DSCP_MAP_MAX (64)
struct wmi_pdev_set_dscp_tid_map_cmd {
/* map indicating DSCP to TID conversion */
__le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
} __packed;
enum mcast_bcast_rate_id {
WMI_SET_MCAST_RATE,
WMI_SET_BCAST_RATE
};
struct mcast_bcast_rate {
enum mcast_bcast_rate_id rate_id;
__le32 rate;
} __packed;
struct wmi_wmm_params {
__le32 cwmin;
__le32 cwmax;
__le32 aifs;
__le32 txop;
__le32 acm;
__le32 no_ack;
} __packed;
struct wmi_pdev_set_wmm_params {
struct wmi_wmm_params ac_be;
struct wmi_wmm_params ac_bk;
struct wmi_wmm_params ac_vi;
struct wmi_wmm_params ac_vo;
} __packed;
struct wmi_wmm_params_arg {
u32 cwmin;
u32 cwmax;
u32 aifs;
u32 txop;
u32 acm;
u32 no_ack;
};
struct wmi_wmm_params_all_arg {
struct wmi_wmm_params_arg ac_be;
struct wmi_wmm_params_arg ac_bk;
struct wmi_wmm_params_arg ac_vi;
struct wmi_wmm_params_arg ac_vo;
};
struct wmi_pdev_stats_tx {
/* Num HTT cookies queued to dispatch list */
__le32 comp_queued;
/* Num HTT cookies dispatched */
__le32 comp_delivered;
/* Num MSDU queued to WAL */
__le32 msdu_enqued;
/* Num MPDU queue to WAL */
__le32 mpdu_enqued;
/* Num MSDUs dropped by WMM limit */
__le32 wmm_drop;
/* Num Local frames queued */
__le32 local_enqued;
/* Num Local frames done */
__le32 local_freed;
/* Num queued to HW */
__le32 hw_queued;
/* Num PPDU reaped from HW */
__le32 hw_reaped;
/* Num underruns */
__le32 underrun;
/* Num PPDUs cleaned up in TX abort */
__le32 tx_abort;
/* Num MPDUs requed by SW */
__le32 mpdus_requed;
/* excessive retries */
__le32 tx_ko;
/* data hw rate code */
__le32 data_rc;
/* Scheduler self triggers */
__le32 self_triggers;
/* frames dropped due to excessive sw retries */
__le32 sw_retry_failure;
/* illegal rate phy errors */
__le32 illgl_rate_phy_err;
/* wal pdev continous xretry */
__le32 pdev_cont_xretry;
/* wal pdev continous xretry */
__le32 pdev_tx_timeout;
/* wal pdev resets */
__le32 pdev_resets;
/* frames dropped due to non-availability of stateless TIDs */
__le32 stateless_tid_alloc_failure;
__le32 phy_underrun;
/* MPDU is more than txop limit */
__le32 txop_ovf;
} __packed;
struct wmi_10_4_pdev_stats_tx {
/* Num HTT cookies queued to dispatch list */
__le32 comp_queued;
/* Num HTT cookies dispatched */
__le32 comp_delivered;
/* Num MSDU queued to WAL */
__le32 msdu_enqued;
/* Num MPDU queue to WAL */
__le32 mpdu_enqued;
/* Num MSDUs dropped by WMM limit */
__le32 wmm_drop;
/* Num Local frames queued */
__le32 local_enqued;
/* Num Local frames done */
__le32 local_freed;
/* Num queued to HW */
__le32 hw_queued;
/* Num PPDU reaped from HW */
__le32 hw_reaped;
/* Num underruns */
__le32 underrun;
/* HW Paused. */
__le32 hw_paused;
/* Num PPDUs cleaned up in TX abort */
__le32 tx_abort;
/* Num MPDUs requed by SW */
__le32 mpdus_requed;
/* excessive retries */
__le32 tx_ko;
/* data hw rate code */
__le32 data_rc;
/* Scheduler self triggers */
__le32 self_triggers;
/* frames dropped due to excessive sw retries */
__le32 sw_retry_failure;
/* illegal rate phy errors */
__le32 illgl_rate_phy_err;
/* wal pdev continuous xretry */
__le32 pdev_cont_xretry;
/* wal pdev tx timeouts */
__le32 pdev_tx_timeout;
/* wal pdev resets */
__le32 pdev_resets;
/* frames dropped due to non-availability of stateless TIDs */
__le32 stateless_tid_alloc_failure;
__le32 phy_underrun;
/* MPDU is more than txop limit */
__le32 txop_ovf;
/* Number of Sequences posted */
__le32 seq_posted;
/* Number of Sequences failed queueing */
__le32 seq_failed_queueing;
/* Number of Sequences completed */
__le32 seq_completed;
/* Number of Sequences restarted */
__le32 seq_restarted;
/* Number of MU Sequences posted */
__le32 mu_seq_posted;
/* Num MPDUs flushed by SW, HWPAUSED,SW TXABORT(Reset,channel change) */
__le32 mpdus_sw_flush;
/* Num MPDUs filtered by HW, all filter condition (TTL expired) */
__le32 mpdus_hw_filter;
/* Num MPDUs truncated by PDG
* (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
*/
__le32 mpdus_truncated;
/* Num MPDUs that was tried but didn't receive ACK or BA */
__le32 mpdus_ack_failed;
/* Num MPDUs that was dropped due to expiry. */
__le32 mpdus_expired;
} __packed;
struct wmi_pdev_stats_rx {
/* Cnts any change in ring routing mid-ppdu */
__le32 mid_ppdu_route_change;
/* Total number of statuses processed */
__le32 status_rcvd;
/* Extra frags on rings 0-3 */
__le32 r0_frags;
__le32 r1_frags;
__le32 r2_frags;
__le32 r3_frags;
/* MSDUs / MPDUs delivered to HTT */
__le32 htt_msdus;
__le32 htt_mpdus;
/* MSDUs / MPDUs delivered to local stack */
__le32 loc_msdus;
__le32 loc_mpdus;
/* AMSDUs that have more MSDUs than the status ring size */
__le32 oversize_amsdu;
/* Number of PHY errors */
__le32 phy_errs;
/* Number of PHY errors drops */
__le32 phy_err_drop;
/* Number of mpdu errors - FCS, MIC, ENC etc. */
__le32 mpdu_errs;
} __packed;
struct wmi_pdev_stats_peer {
/* REMOVE THIS ONCE REAL PEER STAT COUNTERS ARE ADDED */
__le32 dummy;
} __packed;
enum wmi_stats_id {
WMI_STAT_PEER = BIT(0),
WMI_STAT_AP = BIT(1),
WMI_STAT_PDEV = BIT(2),
WMI_STAT_VDEV = BIT(3),
WMI_STAT_BCNFLT = BIT(4),
WMI_STAT_VDEV_RATE = BIT(5),
};
enum wmi_10_4_stats_id {
WMI_10_4_STAT_PEER = BIT(0),
WMI_10_4_STAT_AP = BIT(1),
WMI_10_4_STAT_INST = BIT(2),
WMI_10_4_STAT_PEER_EXTD = BIT(3),
};
struct wlan_inst_rssi_args {
__le16 cfg_retry_count;
__le16 retry_count;
};
struct wmi_request_stats_cmd {
__le32 stats_id;
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* Instantaneous RSSI arguments */
struct wlan_inst_rssi_args inst_rssi_args;
} __packed;
/* Suspend option */
enum {
/* suspend */
WMI_PDEV_SUSPEND,
/* suspend and disable all interrupts */
WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
};
struct wmi_pdev_suspend_cmd {
/* suspend option sent to target */
__le32 suspend_opt;
} __packed;
struct wmi_stats_event {
__le32 stats_id; /* WMI_STAT_ */
/*
* number of pdev stats event structures
* (wmi_pdev_stats) 0 or 1
*/
__le32 num_pdev_stats;
/*
* number of vdev stats event structures
* (wmi_vdev_stats) 0 or max vdevs
*/
__le32 num_vdev_stats;
/*
* number of peer stats event structures
* (wmi_peer_stats) 0 or max peers
*/
__le32 num_peer_stats;
__le32 num_bcnflt_stats;
/*
* followed by
* num_pdev_stats * size of(struct wmi_pdev_stats)
* num_vdev_stats * size of(struct wmi_vdev_stats)
* num_peer_stats * size of(struct wmi_peer_stats)
*
* By having a zero sized array, the pointer to data area
* becomes available without increasing the struct size
*/
u8 data[0];
} __packed;
struct wmi_10_2_stats_event {
__le32 stats_id; /* %WMI_REQUEST_ */
__le32 num_pdev_stats;
__le32 num_pdev_ext_stats;
__le32 num_vdev_stats;
__le32 num_peer_stats;
__le32 num_bcnflt_stats;
u8 data[0];
} __packed;
/*
* PDEV statistics
* TODO: add all PDEV stats here
*/
struct wmi_pdev_stats_base {
__le32 chan_nf;
__le32 tx_frame_count;
__le32 rx_frame_count;
__le32 rx_clear_count;
__le32 cycle_count;
__le32 phy_err_count;
__le32 chan_tx_pwr;
} __packed;
struct wmi_pdev_stats {
struct wmi_pdev_stats_base base;
struct wmi_pdev_stats_tx tx;
struct wmi_pdev_stats_rx rx;
struct wmi_pdev_stats_peer peer;
} __packed;
struct wmi_pdev_stats_extra {
__le32 ack_rx_bad;
__le32 rts_bad;
__le32 rts_good;
__le32 fcs_bad;
__le32 no_beacons;
__le32 mib_int_count;
} __packed;
struct wmi_10x_pdev_stats {
struct wmi_pdev_stats_base base;
struct wmi_pdev_stats_tx tx;
struct wmi_pdev_stats_rx rx;
struct wmi_pdev_stats_peer peer;
struct wmi_pdev_stats_extra extra;
} __packed;
struct wmi_pdev_stats_mem {
__le32 dram_free;
__le32 iram_free;
} __packed;
struct wmi_10_2_pdev_stats {
struct wmi_pdev_stats_base base;
struct wmi_pdev_stats_tx tx;
__le32 mc_drop;
struct wmi_pdev_stats_rx rx;
__le32 pdev_rx_timeout;
struct wmi_pdev_stats_mem mem;
struct wmi_pdev_stats_peer peer;
struct wmi_pdev_stats_extra extra;
} __packed;
struct wmi_10_4_pdev_stats {
struct wmi_pdev_stats_base base;
struct wmi_10_4_pdev_stats_tx tx;
struct wmi_pdev_stats_rx rx;
__le32 rx_ovfl_errs;
struct wmi_pdev_stats_mem mem;
__le32 sram_free_size;
struct wmi_pdev_stats_extra extra;
} __packed;
/*
* VDEV statistics
* TODO: add all VDEV stats here
*/
struct wmi_vdev_stats {
__le32 vdev_id;
} __packed;
/*
* peer statistics.
* TODO: add more stats
*/
struct wmi_peer_stats {
struct wmi_mac_addr peer_macaddr;
__le32 peer_rssi;
__le32 peer_tx_rate;
} __packed;
struct wmi_10x_peer_stats {
struct wmi_peer_stats old;
__le32 peer_rx_rate;
} __packed;
struct wmi_10_2_peer_stats {
struct wmi_peer_stats old;
__le32 peer_rx_rate;
__le32 current_per;
__le32 retries;
__le32 tx_rate_count;
__le32 max_4ms_frame_len;
__le32 total_sub_frames;
__le32 tx_bytes;
__le32 num_pkt_loss_overflow[4];
__le32 num_pkt_loss_excess_retry[4];
} __packed;
struct wmi_10_2_4_peer_stats {
struct wmi_10_2_peer_stats common;
__le32 peer_rssi_changed;
} __packed;
struct wmi_10_2_4_ext_peer_stats {
struct wmi_10_2_peer_stats common;
__le32 peer_rssi_changed;
__le32 rx_duration;
} __packed;
struct wmi_10_4_peer_stats {
struct wmi_mac_addr peer_macaddr;
__le32 peer_rssi;
__le32 peer_rssi_seq_num;
__le32 peer_tx_rate;
__le32 peer_rx_rate;
__le32 current_per;
__le32 retries;
__le32 tx_rate_count;
__le32 max_4ms_frame_len;
__le32 total_sub_frames;
__le32 tx_bytes;
__le32 num_pkt_loss_overflow[4];
__le32 num_pkt_loss_excess_retry[4];
__le32 peer_rssi_changed;
} __packed;
struct wmi_10_4_peer_extd_stats {
struct wmi_mac_addr peer_macaddr;
__le32 inactive_time;
__le32 peer_chain_rssi;
__le32 rx_duration;
__le32 reserved[10];
} __packed;
struct wmi_10_4_bss_bcn_stats {
__le32 vdev_id;
__le32 bss_bcns_dropped;
__le32 bss_bcn_delivered;
} __packed;
struct wmi_10_4_bss_bcn_filter_stats {
__le32 bcns_dropped;
__le32 bcns_delivered;
__le32 active_filters;
struct wmi_10_4_bss_bcn_stats bss_stats;
} __packed;
struct wmi_10_2_pdev_ext_stats {
__le32 rx_rssi_comb;
__le32 rx_rssi[4];
__le32 rx_mcs[10];
__le32 tx_mcs[10];
__le32 ack_rssi;
} __packed;
struct wmi_vdev_create_cmd {
__le32 vdev_id;
__le32 vdev_type;
__le32 vdev_subtype;
struct wmi_mac_addr vdev_macaddr;
} __packed;
enum wmi_vdev_type {
WMI_VDEV_TYPE_AP = 1,
WMI_VDEV_TYPE_STA = 2,
WMI_VDEV_TYPE_IBSS = 3,
WMI_VDEV_TYPE_MONITOR = 4,
};
enum wmi_vdev_subtype {
WMI_VDEV_SUBTYPE_NONE,
WMI_VDEV_SUBTYPE_P2P_DEVICE,
WMI_VDEV_SUBTYPE_P2P_CLIENT,
WMI_VDEV_SUBTYPE_P2P_GO,
WMI_VDEV_SUBTYPE_PROXY_STA,
WMI_VDEV_SUBTYPE_MESH_11S,
WMI_VDEV_SUBTYPE_MESH_NON_11S,
};
enum wmi_vdev_subtype_legacy {
WMI_VDEV_SUBTYPE_LEGACY_NONE = 0,
WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV = 1,
WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI = 2,
WMI_VDEV_SUBTYPE_LEGACY_P2P_GO = 3,
WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA = 4,
};
enum wmi_vdev_subtype_10_2_4 {
WMI_VDEV_SUBTYPE_10_2_4_NONE = 0,
WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV = 1,
WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI = 2,
WMI_VDEV_SUBTYPE_10_2_4_P2P_GO = 3,
WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA = 4,
WMI_VDEV_SUBTYPE_10_2_4_MESH_11S = 5,
};
enum wmi_vdev_subtype_10_4 {
WMI_VDEV_SUBTYPE_10_4_NONE = 0,
WMI_VDEV_SUBTYPE_10_4_P2P_DEV = 1,
WMI_VDEV_SUBTYPE_10_4_P2P_CLI = 2,
WMI_VDEV_SUBTYPE_10_4_P2P_GO = 3,
WMI_VDEV_SUBTYPE_10_4_PROXY_STA = 4,
WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S = 5,
WMI_VDEV_SUBTYPE_10_4_MESH_11S = 6,
};
/* values for vdev_subtype */
/* values for vdev_start_request flags */
/*
* Indicates that AP VDEV uses hidden ssid. only valid for
* AP/GO */
#define WMI_VDEV_START_HIDDEN_SSID (1 << 0)
/*
* Indicates if robust management frame/management frame
* protection is enabled. For GO/AP vdevs, it indicates that
* it may support station/client associations with RMF enabled.
* For STA/client vdevs, it indicates that sta will
* associate with AP with RMF enabled. */
#define WMI_VDEV_START_PMF_ENABLED (1 << 1)
struct wmi_p2p_noa_descriptor {
__le32 type_count; /* 255: continuous schedule, 0: reserved */
__le32 duration; /* Absent period duration in micro seconds */
__le32 interval; /* Absent period interval in micro seconds */
__le32 start_time; /* 32 bit tsf time when in starts */
} __packed;
struct wmi_vdev_start_request_cmd {
/* WMI channel */
struct wmi_channel chan;
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* requestor id identifying the caller module */
__le32 requestor_id;
/* beacon interval from received beacon */
__le32 beacon_interval;
/* DTIM Period from the received beacon */
__le32 dtim_period;
/* Flags */
__le32 flags;
/* ssid field. Only valid for AP/GO/IBSS/BTAmp VDEV type. */
struct wmi_ssid ssid;
/* beacon/probe reponse xmit rate. Applicable for SoftAP. */
__le32 bcn_tx_rate;
/* beacon/probe reponse xmit power. Applicable for SoftAP. */
__le32 bcn_tx_power;
/* number of p2p NOA descriptor(s) from scan entry */
__le32 num_noa_descriptors;
/*
* Disable H/W ack. This used by WMI_VDEV_RESTART_REQUEST_CMDID.
* During CAC, Our HW shouldn't ack ditected frames
*/
__le32 disable_hw_ack;
/* actual p2p NOA descriptor from scan entry */
struct wmi_p2p_noa_descriptor noa_descriptors[2];
} __packed;
struct wmi_vdev_restart_request_cmd {
struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
} __packed;
struct wmi_vdev_start_request_arg {
u32 vdev_id;
struct wmi_channel_arg channel;
u32 bcn_intval;
u32 dtim_period;
u8 *ssid;
u32 ssid_len;
u32 bcn_tx_rate;
u32 bcn_tx_power;
bool disable_hw_ack;
bool hidden_ssid;
bool pmf_enabled;
};
struct wmi_vdev_delete_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
struct wmi_vdev_up_cmd {
__le32 vdev_id;
__le32 vdev_assoc_id;
struct wmi_mac_addr vdev_bssid;
} __packed;
struct wmi_vdev_stop_cmd {
__le32 vdev_id;
} __packed;
struct wmi_vdev_down_cmd {
__le32 vdev_id;
} __packed;
struct wmi_vdev_standby_response_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
struct wmi_vdev_resume_response_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
struct wmi_vdev_set_param_cmd {
__le32 vdev_id;
__le32 param_id;
__le32 param_value;
} __packed;
#define WMI_MAX_KEY_INDEX 3
#define WMI_MAX_KEY_LEN 32
#define WMI_KEY_PAIRWISE 0x00
#define WMI_KEY_GROUP 0x01
#define WMI_KEY_TX_USAGE 0x02 /* default tx key - static wep */
struct wmi_key_seq_counter {
__le32 key_seq_counter_l;
__le32 key_seq_counter_h;
} __packed;
#define WMI_CIPHER_NONE 0x0 /* clear key */
#define WMI_CIPHER_WEP 0x1
#define WMI_CIPHER_TKIP 0x2
#define WMI_CIPHER_AES_OCB 0x3
#define WMI_CIPHER_AES_CCM 0x4
#define WMI_CIPHER_WAPI 0x5
#define WMI_CIPHER_CKIP 0x6
#define WMI_CIPHER_AES_CMAC 0x7
struct wmi_vdev_install_key_cmd {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
__le32 key_idx;
__le32 key_flags;
__le32 key_cipher; /* %WMI_CIPHER_ */
struct wmi_key_seq_counter key_rsc_counter;
struct wmi_key_seq_counter key_global_rsc_counter;
struct wmi_key_seq_counter key_tsc_counter;
u8 wpi_key_rsc_counter[16];
u8 wpi_key_tsc_counter[16];
__le32 key_len;
__le32 key_txmic_len;
__le32 key_rxmic_len;
/* contains key followed by tx mic followed by rx mic */
u8 key_data[0];
} __packed;
struct wmi_vdev_install_key_arg {
u32 vdev_id;
const u8 *macaddr;
u32 key_idx;
u32 key_flags;
u32 key_cipher;
u32 key_len;
u32 key_txmic_len;
u32 key_rxmic_len;
const void *key_data;
};
/*
* vdev fixed rate format:
* - preamble - b7:b6 - see WMI_RATE_PREMABLE_
* - nss - b5:b4 - ss number (0 mean 1ss)
* - rate_mcs - b3:b0 - as below
* CCK: 0 - 11Mbps, 1 - 5,5Mbps, 2 - 2Mbps, 3 - 1Mbps,
* 4 - 11Mbps (s), 5 - 5,5Mbps (s), 6 - 2Mbps (s)
* OFDM: 0 - 48Mbps, 1 - 24Mbps, 2 - 12Mbps, 3 - 6Mbps,
* 4 - 54Mbps, 5 - 36Mbps, 6 - 18Mbps, 7 - 9Mbps
* HT/VHT: MCS index
*/
/* Preamble types to be used with VDEV fixed rate configuration */
enum wmi_rate_preamble {
WMI_RATE_PREAMBLE_OFDM,
WMI_RATE_PREAMBLE_CCK,
WMI_RATE_PREAMBLE_HT,
WMI_RATE_PREAMBLE_VHT,
};
#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
#define ATH10K_HW_RATECODE(rate, nss, preamble) \
(((preamble) << 6) | ((nss) << 4) | (rate))
/* Value to disable fixed rate setting */
#define WMI_FIXED_RATE_NONE (0xff)
struct wmi_vdev_param_map {
u32 rts_threshold;
u32 fragmentation_threshold;
u32 beacon_interval;
u32 listen_interval;
u32 multicast_rate;
u32 mgmt_tx_rate;
u32 slot_time;
u32 preamble;
u32 swba_time;
u32 wmi_vdev_stats_update_period;
u32 wmi_vdev_pwrsave_ageout_time;
u32 wmi_vdev_host_swba_interval;
u32 dtim_period;
u32 wmi_vdev_oc_scheduler_air_time_limit;
u32 wds;
u32 atim_window;
u32 bmiss_count_max;
u32 bmiss_first_bcnt;
u32 bmiss_final_bcnt;
u32 feature_wmm;
u32 chwidth;
u32 chextoffset;
u32 disable_htprotection;
u32 sta_quickkickout;
u32 mgmt_rate;
u32 protection_mode;
u32 fixed_rate;
u32 sgi;
u32 ldpc;
u32 tx_stbc;
u32 rx_stbc;
u32 intra_bss_fwd;
u32 def_keyid;
u32 nss;
u32 bcast_data_rate;
u32 mcast_data_rate;
u32 mcast_indicate;
u32 dhcp_indicate;
u32 unknown_dest_indicate;
u32 ap_keepalive_min_idle_inactive_time_secs;
u32 ap_keepalive_max_idle_inactive_time_secs;
u32 ap_keepalive_max_unresponsive_time_secs;
u32 ap_enable_nawds;
u32 mcast2ucast_set;
u32 enable_rtscts;
u32 txbf;
u32 packet_powersave;
u32 drop_unencry;
u32 tx_encap_type;
u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
u32 rc_num_retries;
u32 cabq_maxdur;
u32 mfptest_set;
u32 rts_fixed_rate;
u32 vht_sgimask;
u32 vht80_ratemask;
u32 early_rx_adjust_enable;
u32 early_rx_tgt_bmiss_num;
u32 early_rx_bmiss_sample_cycle;
u32 early_rx_slop_step;
u32 early_rx_init_slop;
u32 early_rx_adjust_pause;
u32 proxy_sta;
u32 meru_vc;
u32 rx_decap_type;
u32 bw_nss_ratemask;
u32 set_tsf;
};
#define WMI_VDEV_PARAM_UNSUPPORTED 0
/* the definition of different VDEV parameters */
enum wmi_vdev_param {
/* RTS Threshold */
WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
/* Fragmentation threshold */
WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
/* beacon interval in TUs */
WMI_VDEV_PARAM_BEACON_INTERVAL,
/* Listen interval in TUs */
WMI_VDEV_PARAM_LISTEN_INTERVAL,
/* muticast rate in Mbps */
WMI_VDEV_PARAM_MULTICAST_RATE,
/* management frame rate in Mbps */
WMI_VDEV_PARAM_MGMT_TX_RATE,
/* slot time (long vs short) */
WMI_VDEV_PARAM_SLOT_TIME,
/* preamble (long vs short) */
WMI_VDEV_PARAM_PREAMBLE,
/* SWBA time (time before tbtt in msec) */
WMI_VDEV_PARAM_SWBA_TIME,
/* time period for updating VDEV stats */
WMI_VDEV_STATS_UPDATE_PERIOD,
/* age out time in msec for frames queued for station in power save */
WMI_VDEV_PWRSAVE_AGEOUT_TIME,
/*
* Host SWBA interval (time in msec before tbtt for SWBA event
* generation).
*/
WMI_VDEV_HOST_SWBA_INTERVAL,
/* DTIM period (specified in units of num beacon intervals) */
WMI_VDEV_PARAM_DTIM_PERIOD,
/*
* scheduler air time limit for this VDEV. used by off chan
* scheduler.
*/
WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
/* enable/dsiable WDS for this VDEV */
WMI_VDEV_PARAM_WDS,
/* ATIM Window */
WMI_VDEV_PARAM_ATIM_WINDOW,
/* BMISS max */
WMI_VDEV_PARAM_BMISS_COUNT_MAX,
/* BMISS first time */
WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
/* BMISS final time */
WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
/* WMM enables/disabled */
WMI_VDEV_PARAM_FEATURE_WMM,
/* Channel width */
WMI_VDEV_PARAM_CHWIDTH,
/* Channel Offset */
WMI_VDEV_PARAM_CHEXTOFFSET,
/* Disable HT Protection */
WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
/* Quick STA Kickout */
WMI_VDEV_PARAM_STA_QUICKKICKOUT,
/* Rate to be used with Management frames */
WMI_VDEV_PARAM_MGMT_RATE,
/* Protection Mode */
WMI_VDEV_PARAM_PROTECTION_MODE,
/* Fixed rate setting */
WMI_VDEV_PARAM_FIXED_RATE,
/* Short GI Enable/Disable */
WMI_VDEV_PARAM_SGI,
/* Enable LDPC */
WMI_VDEV_PARAM_LDPC,
/* Enable Tx STBC */
WMI_VDEV_PARAM_TX_STBC,
/* Enable Rx STBC */
WMI_VDEV_PARAM_RX_STBC,
/* Intra BSS forwarding */
WMI_VDEV_PARAM_INTRA_BSS_FWD,
/* Setting Default xmit key for Vdev */
WMI_VDEV_PARAM_DEF_KEYID,
/* NSS width */
WMI_VDEV_PARAM_NSS,
/* Set the custom rate for the broadcast data frames */
WMI_VDEV_PARAM_BCAST_DATA_RATE,
/* Set the custom rate (rate-code) for multicast data frames */
WMI_VDEV_PARAM_MCAST_DATA_RATE,
/* Tx multicast packet indicate Enable/Disable */
WMI_VDEV_PARAM_MCAST_INDICATE,
/* Tx DHCP packet indicate Enable/Disable */
WMI_VDEV_PARAM_DHCP_INDICATE,
/* Enable host inspection of Tx unicast packet to unknown destination */
WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
/* The minimum amount of time AP begins to consider STA inactive */
WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
/*
* An associated STA is considered inactive when there is no recent
* TX/RX activity and no downlink frames are buffered for it. Once a
* STA exceeds the maximum idle inactive time, the AP will send an
* 802.11 data-null as a keep alive to verify the STA is still
* associated. If the STA does ACK the data-null, or if the data-null
* is buffered and the STA does not retrieve it, the STA will be
* considered unresponsive
* (see WMI_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
*/
WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
/*
* An associated STA is considered unresponsive if there is no recent
* TX/RX activity and downlink frames are buffered for it. Once a STA
* exceeds the maximum unresponsive time, the AP will send a
* WMI_STA_KICKOUT event to the host so the STA can be deleted. */
WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
/* Enable/Disable RTS-CTS */
WMI_VDEV_PARAM_ENABLE_RTSCTS,
/* Enable TXBFee/er */
WMI_VDEV_PARAM_TXBF,
/* Set packet power save */
WMI_VDEV_PARAM_PACKET_POWERSAVE,
/*
* Drops un-encrypted packets if eceived in an encrypted connection
* otherwise forwards to host.
*/
WMI_VDEV_PARAM_DROP_UNENCRY,
/*
* Set the encapsulation type for frames.
*/
WMI_VDEV_PARAM_TX_ENCAP_TYPE,
};
/* the definition of different VDEV parameters */
enum wmi_10x_vdev_param {
/* RTS Threshold */
WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
/* Fragmentation threshold */
WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
/* beacon interval in TUs */
WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
/* Listen interval in TUs */
WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
/* muticast rate in Mbps */
WMI_10X_VDEV_PARAM_MULTICAST_RATE,
/* management frame rate in Mbps */
WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
/* slot time (long vs short) */
WMI_10X_VDEV_PARAM_SLOT_TIME,
/* preamble (long vs short) */
WMI_10X_VDEV_PARAM_PREAMBLE,
/* SWBA time (time before tbtt in msec) */
WMI_10X_VDEV_PARAM_SWBA_TIME,
/* time period for updating VDEV stats */
WMI_10X_VDEV_STATS_UPDATE_PERIOD,
/* age out time in msec for frames queued for station in power save */
WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
/*
* Host SWBA interval (time in msec before tbtt for SWBA event
* generation).
*/
WMI_10X_VDEV_HOST_SWBA_INTERVAL,
/* DTIM period (specified in units of num beacon intervals) */
WMI_10X_VDEV_PARAM_DTIM_PERIOD,
/*
* scheduler air time limit for this VDEV. used by off chan
* scheduler.
*/
WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
/* enable/dsiable WDS for this VDEV */
WMI_10X_VDEV_PARAM_WDS,
/* ATIM Window */
WMI_10X_VDEV_PARAM_ATIM_WINDOW,
/* BMISS max */
WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
/* WMM enables/disabled */
WMI_10X_VDEV_PARAM_FEATURE_WMM,
/* Channel width */
WMI_10X_VDEV_PARAM_CHWIDTH,
/* Channel Offset */
WMI_10X_VDEV_PARAM_CHEXTOFFSET,
/* Disable HT Protection */
WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
/* Quick STA Kickout */
WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
/* Rate to be used with Management frames */
WMI_10X_VDEV_PARAM_MGMT_RATE,
/* Protection Mode */
WMI_10X_VDEV_PARAM_PROTECTION_MODE,
/* Fixed rate setting */
WMI_10X_VDEV_PARAM_FIXED_RATE,
/* Short GI Enable/Disable */
WMI_10X_VDEV_PARAM_SGI,
/* Enable LDPC */
WMI_10X_VDEV_PARAM_LDPC,
/* Enable Tx STBC */
WMI_10X_VDEV_PARAM_TX_STBC,
/* Enable Rx STBC */
WMI_10X_VDEV_PARAM_RX_STBC,
/* Intra BSS forwarding */
WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
/* Setting Default xmit key for Vdev */
WMI_10X_VDEV_PARAM_DEF_KEYID,
/* NSS width */
WMI_10X_VDEV_PARAM_NSS,
/* Set the custom rate for the broadcast data frames */
WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
/* Set the custom rate (rate-code) for multicast data frames */
WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
/* Tx multicast packet indicate Enable/Disable */
WMI_10X_VDEV_PARAM_MCAST_INDICATE,
/* Tx DHCP packet indicate Enable/Disable */
WMI_10X_VDEV_PARAM_DHCP_INDICATE,
/* Enable host inspection of Tx unicast packet to unknown destination */
WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
/* The minimum amount of time AP begins to consider STA inactive */
WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
/*
* An associated STA is considered inactive when there is no recent
* TX/RX activity and no downlink frames are buffered for it. Once a
* STA exceeds the maximum idle inactive time, the AP will send an
* 802.11 data-null as a keep alive to verify the STA is still
* associated. If the STA does ACK the data-null, or if the data-null
* is buffered and the STA does not retrieve it, the STA will be
* considered unresponsive
* (see WMI_10X_VDEV_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS).
*/
WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
/*
* An associated STA is considered unresponsive if there is no recent
* TX/RX activity and downlink frames are buffered for it. Once a STA
* exceeds the maximum unresponsive time, the AP will send a
* WMI_10X_STA_KICKOUT event to the host so the STA can be deleted. */
WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
/* Enable NAWDS : MCAST INSPECT Enable, NAWDS Flag set */
WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
/* Enable/Disable RTS-CTS */
WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
/* following are available as of firmware 10.2 */
WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
WMI_10X_VDEV_PARAM_MFPTEST_SET,
WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
WMI_10X_VDEV_PARAM_VHT_SGIMASK,
WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
WMI_10X_VDEV_PARAM_TSF_INCREMENT,
};
enum wmi_10_4_vdev_param {
WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
WMI_10_4_VDEV_PARAM_SLOT_TIME,
WMI_10_4_VDEV_PARAM_PREAMBLE,
WMI_10_4_VDEV_PARAM_SWBA_TIME,
WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
WMI_10_4_VDEV_PARAM_WDS,
WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
WMI_10_4_VDEV_PARAM_FEATURE_WMM,
WMI_10_4_VDEV_PARAM_CHWIDTH,
WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
WMI_10_4_VDEV_PARAM_MGMT_RATE,
WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
WMI_10_4_VDEV_PARAM_FIXED_RATE,
WMI_10_4_VDEV_PARAM_SGI,
WMI_10_4_VDEV_PARAM_LDPC,
WMI_10_4_VDEV_PARAM_TX_STBC,
WMI_10_4_VDEV_PARAM_RX_STBC,
WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
WMI_10_4_VDEV_PARAM_DEF_KEYID,
WMI_10_4_VDEV_PARAM_NSS,
WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
WMI_10_4_VDEV_PARAM_TXBF,
WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
WMI_10_4_VDEV_PARAM_MFPTEST_SET,
WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
WMI_10_4_VDEV_PARAM_PROXY_STA,
WMI_10_4_VDEV_PARAM_MERU_VC,
WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
WMI_10_4_VDEV_PARAM_SENSOR_AP,
WMI_10_4_VDEV_PARAM_BEACON_RATE,
WMI_10_4_VDEV_PARAM_DTIM_ENABLE_CTS,
WMI_10_4_VDEV_PARAM_STA_KICKOUT,
WMI_10_4_VDEV_PARAM_CAPABILITIES,
WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
};
#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
#define WMI_TXBF_STS_CAP_OFFSET_MASK 0xf0
#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
/* slot time long */
#define WMI_VDEV_SLOT_TIME_LONG 0x1
/* slot time short */
#define WMI_VDEV_SLOT_TIME_SHORT 0x2
/* preablbe long */
#define WMI_VDEV_PREAMBLE_LONG 0x1
/* preablbe short */
#define WMI_VDEV_PREAMBLE_SHORT 0x2
enum wmi_start_event_param {
WMI_VDEV_RESP_START_EVENT = 0,
WMI_VDEV_RESP_RESTART_EVENT,
};
struct wmi_vdev_start_response_event {
__le32 vdev_id;
__le32 req_id;
__le32 resp_type; /* %WMI_VDEV_RESP_ */
__le32 status;
} __packed;
struct wmi_vdev_standby_req_event {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
struct wmi_vdev_resume_req_event {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
struct wmi_vdev_stopped_event {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
/*
* common structure used for simple events
* (stopped, resume_req, standby response)
*/
struct wmi_vdev_simple_event {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
} __packed;
/* VDEV start response status codes */
/* VDEV succesfully started */
#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
/* requested VDEV not found */
#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
/* unsupported VDEV combination */
#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
/* TODO: please add more comments if you have in-depth information */
struct wmi_vdev_spectral_conf_cmd {
__le32 vdev_id;
/* number of fft samples to send (0 for infinite) */
__le32 scan_count;
__le32 scan_period;
__le32 scan_priority;
/* number of bins in the FFT: 2^(fft_size - bin_scale) */
__le32 scan_fft_size;
__le32 scan_gc_ena;
__le32 scan_restart_ena;
__le32 scan_noise_floor_ref;
__le32 scan_init_delay;
__le32 scan_nb_tone_thr;
__le32 scan_str_bin_thr;
__le32 scan_wb_rpt_mode;
__le32 scan_rssi_rpt_mode;
__le32 scan_rssi_thr;
__le32 scan_pwr_format;
/* rpt_mode: Format of FFT report to software for spectral scan
* triggered FFTs:
* 0: No FFT report (only spectral scan summary report)
* 1: 2-dword summary of metrics for each completed FFT + spectral
* scan summary report
* 2: 2-dword summary of metrics for each completed FFT +
* 1x- oversampled bins(in-band) per FFT + spectral scan summary
* report
* 3: 2-dword summary of metrics for each completed FFT +
* 2x- oversampled bins (all) per FFT + spectral scan summary
*/
__le32 scan_rpt_mode;
__le32 scan_bin_scale;
__le32 scan_dbm_adj;
__le32 scan_chn_mask;
} __packed;
struct wmi_vdev_spectral_conf_arg {
u32 vdev_id;
u32 scan_count;
u32 scan_period;
u32 scan_priority;
u32 scan_fft_size;
u32 scan_gc_ena;
u32 scan_restart_ena;
u32 scan_noise_floor_ref;
u32 scan_init_delay;
u32 scan_nb_tone_thr;
u32 scan_str_bin_thr;
u32 scan_wb_rpt_mode;
u32 scan_rssi_rpt_mode;
u32 scan_rssi_thr;
u32 scan_pwr_format;
u32 scan_rpt_mode;
u32 scan_bin_scale;
u32 scan_dbm_adj;
u32 scan_chn_mask;
};
#define WMI_SPECTRAL_ENABLE_DEFAULT 0
#define WMI_SPECTRAL_COUNT_DEFAULT 0
#define WMI_SPECTRAL_PERIOD_DEFAULT 35
#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
struct wmi_vdev_spectral_enable_cmd {
__le32 vdev_id;
__le32 trigger_cmd;
__le32 enable_cmd;
} __packed;
#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
/* Beacon processing related command and event structures */
struct wmi_bcn_tx_hdr {
__le32 vdev_id;
__le32 tx_rate;
__le32 tx_power;
__le32 bcn_len;
} __packed;
struct wmi_bcn_tx_cmd {
struct wmi_bcn_tx_hdr hdr;
u8 *bcn[0];
} __packed;
struct wmi_bcn_tx_arg {
u32 vdev_id;
u32 tx_rate;
u32 tx_power;
u32 bcn_len;
const void *bcn;
};
enum wmi_bcn_tx_ref_flags {
WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
};
/* TODO: It is unclear why "no antenna" works while any other seemingly valid
* chainmask yields no beacons on the air at all.
*/
#define WMI_BCN_TX_REF_DEF_ANTENNA 0
struct wmi_bcn_tx_ref_cmd {
__le32 vdev_id;
__le32 data_len;
/* physical address of the frame - dma pointer */
__le32 data_ptr;
/* id for host to track */
__le32 msdu_id;
/* frame ctrl to setup PPDU desc */
__le32 frame_control;
/* to control CABQ traffic: WMI_BCN_TX_REF_FLAG_ */
__le32 flags;
/* introduced in 10.2 */
__le32 antenna_mask;
} __packed;
/* Beacon filter */
#define WMI_BCN_FILTER_ALL 0 /* Filter all beacons */
#define WMI_BCN_FILTER_NONE 1 /* Pass all beacons */
#define WMI_BCN_FILTER_RSSI 2 /* Pass Beacons RSSI >= RSSI threshold */
#define WMI_BCN_FILTER_BSSID 3 /* Pass Beacons with matching BSSID */
#define WMI_BCN_FILTER_SSID 4 /* Pass Beacons with matching SSID */
struct wmi_bcn_filter_rx_cmd {
/* Filter ID */
__le32 bcn_filter_id;
/* Filter type - wmi_bcn_filter */
__le32 bcn_filter;
/* Buffer len */
__le32 bcn_filter_len;
/* Filter info (threshold, BSSID, RSSI) */
u8 *bcn_filter_buf;
} __packed;
/* Capabilities and IEs to be passed to firmware */
struct wmi_bcn_prb_info {
/* Capabilities */
__le32 caps;
/* ERP info */
__le32 erp;
/* Advanced capabilities */
/* HT capabilities */
/* HT Info */
/* ibss_dfs */
/* wpa Info */
/* rsn Info */
/* rrm info */
/* ath_ext */
/* app IE */
} __packed;
struct wmi_bcn_tmpl_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* TIM IE offset from the beginning of the template. */
__le32 tim_ie_offset;
/* beacon probe capabilities and IEs */
struct wmi_bcn_prb_info bcn_prb_info;
/* beacon buffer length */
__le32 buf_len;
/* variable length data */
u8 data[1];
} __packed;
struct wmi_prb_tmpl_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* beacon probe capabilities and IEs */
struct wmi_bcn_prb_info bcn_prb_info;
/* beacon buffer length */
__le32 buf_len;
/* Variable length data */
u8 data[1];
} __packed;
enum wmi_sta_ps_mode {
/* enable power save for the given STA VDEV */
WMI_STA_PS_MODE_DISABLED = 0,
/* disable power save for a given STA VDEV */
WMI_STA_PS_MODE_ENABLED = 1,
};
struct wmi_sta_powersave_mode_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/*
* Power save mode
* (see enum wmi_sta_ps_mode)
*/
__le32 sta_ps_mode;
} __packed;
enum wmi_csa_offload_en {
WMI_CSA_OFFLOAD_DISABLE = 0,
WMI_CSA_OFFLOAD_ENABLE = 1,
};
struct wmi_csa_offload_enable_cmd {
__le32 vdev_id;
__le32 csa_offload_enable;
} __packed;
struct wmi_csa_offload_chanswitch_cmd {
__le32 vdev_id;
struct wmi_channel chan;
} __packed;
/*
* This parameter controls the policy for retrieving frames from AP while the
* STA is in sleep state.
*
* Only takes affect if the sta_ps_mode is enabled
*/
enum wmi_sta_ps_param_rx_wake_policy {
/*
* Wake up when ever there is an RX activity on the VDEV. In this mode
* the Power save SM(state machine) will come out of sleep by either
* sending null frame (or) a data frame (with PS==0) in response to TIM
* bit set in the received beacon frame from AP.
*/
WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
/*
* Here the power save state machine will not wakeup in response to TIM
* bit, instead it will send a PSPOLL (or) UASPD trigger based on UAPSD
* configuration setup by WMISET_PS_SET_UAPSD WMI command. When all
* access categories are delivery-enabled, the station will send a
* UAPSD trigger frame, otherwise it will send a PS-Poll.
*/
WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
};
/*
* Number of tx frames/beacon that cause the power save SM to wake up.
*
* Value 1 causes the SM to wake up for every TX. Value 0 has a special
* meaning, It will cause the SM to never wake up. This is useful if you want
* to keep the system to sleep all the time for some kind of test mode . host
* can change this parameter any time. It will affect at the next tx frame.
*/
enum wmi_sta_ps_param_tx_wake_threshold {
WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
/*
* Values greater than one indicate that many TX attempts per beacon
* interval before the STA will wake up
*/
};
/*
* The maximum number of PS-Poll frames the FW will send in response to
* traffic advertised in TIM before waking up (by sending a null frame with PS
* = 0). Value 0 has a special meaning: there is no maximum count and the FW
* will send as many PS-Poll as are necessary to retrieve buffered BU. This
* parameter is used when the RX wake policy is
* WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake
* policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE.
*/
enum wmi_sta_ps_param_pspoll_count {
WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
/*
* Values greater than 0 indicate the maximum numer of PS-Poll frames
* FW will send before waking up.
*/
/* When u-APSD is enabled the firmware will be very reluctant to exit
* STA PS. This could result in very poor Rx performance with STA doing
* PS-Poll for each and every buffered frame. This value is a bit
* arbitrary.
*/
WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
};
/*
* This will include the delivery and trigger enabled state for every AC.
* This is the negotiated state with AP. The host MLME needs to set this based
* on AP capability and the state Set in the association request by the
* station MLME.Lower 8 bits of the value specify the UAPSD configuration.
*/
#define WMI_UAPSD_AC_TYPE_DELI 0
#define WMI_UAPSD_AC_TYPE_TRIG 1
#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
((type == WMI_UAPSD_AC_TYPE_DELI) ? (1 << (ac << 1)) : (1 << ((ac << 1) + 1)))
enum wmi_sta_ps_param_uapsd {
WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
};
#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
struct wmi_sta_uapsd_auto_trig_param {
__le32 wmm_ac;
__le32 user_priority;
__le32 service_interval;
__le32 suspend_interval;
__le32 delay_interval;
};
struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
__le32 num_ac;
};
struct wmi_sta_uapsd_auto_trig_arg {
u32 wmm_ac;
u32 user_priority;
u32 service_interval;
u32 suspend_interval;
u32 delay_interval;
};
enum wmi_sta_powersave_param {
/*
* Controls how frames are retrievd from AP while STA is sleeping
*
* (see enum wmi_sta_ps_param_rx_wake_policy)
*/
WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
/*
* The STA will go active after this many TX
*
* (see enum wmi_sta_ps_param_tx_wake_threshold)
*/
WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
/*
* Number of PS-Poll to send before STA wakes up
*
* (see enum wmi_sta_ps_param_pspoll_count)
*
*/
WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
/*
* TX/RX inactivity time in msec before going to sleep.
*
* The power save SM will monitor tx/rx activity on the VDEV, if no
* activity for the specified msec of the parameter the Power save
* SM will go to sleep.
*/
WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
/*
* Set uapsd configuration.
*
* (see enum wmi_sta_ps_param_uapsd)
*/
WMI_STA_PS_PARAM_UAPSD = 4,
};
struct wmi_sta_powersave_param_cmd {
__le32 vdev_id;
__le32 param_id; /* %WMI_STA_PS_PARAM_ */
__le32 param_value;
} __packed;
/* No MIMO power save */
#define WMI_STA_MIMO_PS_MODE_DISABLE
/* mimo powersave mode static*/
#define WMI_STA_MIMO_PS_MODE_STATIC
/* mimo powersave mode dynamic */
#define WMI_STA_MIMO_PS_MODE_DYNAMIC
struct wmi_sta_mimo_ps_mode_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* mimo powersave mode as defined above */
__le32 mimo_pwrsave_mode;
} __packed;
/* U-APSD configuration of peer station from (re)assoc request and TSPECs */
enum wmi_ap_ps_param_uapsd {
WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
};
/* U-APSD maximum service period of peer station */
enum wmi_ap_ps_peer_param_max_sp {
WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
};
/*
* AP power save parameter
* Set a power save specific parameter for a peer station
*/
enum wmi_ap_ps_peer_param {
/* Set uapsd configuration for a given peer.
*
* Include the delivery and trigger enabled state for every AC.
* The host MLME needs to set this based on AP capability and stations
* request Set in the association request received from the station.
*
* Lower 8 bits of the value specify the UAPSD configuration.
*
* (see enum wmi_ap_ps_param_uapsd)
* The default value is 0.
*/
WMI_AP_PS_PEER_PARAM_UAPSD = 0,
/*
* Set the service period for a UAPSD capable station
*
* The service period from wme ie in the (re)assoc request frame.
*
* (see enum wmi_ap_ps_peer_param_max_sp)
*/
WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
/* Time in seconds for aging out buffered frames for STA in PS */
WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
};
struct wmi_ap_ps_peer_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* AP powersave param (see enum wmi_ap_ps_peer_param) */
__le32 param_id;
/* AP powersave param value */
__le32 param_value;
} __packed;
/* 128 clients = 4 words */
#define WMI_TIM_BITMAP_ARRAY_SIZE 4
struct wmi_tim_info {
__le32 tim_len;
__le32 tim_mcast;
__le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
__le32 tim_changed;
__le32 tim_num_ps_pending;
} __packed;
struct wmi_tim_info_arg {
__le32 tim_len;
__le32 tim_mcast;
const __le32 *tim_bitmap;
__le32 tim_changed;
__le32 tim_num_ps_pending;
} __packed;
/* Maximum number of NOA Descriptors supported */
#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
struct wmi_p2p_noa_info {
/* Bit 0 - Flag to indicate an update in NOA schedule
Bits 7-1 - Reserved */
u8 changed;
/* NOA index */
u8 index;
/* Bit 0 - Opp PS state of the AP
Bits 1-7 - Ctwindow in TUs */
u8 ctwindow_oppps;
/* Number of NOA descriptors */
u8 num_descriptors;
struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
} __packed;
struct wmi_bcn_info {
struct wmi_tim_info tim_info;
struct wmi_p2p_noa_info p2p_noa_info;
} __packed;
struct wmi_host_swba_event {
__le32 vdev_map;
struct wmi_bcn_info bcn_info[0];
} __packed;
struct wmi_10_2_4_bcn_info {
struct wmi_tim_info tim_info;
/* The 10.2.4 FW doesn't have p2p NOA info */
} __packed;
struct wmi_10_2_4_host_swba_event {
__le32 vdev_map;
struct wmi_10_2_4_bcn_info bcn_info[0];
} __packed;
/* 16 words = 512 client + 1 word = for guard */
#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
struct wmi_10_4_tim_info {
__le32 tim_len;
__le32 tim_mcast;
__le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
__le32 tim_changed;
__le32 tim_num_ps_pending;
} __packed;
#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
struct wmi_10_4_p2p_noa_info {
/* Bit 0 - Flag to indicate an update in NOA schedule
* Bits 7-1 - Reserved
*/
u8 changed;
/* NOA index */
u8 index;
/* Bit 0 - Opp PS state of the AP
* Bits 1-7 - Ctwindow in TUs
*/
u8 ctwindow_oppps;
/* Number of NOA descriptors */
u8 num_descriptors;
struct wmi_p2p_noa_descriptor
noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
} __packed;
struct wmi_10_4_bcn_info {
struct wmi_10_4_tim_info tim_info;
struct wmi_10_4_p2p_noa_info p2p_noa_info;
} __packed;
struct wmi_10_4_host_swba_event {
__le32 vdev_map;
struct wmi_10_4_bcn_info bcn_info[0];
} __packed;
#define WMI_MAX_AP_VDEV 16
struct wmi_tbtt_offset_event {
__le32 vdev_map;
__le32 tbttoffset_list[WMI_MAX_AP_VDEV];
} __packed;
struct wmi_peer_create_cmd {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
} __packed;
enum wmi_peer_type {
WMI_PEER_TYPE_DEFAULT = 0,
WMI_PEER_TYPE_BSS = 1,
WMI_PEER_TYPE_TDLS = 2,
};
struct wmi_peer_delete_cmd {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_peer_flush_tids_cmd {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
__le32 peer_tid_bitmap;
} __packed;
struct wmi_fixed_rate {
/*
* rate mode . 0: disable fixed rate (auto rate)
* 1: legacy (non 11n) rate specified as ieee rate 2*Mbps
* 2: ht20 11n rate specified as mcs index
* 3: ht40 11n rate specified as mcs index
*/
__le32 rate_mode;
/*
* 4 rate values for 4 rate series. series 0 is stored in byte 0 (LSB)
* and series 3 is stored at byte 3 (MSB)
*/
__le32 rate_series;
/*
* 4 retry counts for 4 rate series. retry count for rate 0 is stored
* in byte 0 (LSB) and retry count for rate 3 is stored at byte 3
* (MSB)
*/
__le32 rate_retries;
} __packed;
struct wmi_peer_fixed_rate_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* fixed rate */
struct wmi_fixed_rate peer_fixed_rate;
} __packed;
#define WMI_MGMT_TID 17
struct wmi_addba_clear_resp_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
} __packed;
struct wmi_addba_send_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* Tid number */
__le32 tid;
/* Buffer/Window size*/
__le32 buffersize;
} __packed;
struct wmi_delba_send_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* Tid number */
__le32 tid;
/* Is Initiator */
__le32 initiator;
/* Reason code */
__le32 reasoncode;
} __packed;
struct wmi_addba_setresponse_cmd {
/* unique id identifying the vdev, generated by the caller */
__le32 vdev_id;
/* peer mac address */
struct wmi_mac_addr peer_macaddr;
/* Tid number */
__le32 tid;
/* status code */
__le32 statuscode;
} __packed;
struct wmi_send_singleamsdu_cmd {
/* unique id identifying the vdev, generated by the caller */
__le32 vdev_id;
/* peer mac address */
struct wmi_mac_addr peer_macaddr;
/* Tid number */
__le32 tid;
} __packed;
enum wmi_peer_smps_state {
WMI_PEER_SMPS_PS_NONE = 0x0,
WMI_PEER_SMPS_STATIC = 0x1,
WMI_PEER_SMPS_DYNAMIC = 0x2
};
enum wmi_peer_chwidth {
WMI_PEER_CHWIDTH_20MHZ = 0,
WMI_PEER_CHWIDTH_40MHZ = 1,
WMI_PEER_CHWIDTH_80MHZ = 2,
};
enum wmi_peer_param {
WMI_PEER_SMPS_STATE = 0x1, /* see %wmi_peer_smps_state */
WMI_PEER_AMPDU = 0x2,
WMI_PEER_AUTHORIZE = 0x3,
WMI_PEER_CHAN_WIDTH = 0x4,
WMI_PEER_NSS = 0x5,
WMI_PEER_USE_4ADDR = 0x6,
WMI_PEER_DUMMY_VAR = 0xff, /* dummy parameter for STA PS workaround */
};
struct wmi_peer_set_param_cmd {
__le32 vdev_id;
struct wmi_mac_addr peer_macaddr;
__le32 param_id;
__le32 param_value;
} __packed;
#define MAX_SUPPORTED_RATES 128
struct wmi_rate_set {
/* total number of rates */
__le32 num_rates;
/*
* rates (each 8bit value) packed into a 32 bit word.
* the rates are filled from least significant byte to most
* significant byte.
*/
__le32 rates[(MAX_SUPPORTED_RATES / 4) + 1];
} __packed;
struct wmi_rate_set_arg {
unsigned int num_rates;
u8 rates[MAX_SUPPORTED_RATES];
};
/*
* NOTE: It would bea good idea to represent the Tx MCS
* info in one word and Rx in another word. This is split
* into multiple words for convenience
*/
struct wmi_vht_rate_set {
__le32 rx_max_rate; /* Max Rx data rate */
__le32 rx_mcs_set; /* Negotiated RX VHT rates */
__le32 tx_max_rate; /* Max Tx data rate */
__le32 tx_mcs_set; /* Negotiated TX VHT rates */
} __packed;
struct wmi_vht_rate_set_arg {
u32 rx_max_rate;
u32 rx_mcs_set;
u32 tx_max_rate;
u32 tx_mcs_set;
};
struct wmi_peer_set_rates_cmd {
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* legacy rate set */
struct wmi_rate_set peer_legacy_rates;
/* ht rate set */
struct wmi_rate_set peer_ht_rates;
} __packed;
struct wmi_peer_set_q_empty_callback_cmd {
/* unique id identifying the VDEV, generated by the caller */
__le32 vdev_id;
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
__le32 callback_enable;
} __packed;
struct wmi_peer_flags_map {
u32 auth;
u32 qos;
u32 need_ptk_4_way;
u32 need_gtk_2_way;
u32 apsd;
u32 ht;
u32 bw40;
u32 stbc;
u32 ldbc;
u32 dyn_mimops;
u32 static_mimops;
u32 spatial_mux;
u32 vht;
u32 bw80;
u32 vht_2g;
u32 pmf;
};
enum wmi_peer_flags {
WMI_PEER_AUTH = 0x00000001,
WMI_PEER_QOS = 0x00000002,
WMI_PEER_NEED_PTK_4_WAY = 0x00000004,
WMI_PEER_NEED_GTK_2_WAY = 0x00000010,
WMI_PEER_APSD = 0x00000800,
WMI_PEER_HT = 0x00001000,
WMI_PEER_40MHZ = 0x00002000,
WMI_PEER_STBC = 0x00008000,
WMI_PEER_LDPC = 0x00010000,
WMI_PEER_DYN_MIMOPS = 0x00020000,
WMI_PEER_STATIC_MIMOPS = 0x00040000,
WMI_PEER_SPATIAL_MUX = 0x00200000,
WMI_PEER_VHT = 0x02000000,
WMI_PEER_80MHZ = 0x04000000,
WMI_PEER_VHT_2G = 0x08000000,
WMI_PEER_PMF = 0x10000000,
};
enum wmi_10x_peer_flags {
WMI_10X_PEER_AUTH = 0x00000001,
WMI_10X_PEER_QOS = 0x00000002,
WMI_10X_PEER_NEED_PTK_4_WAY = 0x00000004,
WMI_10X_PEER_NEED_GTK_2_WAY = 0x00000010,
WMI_10X_PEER_APSD = 0x00000800,
WMI_10X_PEER_HT = 0x00001000,
WMI_10X_PEER_40MHZ = 0x00002000,
WMI_10X_PEER_STBC = 0x00008000,
WMI_10X_PEER_LDPC = 0x00010000,
WMI_10X_PEER_DYN_MIMOPS = 0x00020000,
WMI_10X_PEER_STATIC_MIMOPS = 0x00040000,
WMI_10X_PEER_SPATIAL_MUX = 0x00200000,
WMI_10X_PEER_VHT = 0x02000000,
WMI_10X_PEER_80MHZ = 0x04000000,
};
enum wmi_10_2_peer_flags {
WMI_10_2_PEER_AUTH = 0x00000001,
WMI_10_2_PEER_QOS = 0x00000002,
WMI_10_2_PEER_NEED_PTK_4_WAY = 0x00000004,
WMI_10_2_PEER_NEED_GTK_2_WAY = 0x00000010,
WMI_10_2_PEER_APSD = 0x00000800,
WMI_10_2_PEER_HT = 0x00001000,
WMI_10_2_PEER_40MHZ = 0x00002000,
WMI_10_2_PEER_STBC = 0x00008000,
WMI_10_2_PEER_LDPC = 0x00010000,
WMI_10_2_PEER_DYN_MIMOPS = 0x00020000,
WMI_10_2_PEER_STATIC_MIMOPS = 0x00040000,
WMI_10_2_PEER_SPATIAL_MUX = 0x00200000,
WMI_10_2_PEER_VHT = 0x02000000,
WMI_10_2_PEER_80MHZ = 0x04000000,
WMI_10_2_PEER_VHT_2G = 0x08000000,
WMI_10_2_PEER_PMF = 0x10000000,
};
/*
* Peer rate capabilities.
*
* This is of interest to the ratecontrol
* module which resides in the firmware. The bit definitions are
* consistent with that defined in if_athrate.c.
*/
#define WMI_RC_DS_FLAG 0x01
#define WMI_RC_CW40_FLAG 0x02
#define WMI_RC_SGI_FLAG 0x04
#define WMI_RC_HT_FLAG 0x08
#define WMI_RC_RTSCTS_FLAG 0x10
#define WMI_RC_TX_STBC_FLAG 0x20
#define WMI_RC_RX_STBC_FLAG 0xC0
#define WMI_RC_RX_STBC_FLAG_S 6
#define WMI_RC_WEP_TKIP_FLAG 0x100
#define WMI_RC_TS_FLAG 0x200
#define WMI_RC_UAPSD_FLAG 0x400
/* Maximum listen interval supported by hw in units of beacon interval */
#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
struct wmi_common_peer_assoc_complete_cmd {
struct wmi_mac_addr peer_macaddr;
__le32 vdev_id;
__le32 peer_new_assoc; /* 1=assoc, 0=reassoc */
__le32 peer_associd; /* 16 LSBs */
__le32 peer_flags;
__le32 peer_caps; /* 16 LSBs */
__le32 peer_listen_intval;
__le32 peer_ht_caps;
__le32 peer_max_mpdu;
__le32 peer_mpdu_density; /* 0..16 */
__le32 peer_rate_caps;
struct wmi_rate_set peer_legacy_rates;
struct wmi_rate_set peer_ht_rates;
__le32 peer_nss; /* num of spatial streams */
__le32 peer_vht_caps;
__le32 peer_phymode;
struct wmi_vht_rate_set peer_vht_rates;
};
struct wmi_main_peer_assoc_complete_cmd {
struct wmi_common_peer_assoc_complete_cmd cmd;
/* HT Operation Element of the peer. Five bytes packed in 2
* INT32 array and filled from lsb to msb. */
__le32 peer_ht_info[2];
} __packed;
struct wmi_10_1_peer_assoc_complete_cmd {
struct wmi_common_peer_assoc_complete_cmd cmd;
} __packed;
#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
struct wmi_10_2_peer_assoc_complete_cmd {
struct wmi_common_peer_assoc_complete_cmd cmd;
__le32 info0; /* WMI_PEER_ASSOC_INFO0_ */
} __packed;
struct wmi_10_4_peer_assoc_complete_cmd {
struct wmi_10_2_peer_assoc_complete_cmd cmd;
__le32 peer_bw_rxnss_override;
} __packed;
struct wmi_peer_assoc_complete_arg {
u8 addr[ETH_ALEN];
u32 vdev_id;
bool peer_reassoc;
u16 peer_aid;
u32 peer_flags; /* see %WMI_PEER_ */
u16 peer_caps;
u32 peer_listen_intval;
u32 peer_ht_caps;
u32 peer_max_mpdu;
u32 peer_mpdu_density; /* 0..16 */
u32 peer_rate_caps; /* see %WMI_RC_ */
struct wmi_rate_set_arg peer_legacy_rates;
struct wmi_rate_set_arg peer_ht_rates;
u32 peer_num_spatial_streams;
u32 peer_vht_caps;
enum wmi_phy_mode peer_phymode;
struct wmi_vht_rate_set_arg peer_vht_rates;
};
struct wmi_peer_add_wds_entry_cmd {
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
/* wds MAC addr */
struct wmi_mac_addr wds_macaddr;
} __packed;
struct wmi_peer_remove_wds_entry_cmd {
/* wds MAC addr */
struct wmi_mac_addr wds_macaddr;
} __packed;
struct wmi_peer_q_empty_callback_event {
/* peer MAC address */
struct wmi_mac_addr peer_macaddr;
} __packed;
/*
* Channel info WMI event
*/
struct wmi_chan_info_event {
__le32 err_code;
__le32 freq;
__le32 cmd_flags;
__le32 noise_floor;
__le32 rx_clear_count;
__le32 cycle_count;
} __packed;
struct wmi_10_4_chan_info_event {
__le32 err_code;
__le32 freq;
__le32 cmd_flags;
__le32 noise_floor;
__le32 rx_clear_count;
__le32 cycle_count;
__le32 chan_tx_pwr_range;
__le32 chan_tx_pwr_tp;
__le32 rx_frame_count;
} __packed;
struct wmi_peer_sta_kickout_event {
struct wmi_mac_addr peer_macaddr;
} __packed;
#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
/* Beacon filter wmi command info */
#define BCN_FLT_MAX_SUPPORTED_IES 256
#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
struct bss_bcn_stats {
__le32 vdev_id;
__le32 bss_bcnsdropped;
__le32 bss_bcnsdelivered;
} __packed;
struct bcn_filter_stats {
__le32 bcns_dropped;
__le32 bcns_delivered;
__le32 activefilters;
struct bss_bcn_stats bss_stats;
} __packed;
struct wmi_add_bcn_filter_cmd {
u32 vdev_id;
u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
} __packed;
enum wmi_sta_keepalive_method {
WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
};
#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
/* Firmware crashes if keepalive interval exceeds this limit */
#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
/* note: ip4 addresses are in network byte order, i.e. big endian */
struct wmi_sta_keepalive_arp_resp {
__be32 src_ip4_addr;
__be32 dest_ip4_addr;
struct wmi_mac_addr dest_mac_addr;
} __packed;
struct wmi_sta_keepalive_cmd {
__le32 vdev_id;
__le32 enabled;
__le32 method; /* WMI_STA_KEEPALIVE_METHOD_ */
__le32 interval; /* in seconds */
struct wmi_sta_keepalive_arp_resp arp_resp;
} __packed;
struct wmi_sta_keepalive_arg {
u32 vdev_id;
u32 enabled;
u32 method;
u32 interval;
__be32 src_ip4_addr;
__be32 dest_ip4_addr;
const u8 dest_mac_addr[ETH_ALEN];
};
enum wmi_force_fw_hang_type {
WMI_FORCE_FW_HANG_ASSERT = 1,
WMI_FORCE_FW_HANG_NO_DETECT,
WMI_FORCE_FW_HANG_CTRL_EP_FULL,
WMI_FORCE_FW_HANG_EMPTY_POINT,
WMI_FORCE_FW_HANG_STACK_OVERFLOW,
WMI_FORCE_FW_HANG_INFINITE_LOOP,
};
#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
struct wmi_force_fw_hang_cmd {
__le32 type;
__le32 delay_ms;
} __packed;
enum ath10k_dbglog_level {
ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
ATH10K_DBGLOG_LEVEL_INFO = 1,
ATH10K_DBGLOG_LEVEL_WARN = 2,
ATH10K_DBGLOG_LEVEL_ERR = 3,
};
/* VAP ids to enable dbglog */
#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
/* to enable dbglog in the firmware */
#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
/* timestamp resolution */
#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
/* number of queued messages before sending them to the host */
#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
/*
* Log levels to enable. This defines the minimum level to enable, this is
* not a bitmask. See enum ath10k_dbglog_level for the values.
*/
#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
/*
* Note: this is a cleaned up version of a struct firmware uses. For
* example, config_valid was hidden inside an array.
*/
struct wmi_dbglog_cfg_cmd {
/* bitmask to hold mod id config*/
__le32 module_enable;
/* see ATH10K_DBGLOG_CFG_ */
__le32 config_enable;
/* mask of module id bits to be changed */
__le32 module_valid;
/* mask of config bits to be changed, see ATH10K_DBGLOG_CFG_ */
__le32 config_valid;
} __packed;
enum wmi_roam_reason {
WMI_ROAM_REASON_BETTER_AP = 1,
WMI_ROAM_REASON_BEACON_MISS = 2,
WMI_ROAM_REASON_LOW_RSSI = 3,
WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
WMI_ROAM_REASON_HO_FAILED = 5,
/* keep last */
WMI_ROAM_REASON_MAX,
};
struct wmi_roam_ev {
__le32 vdev_id;
__le32 reason;
} __packed;
#define ATH10K_FRAGMT_THRESHOLD_MIN 540
#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
#define WMI_MAX_EVENT 0x1000
/* Maximum number of pending TXed WMI packets */
#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
/* By default disable power save for IBSS */
#define ATH10K_DEFAULT_ATIM 0
#define WMI_MAX_MEM_REQS 16
struct wmi_scan_ev_arg {
__le32 event_type; /* %WMI_SCAN_EVENT_ */
__le32 reason; /* %WMI_SCAN_REASON_ */
__le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */
__le32 scan_req_id;
__le32 scan_id;
__le32 vdev_id;
};
struct wmi_mgmt_rx_ev_arg {
__le32 channel;
__le32 snr;
__le32 rate;
__le32 phy_mode;
__le32 buf_len;
__le32 status; /* %WMI_RX_STATUS_ */
struct wmi_mgmt_rx_ext_info ext_info;
};
struct wmi_ch_info_ev_arg {
__le32 err_code;
__le32 freq;
__le32 cmd_flags;
__le32 noise_floor;
__le32 rx_clear_count;
__le32 cycle_count;
__le32 chan_tx_pwr_range;
__le32 chan_tx_pwr_tp;
__le32 rx_frame_count;
};
struct wmi_vdev_start_ev_arg {
__le32 vdev_id;
__le32 req_id;
__le32 resp_type; /* %WMI_VDEV_RESP_ */
__le32 status;
};
struct wmi_peer_kick_ev_arg {
const u8 *mac_addr;
};
struct wmi_swba_ev_arg {
__le32 vdev_map;
struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
};
struct wmi_phyerr_ev_arg {
u32 tsf_timestamp;
u16 freq1;
u16 freq2;
u8 rssi_combined;
u8 chan_width_mhz;
u8 phy_err_code;
u16 nf_chains[4];
u32 buf_len;
const u8 *buf;
u8 hdr_len;
};
struct wmi_phyerr_hdr_arg {
u32 num_phyerrs;
u32 tsf_l32;
u32 tsf_u32;
u32 buf_len;
const void *phyerrs;
};
struct wmi_svc_rdy_ev_arg {
__le32 min_tx_power;
__le32 max_tx_power;
__le32 ht_cap;
__le32 vht_cap;
__le32 sw_ver0;
__le32 sw_ver1;
__le32 fw_build;
__le32 phy_capab;
__le32 num_rf_chains;
__le32 eeprom_rd;
__le32 num_mem_reqs;
const __le32 *service_map;
size_t service_map_len;
const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
};
struct wmi_rdy_ev_arg {
__le32 sw_version;
__le32 abi_version;
__le32 status;
const u8 *mac_addr;
};
struct wmi_roam_ev_arg {
__le32 vdev_id;
__le32 reason;
__le32 rssi;
};
struct wmi_pdev_temperature_event {
/* temperature value in Celcius degree */
__le32 temperature;
} __packed;
struct wmi_pdev_bss_chan_info_event {
__le32 freq;
__le32 noise_floor;
__le64 cycle_busy;
__le64 cycle_total;
__le64 cycle_tx;
__le64 cycle_rx;
__le64 cycle_rx_bss;
__le32 reserved;
} __packed;
/* WOW structures */
enum wmi_wow_wakeup_event {
WOW_BMISS_EVENT = 0,
WOW_BETTER_AP_EVENT,
WOW_DEAUTH_RECVD_EVENT,
WOW_MAGIC_PKT_RECVD_EVENT,
WOW_GTK_ERR_EVENT,
WOW_FOURWAY_HSHAKE_EVENT,
WOW_EAPOL_RECVD_EVENT,
WOW_NLO_DETECTED_EVENT,
WOW_DISASSOC_RECVD_EVENT,
WOW_PATTERN_MATCH_EVENT,
WOW_CSA_IE_EVENT,
WOW_PROBE_REQ_WPS_IE_EVENT,
WOW_AUTH_REQ_EVENT,
WOW_ASSOC_REQ_EVENT,
WOW_HTT_EVENT,
WOW_RA_MATCH_EVENT,
WOW_HOST_AUTO_SHUTDOWN_EVENT,
WOW_IOAC_MAGIC_EVENT,
WOW_IOAC_SHORT_EVENT,
WOW_IOAC_EXTEND_EVENT,
WOW_IOAC_TIMER_EVENT,
WOW_DFS_PHYERR_RADAR_EVENT,
WOW_BEACON_EVENT,
WOW_CLIENT_KICKOUT_EVENT,
WOW_EVENT_MAX,
};
#define C2S(x) case x: return #x
static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
{
switch (ev) {
C2S(WOW_BMISS_EVENT);
C2S(WOW_BETTER_AP_EVENT);
C2S(WOW_DEAUTH_RECVD_EVENT);
C2S(WOW_MAGIC_PKT_RECVD_EVENT);
C2S(WOW_GTK_ERR_EVENT);
C2S(WOW_FOURWAY_HSHAKE_EVENT);
C2S(WOW_EAPOL_RECVD_EVENT);
C2S(WOW_NLO_DETECTED_EVENT);
C2S(WOW_DISASSOC_RECVD_EVENT);
C2S(WOW_PATTERN_MATCH_EVENT);
C2S(WOW_CSA_IE_EVENT);
C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
C2S(WOW_AUTH_REQ_EVENT);
C2S(WOW_ASSOC_REQ_EVENT);
C2S(WOW_HTT_EVENT);
C2S(WOW_RA_MATCH_EVENT);
C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
C2S(WOW_IOAC_MAGIC_EVENT);
C2S(WOW_IOAC_SHORT_EVENT);
C2S(WOW_IOAC_EXTEND_EVENT);
C2S(WOW_IOAC_TIMER_EVENT);
C2S(WOW_DFS_PHYERR_RADAR_EVENT);
C2S(WOW_BEACON_EVENT);
C2S(WOW_CLIENT_KICKOUT_EVENT);
C2S(WOW_EVENT_MAX);
default:
return NULL;
}
}
enum wmi_wow_wake_reason {
WOW_REASON_UNSPECIFIED = -1,
WOW_REASON_NLOD = 0,
WOW_REASON_AP_ASSOC_LOST,
WOW_REASON_LOW_RSSI,
WOW_REASON_DEAUTH_RECVD,
WOW_REASON_DISASSOC_RECVD,
WOW_REASON_GTK_HS_ERR,
WOW_REASON_EAP_REQ,
WOW_REASON_FOURWAY_HS_RECV,
WOW_REASON_TIMER_INTR_RECV,
WOW_REASON_PATTERN_MATCH_FOUND,
WOW_REASON_RECV_MAGIC_PATTERN,
WOW_REASON_P2P_DISC,
WOW_REASON_WLAN_HB,
WOW_REASON_CSA_EVENT,
WOW_REASON_PROBE_REQ_WPS_IE_RECV,
WOW_REASON_AUTH_REQ_RECV,
WOW_REASON_ASSOC_REQ_RECV,
WOW_REASON_HTT_EVENT,
WOW_REASON_RA_MATCH,
WOW_REASON_HOST_AUTO_SHUTDOWN,
WOW_REASON_IOAC_MAGIC_EVENT,
WOW_REASON_IOAC_SHORT_EVENT,
WOW_REASON_IOAC_EXTEND_EVENT,
WOW_REASON_IOAC_TIMER_EVENT,
WOW_REASON_ROAM_HO,
WOW_REASON_DFS_PHYERR_RADADR_EVENT,
WOW_REASON_BEACON_RECV,
WOW_REASON_CLIENT_KICKOUT_EVENT,
WOW_REASON_DEBUG_TEST = 0xFF,
};
static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
{
switch (reason) {
C2S(WOW_REASON_UNSPECIFIED);
C2S(WOW_REASON_NLOD);
C2S(WOW_REASON_AP_ASSOC_LOST);
C2S(WOW_REASON_LOW_RSSI);
C2S(WOW_REASON_DEAUTH_RECVD);
C2S(WOW_REASON_DISASSOC_RECVD);
C2S(WOW_REASON_GTK_HS_ERR);
C2S(WOW_REASON_EAP_REQ);
C2S(WOW_REASON_FOURWAY_HS_RECV);
C2S(WOW_REASON_TIMER_INTR_RECV);
C2S(WOW_REASON_PATTERN_MATCH_FOUND);
C2S(WOW_REASON_RECV_MAGIC_PATTERN);
C2S(WOW_REASON_P2P_DISC);
C2S(WOW_REASON_WLAN_HB);
C2S(WOW_REASON_CSA_EVENT);
C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
C2S(WOW_REASON_AUTH_REQ_RECV);
C2S(WOW_REASON_ASSOC_REQ_RECV);
C2S(WOW_REASON_HTT_EVENT);
C2S(WOW_REASON_RA_MATCH);
C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
C2S(WOW_REASON_IOAC_MAGIC_EVENT);
C2S(WOW_REASON_IOAC_SHORT_EVENT);
C2S(WOW_REASON_IOAC_EXTEND_EVENT);
C2S(WOW_REASON_IOAC_TIMER_EVENT);
C2S(WOW_REASON_ROAM_HO);
C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
C2S(WOW_REASON_BEACON_RECV);
C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
C2S(WOW_REASON_DEBUG_TEST);
default:
return NULL;
}
}
#undef C2S
struct wmi_wow_ev_arg {
u32 vdev_id;
u32 flag;
enum wmi_wow_wake_reason wake_reason;
u32 data_len;
};
#define WOW_MIN_PATTERN_SIZE 1
#define WOW_MAX_PATTERN_SIZE 148
#define WOW_MAX_PKT_OFFSET 128
enum wmi_tdls_state {
WMI_TDLS_DISABLE,
WMI_TDLS_ENABLE_PASSIVE,
WMI_TDLS_ENABLE_ACTIVE,
};
enum wmi_tdls_peer_state {
WMI_TDLS_PEER_STATE_PEERING,
WMI_TDLS_PEER_STATE_CONNECTED,
WMI_TDLS_PEER_STATE_TEARDOWN,
};
struct wmi_tdls_peer_update_cmd_arg {
u32 vdev_id;
enum wmi_tdls_peer_state peer_state;
u8 addr[ETH_ALEN];
};
#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
struct wmi_tdls_peer_capab_arg {
u8 peer_uapsd_queues;
u8 peer_max_sp;
u32 buff_sta_support;
u32 off_chan_support;
u32 peer_curr_operclass;
u32 self_curr_operclass;
u32 peer_chan_len;
u32 peer_operclass_len;
u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
u32 is_peer_responder;
u32 pref_offchan_num;
u32 pref_offchan_bw;
};
enum wmi_txbf_conf {
WMI_TXBF_CONF_UNSUPPORTED,
WMI_TXBF_CONF_BEFORE_ASSOC,
WMI_TXBF_CONF_AFTER_ASSOC,
};
#define WMI_CCA_DETECT_LEVEL_AUTO 0
#define WMI_CCA_DETECT_MARGIN_AUTO 0
struct wmi_pdev_set_adaptive_cca_params {
__le32 enable;
__le32 cca_detect_level;
__le32 cca_detect_margin;
} __packed;
enum wmi_host_platform_type {
WMI_HOST_PLATFORM_HIGH_PERF,
WMI_HOST_PLATFORM_LOW_PERF,
};
enum wmi_bss_survey_req_type {
WMI_BSS_SURVEY_REQ_TYPE_READ = 1,
WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR,
};
struct wmi_pdev_chan_info_req_cmd {
__le32 type;
__le32 reserved;
} __packed;
struct ath10k;
struct ath10k_vif;
struct ath10k_fw_stats_pdev;
struct ath10k_fw_stats_peer;
struct ath10k_fw_stats;
int ath10k_wmi_attach(struct ath10k *ar);
void ath10k_wmi_detach(struct ath10k *ar);
void ath10k_wmi_free_host_mem(struct ath10k *ar);
int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
int ath10k_wmi_connect(struct ath10k *ar);
struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
u32 cmd_id);
void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *);
void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
struct ath10k_fw_stats_pdev *dst);
void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
struct ath10k_fw_stats_pdev *dst);
void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
struct ath10k_fw_stats_pdev *dst);
void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
struct ath10k_fw_stats_pdev *dst);
void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
struct ath10k_fw_stats_peer *dst);
void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
struct wmi_host_mem_chunks *chunks);
void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
const struct wmi_start_scan_arg *arg);
void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
const struct wmi_wmm_params_arg *arg);
void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
const struct wmi_channel_arg *arg);
int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_dfs(struct ath10k *ar,
struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
struct wmi_phyerr_ev_arg *phyerr,
u64 tsf);
void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
struct sk_buff *skb);
void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
struct sk_buff *skb);
void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
struct sk_buff *skb);
void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
struct sk_buff *skb);
void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
int left_len, struct wmi_phyerr_ev_arg *arg);
void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
struct ath10k_fw_stats *fw_stats,
char *buf);
void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
struct ath10k_fw_stats *fw_stats,
char *buf);
size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
struct ath10k_fw_stats *fw_stats,
char *buf);
int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
enum wmi_vdev_subtype subtype);
#endif /* _WMI_H_ */
|