blob: 911fcf865be8539489a0dfa9b27adea0993b0f8b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
|
/*
* Zynq power management
*
* Copyright (C) 2012 - 2014 Xilinx
*
* Sören Brinkmann <soren.brinkmann@xilinx.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/io.h>
#include <linux/of_address.h>
#include <linux/of_device.h>
#include "common.h"
/* register offsets */
#define DDRC_CTRL_REG1_OFFS 0x60
#define DDRC_DRAM_PARAM_REG3_OFFS 0x20
/* bitfields */
#define DDRC_CLOCKSTOP_MASK BIT(23)
#define DDRC_SELFREFRESH_MASK BIT(12)
static void __iomem *ddrc_base;
/**
* zynq_pm_ioremap() - Create IO mappings
* @comp: DT compatible string
* Return: Pointer to the mapped memory or NULL.
*
* Remap the memory region for a compatible DT node.
*/
static void __iomem *zynq_pm_ioremap(const char *comp)
{
struct device_node *np;
void __iomem *base = NULL;
np = of_find_compatible_node(NULL, NULL, comp);
if (np) {
base = of_iomap(np, 0);
of_node_put(np);
} else {
pr_warn("%s: no compatible node found for '%s'\n", __func__,
comp);
}
return base;
}
/**
* zynq_pm_late_init() - Power management init
*
* Initialization of power management related featurs and infrastructure.
*/
void __init zynq_pm_late_init(void)
{
u32 reg;
ddrc_base = zynq_pm_ioremap("xlnx,zynq-ddrc-a05");
if (!ddrc_base) {
pr_warn("%s: Unable to map DDRC IO memory.\n", __func__);
} else {
/*
* Enable DDRC clock stop feature. The HW takes care of
* entering/exiting the correct mode depending
* on activity state.
*/
reg = readl(ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS);
reg |= DDRC_CLOCKSTOP_MASK;
writel(reg, ddrc_base + DDRC_DRAM_PARAM_REG3_OFFS);
}
}
|
