summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/kirkwood-db.dtsi
blob: afebc157031828ddd850a6186cbdfb5e6e42b869 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
/*
 * Marvell DB-{88F6281,88F6282}-BP Development Board Setup
 *
 * Saeed Bishara <saeed@marvell.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * This file contains the definitions that are common between the 6281
 * and 6282 variants of the Marvell Kirkwood Development Board.
 */

#include "kirkwood.dtsi"

/ {
	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>; /* 512 MB */
	};

	chosen {
		bootargs = "console=ttyS0,115200n8 earlyprintk";
	};

	ocp@f1000000 {
		pinctrl@10000 {
			pmx_sdio_gpios: pmx-sdio-gpios {
				marvell,pins = "mpp37", "mpp38";
				marvell,function = "gpio";
			};
		};

		serial@12000 {
			pinctrl-0 = <&pmx_uart0>;
			pinctrl-names = "default";
			clock-frequency = <200000000>;
			status = "ok";
		};

		sata@80000 {
			nr-ports = <2>;
			status = "okay";
		};

		ehci@50000 {
			status = "okay";
		};

		mvsdio@90000 {
			pinctrl-0 = <&pmx_sdio_gpios>;
			pinctrl-names = "default";
			wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
			cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
			status = "okay";
		};
	};
};

&nand {
	pinctrl-0 = <&pmx_nand>;
	pinctrl-names = "default";
	chip-delay = <25>;
	status = "okay";

	partition@0 {
		label = "uboot";
		reg = <0x0 0x100000>;
	};

	partition@100000 {
		label = "uImage";
		reg = <0x100000 0x400000>;
	};

	partition@500000 {
		label = "root";
		reg = <0x500000 0x1fb00000>;
	};
};

&mdio {
	status = "okay";

	ethphy0: ethernet-phy@8 {
		device_type = "ethernet-phy";
		reg = <8>;
	};
};

&eth0 {
	status = "okay";
	ethernet0-port@0 {
		phy-handle = <&ethphy0>;
	};
};