summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/armada-370-dlink-dns327l.dts
blob: baa459dd51e442866fad3b58e8a6f3ef336651f5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for D-Link DNS-327L
 *
 * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
 */

/* Remaining unsolved:
 * There's still some unknown device on i2c address 0x13
 */

/dts-v1/;

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "armada-370.dtsi"

/ {
	model = "D-Link DNS-327L";
	compatible = "dlink,dns327l",
		"marvell,armada370",
		"marvell,armada-370-xp";

	chosen {
		stdout-path = &uart0;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x20000000>; /* 512 MiB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		internal-regs {
			sata@a0000 {
				nr-ports = <2>;
				status = "okay";
			};

			usb@50000 {
				status = "okay";
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <
			&backup_button_pin
			&power_button_pin
			&reset_button_pin>;
		pinctrl-names = "default";

		power-button {
			label = "Power Button";
			linux,code = <KEY_POWER>;
			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
		};

		backup-button {
			label = "Backup Button";
			linux,code = <KEY_COPY>;
			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
		};

		reset-button {
			label = "Reset Button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
		};
	};

	gpio-leds {
		compatible = "gpio-leds";
		pinctrl-0 = <
			&sata_l_amber_pin
			&sata_r_amber_pin
			&backup_led_pin
			/* Ensure these are managed by hardware */
			&sata_l_white_pin
			&sata_r_white_pin>;

		pinctrl-names = "default";

		sata-r-amber-pin {
			label = "dns327l:amber:sata-r";
			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		sata-l-amber-pin {
			label = "dns327l:amber:sata-l";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		backup-led-pin {
			label = "dns327l:white:usb";
			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		usb_power: regulator@1 {
			compatible = "regulator-fixed";
			reg = <1>;
			pinctrl-0 = <&xhci_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "USB3.0 Port Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			enable-active-high;
			regulator-boot-on;
			regulator-always-on;
			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
		};

		sata_r_power: regulator@2 {
			compatible = "regulator-fixed";
			reg = <2>;
			pinctrl-0 = <&sata_r_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "SATA-R Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <2000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
		};

		sata_l_power: regulator@3 {
			compatible = "regulator-fixed";
			reg = <3>;
			pinctrl-0 = <&sata_l_pwr_pin>;
			pinctrl-names = "default";
			regulator-name = "SATA-L Power";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			startup-delay-us = <4000000>;
			enable-active-high;
			regulator-always-on;
			regulator-boot-on;
			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
		};
	};
};

&pciec {
	status = "okay";

	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&pinctrl {
	sata_l_white_pin: sata-l-white-pin {
		marvell,pins = "mpp57";
		marvell,function = "sata0";
	};

	sata_r_white_pin: sata-r-white-pin {
		marvell,pins = "mpp55";
		marvell,function = "sata1";
	};

	sata_r_amber_pin: sata-r-amber-pin {
		marvell,pins = "mpp52";
		marvell,function = "gpio";
	};

	sata_l_amber_pin: sata-l-amber-pin {
		marvell,pins = "mpp53";
		marvell,function = "gpio";
	};

	backup_led_pin: backup-led-pin {
		marvell,pins = "mpp61";
		marvell,function = "gpo";
	};

	xhci_pwr_pin: xhci-pwr-pin {
		marvell,pins = "mpp13";
		marvell,function = "gpio";
	};

	sata_r_pwr_pin: sata-r-pwr-pin {
		marvell,pins = "mpp54";
		marvell,function = "gpio";
	};

	sata_l_pwr_pin: sata-l-pwr-pin {
		marvell,pins = "mpp56";
		marvell,function = "gpio";
	};

	uart1_pins: uart1-pins {
		marvell,pins = "mpp60", "mpp61";
		marvell,function = "uart1";
	};

	power_button_pin: power-button-pin {
		marvell,pins = "mpp65";
		marvell,function = "gpio";
	};

	backup_button_pin: backup-button-pin {
		marvell,pins = "mpp63";
		marvell,function = "gpio";
	};

	reset_button_pin: reset-button-pin {
		marvell,pins = "mpp64";
		marvell,function = "gpio";
	};
};

/* Serial console */
&uart0 {
	status = "okay";
};

/* Connected to Weltrend MCU */
&uart1 {
	pinctrl-0 = <&uart1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&mdio {
	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
		reg = <0>;
		marvell,reg-init = <0x0 0x16 0x0 0x0002>,
				<0x0 0x19 0x0 0x0077>,
				<0x0 0x18 0x0 0x5747>;
	};
};

&eth1 {
	phy = <&phy0>;
	phy-mode = "rgmii-id";
	status = "okay";
};

&i2c0 {
	compatible = "marvell,mv64xxx-i2c";
	clock-frequency = <100000>;
	status = "okay";
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		nand-rb = <0>;
		marvell,nand-keep-config;
		nand-on-flash-bbt;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				/* 1.0 MiB */
				reg = <0x0000000 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				/* 128 KiB */
				reg = <0x100000 0x20000>;
				read-only;
			};

			partition@120000 {
				label = "uImage";
				/* 7 MiB */
				reg = <0x120000 0x700000>;
			};

			partition@820000 {
				label = "ubifs";
				/* ~ 84 MiB */
				reg = <0x820000 0x54e0000>;
			};

			/* Hardcoded into stock bootloader */
			partition@5d00000 {
				label = "failsafe-uImage";
				/* 5 MiB */
				reg = <0x5d00000 0x500000>;
			};

			partition@6200000 {
				label = "failsafe-fs";
				/* 29 MiB */
				reg = <0x6200000 0x1d00000>;
			};

			partition@7f00000 {
				label = "bbt";
				/* 1 MiB for BBT */
				reg = <0x7f00000 0x100000>;
			};
		};
	};
};