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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,osm-l3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
maintainers:
- Sibi Sankar <sibis@codeaurora.org>
description:
L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.
The OSM L3 interconnect provider aggregates the L3 bandwidth requests
from CPU/GPU and relays it to the OSM.
properties:
compatible:
enum:
- qcom,sc7180-osm-l3
- qcom,sdm845-osm-l3
reg:
maxItems: 1
clocks:
items:
- description: xo clock
- description: alternate clock
clock-names:
items:
- const: xo
- const: alternate
'#interconnect-cells':
const: 1
required:
- compatible
- reg
- clocks
- clock-names
- '#interconnect-cells'
additionalProperties: false
examples:
- |
#define GPLL0 165
#define RPMH_CXO_CLK 0
osm_l3: interconnect@17d41000 {
compatible = "qcom,sdm845-osm-l3";
reg = <0x17d41000 0x1400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
#interconnect-cells = <1>;
};
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