// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2025 Inochi Amaoto */ /dts-v1/; #include "sg2044.dtsi" / { model = "Sophgo SG2044 SRD3-10"; compatible = "sophgo,srd3-10", "sophgo,sg2044"; aliases { serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; serial3 = &uart3; }; chosen { stdout-path = "serial1:115200n8"; }; }; &osc { clock-frequency = <25000000>; }; &emmc { bus-width = <4>; no-sdio; no-sd; non-removable; wp-inverted; status = "okay"; }; &gmac0 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; status = "okay"; mdio { phy0: phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; reset-gpios = <&porta 28 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; reset-deassert-us = <10000>; rx-internal-delay-ps = <2050>; }; }; }; &i2c1 { status = "okay"; mcu: syscon@17 { compatible = "sophgo,sg2044-hwmon-mcu", "sophgo,sg2042-hwmon-mcu"; reg = <0x17>; #thermal-sensor-cells = <1>; }; }; &msi { status = "okay"; }; &pcie0 { bus-range = <0x00 0xff>; linux,pci-domain = <1>; status = "okay"; }; &pcie1 { bus-range = <0x00 0xff>; linux,pci-domain = <0>; status = "okay"; }; &pcie2 { bus-range = <0x00 0xff>; linux,pci-domain = <3>; status = "okay"; }; &pcie3 { bus-range = <0x00 0xff>; linux,pci-domain = <2>; status = "okay"; }; &pcie4 { bus-range = <0x00 0xff>; linux,pci-domain = <4>; status = "okay"; }; &pwm { status = "okay"; }; &sd { bus-width = <4>; no-sdio; no-mmc; wp-inverted; status = "okay"; }; &uart0 { /* for firmware */ status = "reserved"; }; &uart1 { status = "okay"; };