From c869ce5aaf8f470c8cf32638e7cd498f57118fa5 Mon Sep 17 00:00:00 2001 From: John Hsu Date: Thu, 27 Apr 2017 11:22:50 +0800 Subject: ASoC: nau8824: leave Class D gain at chip default Remove initial configuration of Class D gain for 1R and 2L. Leave them at the chip default. Signed-off-by: John Hsu Signed-off-by: John Hsu Signed-off-by: Mark Brown --- sound/soc/codecs/nau8824.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'sound') diff --git a/sound/soc/codecs/nau8824.c b/sound/soc/codecs/nau8824.c index cd358be027dd..cca974d26136 100644 --- a/sound/soc/codecs/nau8824.c +++ b/sound/soc/codecs/nau8824.c @@ -1626,12 +1626,6 @@ static void nau8824_init_regs(struct nau8824 *nau8824) regmap_update_bits(regmap, NAU8824_REG_DAC_FILTER_CTRL_1, NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_MASK, NAU8824_DAC_CICCLP_OFF | NAU8824_DAC_OVERSAMPLE_64); - /* Class D gain 9db for 1R and 2L */ - regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_1, - NAU8824_CLASSD_GAIN_1R_MASK, - (0xa << NAU8824_CLASSD_GAIN_1R_SFT)); - regmap_update_bits(regmap, NAU8824_REG_CLASSD_GAIN_2, - NAU8824_CLASSD_GAIN_2L_MASK, 0xa); /* DAC clock delay 2ns, VREF */ regmap_update_bits(regmap, NAU8824_REG_RDAC, NAU8824_RDAC_CLK_DELAY_MASK | NAU8824_RDAC_VREF_MASK, -- cgit v1.2.3