From 07573534b0b030226ee5ab560e53aac7e6c0dd84 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 2 Jul 2009 11:57:19 -0600 Subject: ASoC: Fix mpc5200-psc-ac97 to ensure the data ready bit is cleared When doing register reads, it is possible for there to be a stale data ready bit set which will cause subsequent reads to return prematurely with incorrect data. This patch fixes the issues by ensuring stale data is cleared before starting another transaction. Signed-off-by: Grant Likely Acked-by: Jon Smirl Signed-off-by: Mark Brown --- sound/soc/fsl/mpc5200_psc_ac97.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sound/soc/fsl') diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_ac97.c index 794a247b3eb5..9b8503f2d68c 100644 --- a/sound/soc/fsl/mpc5200_psc_ac97.c +++ b/sound/soc/fsl/mpc5200_psc_ac97.c @@ -41,6 +41,10 @@ static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) pr_err("timeout on ac97 bus (rdy)\n"); return -ENODEV; } + + /* Force clear the data valid bit */ + in_be32(&psc_dma->psc_regs->ac97_data); + /* Send the read */ out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); -- cgit v1.2.3