From b6f35b4966e0ae59cec45e5292b100698d12dc5f Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 5 Jul 2006 14:39:43 +1000 Subject: [POWERPC] Make crash.c work on 32-bit and 64-bit To compile kexec on 32-bit we need a few more bits and pieces. Rather than add empty definitions, we can make crash.c work on 32-bit, with only a couple of kludges. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- include/asm-powerpc/kexec.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h index 8f7fd5cfec34..11cbdf81fd2e 100644 --- a/include/asm-powerpc/kexec.h +++ b/include/asm-powerpc/kexec.h @@ -32,6 +32,7 @@ #endif #ifndef __ASSEMBLY__ +#include #ifdef CONFIG_KEXEC @@ -109,7 +110,6 @@ static inline void crash_setup_regs(struct pt_regs *newregs, #define MAX_NOTE_BYTES 1024 -#ifdef __powerpc64__ extern void kexec_smp_wait(void); /* get and clear naca physid, wait for master to copy new code to 0 */ extern int crashing_cpu; @@ -119,7 +119,6 @@ static inline int kexec_sr_activated(int cpu) { return cpu_isset(cpu,cpus_in_sr); } -#endif /* __powerpc64 __ */ struct kimage; struct pt_regs; -- cgit v1.2.3 From 5db9fa9593e2ff69f2b95f9d59229dc4faaa564d Mon Sep 17 00:00:00 2001 From: Nathan Lynch Date: Tue, 22 Aug 2006 20:36:05 -0500 Subject: [POWERPC] Fix gettimeofday inaccuracies There are two problems in the powerpc gettimeofday code which can cause incorrect results to be returned. The first is that there is a race between do_gettimeofday and the timer interrupt: 1. do_gettimeofday does get_tb() 2. decrementer exception on boot cpu which runs timer_recalc_offset, which also samples the timebase and updates the do_gtod structure with a greater timebase value. 3. do_gettimeofday calls __do_gettimeofday, which leads to the negative result from tb_val - temp_varp->tb_orig_stamp. The second is caused by taking the boot cpu offline, which can cause the value of tb_last_jiffy to be increased past the currently available timebase, causing the same underflow as above. [paulus@samba.org - define and use data_barrier() instead of mb().] Signed-off-by: Nathan Lynch Signed-off-by: Paul Mackerras --- arch/powerpc/kernel/time.c | 25 +++++++++++++++++-------- include/asm-powerpc/system.h | 9 +++++++++ 2 files changed, 26 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 774c0a3c5019..18e59e43d2b3 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c @@ -417,7 +417,7 @@ static __inline__ void timer_check_rtc(void) /* * This version of gettimeofday has microsecond resolution. */ -static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) +static inline void __do_gettimeofday(struct timeval *tv) { unsigned long sec, usec; u64 tb_ticks, xsec; @@ -431,7 +431,12 @@ static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) * without a divide (and in fact, without a multiply) */ temp_varp = do_gtod.varp; - tb_ticks = tb_val - temp_varp->tb_orig_stamp; + + /* Sampling the time base must be done after loading + * do_gtod.varp in order to avoid racing with update_gtod. + */ + data_barrier(temp_varp); + tb_ticks = get_tb() - temp_varp->tb_orig_stamp; temp_tb_to_xs = temp_varp->tb_to_xs; temp_stamp_xsec = temp_varp->stamp_xsec; xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs); @@ -464,7 +469,7 @@ void do_gettimeofday(struct timeval *tv) tv->tv_usec = usec; return; } - __do_gettimeofday(tv, get_tb()); + __do_gettimeofday(tv); } EXPORT_SYMBOL(do_gettimeofday); @@ -650,6 +655,7 @@ void timer_interrupt(struct pt_regs * regs) int next_dec; int cpu = smp_processor_id(); unsigned long ticks; + u64 tb_next_jiffy; #ifdef CONFIG_PPC32 if (atomic_read(&ppc_n_lost_interrupts) != 0) @@ -691,11 +697,14 @@ void timer_interrupt(struct pt_regs * regs) continue; write_seqlock(&xtime_lock); - tb_last_jiffy += tb_ticks_per_jiffy; - tb_last_stamp = per_cpu(last_jiffy, cpu); - do_timer(regs); - timer_recalc_offset(tb_last_jiffy); - timer_check_rtc(); + tb_next_jiffy = tb_last_jiffy + tb_ticks_per_jiffy; + if (per_cpu(last_jiffy, cpu) >= tb_next_jiffy) { + tb_last_jiffy = tb_next_jiffy; + tb_last_stamp = per_cpu(last_jiffy, cpu); + do_timer(regs); + timer_recalc_offset(tb_last_jiffy); + timer_check_rtc(); + } write_sequnlock(&xtime_lock); } diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index 7307aa775671..4c9f5229e833 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -53,6 +53,15 @@ #define smp_read_barrier_depends() do { } while(0) #endif /* CONFIG_SMP */ +/* + * This is a barrier which prevents following instructions from being + * started until the value of the argument x is known. For example, if + * x is a variable loaded from memory, this prevents following + * instructions from being executed until the load has been performed. + */ +#define data_barrier(x) \ + asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory"); + struct task_struct; struct pt_regs; -- cgit v1.2.3 From c4342ff92bed26f2e0e3543a9f0fdc5f3a29b8fd Mon Sep 17 00:00:00 2001 From: Zang Roy-r61911 Date: Wed, 23 Aug 2006 10:19:50 +0800 Subject: [POWERPC] Update mpc7448hpc2 board irq support using device tree The patch rewrites mpc7448hpc2 board irq support according to the new mpic device tree interface. Signed-off-by: Roy Zang Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 73 +++++-------- arch/powerpc/sysdev/tsi108_dev.c | 10 +- arch/powerpc/sysdev/tsi108_pci.c | 21 ++-- include/asm-powerpc/tsi108.h | 14 +-- include/asm-powerpc/tsi108_irq.h | 124 ++++++++++++++++++++++ 5 files changed, 174 insertions(+), 68 deletions(-) create mode 100644 include/asm-powerpc/tsi108_irq.h (limited to 'include') diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index d7a4fc7ca238..ed00ed2455dd 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c @@ -1,7 +1,7 @@ /* * mpc7448_hpc2.c * - * Board setup routines for the Freescale Taiga platform + * Board setup routines for the Freescale mpc7448hpc2(taiga) platform * * Author: Jacob Pan * jacob.pan@freescale.com @@ -12,10 +12,10 @@ * * Copyright 2004-2006 Freescale Semiconductor, Inc. * - * This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ #include @@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; extern int tsi108_setup_pci(struct device_node *dev); extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); extern void tsi108_pci_int_init(void); -extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); - -/* - * Define all of the IRQ senses and polarities. Taken from the - * mpc7448hpc manual. - * Note: Likely, this table and the following function should be - * obtained and derived from the OF Device Tree. - */ - -static u_char mpc7448_hpc2_pic_initsenses[] __initdata = { - /* External on-board sources */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */ - /* Internal Tsi108/109 interrupt sources */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */ - (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ - (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */ -}; +extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, + struct pt_regs *regs); int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) { @@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void) { struct mpic *mpic; phys_addr_t mpic_paddr = 0; + unsigned int cascade_pci_irq; + struct device_node *tsi_pci; struct device_node *tsi_pic; tsi_pic = of_find_node_by_type(NULL, "open-pic"); @@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void) DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, (u32) mpic_paddr); - mpic = mpic_alloc(mpic_paddr, + mpic = mpic_alloc(tsi_pic, mpic_paddr, MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), 0, /* num_sources used */ - TSI108_IRQ_BASE, 0, /* num_sources used */ - NR_IRQS - 4 /* XXXX */, - mpc7448_hpc2_pic_initsenses, - sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC"); + "Tsi108_PIC"); BUG_ON(mpic == NULL); /* XXXX */ - mpic_init(mpic); - mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); + + tsi_pci = of_find_node_by_type(NULL, "pci"); + if (tsi_pci == 0) { + printk("%s: No tsi108 pci node found !\n", __FUNCTION__); + return; + } + + cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); + set_irq_data(cascade_pci_irq, mpic); + set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); + tsi108_pci_int_init(); /* Configure MPIC outputs to CPU0 */ tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); + of_node_put(tsi_pic); } void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) @@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs) return 0; } + define_machine(mpc7448_hpc2){ .name = "MPC7448 HPC2", .probe = mpc7448_hpc2_probe, diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c index 26a0cc820cde..f3038461d4c0 100644 --- a/arch/powerpc/sysdev/tsi108_dev.c +++ b/arch/powerpc/sysdev/tsi108_dev.c @@ -93,13 +93,15 @@ static int __init tsi108_eth_of_init(void) goto err; r[1].name = "tx"; - r[1].start = np->intrs[0].line; - r[1].end = np->intrs[0].line; + r[1].start = irq_of_parse_and_map(np, 0); + r[1].end = irq_of_parse_and_map(np, 0); r[1].flags = IORESOURCE_IRQ; + DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n", + __FUNCTION__,r[1].name, r[1].start, r[1].end); tsi_eth_dev = platform_device_register_simple("tsi-ethernet", i, &r[0], - np->n_intrs + 1); + 1); if (IS_ERR(tsi_eth_dev)) { ret = PTR_ERR(tsi_eth_dev); @@ -127,7 +129,7 @@ static int __init tsi108_eth_of_init(void) tsi_eth_data.regs = r[0].start; tsi_eth_data.phyregs = res.start; tsi_eth_data.phy = *phy_id; - tsi_eth_data.irq_num = np->intrs[0].line; + tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0); of_node_put(phy); ret = platform_device_add_data(tsi_eth_dev, &tsi_eth_data, diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 3265d54c82ed..2ab06ed3ae73 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c @@ -26,7 +26,6 @@ #include #include - #include #include #include @@ -228,7 +227,7 @@ int __init tsi108_setup_pci(struct device_node *dev) (hose)->ops = &tsi108_direct_pci_ops; - printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. " + printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. " "Firmware bus number: %d->%d\n", rsrc.start, hose->first_busno, hose->last_busno); @@ -278,7 +277,7 @@ static void init_pci_source(void) mb(); } -static inline int get_pci_source(void) +static inline unsigned int get_pci_source(void) { u_int temp = 0; int irq = -1; @@ -371,12 +370,12 @@ static void tsi108_pci_irq_end(u_int irq) * Interrupt controller descriptor for cascaded PCI interrupt controller. */ -struct hw_interrupt_type tsi108_pci_irq = { +static struct irq_chip tsi108_pci_irq = { .typename = "tsi108_PCI_int", - .enable = tsi108_pci_irq_enable, - .disable = tsi108_pci_irq_disable, + .mask = tsi108_pci_irq_disable, .ack = tsi108_pci_irq_ack, .end = tsi108_pci_irq_end, + .unmask = tsi108_pci_irq_enable, }; /* @@ -399,14 +398,18 @@ void __init tsi108_pci_int_init(void) DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); for (i = 0; i < NUM_PCI_IRQS; i++) { - irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq; + irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq; irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; } init_pci_source(); } -int tsi108_irq_cascade(struct pt_regs *regs, void *unused) +void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, + struct pt_regs *regs) { - return get_pci_source(); + unsigned int cascade_irq = get_pci_source(); + if (cascade_irq != NO_IRQ) + generic_handle_irq(cascade_irq, regs); + desc->chip->eoi(irq); } diff --git a/include/asm-powerpc/tsi108.h b/include/asm-powerpc/tsi108.h index c4c278d72f71..2c702d35a7cf 100644 --- a/include/asm-powerpc/tsi108.h +++ b/include/asm-powerpc/tsi108.h @@ -1,16 +1,18 @@ /* - * include/asm-ppc/tsi108.h - * * common routine and memory layout for Tundra TSI108(Grendel) host bridge * memory controller. * * Author: Jacob Pan (jacob.pan@freescale.com) * Alex Bounine (alexandreb@tundra.com) - * 2004 (c) Freescale Semiconductor Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. + * + * Copyright 2004-2006 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ + #ifndef __PPC_KERNEL_TSI108_H #define __PPC_KERNEL_TSI108_H diff --git a/include/asm-powerpc/tsi108_irq.h b/include/asm-powerpc/tsi108_irq.h new file mode 100644 index 000000000000..3e4d04effa57 --- /dev/null +++ b/include/asm-powerpc/tsi108_irq.h @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2005 Tundra Semiconductor Corp. + * Alex Bounine, Date: Fri, 18 Aug 2006 11:22:21 -0700 Subject: [POWERPC] hugepage BUG fix On Tue, 2006-08-15 at 08:22 -0700, Dave Hansen wrote: > kernel BUG in cache_free_debugcheck at mm/slab.c:2748! Alright, this one is only triggered when slab debugging is enabled. The slabs are assumed to be aligned on a HUGEPTE_TABLE_SIZE boundary. The free path makes use of this assumption and uses the lowest nibble to pass around an index into an array of kmem_cache pointers. With slab debugging turned on, the slab is still aligned, but the "working" object pointer is not. This would break the assumption above that a full nibble is available for the PGF_CACHENUM_MASK. The following patch reduces PGF_CACHENUM_MASK to cover only the two least significant bits, which is enough to cover the current number of 4 pgtable cache types. Then use this constant to mask out the appropriate part of the huge pte pointer. Signed-off-by: Adam Litke Signed-off-by: Andrew Morton Signed-off-by: Paul Mackerras --- arch/powerpc/mm/hugetlbpage.c | 2 +- include/asm-powerpc/pgalloc.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index 266b8b2ceac9..5615acc29527 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c @@ -153,7 +153,7 @@ static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp) hpdp->pd = 0; tlb->need_flush = 1; pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, - HUGEPTE_TABLE_SIZE-1)); + PGF_CACHENUM_MASK)); } #ifdef CONFIG_PPC_64K_PAGES diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h index 9f0917c68659..ae63db7b3e7d 100644 --- a/include/asm-powerpc/pgalloc.h +++ b/include/asm-powerpc/pgalloc.h @@ -117,7 +117,7 @@ static inline void pte_free(struct page *ptepage) pte_free_kernel(page_address(ptepage)); } -#define PGF_CACHENUM_MASK 0xf +#define PGF_CACHENUM_MASK 0x3 typedef struct pgtable_free { unsigned long val; -- cgit v1.2.3 From 5dc599c206ad50e1b190edfbc98b7cf8ce361003 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Tue, 15 Aug 2006 16:19:02 -0500 Subject: [POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too. Signed-off-by: Jon Loeliger Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 9 +++++++-- arch/powerpc/platforms/86xx/pci.c | 3 ++- include/asm-powerpc/mpc86xx.h | 2 -- 3 files changed, 9 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 146da3001c67..813eb5811eb4 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c @@ -52,6 +52,7 @@ unsigned long pci_dram_offset = 0; #endif +#ifdef CONFIG_PCI static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) { @@ -60,14 +61,18 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc, generic_handle_irq(cascade_irq, regs); desc->chip->eoi(irq); } +#endif /* CONFIG_PCI */ void __init mpc86xx_hpcn_init_irq(void) { struct mpic *mpic1; - struct device_node *np, *cascade_node = NULL; - int cascade_irq; + struct device_node *np; phys_addr_t openpic_paddr; +#ifdef CONFIG_PCI + struct device_node *cascade_node = NULL; + int cascade_irq; +#endif np = of_find_node_by_type(NULL, "open-pic"); if (np == NULL) diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index bc5139043112..a8c8f0a44055 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c @@ -188,7 +188,8 @@ int __init add_bridge(struct device_node *dev) printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. " "Firmware bus number: %d->%d\n", - rsrc.start, hose->first_busno, hose->last_busno); + (unsigned long) rsrc.start, + hose->first_busno, hose->last_busno); DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", hose, hose->cfg_addr, hose->cfg_data); diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h index f260382739fa..2d6ad859df7f 100644 --- a/include/asm-powerpc/mpc86xx.h +++ b/include/asm-powerpc/mpc86xx.h @@ -23,8 +23,6 @@ #define _ISA_MEM_BASE isa_mem_base #ifdef CONFIG_PCI #define PCI_DRAM_OFFSET pci_dram_offset -#else -#define PCI_DRAM_OFFSET 0 #endif #define CPU0_BOOT_RELEASE 0x01000000 -- cgit v1.2.3 From c85c41ad73c6db4cf4cc98c595cc5e2fdbdb53d5 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Thu, 17 Aug 2006 14:27:57 -0500 Subject: [POWERPC] Use mpc8641hpcn PIC base address from dev tree. After going through the trouble of setting up the PIC base address in the pic@40000 device tree node, use it instead of the obsolete hard-coded value. Signed-off-by: Jon Loeliger Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 19 +++++++++---------- include/asm-powerpc/mpc86xx.h | 1 - 2 files changed, 9 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 813eb5811eb4..0b1b52168bb7 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c @@ -68,37 +68,36 @@ mpc86xx_hpcn_init_irq(void) { struct mpic *mpic1; struct device_node *np; - phys_addr_t openpic_paddr; + struct resource res; #ifdef CONFIG_PCI struct device_node *cascade_node = NULL; int cascade_irq; #endif + /* Determine PIC address. */ np = of_find_node_by_type(NULL, "open-pic"); if (np == NULL) return; - - /* Determine the Physical Address of the OpenPIC regs */ - openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET; + of_address_to_resource(np, 0, &res); /* Alloc mpic structure and per isu has 16 INT entries. */ - mpic1 = mpic_alloc(np, openpic_paddr, + mpic1 = mpic_alloc(np, res.start, MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 16, NR_IRQS - 4, " MPIC "); BUG_ON(mpic1 == NULL); - mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000); + mpic_assign_isu(mpic1, 0, res.start + 0x10000); /* 48 Internal Interrupts */ - mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200); - mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400); - mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600); + mpic_assign_isu(mpic1, 1, res.start + 0x10200); + mpic_assign_isu(mpic1, 2, res.start + 0x10400); + mpic_assign_isu(mpic1, 3, res.start + 0x10600); /* 16 External interrupts * Moving them from [0 - 15] to [64 - 79] */ - mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000); + mpic_assign_isu(mpic1, 4, res.start + 0x10000); mpic_init(mpic1); diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h index 2d6ad859df7f..b85df45b1a84 100644 --- a/include/asm-powerpc/mpc86xx.h +++ b/include/asm-powerpc/mpc86xx.h @@ -31,7 +31,6 @@ #define MCM_PORT_CONFIG_OFFSET 0x1010 /* Offset from CCSRBAR */ -#define MPC86xx_OPENPIC_OFFSET (0x40000) #define MPC86xx_MCM_OFFSET (0x00000) #define MPC86xx_MCM_SIZE (0x02000) -- cgit v1.2.3