From 86c82c8aeebf6db5df8ab73cec8333853c405070 Mon Sep 17 00:00:00 2001 From: Stanislav Lisovskiy Date: Wed, 24 Nov 2021 11:23:55 +0200 Subject: Revert "drm/i915/dg2: Tile 4 plane format support" Tile4 patch still needs an ack from userspace, IGT tests and some essential fixes, related to new .plane_caps attribute being added. This reverts commit 3c542cfa8266e3364938d055b3d548b7bed7f08e. Signed-off-by: Stanislav Lisovskiy Acked-by: Imre Deak Link: https://patchwork.freedesktop.org/patch/msgid/20211124092355.16668-1-stanislav.lisovskiy@intel.com --- include/uapi/drm/drm_fourcc.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include') diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 41184a94935d..7f652c96845b 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -564,14 +564,6 @@ extern "C" { * pitch is required to be a multiple of 4 tile widths. */ #define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8) -/* - * Intel F-tiling(aka Tile4) layout - * - * This is a tiled layout using 4Kb tiles in row-major layout. - * Within the tile pixels are laid out in 64 byte units / sub-tiles in OWORD - * (16 bytes) chunks column-major.. - */ -#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9) /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks -- cgit v1.2.3