From 4713ace3246644519bf93cc8ea6e44efe57fc3ec Mon Sep 17 00:00:00 2001 From: Ofir Bitton Date: Mon, 16 Jan 2023 19:56:23 +0200 Subject: accel/habanalabs: add support for TPC assert In order to allow TPC engines to raise an assert, we must expose the relevant MSIX interrupt to the user so he will configure the engine correctly. In addition, we implement the corresponding interrupt handler that will notify the user upon such an event. Signed-off-by: Ofir Bitton Reviewed-by: Oded Gabbay Signed-off-by: Oded Gabbay Reviewed-by: Stanislaw Gruszka --- include/uapi/drm/habanalabs_accel.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/uapi/drm/habanalabs_accel.h b/include/uapi/drm/habanalabs_accel.h index c1fdbb85d1d5..359b19ef3c3f 100644 --- a/include/uapi/drm/habanalabs_accel.h +++ b/include/uapi/drm/habanalabs_accel.h @@ -885,6 +885,7 @@ enum hl_server_type { * application to use. Relevant for Gaudi2 and later. * @device_mem_alloc_default_page_size: default page size used in device memory allocation. * @revision_id: PCI revision ID of the ASIC. + * @tpc_interrupt_id: interrupt id for TPC to use in order to raise events towards the host. * @engine_core_interrupt_reg_addr: interrupt register address for engine core to use * in order to raise events toward FW. */ @@ -922,7 +923,7 @@ struct hl_info_hw_ip_info { __u32 reserved7; __u8 reserved8; __u8 revision_id; - __u8 pad[2]; + __u16 tpc_interrupt_id; __u32 reserved9; __u8 pad3[4]; __u64 engine_core_interrupt_reg_addr; -- cgit v1.2.3