From 5927467d0ca274bc3b8eed9fd5db964bbde56e1c Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 23 Apr 2013 19:44:16 +0100 Subject: mfd: arizona: Support use of external DCVDD When the device is used with an external DCVDD supply instead of the internal LDO1 then an extra step is required when suspending and resuming the device. Signed-off-by: Mark Brown --- include/linux/mfd/arizona/core.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/linux') diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index cc281368dc55..f797bb9b8b56 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -95,6 +95,8 @@ struct arizona { struct arizona_pdata pdata; + unsigned int external_dcvdd:1; + int irq; struct irq_domain *virq; struct regmap_irq_chip_data *aod_irq_chip; -- cgit v1.2.3 From 435705e89265dec3c641fe75deb748f05e232e59 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 20 May 2013 11:16:10 -0500 Subject: ASoC: wm8994: Handle LRCLK inversion for WM8958 and WM1811A On WM8958 and WM1811A separate control of the LRCLK inversion bit is available for the DAC and ADC LRCLKs which for compatibility reasons is done in a new register bit. Since writes to each scheme have no effect on parts using the other just always write to both for simplicity. Signed-off-by: Mark Brown Acked-by: Vinod Koul Tested-by: Samreen Nilofer --- include/linux/mfd/wm8994/registers.h | 8 ++++++++ sound/soc/codecs/wm8994.c | 14 ++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'include/linux') diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index 053548961c15..db8cef3d5321 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h @@ -2668,6 +2668,10 @@ /* * R772 (0x304) - AIF1ADC LRCLK */ +#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ #define WM8994_AIF1ADC_LRCLK_DIR 0x0800 /* AIF1ADC_LRCLK_DIR */ #define WM8994_AIF1ADC_LRCLK_DIR_MASK 0x0800 /* AIF1ADC_LRCLK_DIR */ #define WM8994_AIF1ADC_LRCLK_DIR_SHIFT 11 /* AIF1ADC_LRCLK_DIR */ @@ -2679,6 +2683,10 @@ /* * R773 (0x305) - AIF1DAC LRCLK */ +#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ #define WM8994_AIF1DAC_LRCLK_DIR 0x0800 /* AIF1DAC_LRCLK_DIR */ #define WM8994_AIF1DAC_LRCLK_DIR_MASK 0x0800 /* AIF1DAC_LRCLK_DIR */ #define WM8994_AIF1DAC_LRCLK_DIR_SHIFT 11 /* AIF1DAC_LRCLK_DIR */ diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 303d755b9342..f1c54af45dcf 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -2574,17 +2574,24 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) struct wm8994 *control = wm8994->wm8994; int ms_reg; int aif1_reg; + int dac_reg; + int adc_reg; int ms = 0; int aif1 = 0; + int lrclk = 0; switch (dai->id) { case 1: ms_reg = WM8994_AIF1_MASTER_SLAVE; aif1_reg = WM8994_AIF1_CONTROL_1; + dac_reg = WM8994_AIF1DAC_LRCLK; + adc_reg = WM8994_AIF1ADC_LRCLK; break; case 2: ms_reg = WM8994_AIF2_MASTER_SLAVE; aif1_reg = WM8994_AIF2_CONTROL_1; + dac_reg = WM8994_AIF1DAC_LRCLK; + adc_reg = WM8994_AIF1ADC_LRCLK; break; default: return -EINVAL; @@ -2603,6 +2610,7 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { case SND_SOC_DAIFMT_DSP_B: aif1 |= WM8994_AIF1_LRCLK_INV; + lrclk |= WM8958_AIF1_LRCLK_INV; case SND_SOC_DAIFMT_DSP_A: aif1 |= 0x18; break; @@ -2641,12 +2649,14 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) break; case SND_SOC_DAIFMT_IB_IF: aif1 |= WM8994_AIF1_BCLK_INV | WM8994_AIF1_LRCLK_INV; + lrclk |= WM8958_AIF1_LRCLK_INV; break; case SND_SOC_DAIFMT_IB_NF: aif1 |= WM8994_AIF1_BCLK_INV; break; case SND_SOC_DAIFMT_NB_IF: aif1 |= WM8994_AIF1_LRCLK_INV; + lrclk |= WM8958_AIF1_LRCLK_INV; break; default: return -EINVAL; @@ -2677,6 +2687,10 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) aif1); snd_soc_update_bits(codec, ms_reg, WM8994_AIF1_MSTR, ms); + snd_soc_update_bits(codec, dac_reg, + WM8958_AIF1_LRCLK_INV, lrclk); + snd_soc_update_bits(codec, adc_reg, + WM8958_AIF1_LRCLK_INV, lrclk); return 0; } -- cgit v1.2.3 From f773fc6dca4619bdf8da767eaba101a83b766059 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 21 May 2013 14:56:58 +0100 Subject: mfd: arizona: Change fast_start pdata name to better reflect functionality The bit in the register enables MICBIAS fast startup when clear not when set. This patch changes the name of this pdata option to soft_start to better match the functionality. We rename rather than invert the handling to keep the same default functionality, which is fast start active. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown --- drivers/mfd/arizona-core.c | 2 +- include/linux/mfd/arizona/pdata.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux') diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 437f199fe5f2..74b4481754fd 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -860,7 +860,7 @@ int arizona_dev_init(struct arizona *arizona) if (arizona->pdata.micbias[i].discharge) val |= ARIZONA_MICB1_DISCH; - if (arizona->pdata.micbias[i].fast_start) + if (arizona->pdata.micbias[i].soft_start) val |= ARIZONA_MICB1_RATE; if (arizona->pdata.micbias[i].bypass) diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 80dead1f7100..12a5c135c746 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -77,7 +77,7 @@ struct arizona_micbias { int mV; /** Regulated voltage */ unsigned int ext_cap:1; /** External capacitor fitted */ unsigned int discharge:1; /** Actively discharge */ - unsigned int fast_start:1; /** Enable aggressive startup ramp rate */ + unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ unsigned int bypass:1; /** Use bypass mode */ }; -- cgit v1.2.3 From e5657054ff508c9e547a8ceb931de07838ee3ba0 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 22 May 2013 18:55:25 -0500 Subject: mfd: wm5110: Make DSPn_STATUS_3 readable These registers have been documented since the driver was originally submitted so expose them. Signed-off-by: Mark Brown --- drivers/mfd/wm5110-tables.c | 8 ++++++++ include/linux/mfd/arizona/registers.h | 3 +++ 2 files changed, 11 insertions(+) (limited to 'include/linux') diff --git a/drivers/mfd/wm5110-tables.c b/drivers/mfd/wm5110-tables.c index c41599815299..2a7972349159 100644 --- a/drivers/mfd/wm5110-tables.c +++ b/drivers/mfd/wm5110-tables.c @@ -2273,18 +2273,22 @@ static bool wm5110_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: + case ARIZONA_DSP1_STATUS_3: case ARIZONA_DSP2_CONTROL_1: case ARIZONA_DSP2_CLOCKING_1: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: case ARIZONA_DSP3_CONTROL_1: case ARIZONA_DSP3_CLOCKING_1: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: case ARIZONA_DSP4_CONTROL_1: case ARIZONA_DSP4_CLOCKING_1: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: + case ARIZONA_DSP4_STATUS_3: return true; default: return false; @@ -2334,12 +2338,16 @@ static bool wm5110_volatile_register(struct device *dev, unsigned int reg) case ARIZONA_DSP1_CLOCKING_1: case ARIZONA_DSP1_STATUS_1: case ARIZONA_DSP1_STATUS_2: + case ARIZONA_DSP1_STATUS_3: case ARIZONA_DSP2_STATUS_1: case ARIZONA_DSP2_STATUS_2: + case ARIZONA_DSP2_STATUS_3: case ARIZONA_DSP3_STATUS_1: case ARIZONA_DSP3_STATUS_2: + case ARIZONA_DSP3_STATUS_3: case ARIZONA_DSP4_STATUS_1: case ARIZONA_DSP4_STATUS_2: + case ARIZONA_DSP4_STATUS_3: return true; default: return false; diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 715b6ba3d52a..4730b5c576e2 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1002,6 +1002,7 @@ #define ARIZONA_DSP2_CLOCKING_1 0x1201 #define ARIZONA_DSP2_STATUS_1 0x1204 #define ARIZONA_DSP2_STATUS_2 0x1205 +#define ARIZONA_DSP2_STATUS_3 0x1206 #define ARIZONA_DSP2_SCRATCH_0 0x1240 #define ARIZONA_DSP2_SCRATCH_1 0x1241 #define ARIZONA_DSP2_SCRATCH_2 0x1242 @@ -1010,6 +1011,7 @@ #define ARIZONA_DSP3_CLOCKING_1 0x1301 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 +#define ARIZONA_DSP3_STATUS_3 0x1306 #define ARIZONA_DSP3_SCRATCH_0 0x1340 #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 @@ -1018,6 +1020,7 @@ #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 #define ARIZONA_DSP4_STATUS_2 0x1405 +#define ARIZONA_DSP4_STATUS_3 0x1406 #define ARIZONA_DSP4_SCRATCH_0 0x1440 #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 -- cgit v1.2.3 From b6b5e76bb8bb22ecff90a7840dc4845d63328289 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 23 May 2013 20:14:50 +0200 Subject: ASoC: Add ssm2518 support This patch adds a ASoC CODEC driver for the SSM2516. The SSM2516 is a stereo Class-D audio amplifier with an I2S interface for audio in and a built-in dynamic range control processor. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown --- .../devicetree/bindings/sound/ssm2518.txt | 20 + include/linux/platform_data/ssm2518.h | 22 + sound/soc/codecs/Kconfig | 4 + sound/soc/codecs/Makefile | 2 + sound/soc/codecs/ssm2518.c | 856 +++++++++++++++++++++ sound/soc/codecs/ssm2518.h | 20 + 6 files changed, 924 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ssm2518.txt create mode 100644 include/linux/platform_data/ssm2518.h create mode 100644 sound/soc/codecs/ssm2518.c create mode 100644 sound/soc/codecs/ssm2518.h (limited to 'include/linux') diff --git a/Documentation/devicetree/bindings/sound/ssm2518.txt b/Documentation/devicetree/bindings/sound/ssm2518.txt new file mode 100644 index 000000000000..59381a778c79 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ssm2518.txt @@ -0,0 +1,20 @@ +SSM2518 audio amplifier + +This device supports I2C only. + +Required properties: + - compatible : Must be "adi,ssm2518" + - reg : the I2C address of the device. This will either be 0x34 (ADDR pin low) + or 0x35 (ADDR pin high) + +Optional properties: + - gpios : GPIO connected to the nSD pin. If the property is not present it is + assumed that the nSD pin is hardwired to always on. + +Example: + + ssm2518: ssm2518@34 { + compatible = "adi,ssm2518"; + reg = <0x34>; + gpios = <&gpio 5 0>; + }; diff --git a/include/linux/platform_data/ssm2518.h b/include/linux/platform_data/ssm2518.h new file mode 100644 index 000000000000..9a8e3ea287e3 --- /dev/null +++ b/include/linux/platform_data/ssm2518.h @@ -0,0 +1,22 @@ +/* + * SSM2518 amplifier audio driver + * + * Copyright 2013 Analog Devices Inc. + * Author: Lars-Peter Clausen + * + * Licensed under the GPL-2. + */ + +#ifndef __LINUX_PLATFORM_DATA_SSM2518_H__ +#define __LINUX_PLATFORM_DATA_SSM2518_H__ + +/** + * struct ssm2518_platform_data - Platform data for the ssm2518 driver + * @enable_gpio: GPIO connected to the nSD pin. Set to -1 if the nSD pin is + * hardwired. + */ +struct ssm2518_platform_data { + int enable_gpio; +}; + +#endif diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 2f45f00e31b0..d76609adb85b 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig @@ -60,6 +60,7 @@ config SND_SOC_ALL_CODECS select SND_SOC_SI476X if MFD_SI476X_CORE select SND_SOC_SN95031 if INTEL_SCU_IPC select SND_SOC_SPDIF + select SND_SOC_SSM2518 if I2C select SND_SOC_SSM2602 if SND_SOC_I2C_AND_SPI select SND_SOC_STA32X if I2C select SND_SOC_STA529 if I2C @@ -313,6 +314,9 @@ config SND_SOC_SN95031 config SND_SOC_SPDIF tristate +config SND_SOC_SSM2518 + tristate + config SND_SOC_SSM2602 tristate diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index b9e41c9a1f4c..d85be48a6c07 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile @@ -52,6 +52,7 @@ snd-soc-si476x-objs := si476x.o snd-soc-sn95031-objs := sn95031.o snd-soc-spdif-tx-objs := spdif_transciever.o snd-soc-spdif-rx-objs := spdif_receiver.o +snd-soc-ssm2518-objs := ssm2518.o snd-soc-ssm2602-objs := ssm2602.o snd-soc-sta32x-objs := sta32x.o snd-soc-sta529-objs := sta529.o @@ -176,6 +177,7 @@ obj-$(CONFIG_SND_SOC_SIGMADSP) += snd-soc-sigmadsp.o obj-$(CONFIG_SND_SOC_SI476X) += snd-soc-si476x.o obj-$(CONFIG_SND_SOC_SN95031) +=snd-soc-sn95031.o obj-$(CONFIG_SND_SOC_SPDIF) += snd-soc-spdif-rx.o snd-soc-spdif-tx.o +obj-$(CONFIG_SND_SOC_SSM2518) += snd-soc-ssm2518.o obj-$(CONFIG_SND_SOC_SSM2602) += snd-soc-ssm2602.o obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o diff --git a/sound/soc/codecs/ssm2518.c b/sound/soc/codecs/ssm2518.c new file mode 100644 index 000000000000..3139a1bde295 --- /dev/null +++ b/sound/soc/codecs/ssm2518.c @@ -0,0 +1,856 @@ +/* + * SSM2518 amplifier audio driver + * + * Copyright 2013 Analog Devices Inc. + * Author: Lars-Peter Clausen + * + * Licensed under the GPL-2. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "ssm2518.h" + +#define SSM2518_REG_POWER1 0x00 +#define SSM2518_REG_CLOCK 0x01 +#define SSM2518_REG_SAI_CTRL1 0x02 +#define SSM2518_REG_SAI_CTRL2 0x03 +#define SSM2518_REG_CHAN_MAP 0x04 +#define SSM2518_REG_LEFT_VOL 0x05 +#define SSM2518_REG_RIGHT_VOL 0x06 +#define SSM2518_REG_MUTE_CTRL 0x07 +#define SSM2518_REG_FAULT_CTRL 0x08 +#define SSM2518_REG_POWER2 0x09 +#define SSM2518_REG_DRC_1 0x0a +#define SSM2518_REG_DRC_2 0x0b +#define SSM2518_REG_DRC_3 0x0c +#define SSM2518_REG_DRC_4 0x0d +#define SSM2518_REG_DRC_5 0x0e +#define SSM2518_REG_DRC_6 0x0f +#define SSM2518_REG_DRC_7 0x10 +#define SSM2518_REG_DRC_8 0x11 +#define SSM2518_REG_DRC_9 0x12 + +#define SSM2518_POWER1_RESET BIT(7) +#define SSM2518_POWER1_NO_BCLK BIT(5) +#define SSM2518_POWER1_MCS_MASK (0xf << 1) +#define SSM2518_POWER1_MCS_64FS (0x0 << 1) +#define SSM2518_POWER1_MCS_128FS (0x1 << 1) +#define SSM2518_POWER1_MCS_256FS (0x2 << 1) +#define SSM2518_POWER1_MCS_384FS (0x3 << 1) +#define SSM2518_POWER1_MCS_512FS (0x4 << 1) +#define SSM2518_POWER1_MCS_768FS (0x5 << 1) +#define SSM2518_POWER1_MCS_100FS (0x6 << 1) +#define SSM2518_POWER1_MCS_200FS (0x7 << 1) +#define SSM2518_POWER1_MCS_400FS (0x8 << 1) +#define SSM2518_POWER1_SPWDN BIT(0) + +#define SSM2518_CLOCK_ASR BIT(0) + +#define SSM2518_SAI_CTRL1_FMT_MASK (0x3 << 5) +#define SSM2518_SAI_CTRL1_FMT_I2S (0x0 << 5) +#define SSM2518_SAI_CTRL1_FMT_LJ (0x1 << 5) +#define SSM2518_SAI_CTRL1_FMT_RJ_24BIT (0x2 << 5) +#define SSM2518_SAI_CTRL1_FMT_RJ_16BIT (0x3 << 5) + +#define SSM2518_SAI_CTRL1_SAI_MASK (0x7 << 2) +#define SSM2518_SAI_CTRL1_SAI_I2S (0x0 << 2) +#define SSM2518_SAI_CTRL1_SAI_TDM_2 (0x1 << 2) +#define SSM2518_SAI_CTRL1_SAI_TDM_4 (0x2 << 2) +#define SSM2518_SAI_CTRL1_SAI_TDM_8 (0x3 << 2) +#define SSM2518_SAI_CTRL1_SAI_TDM_16 (0x4 << 2) +#define SSM2518_SAI_CTRL1_SAI_MONO (0x5 << 2) + +#define SSM2518_SAI_CTRL1_FS_MASK (0x3) +#define SSM2518_SAI_CTRL1_FS_8000_12000 (0x0) +#define SSM2518_SAI_CTRL1_FS_16000_24000 (0x1) +#define SSM2518_SAI_CTRL1_FS_32000_48000 (0x2) +#define SSM2518_SAI_CTRL1_FS_64000_96000 (0x3) + +#define SSM2518_SAI_CTRL2_BCLK_INTERAL BIT(7) +#define SSM2518_SAI_CTRL2_LRCLK_PULSE BIT(6) +#define SSM2518_SAI_CTRL2_LRCLK_INVERT BIT(5) +#define SSM2518_SAI_CTRL2_MSB BIT(4) +#define SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK (0x3 << 2) +#define SSM2518_SAI_CTRL2_SLOT_WIDTH_32 (0x0 << 2) +#define SSM2518_SAI_CTRL2_SLOT_WIDTH_24 (0x1 << 2) +#define SSM2518_SAI_CTRL2_SLOT_WIDTH_16 (0x2 << 2) +#define SSM2518_SAI_CTRL2_BCLK_INVERT BIT(1) + +#define SSM2518_CHAN_MAP_RIGHT_SLOT_OFFSET 4 +#define SSM2518_CHAN_MAP_RIGHT_SLOT_MASK 0xf0 +#define SSM2518_CHAN_MAP_LEFT_SLOT_OFFSET 0 +#define SSM2518_CHAN_MAP_LEFT_SLOT_MASK 0x0f + +#define SSM2518_MUTE_CTRL_ANA_GAIN BIT(5) +#define SSM2518_MUTE_CTRL_MUTE_MASTER BIT(0) + +#define SSM2518_POWER2_APWDN BIT(0) + +#define SSM2518_DAC_MUTE BIT(6) +#define SSM2518_DAC_FS_MASK 0x07 +#define SSM2518_DAC_FS_8000 0x00 +#define SSM2518_DAC_FS_16000 0x01 +#define SSM2518_DAC_FS_32000 0x02 +#define SSM2518_DAC_FS_64000 0x03 +#define SSM2518_DAC_FS_128000 0x04 + +struct ssm2518 { + struct regmap *regmap; + bool right_j; + + unsigned int sysclk; + const struct snd_pcm_hw_constraint_list *constraints; + + int enable_gpio; +}; + +static const struct reg_default ssm2518_reg_defaults[] = { + { 0x00, 0x05 }, + { 0x01, 0x00 }, + { 0x02, 0x02 }, + { 0x03, 0x00 }, + { 0x04, 0x10 }, + { 0x05, 0x40 }, + { 0x06, 0x40 }, + { 0x07, 0x81 }, + { 0x08, 0x0c }, + { 0x09, 0x99 }, + { 0x0a, 0x7c }, + { 0x0b, 0x5b }, + { 0x0c, 0x57 }, + { 0x0d, 0x89 }, + { 0x0e, 0x8c }, + { 0x0f, 0x77 }, + { 0x10, 0x26 }, + { 0x11, 0x1c }, + { 0x12, 0x97 }, +}; + +static const DECLARE_TLV_DB_MINMAX_MUTE(ssm2518_vol_tlv, -7125, 2400); +static const DECLARE_TLV_DB_SCALE(ssm2518_compressor_tlv, -3400, 200, 0); +static const DECLARE_TLV_DB_SCALE(ssm2518_expander_tlv, -8100, 300, 0); +static const DECLARE_TLV_DB_SCALE(ssm2518_noise_gate_tlv, -9600, 300, 0); +static const DECLARE_TLV_DB_SCALE(ssm2518_post_drc_tlv, -2400, 300, 0); + +static const DECLARE_TLV_DB_RANGE(ssm2518_limiter_tlv, + 0, 7, TLV_DB_SCALE_ITEM(-2200, 200, 0), + 7, 15, TLV_DB_SCALE_ITEM(-800, 100, 0), +); + +static const char * const ssm2518_drc_peak_detector_attack_time_text[] = { + "0 ms", "0.1 ms", "0.19 ms", "0.37 ms", "0.75 ms", "1.5 ms", "3 ms", + "6 ms", "12 ms", "24 ms", "48 ms", "96 ms", "192 ms", "384 ms", + "768 ms", "1536 ms", +}; + +static const char * const ssm2518_drc_peak_detector_release_time_text[] = { + "0 ms", "1.5 ms", "3 ms", "6 ms", "12 ms", "24 ms", "48 ms", "96 ms", + "192 ms", "384 ms", "768 ms", "1536 ms", "3072 ms", "6144 ms", + "12288 ms", "24576 ms" +}; + +static const char * const ssm2518_drc_hold_time_text[] = { + "0 ms", "0.67 ms", "1.33 ms", "2.67 ms", "5.33 ms", "10.66 ms", + "21.32 ms", "42.64 ms", "85.28 ms", "170.56 ms", "341.12 ms", + "682.24 ms", "1364 ms", +}; + +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_peak_detector_attack_time_enum, + SSM2518_REG_DRC_2, 4, ssm2518_drc_peak_detector_attack_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_peak_detector_release_time_enum, + SSM2518_REG_DRC_2, 0, ssm2518_drc_peak_detector_release_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_attack_time_enum, + SSM2518_REG_DRC_6, 4, ssm2518_drc_peak_detector_attack_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_decay_time_enum, + SSM2518_REG_DRC_6, 0, ssm2518_drc_peak_detector_release_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_hold_time_enum, + SSM2518_REG_DRC_7, 4, ssm2518_drc_hold_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_noise_gate_hold_time_enum, + SSM2518_REG_DRC_7, 0, ssm2518_drc_hold_time_text); +static const SOC_ENUM_SINGLE_DECL(ssm2518_drc_rms_averaging_time_enum, + SSM2518_REG_DRC_9, 0, ssm2518_drc_peak_detector_release_time_text); + +static const struct snd_kcontrol_new ssm2518_snd_controls[] = { + SOC_SINGLE("Playback De-emphasis Switch", SSM2518_REG_MUTE_CTRL, + 4, 1, 0), + SOC_DOUBLE_R_TLV("Master Playback Volume", SSM2518_REG_LEFT_VOL, + SSM2518_REG_RIGHT_VOL, 0, 0xff, 1, ssm2518_vol_tlv), + SOC_DOUBLE("Master Playback Switch", SSM2518_REG_MUTE_CTRL, 2, 1, 1, 1), + + SOC_SINGLE("Amp Low Power Mode Switch", SSM2518_REG_POWER2, 4, 1, 0), + SOC_SINGLE("DAC Low Power Mode Switch", SSM2518_REG_POWER2, 3, 1, 0), + + SOC_SINGLE("DRC Limiter Switch", SSM2518_REG_DRC_1, 5, 1, 0), + SOC_SINGLE("DRC Compressor Switch", SSM2518_REG_DRC_1, 4, 1, 0), + SOC_SINGLE("DRC Expander Switch", SSM2518_REG_DRC_1, 3, 1, 0), + SOC_SINGLE("DRC Noise Gate Switch", SSM2518_REG_DRC_1, 2, 1, 0), + SOC_DOUBLE("DRC Switch", SSM2518_REG_DRC_1, 0, 1, 1, 0), + + SOC_SINGLE_TLV("DRC Limiter Threshold Volume", + SSM2518_REG_DRC_3, 4, 15, 1, ssm2518_limiter_tlv), + SOC_SINGLE_TLV("DRC Compressor Lower Threshold Volume", + SSM2518_REG_DRC_3, 0, 15, 1, ssm2518_compressor_tlv), + SOC_SINGLE_TLV("DRC Expander Upper Threshold Volume", SSM2518_REG_DRC_4, + 4, 15, 1, ssm2518_expander_tlv), + SOC_SINGLE_TLV("DRC Noise Gate Threshold Volume", + SSM2518_REG_DRC_4, 0, 15, 1, ssm2518_noise_gate_tlv), + SOC_SINGLE_TLV("DRC Upper Output Threshold Volume", + SSM2518_REG_DRC_5, 4, 15, 1, ssm2518_limiter_tlv), + SOC_SINGLE_TLV("DRC Lower Output Threshold Volume", + SSM2518_REG_DRC_5, 0, 15, 1, ssm2518_noise_gate_tlv), + SOC_SINGLE_TLV("DRC Post Volume", SSM2518_REG_DRC_8, + 2, 15, 1, ssm2518_post_drc_tlv), + + SOC_ENUM("DRC Peak Detector Attack Time", + ssm2518_drc_peak_detector_attack_time_enum), + SOC_ENUM("DRC Peak Detector Release Time", + ssm2518_drc_peak_detector_release_time_enum), + SOC_ENUM("DRC Attack Time", ssm2518_drc_attack_time_enum), + SOC_ENUM("DRC Decay Time", ssm2518_drc_decay_time_enum), + SOC_ENUM("DRC Hold Time", ssm2518_drc_hold_time_enum), + SOC_ENUM("DRC Noise Gate Hold Time", + ssm2518_drc_noise_gate_hold_time_enum), + SOC_ENUM("DRC RMS Averaging Time", ssm2518_drc_rms_averaging_time_enum), +}; + +static const struct snd_soc_dapm_widget ssm2518_dapm_widgets[] = { + SND_SOC_DAPM_DAC("DACL", "HiFi Playback", SSM2518_REG_POWER2, 1, 1), + SND_SOC_DAPM_DAC("DACR", "HiFi Playback", SSM2518_REG_POWER2, 2, 1), + + SND_SOC_DAPM_OUTPUT("OUTL"), + SND_SOC_DAPM_OUTPUT("OUTR"), +}; + +static const struct snd_soc_dapm_route ssm2518_routes[] = { + { "OUTL", NULL, "DACL" }, + { "OUTR", NULL, "DACR" }, +}; + +struct ssm2518_mcs_lut { + unsigned int rate; + const unsigned int *sysclks; +}; + +static const unsigned int ssm2518_sysclks_2048000[] = { + 2048000, 4096000, 8192000, 12288000, 16384000, 24576000, + 3200000, 6400000, 12800000, 0 +}; + +static const unsigned int ssm2518_sysclks_2822000[] = { + 2822000, 5644800, 11289600, 16934400, 22579200, 33868800, + 4410000, 8820000, 17640000, 0 +}; + +static const unsigned int ssm2518_sysclks_3072000[] = { + 3072000, 6144000, 12288000, 16384000, 24576000, 38864000, + 4800000, 9600000, 19200000, 0 +}; + +static const struct ssm2518_mcs_lut ssm2518_mcs_lut[] = { + { 8000, ssm2518_sysclks_2048000, }, + { 11025, ssm2518_sysclks_2822000, }, + { 12000, ssm2518_sysclks_3072000, }, + { 16000, ssm2518_sysclks_2048000, }, + { 24000, ssm2518_sysclks_3072000, }, + { 22050, ssm2518_sysclks_2822000, }, + { 32000, ssm2518_sysclks_2048000, }, + { 44100, ssm2518_sysclks_2822000, }, + { 48000, ssm2518_sysclks_3072000, }, + { 96000, ssm2518_sysclks_3072000, }, +}; + +static const unsigned int ssm2518_rates_2048000[] = { + 8000, 16000, 32000, +}; + +static const struct snd_pcm_hw_constraint_list ssm2518_constraints_2048000 = { + .list = ssm2518_rates_2048000, + .count = ARRAY_SIZE(ssm2518_rates_2048000), +}; + +static const unsigned int ssm2518_rates_2822000[] = { + 11025, 22050, 44100, +}; + +static const struct snd_pcm_hw_constraint_list ssm2518_constraints_2822000 = { + .list = ssm2518_rates_2822000, + .count = ARRAY_SIZE(ssm2518_rates_2822000), +}; + +static const unsigned int ssm2518_rates_3072000[] = { + 12000, 24000, 48000, 96000, +}; + +static const struct snd_pcm_hw_constraint_list ssm2518_constraints_3072000 = { + .list = ssm2518_rates_3072000, + .count = ARRAY_SIZE(ssm2518_rates_3072000), +}; + +static const unsigned int ssm2518_rates_12288000[] = { + 8000, 12000, 16000, 24000, 32000, 48000, 96000, +}; + +static const struct snd_pcm_hw_constraint_list ssm2518_constraints_12288000 = { + .list = ssm2518_rates_12288000, + .count = ARRAY_SIZE(ssm2518_rates_12288000), +}; + +static unsigned int ssm2518_lookup_mcs(struct ssm2518 *ssm2518, + unsigned int rate) +{ + const unsigned int *sysclks = NULL; + int i; + + for (i = 0; i < ARRAY_SIZE(ssm2518_mcs_lut); i++) { + if (ssm2518_mcs_lut[i].rate == rate) { + sysclks = ssm2518_mcs_lut[i].sysclks; + break; + } + } + + if (!sysclks) + return -EINVAL; + + for (i = 0; sysclks[i]; i++) { + if (sysclks[i] == ssm2518->sysclk) + return i; + } + + return -EINVAL; +} + +static int ssm2518_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) +{ + struct snd_soc_codec *codec = dai->codec; + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec); + unsigned int rate = params_rate(params); + unsigned int ctrl1, ctrl1_mask; + int mcs; + int ret; + + mcs = ssm2518_lookup_mcs(ssm2518, rate); + if (mcs < 0) + return mcs; + + ctrl1_mask = SSM2518_SAI_CTRL1_FS_MASK; + + if (rate >= 8000 && rate <= 12000) + ctrl1 = SSM2518_SAI_CTRL1_FS_8000_12000; + else if (rate >= 16000 && rate <= 24000) + ctrl1 = SSM2518_SAI_CTRL1_FS_16000_24000; + else if (rate >= 32000 && rate <= 48000) + ctrl1 = SSM2518_SAI_CTRL1_FS_32000_48000; + else if (rate >= 64000 && rate <= 96000) + ctrl1 = SSM2518_SAI_CTRL1_FS_64000_96000; + else + return -EINVAL; + + if (ssm2518->right_j) { + switch (params_format(params)) { + case SNDRV_PCM_FORMAT_S16_LE: + ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_16BIT; + break; + case SNDRV_PCM_FORMAT_S24_LE: + ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_24BIT; + break; + default: + return -EINVAL; + } + ctrl1_mask |= SSM2518_SAI_CTRL1_FMT_MASK; + } + + /* Disable auto samplerate detection */ + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_CLOCK, + SSM2518_CLOCK_ASR, SSM2518_CLOCK_ASR); + if (ret < 0) + return ret; + + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL1, + ctrl1_mask, ctrl1); + if (ret < 0) + return ret; + + return regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1, + SSM2518_POWER1_MCS_MASK, mcs << 1); +} + +static int ssm2518_mute(struct snd_soc_dai *dai, int mute) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec); + unsigned int val; + + if (mute) + val = SSM2518_MUTE_CTRL_MUTE_MASTER; + else + val = 0; + + return regmap_update_bits(ssm2518->regmap, SSM2518_REG_MUTE_CTRL, + SSM2518_MUTE_CTRL_MUTE_MASTER, val); +} + +static int ssm2518_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec); + unsigned int ctrl1 = 0, ctrl2 = 0; + bool invert_fclk; + int ret; + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBS_CFS: + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + invert_fclk = false; + break; + case SND_SOC_DAIFMT_IB_NF: + ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT; + invert_fclk = false; + break; + case SND_SOC_DAIFMT_NB_IF: + invert_fclk = true; + break; + case SND_SOC_DAIFMT_IB_IF: + ctrl2 |= SSM2518_SAI_CTRL2_BCLK_INVERT; + invert_fclk = true; + break; + default: + return -EINVAL; + } + + ssm2518->right_j = false; + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + ctrl1 |= SSM2518_SAI_CTRL1_FMT_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + ctrl1 |= SSM2518_SAI_CTRL1_FMT_LJ; + invert_fclk = !invert_fclk; + break; + case SND_SOC_DAIFMT_RIGHT_J: + ctrl1 |= SSM2518_SAI_CTRL1_FMT_RJ_24BIT; + ssm2518->right_j = true; + invert_fclk = !invert_fclk; + break; + case SND_SOC_DAIFMT_DSP_A: + ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE; + ctrl1 |= SSM2518_SAI_CTRL1_FMT_I2S; + invert_fclk = false; + break; + case SND_SOC_DAIFMT_DSP_B: + ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_PULSE; + ctrl1 |= SSM2518_SAI_CTRL1_FMT_LJ; + invert_fclk = false; + break; + default: + return -EINVAL; + } + + if (invert_fclk) + ctrl2 |= SSM2518_SAI_CTRL2_LRCLK_INVERT; + + ret = regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL1, ctrl1); + if (ret) + return ret; + + return regmap_write(ssm2518->regmap, SSM2518_REG_SAI_CTRL2, ctrl2); +} + +static int ssm2518_set_power(struct ssm2518 *ssm2518, bool enable) +{ + int ret = 0; + + if (!enable) { + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1, + SSM2518_POWER1_SPWDN, SSM2518_POWER1_SPWDN); + regcache_mark_dirty(ssm2518->regmap); + } + + if (gpio_is_valid(ssm2518->enable_gpio)) + gpio_set_value(ssm2518->enable_gpio, enable); + + regcache_cache_only(ssm2518->regmap, !enable); + + if (enable) { + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1, + SSM2518_POWER1_SPWDN | SSM2518_POWER1_RESET, 0x00); + regcache_sync(ssm2518->regmap); + } + + return ret; +} + +static int ssm2518_set_bias_level(struct snd_soc_codec *codec, + enum snd_soc_bias_level level) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec); + int ret = 0; + + switch (level) { + case SND_SOC_BIAS_ON: + break; + case SND_SOC_BIAS_PREPARE: + break; + case SND_SOC_BIAS_STANDBY: + if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) + ret = ssm2518_set_power(ssm2518, true); + break; + case SND_SOC_BIAS_OFF: + ret = ssm2518_set_power(ssm2518, false); + break; + } + + if (ret) + return ret; + + codec->dapm.bias_level = level; + + return 0; +} + +static int ssm2518_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, + unsigned int rx_mask, int slots, int width) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec); + unsigned int ctrl1, ctrl2; + int left_slot, right_slot; + int ret; + + if (slots == 0) + return regmap_update_bits(ssm2518->regmap, + SSM2518_REG_SAI_CTRL1, SSM2518_SAI_CTRL1_SAI_MASK, + SSM2518_SAI_CTRL1_SAI_I2S); + + if (tx_mask == 0 || tx_mask != 0) + return -EINVAL; + + if (slots == 1) { + if (tx_mask != 1) + return -EINVAL; + left_slot = 0; + right_slot = 0; + } else { + /* We assume the left channel < right channel */ + left_slot = ffs(tx_mask); + tx_mask &= ~(1 << tx_mask); + if (tx_mask == 0) { + right_slot = left_slot; + } else { + right_slot = ffs(tx_mask); + tx_mask &= ~(1 << tx_mask); + } + } + + if (tx_mask != 0 || left_slot >= slots || right_slot >= slots) + return -EINVAL; + + switch (width) { + case 16: + ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_16; + break; + case 24: + ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_24; + break; + case 32: + ctrl2 = SSM2518_SAI_CTRL2_SLOT_WIDTH_32; + break; + default: + return -EINVAL; + } + + switch (slots) { + case 1: + ctrl1 = SSM2518_SAI_CTRL1_SAI_MONO; + break; + case 2: + ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_2; + break; + case 4: + ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_4; + break; + case 8: + ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_8; + break; + case 16: + ctrl1 = SSM2518_SAI_CTRL1_SAI_TDM_16; + break; + default: + return -EINVAL; + } + + ret = regmap_write(ssm2518->regmap, SSM2518_REG_CHAN_MAP, + (left_slot << SSM2518_CHAN_MAP_LEFT_SLOT_OFFSET) | + (right_slot << SSM2518_CHAN_MAP_RIGHT_SLOT_OFFSET)); + if (ret) + return ret; + + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL1, + SSM2518_SAI_CTRL1_SAI_MASK, ctrl1); + if (ret) + return ret; + + return regmap_update_bits(ssm2518->regmap, SSM2518_REG_SAI_CTRL2, + SSM2518_SAI_CTRL2_SLOT_WIDTH_MASK, ctrl2); +} + +static int ssm2518_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(dai->codec); + + if (ssm2518->constraints) + snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, ssm2518->constraints); + + return 0; +} + +#define SSM2518_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \ + SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32) + +static const struct snd_soc_dai_ops ssm2518_dai_ops = { + .startup = ssm2518_startup, + .hw_params = ssm2518_hw_params, + .digital_mute = ssm2518_mute, + .set_fmt = ssm2518_set_dai_fmt, + .set_tdm_slot = ssm2518_set_tdm_slot, +}; + +static struct snd_soc_dai_driver ssm2518_dai = { + .name = "ssm2518-hifi", + .playback = { + .stream_name = "Playback", + .channels_min = 2, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_96000, + .formats = SSM2518_FORMATS, + }, + .ops = &ssm2518_dai_ops, +}; + +static int ssm2518_probe(struct snd_soc_codec *codec) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec); + int ret; + + codec->control_data = ssm2518->regmap; + ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); + if (ret < 0) { + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); + return ret; + } + + return ssm2518_set_bias_level(codec, SND_SOC_BIAS_OFF); +} + +static int ssm2518_remove(struct snd_soc_codec *codec) +{ + ssm2518_set_bias_level(codec, SND_SOC_BIAS_OFF); + return 0; +} + +static int ssm2518_set_sysclk(struct snd_soc_codec *codec, int clk_id, + int source, unsigned int freq, int dir) +{ + struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec); + unsigned int val; + + if (clk_id != SSM2518_SYSCLK) + return -EINVAL; + + switch (source) { + case SSM2518_SYSCLK_SRC_MCLK: + val = 0; + break; + case SSM2518_SYSCLK_SRC_BCLK: + /* In this case the bitclock is used as the system clock, and + * the bitclock signal needs to be connected to the MCLK pin and + * the BCLK pin is left unconnected */ + val = SSM2518_POWER1_NO_BCLK; + break; + default: + return -EINVAL; + } + + switch (freq) { + case 0: + ssm2518->constraints = NULL; + break; + case 2048000: + case 4096000: + case 8192000: + case 3200000: + case 6400000: + case 12800000: + ssm2518->constraints = &ssm2518_constraints_2048000; + break; + case 2822000: + case 5644800: + case 11289600: + case 16934400: + case 22579200: + case 33868800: + case 4410000: + case 8820000: + case 17640000: + ssm2518->constraints = &ssm2518_constraints_2822000; + break; + case 3072000: + case 6144000: + case 38864000: + case 4800000: + case 9600000: + case 19200000: + ssm2518->constraints = &ssm2518_constraints_3072000; + break; + case 12288000: + case 16384000: + case 24576000: + ssm2518->constraints = &ssm2518_constraints_12288000; + break; + default: + return -EINVAL; + } + + ssm2518->sysclk = freq; + + return regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER1, + SSM2518_POWER1_NO_BCLK, val); +} + +static struct snd_soc_codec_driver ssm2518_codec_driver = { + .probe = ssm2518_probe, + .remove = ssm2518_remove, + .set_bias_level = ssm2518_set_bias_level, + .set_sysclk = ssm2518_set_sysclk, + .idle_bias_off = true, + + .controls = ssm2518_snd_controls, + .num_controls = ARRAY_SIZE(ssm2518_snd_controls), + .dapm_widgets = ssm2518_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(ssm2518_dapm_widgets), + .dapm_routes = ssm2518_routes, + .num_dapm_routes = ARRAY_SIZE(ssm2518_routes), +}; + +static bool ssm2518_register_volatile(struct device *dev, unsigned int reg) +{ + return false; +} + +static const struct regmap_config ssm2518_regmap_config = { + .val_bits = 8, + .reg_bits = 8, + + .max_register = SSM2518_REG_DRC_9, + .volatile_reg = ssm2518_register_volatile, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = ssm2518_reg_defaults, + .num_reg_defaults = ARRAY_SIZE(ssm2518_reg_defaults), +}; + +static int ssm2518_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct ssm2518_platform_data *pdata = i2c->dev.platform_data; + struct ssm2518 *ssm2518; + int ret; + + ssm2518 = devm_kzalloc(&i2c->dev, sizeof(*ssm2518), GFP_KERNEL); + if (ssm2518 == NULL) + return -ENOMEM; + + if (pdata) { + ssm2518->enable_gpio = pdata->enable_gpio; + } else if (i2c->dev.of_node) { + ssm2518->enable_gpio = of_get_gpio(i2c->dev.of_node, 0); + if (ssm2518->enable_gpio < 0 && ssm2518->enable_gpio != -ENOENT) + return ssm2518->enable_gpio; + } else { + ssm2518->enable_gpio = -1; + } + + if (gpio_is_valid(ssm2518->enable_gpio)) { + ret = devm_gpio_request_one(&i2c->dev, ssm2518->enable_gpio, + GPIOF_OUT_INIT_HIGH, "SSM2518 nSD"); + if (ret) + return ret; + } + + i2c_set_clientdata(i2c, ssm2518); + + ssm2518->regmap = devm_regmap_init_i2c(i2c, &ssm2518_regmap_config); + if (IS_ERR(ssm2518->regmap)) + return PTR_ERR(ssm2518->regmap); + + /* + * The reset bit is obviously volatile, but we need to be able to cache + * the other bits in the register, so we can't just mark the whole + * register as volatile. Since this is the only place where we'll ever + * touch the reset bit just bypass the cache for this operation. + */ + regcache_cache_bypass(ssm2518->regmap, true); + ret = regmap_write(ssm2518->regmap, SSM2518_REG_POWER1, + SSM2518_POWER1_RESET); + regcache_cache_bypass(ssm2518->regmap, false); + if (ret) + return ret; + + ret = regmap_update_bits(ssm2518->regmap, SSM2518_REG_POWER2, + SSM2518_POWER2_APWDN, 0x00); + if (ret) + return ret; + + ret = ssm2518_set_power(ssm2518, false); + if (ret) + return ret; + + return snd_soc_register_codec(&i2c->dev, &ssm2518_codec_driver, + &ssm2518_dai, 1); +} + +static int ssm2518_i2c_remove(struct i2c_client *client) +{ + snd_soc_unregister_codec(&client->dev); + return 0; +} + +static const struct i2c_device_id ssm2518_i2c_ids[] = { + { "ssm2518", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, ssm2518_i2c_ids); + +static struct i2c_driver ssm2518_driver = { + .driver = { + .name = "ssm2518", + .owner = THIS_MODULE, + }, + .probe = ssm2518_i2c_probe, + .remove = ssm2518_i2c_remove, + .id_table = ssm2518_i2c_ids, +}; +module_i2c_driver(ssm2518_driver); + +MODULE_DESCRIPTION("ASoC SSM2518 driver"); +MODULE_AUTHOR("Lars-Peter Clausen "); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/codecs/ssm2518.h b/sound/soc/codecs/ssm2518.h new file mode 100644 index 000000000000..62511d80518e --- /dev/null +++ b/sound/soc/codecs/ssm2518.h @@ -0,0 +1,20 @@ +/* + * SSM2518 amplifier audio driver + * + * Copyright 2013 Analog Devices Inc. + * Author: Lars-Peter Clausen + * + * Licensed under the GPL-2. + */ + +#ifndef __SND_SOC_CODECS_SSM2518_H__ +#define __SND_SOC_CODECS_SSM2518_H__ + +#define SSM2518_SYSCLK 0 + +enum ssm2518_sysclk_src { + SSM2518_SYSCLK_SRC_MCLK = 0, + SSM2518_SYSCLK_SRC_BCLK = 1, +}; + +#endif -- cgit v1.2.3 From 2da1c4bf765cb32024e5db6fa75dab92916fa3b1 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 30 May 2013 13:42:29 +0100 Subject: ASoC: wm8994: Allow debounce before MICDET identification For systems which do not have a jack detection feature allow some debounce to be specified before we perform accessory identification, improving robustness without impacting button detection responsiveness. Signed-off-by: Mark Brown --- include/linux/mfd/wm8994/pdata.h | 5 +++++ sound/soc/codecs/wm8994.c | 35 +++++++++++++++++++++++++++++++++-- sound/soc/codecs/wm8994.h | 2 ++ 3 files changed, 40 insertions(+), 2 deletions(-) (limited to 'include/linux') diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h index 68e776594889..b5046f6313a9 100644 --- a/include/linux/mfd/wm8994/pdata.h +++ b/include/linux/mfd/wm8994/pdata.h @@ -182,6 +182,11 @@ struct wm8994_pdata { */ int micdet_delay; + /* Delay between microphone detect completing and reporting on + * insert (specified in ms) + */ + int mic_id_delay; + /* IRQ for microphone detection if brought out directly as a * signal. */ diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 5d046b1c5a7e..0f58f003dc1a 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -3660,6 +3660,8 @@ static irqreturn_t wm1811_jackdet_irq(int irq, void *data) pm_runtime_get_sync(codec->dev); + cancel_delayed_work_sync(&wm8994->mic_complete_work); + mutex_lock(&wm8994->accdet_lock); reg = snd_soc_read(codec, WM1811_JACKDET_CTRL); @@ -3842,11 +3844,33 @@ int wm8958_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, } EXPORT_SYMBOL_GPL(wm8958_mic_detect); +static void wm8958_mic_work(struct work_struct *work) +{ + struct wm8994_priv *wm8994 = container_of(work, + struct wm8994_priv, + mic_complete_work.work); + struct snd_soc_codec *codec = wm8994->hubs.codec; + + dev_crit(codec->dev, "MIC WORK %x\n", wm8994->mic_status); + + pm_runtime_get_sync(codec->dev); + + mutex_lock(&wm8994->accdet_lock); + + wm8994->mic_id_cb(wm8994->mic_id_cb_data, wm8994->mic_status); + + mutex_unlock(&wm8994->accdet_lock); + + pm_runtime_put(codec->dev); + + dev_crit(codec->dev, "MIC WORK %x DONE\n", wm8994->mic_status); +} + static irqreturn_t wm8958_mic_irq(int irq, void *data) { struct wm8994_priv *wm8994 = data; struct snd_soc_codec *codec = wm8994->hubs.codec; - int reg, count, ret; + int reg, count, ret, id_delay; /* * Jack detection may have detected a removal simulataneously @@ -3856,6 +3880,7 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) if (!(snd_soc_read(codec, WM8958_MIC_DETECT_1) & WM8958_MICD_ENA)) return IRQ_HANDLED; + cancel_delayed_work_sync(&wm8994->mic_complete_work); cancel_delayed_work_sync(&wm8994->open_circuit_work); pm_runtime_get_sync(codec->dev); @@ -3904,8 +3929,12 @@ static irqreturn_t wm8958_mic_irq(int irq, void *data) } } + wm8994->mic_status = reg; + id_delay = wm8994->wm8994->pdata.mic_id_delay; + if (wm8994->mic_detecting) - wm8994->mic_id_cb(wm8994->mic_id_cb_data, reg); + schedule_delayed_work(&wm8994->mic_complete_work, + msecs_to_jiffies(id_delay)); else wm8958_button_det(codec, reg); @@ -3971,6 +4000,8 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec) break; } + INIT_DELAYED_WORK(&wm8994->mic_complete_work, wm8958_mic_work); + for (i = 0; i < ARRAY_SIZE(wm8994->fll_locked); i++) init_completion(&wm8994->fll_locked[i]); diff --git a/sound/soc/codecs/wm8994.h b/sound/soc/codecs/wm8994.h index 9d19a9185d35..6536f8d45ac6 100644 --- a/sound/soc/codecs/wm8994.h +++ b/sound/soc/codecs/wm8994.h @@ -135,6 +135,8 @@ struct wm8994_priv { struct wm8994_micdet micdet[2]; struct delayed_work mic_work; struct delayed_work open_circuit_work; + struct delayed_work mic_complete_work; + u16 mic_status; bool mic_detecting; bool jack_mic; int btn_mask; -- cgit v1.2.3 From 1b4d7d9787beb45a51c1ccf2f0a7fcee9213fb38 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Jun 2013 17:44:07 +0100 Subject: mfd: wm5102: Expose DRE control registers Certain use cases may require specific DRE settings so expose the necessary registers. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown --- drivers/mfd/wm5102-tables.c | 9 ++++++- include/linux/mfd/arizona/registers.h | 44 +++++++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+), 1 deletion(-) (limited to 'include/linux') diff --git a/drivers/mfd/wm5102-tables.c b/drivers/mfd/wm5102-tables.c index 155c4a1a6a99..802dd3cb18cf 100644 --- a/drivers/mfd/wm5102-tables.c +++ b/drivers/mfd/wm5102-tables.c @@ -65,7 +65,8 @@ static const struct reg_default wm5102_revb_patch[] = { { 0x418, 0xa080 }, { 0x420, 0xa080 }, { 0x428, 0xe000 }, - { 0x443, 0xDC1A }, + { 0x442, 0x3F0A }, + { 0x443, 0xDC1F }, { 0x4B0, 0x0066 }, { 0x458, 0x000b }, { 0x212, 0x0000 }, @@ -424,6 +425,9 @@ static const struct reg_default wm5102_reg_default[] = { { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ { 0x00000436, 0x0081 }, /* R1078 - DAC Volume Limit 5R */ { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ + { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ + { 0x00000442, 0x3F0A }, /* R1090 - DRE Control 2 */ + { 0x00000443, 0xDC1F }, /* R1090 - DRE Control 3 */ { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ { 0x00000458, 0x000B }, /* R1112 - Noise Gate Control */ { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ @@ -1197,6 +1201,9 @@ static bool wm5102_readable_register(struct device *dev, unsigned int reg) case ARIZONA_DAC_DIGITAL_VOLUME_5R: case ARIZONA_DAC_VOLUME_LIMIT_5R: case ARIZONA_NOISE_GATE_SELECT_5R: + case ARIZONA_DRE_ENABLE: + case ARIZONA_DRE_CONTROL_2: + case ARIZONA_DRE_CONTROL_3: case ARIZONA_DAC_AEC_CONTROL_1: case ARIZONA_NOISE_GATE_CONTROL: case ARIZONA_PDM_SPK1_CTRL_1: diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4730b5c576e2..4706d3d46e56 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -215,6 +215,9 @@ #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F +#define ARIZONA_DRE_ENABLE 0x440 +#define ARIZONA_DRE_CONTROL_2 0x442 +#define ARIZONA_DRE_CONTROL_3 0x443 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_NOISE_GATE_CONTROL 0x458 #define ARIZONA_PDM_SPK1_CTRL_1 0x490 @@ -3132,6 +3135,47 @@ #define ARIZONA_OUT6R_NGATE_SRC_SHIFT 0 /* OUT6R_NGATE_SRC - [11:0] */ #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */ +/* + * R1088 (0x440) - DRE Enable + */ +#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ +#define ARIZONA_DRE2R_ENA 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_MASK 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_SHIFT 3 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */ +#define ARIZONA_DRE2L_ENA 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_MASK 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_SHIFT 2 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */ +#define ARIZONA_DRE1R_ENA 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_MASK 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_SHIFT 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1L_ENA 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_MASK 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ + +/* + * R1090 (0x442) - DRE Control 2 + */ +#define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */ + +/* + * R1091 (0x443) - DRE Control 3 + */ +#define ARIZONA_DRE_GAIN_SHIFT_MASK 0xC000 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_SHIFT 14 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_WIDTH 2 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_MASK 0x000F /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */ + /* * R1104 (0x450) - DAC AEC Control 1 */ -- cgit v1.2.3