From f47a6113f4e87db7ca066635822e1b3ca3ed9514 Mon Sep 17 00:00:00 2001 From: Tzung-Bi Shih Date: Wed, 16 Feb 2022 16:03:03 +0800 Subject: platform/chrome: cros_ec: remove unused variable `was_wake_device` Reviewed-by: Prashant Malani Signed-off-by: Tzung-Bi Shih --- include/linux/platform_data/cros_ec_proto.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include/linux/platform_data') diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/platform_data/cros_ec_proto.h index df3c78c92ca2..c65971ec90ea 100644 --- a/include/linux/platform_data/cros_ec_proto.h +++ b/include/linux/platform_data/cros_ec_proto.h @@ -76,8 +76,6 @@ struct cros_ec_command { * struct cros_ec_device - Information about a ChromeOS EC device. * @phys_name: Name of physical comms layer (e.g. 'i2c-4'). * @dev: Device pointer for physical comms device - * @was_wake_device: True if this device was set to wake the system from - * sleep at the last suspend. * @cros_class: The class structure for this device. * @cmd_readmem: Direct read of the EC memory-mapped region, if supported. * @offset: Is within EC_LPC_ADDR_MEMMAP region. @@ -137,7 +135,6 @@ struct cros_ec_device { /* These are used by other drivers that want to talk to the EC */ const char *phys_name; struct device *dev; - bool was_wake_device; struct class *cros_class; int (*cmd_readmem)(struct cros_ec_device *ec, unsigned int offset, unsigned int bytes, void *dest); -- cgit v1.2.3 From 57b888ca2541785de2fcb90575b378921919b6c0 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Fri, 18 Mar 2022 09:54:22 -0700 Subject: platform/chrome: Re-introduce cros_ec_cmd_xfer and use it for ioctls Commit 413dda8f2c6f ("platform/chrome: cros_ec_chardev: Use cros_ec_cmd_xfer_status helper") inadvertendly changed the userspace ABI. Previously, cros_ec ioctls would only report errors if the EC communication failed, and otherwise return success and the result of the EC communication. An EC command execution failure was reported in the EC response field. The above mentioned commit changed this behavior, and the ioctl itself would fail. This breaks userspace commands trying to analyze the EC command execution error since the actual EC command response is no longer reported to userspace. Fix the problem by re-introducing the cros_ec_cmd_xfer() helper, and use it to handle ioctl messages. Fixes: 413dda8f2c6f ("platform/chrome: cros_ec_chardev: Use cros_ec_cmd_xfer_status helper") Cc: Daisuke Nojiri Cc: Rob Barnes Cc: Rajat Jain Cc: Brian Norris Cc: Parth Malkan Reviewed-by: Daisuke Nojiri Reviewed-by: Brian Norris Signed-off-by: Guenter Roeck Signed-off-by: Tzung-Bi Shih --- drivers/platform/chrome/cros_ec_chardev.c | 2 +- drivers/platform/chrome/cros_ec_proto.c | 50 +++++++++++++++++++++++------ include/linux/platform_data/cros_ec_proto.h | 3 ++ 3 files changed, 45 insertions(+), 10 deletions(-) (limited to 'include/linux/platform_data') diff --git a/drivers/platform/chrome/cros_ec_chardev.c b/drivers/platform/chrome/cros_ec_chardev.c index e0bce869c49a..fd33de546aee 100644 --- a/drivers/platform/chrome/cros_ec_chardev.c +++ b/drivers/platform/chrome/cros_ec_chardev.c @@ -301,7 +301,7 @@ static long cros_ec_chardev_ioctl_xcmd(struct cros_ec_dev *ec, void __user *arg) } s_cmd->command += ec->cmd_offset; - ret = cros_ec_cmd_xfer_status(ec->ec_dev, s_cmd); + ret = cros_ec_cmd_xfer(ec->ec_dev, s_cmd); /* Only copy data to userland if data was received. */ if (ret < 0) goto exit; diff --git a/drivers/platform/chrome/cros_ec_proto.c b/drivers/platform/chrome/cros_ec_proto.c index c4caf2e2de82..ac1419881ff3 100644 --- a/drivers/platform/chrome/cros_ec_proto.c +++ b/drivers/platform/chrome/cros_ec_proto.c @@ -560,22 +560,28 @@ exit: EXPORT_SYMBOL(cros_ec_query_all); /** - * cros_ec_cmd_xfer_status() - Send a command to the ChromeOS EC. + * cros_ec_cmd_xfer() - Send a command to the ChromeOS EC. * @ec_dev: EC device. * @msg: Message to write. * - * Call this to send a command to the ChromeOS EC. This should be used instead of calling the EC's - * cmd_xfer() callback directly. It returns success status only if both the command was transmitted - * successfully and the EC replied with success status. + * Call this to send a command to the ChromeOS EC. This should be used instead + * of calling the EC's cmd_xfer() callback directly. This function does not + * convert EC command execution error codes to Linux error codes. Most + * in-kernel users will want to use cros_ec_cmd_xfer_status() instead since + * that function implements the conversion. * * Return: - * >=0 - The number of bytes transferred - * <0 - Linux error code + * >0 - EC command was executed successfully. The return value is the number + * of bytes returned by the EC (excluding the header). + * =0 - EC communication was successful. EC command execution results are + * reported in msg->result. The result will be EC_RES_SUCCESS if the + * command was executed successfully or report an EC command execution + * error. + * <0 - EC communication error. Return value is the Linux error code. */ -int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) +int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, struct cros_ec_command *msg) { - int ret, mapped; + int ret; mutex_lock(&ec_dev->lock); if (ec_dev->proto_version == EC_PROTO_VERSION_UNKNOWN) { @@ -616,6 +622,32 @@ int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, ret = send_command(ec_dev, msg); mutex_unlock(&ec_dev->lock); + return ret; +} +EXPORT_SYMBOL(cros_ec_cmd_xfer); + +/** + * cros_ec_cmd_xfer_status() - Send a command to the ChromeOS EC. + * @ec_dev: EC device. + * @msg: Message to write. + * + * Call this to send a command to the ChromeOS EC. This should be used instead of calling the EC's + * cmd_xfer() callback directly. It returns success status only if both the command was transmitted + * successfully and the EC replied with success status. + * + * Return: + * >=0 - The number of bytes transferred. + * <0 - Linux error code + */ +int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg) +{ + int ret, mapped; + + ret = cros_ec_cmd_xfer(ec_dev, msg); + if (ret < 0) + return ret; + mapped = cros_ec_map_error(msg->result); if (mapped) { dev_dbg(ec_dev->dev, "Command result (err: %d [%d])\n", diff --git a/include/linux/platform_data/cros_ec_proto.h b/include/linux/platform_data/cros_ec_proto.h index c65971ec90ea..138fd912c808 100644 --- a/include/linux/platform_data/cros_ec_proto.h +++ b/include/linux/platform_data/cros_ec_proto.h @@ -213,6 +213,9 @@ int cros_ec_prepare_tx(struct cros_ec_device *ec_dev, int cros_ec_check_result(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); +int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg); + int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, struct cros_ec_command *msg); -- cgit v1.2.3 From c6547c2ed0e1487c91983faccad841611ab6a783 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 14 Apr 2022 18:22:37 +0200 Subject: dmaengine: imx: Move header to include/dma/ The i.MX DMA drivers are device tree only, nothing in include/linux/platform_data/dma-imx.h has platform_data in it, so move the file to include/linux/dma/imx-dma.h. Signed-off-by: Sascha Hauer Acked-By: Vinod Koul Link: https://lore.kernel.org/r/20220414162249.3934543-10-s.hauer@pengutronix.de Signed-off-by: Mark Brown --- drivers/dma/imx-dma.c | 2 +- drivers/dma/imx-sdma.c | 2 +- drivers/mmc/host/mxcmmc.c | 2 +- drivers/spi/spi-fsl-lpspi.c | 2 +- drivers/spi/spi-imx.c | 2 +- drivers/tty/serial/imx.c | 2 +- drivers/video/fbdev/mx3fb.c | 2 +- include/linux/dma/imx-dma.h | 68 +++++++++++++++++++++++++++++++++++ include/linux/platform_data/dma-imx.h | 68 ----------------------------------- sound/soc/fsl/fsl_asrc.c | 2 +- sound/soc/fsl/fsl_asrc_dma.c | 2 +- sound/soc/fsl/fsl_easrc.h | 2 +- sound/soc/fsl/imx-pcm.h | 2 +- sound/soc/fsl/imx-ssi.h | 2 +- 14 files changed, 80 insertions(+), 80 deletions(-) create mode 100644 include/linux/dma/imx-dma.h delete mode 100644 include/linux/platform_data/dma-imx.h (limited to 'include/linux/platform_data') diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index 2ddc31e64db0..3bffe3ecbd1b 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include "dmaengine.h" #define IMXDMA_MAX_CHAN_DESCRIPTORS 16 diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 70c0aa931ddf..80261a905eb5 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 40b6878bea6c..de04b5afef2e 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -39,7 +39,7 @@ #include #include -#include +#include #define DRIVER_NAME "mxc-mmc" #define MXCMCI_TIMEOUT_MS 10000 diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c index 4c601294f8fa..19b1f3d881b0 100644 --- a/drivers/spi/spi-fsl-lpspi.c +++ b/drivers/spi/spi-fsl-lpspi.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index b2dd0a4d2446..a944c787f53f 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -24,7 +24,7 @@ #include #include -#include +#include #define DRIVER_NAME "spi_imx" diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index fd38e6ed4fda..f8b5400e6267 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -30,7 +30,7 @@ #include #include -#include +#include #include "serial_mctrl_gpio.h" diff --git a/drivers/video/fbdev/mx3fb.c b/drivers/video/fbdev/mx3fb.c index fabb271337ed..b945b68984b9 100644 --- a/drivers/video/fbdev/mx3fb.c +++ b/drivers/video/fbdev/mx3fb.c @@ -26,7 +26,7 @@ #include #include -#include +#include #include #include diff --git a/include/linux/dma/imx-dma.h b/include/linux/dma/imx-dma.h new file mode 100644 index 000000000000..b06cba85a6d4 --- /dev/null +++ b/include/linux/dma/imx-dma.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +#ifndef __LINUX_DMA_IMX_H +#define __LINUX_DMA_IMX_H + +#include +#include +#include + +/* + * This enumerates peripheral types. Used for SDMA. + */ +enum sdma_peripheral_type { + IMX_DMATYPE_SSI, /* MCU domain SSI */ + IMX_DMATYPE_SSI_SP, /* Shared SSI */ + IMX_DMATYPE_MMC, /* MMC */ + IMX_DMATYPE_SDHC, /* SDHC */ + IMX_DMATYPE_UART, /* MCU domain UART */ + IMX_DMATYPE_UART_SP, /* Shared UART */ + IMX_DMATYPE_FIRI, /* FIRI */ + IMX_DMATYPE_CSPI, /* MCU domain CSPI */ + IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ + IMX_DMATYPE_SIM, /* SIM */ + IMX_DMATYPE_ATA, /* ATA */ + IMX_DMATYPE_CCM, /* CCM */ + IMX_DMATYPE_EXT, /* External peripheral */ + IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ + IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ + IMX_DMATYPE_DSP, /* DSP */ + IMX_DMATYPE_MEMORY, /* Memory */ + IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ + IMX_DMATYPE_SPDIF, /* SPDIF */ + IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ + IMX_DMATYPE_ASRC, /* ASRC */ + IMX_DMATYPE_ESAI, /* ESAI */ + IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */ + IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ + IMX_DMATYPE_SAI, /* SAI */ +}; + +enum imx_dma_prio { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +}; + +struct imx_dma_data { + int dma_request; /* DMA request line */ + int dma_request2; /* secondary DMA request line */ + enum sdma_peripheral_type peripheral_type; + int priority; +}; + +static inline int imx_dma_is_ipu(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "ipu-core"); +} + +static inline int imx_dma_is_general_purpose(struct dma_chan *chan) +{ + return !strcmp(chan->device->dev->driver->name, "imx-sdma") || + !strcmp(chan->device->dev->driver->name, "imx-dma"); +} + +#endif /* __LINUX_DMA_IMX_H */ diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h deleted file mode 100644 index 281adbb26e6b..000000000000 --- a/include/linux/platform_data/dma-imx.h +++ /dev/null @@ -1,68 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -#ifndef __ASM_ARCH_MXC_DMA_H__ -#define __ASM_ARCH_MXC_DMA_H__ - -#include -#include -#include - -/* - * This enumerates peripheral types. Used for SDMA. - */ -enum sdma_peripheral_type { - IMX_DMATYPE_SSI, /* MCU domain SSI */ - IMX_DMATYPE_SSI_SP, /* Shared SSI */ - IMX_DMATYPE_MMC, /* MMC */ - IMX_DMATYPE_SDHC, /* SDHC */ - IMX_DMATYPE_UART, /* MCU domain UART */ - IMX_DMATYPE_UART_SP, /* Shared UART */ - IMX_DMATYPE_FIRI, /* FIRI */ - IMX_DMATYPE_CSPI, /* MCU domain CSPI */ - IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ - IMX_DMATYPE_SIM, /* SIM */ - IMX_DMATYPE_ATA, /* ATA */ - IMX_DMATYPE_CCM, /* CCM */ - IMX_DMATYPE_EXT, /* External peripheral */ - IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ - IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ - IMX_DMATYPE_DSP, /* DSP */ - IMX_DMATYPE_MEMORY, /* Memory */ - IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ - IMX_DMATYPE_SPDIF, /* SPDIF */ - IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ - IMX_DMATYPE_ASRC, /* ASRC */ - IMX_DMATYPE_ESAI, /* ESAI */ - IMX_DMATYPE_SSI_DUAL, /* SSI Dual FIFO */ - IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ - IMX_DMATYPE_SAI, /* SAI */ -}; - -enum imx_dma_prio { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -}; - -struct imx_dma_data { - int dma_request; /* DMA request line */ - int dma_request2; /* secondary DMA request line */ - enum sdma_peripheral_type peripheral_type; - int priority; -}; - -static inline int imx_dma_is_ipu(struct dma_chan *chan) -{ - return !strcmp(dev_name(chan->device->dev), "ipu-core"); -} - -static inline int imx_dma_is_general_purpose(struct dma_chan *chan) -{ - return !strcmp(chan->device->dev->driver->name, "imx-sdma") || - !strcmp(chan->device->dev->driver->name, "imx-dma"); -} - -#endif diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index d7d1536a4f37..ad4e6747b839 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/sound/soc/fsl/fsl_asrc_dma.c b/sound/soc/fsl/fsl_asrc_dma.c index cd9b36ec0ecb..5038faf035cb 100644 --- a/sound/soc/fsl/fsl_asrc_dma.c +++ b/sound/soc/fsl/fsl_asrc_dma.c @@ -8,7 +8,7 @@ #include #include -#include +#include #include #include diff --git a/sound/soc/fsl/fsl_easrc.h b/sound/soc/fsl/fsl_easrc.h index 30620d56252c..86d5c360d4f5 100644 --- a/sound/soc/fsl/fsl_easrc.h +++ b/sound/soc/fsl/fsl_easrc.h @@ -7,7 +7,7 @@ #define _FSL_EASRC_H #include -#include +#include #include "fsl_asrc_common.h" diff --git a/sound/soc/fsl/imx-pcm.h b/sound/soc/fsl/imx-pcm.h index 5c6cf1ca8c8a..06b25f4b26b6 100644 --- a/sound/soc/fsl/imx-pcm.h +++ b/sound/soc/fsl/imx-pcm.h @@ -9,7 +9,7 @@ #ifndef _IMX_PCM_H #define _IMX_PCM_H -#include +#include /* * Do not change this as the FIQ handler depends on this size diff --git a/sound/soc/fsl/imx-ssi.h b/sound/soc/fsl/imx-ssi.h index 19cd0937e740..2d30d822451a 100644 --- a/sound/soc/fsl/imx-ssi.h +++ b/sound/soc/fsl/imx-ssi.h @@ -182,7 +182,7 @@ #define DRV_NAME "imx-ssi" #include -#include +#include #include #include "imx-pcm.h" -- cgit v1.2.3 From 22f0866513c2e531ae65a9d5dfc82f24497ef3b3 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 2 Sep 2019 00:02:08 +0200 Subject: ARM: pxa: move mach/sound.h to linux/platform_data/ This is a basically a platform_data file, so move it out of the mach/* header directory. Cc: Marek Vasut Cc: Tomas Cech Cc: Sergey Lapin Acked-by: Mark Brown Acked-by: Robert Jarzmik Cc: alsa-devel@alsa-project.org Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/cm-x300.c | 2 +- arch/arm/mach-pxa/colibri-pxa270.c | 2 +- arch/arm/mach-pxa/colibri-pxa300.c | 2 +- arch/arm/mach-pxa/colibri-pxa320.c | 2 +- arch/arm/mach-pxa/csb726.c | 2 +- arch/arm/mach-pxa/devices.c | 2 +- arch/arm/mach-pxa/eseries.c | 2 +- arch/arm/mach-pxa/include/mach/audio.h | 31 ------------------------------- arch/arm/mach-pxa/lpd270.c | 2 +- arch/arm/mach-pxa/lubbock.c | 2 +- arch/arm/mach-pxa/mainstone.c | 2 +- arch/arm/mach-pxa/mioa701.c | 2 +- arch/arm/mach-pxa/palm27x.c | 2 +- arch/arm/mach-pxa/palmld.c | 2 +- arch/arm/mach-pxa/palmt5.c | 2 +- arch/arm/mach-pxa/palmtc.c | 2 +- arch/arm/mach-pxa/palmte2.c | 2 +- arch/arm/mach-pxa/palmtreo.c | 2 +- arch/arm/mach-pxa/palmtx.c | 2 +- arch/arm/mach-pxa/palmz72.c | 2 +- arch/arm/mach-pxa/pcm990-baseboard.c | 2 +- arch/arm/mach-pxa/tosa.c | 2 +- arch/arm/mach-pxa/trizeps4.c | 2 +- arch/arm/mach-pxa/viper.c | 2 +- arch/arm/mach-pxa/vpac270.c | 2 +- arch/arm/mach-pxa/zeus.c | 2 +- arch/arm/mach-pxa/zylonite.c | 2 +- include/linux/platform_data/asoc-pxa.h | 31 +++++++++++++++++++++++++++++++ sound/arm/pxa2xx-ac97-lib.c | 2 +- sound/arm/pxa2xx-ac97.c | 2 +- sound/soc/pxa/corgi.c | 2 +- sound/soc/pxa/e740_wm9705.c | 2 +- sound/soc/pxa/e750_wm9705.c | 2 +- sound/soc/pxa/e800_wm9712.c | 2 +- sound/soc/pxa/em-x270.c | 2 +- sound/soc/pxa/mioa701_wm9713.c | 2 +- sound/soc/pxa/palm27x.c | 2 +- sound/soc/pxa/poodle.c | 2 +- sound/soc/pxa/pxa2xx-ac97.c | 2 +- sound/soc/pxa/pxa2xx-i2s.c | 2 +- sound/soc/pxa/tosa.c | 2 +- sound/soc/pxa/z2.c | 2 +- 43 files changed, 72 insertions(+), 72 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/audio.h create mode 100644 include/linux/platform_data/asoc-pxa.h (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 26140249c784..82f9299f67d3 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -41,7 +41,7 @@ #include "pxa27x.h" #include -#include +#include #include #include #include "udc.h" diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c index 85e2537fdc15..09a5264a27c8 100644 --- a/arch/arm/mach-pxa/cm-x300.c +++ b/arch/arm/mach-pxa/cm-x300.c @@ -53,7 +53,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c index 2f2cd2ae4187..5dc669752836 100644 --- a/arch/arm/mach-pxa/colibri-pxa270.c +++ b/arch/arm/mach-pxa/colibri-pxa270.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include "colibri.h" #include "pxa27x.h" diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c index 4ceeea142bfd..11ca6c4795e7 100644 --- a/arch/arm/mach-pxa/colibri-pxa300.c +++ b/arch/arm/mach-pxa/colibri-pxa300.c @@ -24,7 +24,7 @@ #include "colibri.h" #include #include -#include +#include #include "generic.h" #include "devices.h" diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c index 35dd3adb7712..1a59056e181e 100644 --- a/arch/arm/mach-pxa/colibri-pxa320.c +++ b/arch/arm/mach-pxa/colibri-pxa320.c @@ -24,7 +24,7 @@ #include "colibri.h" #include #include -#include +#include #include "pxa27x-udc.h" #include "udc.h" diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index d48493445ae5..88f2f1d96c7b 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c @@ -22,7 +22,7 @@ #include "pxa27x.h" #include #include -#include +#include #include #include "generic.h" diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 7ca97ddef6fe..454523237c97 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c index f37c44b6139d..a8b6483ff665 100644 --- a/arch/arm/mach-pxa/eseries.c +++ b/arch/arm/mach-pxa/eseries.c @@ -34,7 +34,7 @@ #include "pxa25x.h" #include #include "eseries-irq.h" -#include +#include #include #include "udc.h" #include diff --git a/arch/arm/mach-pxa/include/mach/audio.h b/arch/arm/mach-pxa/include/mach/audio.h deleted file mode 100644 index 7beebf7297b5..000000000000 --- a/arch/arm/mach-pxa/include/mach/audio.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_AUDIO_H__ -#define __ASM_ARCH_AUDIO_H__ - -#include -#include -#include - -/* - * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) - * a -1 value means no gpio will be used for reset - * @codec_pdata: AC97 codec platform_data - - * reset_gpio should only be specified for pxa27x CPUs where a silicon - * bug prevents correct operation of the reset line. If not specified, - * the default behaviour on these CPUs is to consider gpio 113 as the - * AC97 reset line, which is the default on most boards. - */ -typedef struct { - int (*startup)(struct snd_pcm_substream *, void *); - void (*shutdown)(struct snd_pcm_substream *, void *); - void (*suspend)(void *); - void (*resume)(void *); - void *priv; - int reset_gpio; - void *codec_pdata[AC97_BUS_MAX_DEVICES]; -} pxa2xx_audio_ops_t; - -extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); - -#endif diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index eac32bd9e385..7f10b86f85fd 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c @@ -39,7 +39,7 @@ #include "pxa27x.h" #include "lpd270.h" #include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 72816e7c206f..46aef93c0615 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c @@ -45,7 +45,7 @@ #include #include "pxa25x.h" -#include +#include #include #include "udc.h" #include diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index cf74adfe65df..c8200fc2159d 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -45,7 +45,7 @@ #include "pxa27x.h" #include "mainstone.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index a79f296e81e0..907cd7b5f58c 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -41,7 +41,7 @@ #include "udc.h" #include "pxa27x-udc.h" #include -#include +#include #include #include "mioa701.h" diff --git a/arch/arm/mach-pxa/palm27x.c b/arch/arm/mach-pxa/palm27x.c index 6230381a7ca0..1a8d25eecac3 100644 --- a/arch/arm/mach-pxa/palm27x.c +++ b/arch/arm/mach-pxa/palm27x.c @@ -25,7 +25,7 @@ #include #include "pxa27x.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/palmld.c b/arch/arm/mach-pxa/palmld.c index 5f73716a77f0..d85146957004 100644 --- a/arch/arm/mach-pxa/palmld.c +++ b/arch/arm/mach-pxa/palmld.c @@ -29,7 +29,7 @@ #include #include "pxa27x.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/palmt5.c b/arch/arm/mach-pxa/palmt5.c index 7c7cbb4e677e..460a8b1043a5 100644 --- a/arch/arm/mach-pxa/palmt5.c +++ b/arch/arm/mach-pxa/palmt5.c @@ -29,7 +29,7 @@ #include #include "pxa27x.h" -#include +#include #include "palmt5.h" #include #include diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index 455cb8ccaf26..c59fc76c0c3d 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -29,7 +29,7 @@ #include #include "pxa25x.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/palmte2.c b/arch/arm/mach-pxa/palmte2.c index a2b10db4aacc..fedac670a8af 100644 --- a/arch/arm/mach-pxa/palmte2.c +++ b/arch/arm/mach-pxa/palmte2.c @@ -29,7 +29,7 @@ #include #include "pxa25x.h" -#include +#include #include "palmte2.h" #include #include diff --git a/arch/arm/mach-pxa/palmtreo.c b/arch/arm/mach-pxa/palmtreo.c index 2bf0f7f3ea24..d6d5b90d9578 100644 --- a/arch/arm/mach-pxa/palmtreo.c +++ b/arch/arm/mach-pxa/palmtreo.c @@ -29,7 +29,7 @@ #include "pxa27x.h" #include "pxa27x-udc.h" -#include +#include #include "palmtreo.h" #include #include diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 07332c92c9f7..097b88638863 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -32,7 +32,7 @@ #include #include "pxa27x.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/palmz72.c b/arch/arm/mach-pxa/palmz72.c index b4a5fe02a0af..66e8fe6f1661 100644 --- a/arch/arm/mach-pxa/palmz72.c +++ b/arch/arm/mach-pxa/palmz72.c @@ -34,7 +34,7 @@ #include #include "pxa27x.h" -#include +#include #include "palmz72.h" #include #include diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index 8dfcc366d0fe..33a9d2eeca1c 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -26,7 +26,7 @@ #include #include "pxa27x.h" -#include +#include #include #include #include "pcm990_baseboard.h" diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 431709725d02..5af980d77d39 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -45,7 +45,7 @@ #include #include "udc.h" #include "tosa_bt.h" -#include +#include #include #include diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index f76f8be09554..1337008cc760 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -41,7 +41,7 @@ #include "pxa27x.h" #include -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 4b81c0117971..ac94b10bf8c1 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -46,7 +46,7 @@ #include #include "pxa25x.h" -#include +#include #include #include "regs-uart.h" #include diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 14505e83479e..7067d1464689 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -29,7 +29,7 @@ #include #include "pxa27x.h" -#include +#include #include #include #include diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 5d02f10b5b5a..67396e85bb66 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -46,7 +46,7 @@ #include "udc.h" #include #include "pm.h" -#include +#include #include #include "zeus.h" #include diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 9bcb81688201..c48dd6d03df9 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c @@ -25,7 +25,7 @@ #include #include #include "pxa3xx.h" -#include +#include #include #include "zylonite.h" #include diff --git a/include/linux/platform_data/asoc-pxa.h b/include/linux/platform_data/asoc-pxa.h new file mode 100644 index 000000000000..327454cd8246 --- /dev/null +++ b/include/linux/platform_data/asoc-pxa.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __SOC_PXA_AUDIO_H__ +#define __SOC_PXA_AUDIO_H__ + +#include +#include +#include + +/* + * @reset_gpio: AC97 reset gpio (normally gpio113 or gpio95) + * a -1 value means no gpio will be used for reset + * @codec_pdata: AC97 codec platform_data + + * reset_gpio should only be specified for pxa27x CPUs where a silicon + * bug prevents correct operation of the reset line. If not specified, + * the default behaviour on these CPUs is to consider gpio 113 as the + * AC97 reset line, which is the default on most boards. + */ +typedef struct { + int (*startup)(struct snd_pcm_substream *, void *); + void (*shutdown)(struct snd_pcm_substream *, void *); + void (*suspend)(void *); + void (*resume)(void *); + void *priv; + int reset_gpio; + void *codec_pdata[AC97_BUS_MAX_DEVICES]; +} pxa2xx_audio_ops_t; + +extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); + +#endif diff --git a/sound/arm/pxa2xx-ac97-lib.c b/sound/arm/pxa2xx-ac97-lib.c index 84d5f85073b9..9b5c1f0f8998 100644 --- a/sound/arm/pxa2xx-ac97-lib.c +++ b/sound/arm/pxa2xx-ac97-lib.c @@ -23,7 +23,7 @@ #include #include -#include +#include static DEFINE_MUTEX(car_mutex); static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); diff --git a/sound/arm/pxa2xx-ac97.c b/sound/arm/pxa2xx-ac97.c index c17a19fe59ed..57c3e12e6629 100644 --- a/sound/arm/pxa2xx-ac97.c +++ b/sound/arm/pxa2xx-ac97.c @@ -22,7 +22,7 @@ #include #include -#include +#include static void pxa2xx_ac97_legacy_reset(struct snd_ac97 *ac97) { diff --git a/sound/soc/pxa/corgi.c b/sound/soc/pxa/corgi.c index 8ee2dea25a8d..8b83709431cb 100644 --- a/sound/soc/pxa/corgi.c +++ b/sound/soc/pxa/corgi.c @@ -22,7 +22,7 @@ #include #include -#include +#include #include "../codecs/wm8731.h" #include "pxa2xx-i2s.h" diff --git a/sound/soc/pxa/e740_wm9705.c b/sound/soc/pxa/e740_wm9705.c index eafa1482afbe..f922be7e0016 100644 --- a/sound/soc/pxa/e740_wm9705.c +++ b/sound/soc/pxa/e740_wm9705.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include diff --git a/sound/soc/pxa/e750_wm9705.c b/sound/soc/pxa/e750_wm9705.c index d75510d7b16b..308828cd736b 100644 --- a/sound/soc/pxa/e750_wm9705.c +++ b/sound/soc/pxa/e750_wm9705.c @@ -13,7 +13,7 @@ #include #include -#include +#include #include #include diff --git a/sound/soc/pxa/e800_wm9712.c b/sound/soc/pxa/e800_wm9712.c index 56d543da938a..d74fcceef687 100644 --- a/sound/soc/pxa/e800_wm9712.c +++ b/sound/soc/pxa/e800_wm9712.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include static int e800_spk_amp_event(struct snd_soc_dapm_widget *w, diff --git a/sound/soc/pxa/em-x270.c b/sound/soc/pxa/em-x270.c index 9076ea7e9339..b59ec22e1e7e 100644 --- a/sound/soc/pxa/em-x270.c +++ b/sound/soc/pxa/em-x270.c @@ -23,7 +23,7 @@ #include #include -#include +#include SND_SOC_DAILINK_DEFS(ac97, DAILINK_COMP_ARRAY(COMP_CPU("pxa2xx-ac97")), diff --git a/sound/soc/pxa/mioa701_wm9713.c b/sound/soc/pxa/mioa701_wm9713.c index 763db7bbd9bb..0fa37637eca9 100644 --- a/sound/soc/pxa/mioa701_wm9713.c +++ b/sound/soc/pxa/mioa701_wm9713.c @@ -33,7 +33,7 @@ #include #include -#include +#include #include #include diff --git a/sound/soc/pxa/palm27x.c b/sound/soc/pxa/palm27x.c index b92ea1a0453f..275c86379e88 100644 --- a/sound/soc/pxa/palm27x.c +++ b/sound/soc/pxa/palm27x.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include static struct snd_soc_jack hs_jack; diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c index 323ba3e23039..176a0441235a 100644 --- a/sound/soc/pxa/poodle.c +++ b/sound/soc/pxa/poodle.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include "../codecs/wm8731.h" #include "pxa2xx-i2s.h" diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c index 8f78c5a359c5..9443c1390d2f 100644 --- a/sound/soc/pxa/pxa2xx-ac97.c +++ b/sound/soc/pxa/pxa2xx-ac97.c @@ -23,7 +23,7 @@ #include #include -#include +#include static void pxa2xx_ac97_warm_reset(struct ac97_controller *adrv) { diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 114a33c4a064..5164c60ba89f 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c @@ -22,7 +22,7 @@ #include #include -#include +#include #include "pxa2xx-i2s.h" diff --git a/sound/soc/pxa/tosa.c b/sound/soc/pxa/tosa.c index 3b40b5fa5de7..06226f9b863e 100644 --- a/sound/soc/pxa/tosa.c +++ b/sound/soc/pxa/tosa.c @@ -24,7 +24,7 @@ #include #include -#include +#include #define TOSA_HP 0 #define TOSA_MIC_INT 1 diff --git a/sound/soc/pxa/z2.c b/sound/soc/pxa/z2.c index 7e8f33d7b83f..dc6c48e4738b 100644 --- a/sound/soc/pxa/z2.c +++ b/sound/soc/pxa/z2.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include "../codecs/wm8750.h" -- cgit v1.2.3 From ee84cbd5df2beaf14e8af0955f1ab15ad3f81504 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 2 Sep 2019 00:15:44 +0200 Subject: ARM: pxa: move regs-lcd.h into driver Only the pxafb driver uses this header, so move it into the same directory. The SMART_* macros are required by some platform data definitions and can go into the linux/platform_data/video-pxafb.h header. Acked-by: Bartlomiej Zolnierkiewicz Acked-by: Robert Jarzmik Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/include/mach/regs-lcd.h | 199 ------------------------------ drivers/video/fbdev/pxa3xx-regs.h | 180 +++++++++++++++++++++++++++ drivers/video/fbdev/pxafb.c | 1 + include/linux/platform_data/video-pxafb.h | 22 +++- 4 files changed, 202 insertions(+), 200 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/regs-lcd.h create mode 100644 drivers/video/fbdev/pxa3xx-regs.h (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-pxa/include/mach/regs-lcd.h b/arch/arm/mach-pxa/include/mach/regs-lcd.h deleted file mode 100644 index 6a434675f84a..000000000000 --- a/arch/arm/mach-pxa/include/mach/regs-lcd.h +++ /dev/null @@ -1,199 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_ARCH_REGS_LCD_H -#define __ASM_ARCH_REGS_LCD_H - -/* - * LCD Controller Registers and Bits Definitions - */ -#define LCCR0 (0x000) /* LCD Controller Control Register 0 */ -#define LCCR1 (0x004) /* LCD Controller Control Register 1 */ -#define LCCR2 (0x008) /* LCD Controller Control Register 2 */ -#define LCCR3 (0x00C) /* LCD Controller Control Register 3 */ -#define LCCR4 (0x010) /* LCD Controller Control Register 4 */ -#define LCCR5 (0x014) /* LCD Controller Control Register 5 */ -#define LCSR (0x038) /* LCD Controller Status Register 0 */ -#define LCSR1 (0x034) /* LCD Controller Status Register 1 */ -#define LIIDR (0x03C) /* LCD Controller Interrupt ID Register */ -#define TMEDRGBR (0x040) /* TMED RGB Seed Register */ -#define TMEDCR (0x044) /* TMED Control Register */ - -#define FBR0 (0x020) /* DMA Channel 0 Frame Branch Register */ -#define FBR1 (0x024) /* DMA Channel 1 Frame Branch Register */ -#define FBR2 (0x028) /* DMA Channel 2 Frame Branch Register */ -#define FBR3 (0x02C) /* DMA Channel 2 Frame Branch Register */ -#define FBR4 (0x030) /* DMA Channel 2 Frame Branch Register */ -#define FBR5 (0x110) /* DMA Channel 2 Frame Branch Register */ -#define FBR6 (0x114) /* DMA Channel 2 Frame Branch Register */ - -#define OVL1C1 (0x050) /* Overlay 1 Control Register 1 */ -#define OVL1C2 (0x060) /* Overlay 1 Control Register 2 */ -#define OVL2C1 (0x070) /* Overlay 2 Control Register 1 */ -#define OVL2C2 (0x080) /* Overlay 2 Control Register 2 */ - -#define CMDCR (0x100) /* Command Control Register */ -#define PRSR (0x104) /* Panel Read Status Register */ - -#define LCCR3_BPP(x) ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0)) - -#define LCCR3_PDFOR_0 (0 << 30) -#define LCCR3_PDFOR_1 (1 << 30) -#define LCCR3_PDFOR_2 (2 << 30) -#define LCCR3_PDFOR_3 (3 << 30) - -#define LCCR4_PAL_FOR_0 (0 << 15) -#define LCCR4_PAL_FOR_1 (1 << 15) -#define LCCR4_PAL_FOR_2 (2 << 15) -#define LCCR4_PAL_FOR_3 (3 << 15) -#define LCCR4_PAL_FOR_MASK (3 << 15) - -#define FDADR0 (0x200) /* DMA Channel 0 Frame Descriptor Address Register */ -#define FDADR1 (0x210) /* DMA Channel 1 Frame Descriptor Address Register */ -#define FDADR2 (0x220) /* DMA Channel 2 Frame Descriptor Address Register */ -#define FDADR3 (0x230) /* DMA Channel 3 Frame Descriptor Address Register */ -#define FDADR4 (0x240) /* DMA Channel 4 Frame Descriptor Address Register */ -#define FDADR5 (0x250) /* DMA Channel 5 Frame Descriptor Address Register */ -#define FDADR6 (0x260) /* DMA Channel 6 Frame Descriptor Address Register */ - -#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ -#define LCCR0_CMS (1 << 1) /* Color/Monochrome Display Select */ -#define LCCR0_Color (LCCR0_CMS*0) /* Color display */ -#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ -#define LCCR0_SDS (1 << 2) /* Single/Dual Panel Display Select */ -#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ -#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ - -#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ -#define LCCR0_SFM (1 << 4) /* Start of frame mask */ -#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ -#define LCCR0_EFM (1 << 6) /* End of Frame mask */ -#define LCCR0_PAS (1 << 7) /* Passive/Active display Select */ -#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ -#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ -#define LCCR0_DPD (1 << 9) /* Double Pixel Data (monochrome) */ -#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */ -#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */ -#define LCCR0_DIS (1 << 10) /* LCD Disable */ -#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ -#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ -#define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ -#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ -#define LCCR0_LCDT (1 << 22) /* LCD panel type */ -#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ -#define LCCR0_CMDIM (1 << 24) /* Command interrupt mask */ -#define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */ -#define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) -#define FShft(Field) ((Field) & 0x0000FFFF) - -#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ -#define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) - -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ -#define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW)) - -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */ -#define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW)) - -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ -#define LCCR1_BegLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_BLW)) - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) (((Line) - 1) << FShft (LCCR2_LPP)) - -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */ -#define LCCR2_VrtSnchWdth(Tln) (((Tln) - 1) << FShft (LCCR2_VSW)) - -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ -#define LCCR2_EndFrmDel(Tln) ((Tln) << FShft (LCCR2_EFW)) - -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ -#define LCCR2_BegFrmDel(Tln) ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ -#define LCCR3_API_S 16 -#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ -#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ -#define LCCR3_PCP (1 << 22) /* Pixel Clock Polarity (L_PCLK) */ -#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ -#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ - -#define LCCR3_OEP (1 << 23) /* Output Enable Polarity */ -#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ -#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ -#define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD))) - -#define LCCR3_ACB Fld (8, 8) /* AC Bias */ -#define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB))) - -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* HSP Active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* HSP Active Low */ - -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* VSP Active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* VSP Active Low */ - -#define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ -#define LCCR5_BSM(x) (1 << ((x) + 15)) /* branch mask */ -#define LCCR5_EOFM(x) (1 << ((x) + 7)) /* end of frame mask */ -#define LCCR5_SOFM(x) (1 << ((x) + 0)) /* start of frame mask */ - -#define LCSR_LDD (1 << 0) /* LCD Disable Done */ -#define LCSR_SOF (1 << 1) /* Start of frame */ -#define LCSR_BER (1 << 2) /* Bus error */ -#define LCSR_ABC (1 << 3) /* AC Bias count */ -#define LCSR_IUL (1 << 4) /* input FIFO underrun Lower panel */ -#define LCSR_IUU (1 << 5) /* input FIFO underrun Upper panel */ -#define LCSR_OU (1 << 6) /* output FIFO underrun */ -#define LCSR_QD (1 << 7) /* quick disable */ -#define LCSR_EOF (1 << 8) /* end of frame */ -#define LCSR_BS (1 << 9) /* branch status */ -#define LCSR_SINT (1 << 10) /* subsequent interrupt */ -#define LCSR_RD_ST (1 << 11) /* read status */ -#define LCSR_CMD_INT (1 << 12) /* command interrupt */ - -#define LCSR1_IU(x) (1 << ((x) + 23)) /* Input FIFO underrun */ -#define LCSR1_BS(x) (1 << ((x) + 15)) /* Branch Status */ -#define LCSR1_EOF(x) (1 << ((x) + 7)) /* End of Frame Status */ -#define LCSR1_SOF(x) (1 << ((x) - 1)) /* Start of Frame Status */ - -#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ - -/* overlay control registers */ -#define OVLxC1_PPL(x) ((((x) - 1) & 0x3ff) << 0) /* Pixels Per Line */ -#define OVLxC1_LPO(x) ((((x) - 1) & 0x3ff) << 10) /* Number of Lines */ -#define OVLxC1_BPP(x) (((x) & 0xf) << 20) /* Bits Per Pixel */ -#define OVLxC1_OEN (1 << 31) /* Enable bit for Overlay */ -#define OVLxC2_XPOS(x) (((x) & 0x3ff) << 0) /* Horizontal Position */ -#define OVLxC2_YPOS(x) (((x) & 0x3ff) << 10) /* Vertical Position */ -#define OVL2C2_PFOR(x) (((x) & 0x7) << 20) /* Pixel Format */ - -/* smartpanel related */ -#define PRSR_DATA(x) ((x) & 0xff) /* Panel Data */ -#define PRSR_A0 (1 << 8) /* Read Data Source */ -#define PRSR_ST_OK (1 << 9) /* Status OK */ -#define PRSR_CON_NT (1 << 10) /* Continue to Next Command */ - -#define SMART_CMD_A0 (0x1 << 8) -#define SMART_CMD_READ_STATUS_REG (0x0 << 9) -#define SMART_CMD_READ_FRAME_BUFFER ((0x0 << 9) | SMART_CMD_A0) -#define SMART_CMD_WRITE_COMMAND (0x1 << 9) -#define SMART_CMD_WRITE_DATA ((0x1 << 9) | SMART_CMD_A0) -#define SMART_CMD_WRITE_FRAME ((0x2 << 9) | SMART_CMD_A0) -#define SMART_CMD_WAIT_FOR_VSYNC (0x3 << 9) -#define SMART_CMD_NOOP (0x4 << 9) -#define SMART_CMD_INTERRUPT (0x5 << 9) - -#define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff)) -#define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff)) - -/* SMART_DELAY() is introduced for software controlled delay primitive which - * can be inserted between command sequences, unused command 0x6 is used here - * and delay ranges from 0ms ~ 255ms - */ -#define SMART_CMD_DELAY (0x6 << 9) -#define SMART_DELAY(ms) (SMART_CMD_DELAY | ((ms) & 0xff)) -#endif /* __ASM_ARCH_REGS_LCD_H */ diff --git a/drivers/video/fbdev/pxa3xx-regs.h b/drivers/video/fbdev/pxa3xx-regs.h new file mode 100644 index 000000000000..6a96610ef9b5 --- /dev/null +++ b/drivers/video/fbdev/pxa3xx-regs.h @@ -0,0 +1,180 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ASM_ARCH_REGS_LCD_H +#define __ASM_ARCH_REGS_LCD_H + +/* + * LCD Controller Registers and Bits Definitions + */ +#define LCCR0 (0x000) /* LCD Controller Control Register 0 */ +#define LCCR1 (0x004) /* LCD Controller Control Register 1 */ +#define LCCR2 (0x008) /* LCD Controller Control Register 2 */ +#define LCCR3 (0x00C) /* LCD Controller Control Register 3 */ +#define LCCR4 (0x010) /* LCD Controller Control Register 4 */ +#define LCCR5 (0x014) /* LCD Controller Control Register 5 */ +#define LCSR (0x038) /* LCD Controller Status Register 0 */ +#define LCSR1 (0x034) /* LCD Controller Status Register 1 */ +#define LIIDR (0x03C) /* LCD Controller Interrupt ID Register */ +#define TMEDRGBR (0x040) /* TMED RGB Seed Register */ +#define TMEDCR (0x044) /* TMED Control Register */ + +#define FBR0 (0x020) /* DMA Channel 0 Frame Branch Register */ +#define FBR1 (0x024) /* DMA Channel 1 Frame Branch Register */ +#define FBR2 (0x028) /* DMA Channel 2 Frame Branch Register */ +#define FBR3 (0x02C) /* DMA Channel 2 Frame Branch Register */ +#define FBR4 (0x030) /* DMA Channel 2 Frame Branch Register */ +#define FBR5 (0x110) /* DMA Channel 2 Frame Branch Register */ +#define FBR6 (0x114) /* DMA Channel 2 Frame Branch Register */ + +#define OVL1C1 (0x050) /* Overlay 1 Control Register 1 */ +#define OVL1C2 (0x060) /* Overlay 1 Control Register 2 */ +#define OVL2C1 (0x070) /* Overlay 2 Control Register 1 */ +#define OVL2C2 (0x080) /* Overlay 2 Control Register 2 */ + +#define CMDCR (0x100) /* Command Control Register */ +#define PRSR (0x104) /* Panel Read Status Register */ + +#define LCCR3_BPP(x) ((((x) & 0x7) << 24) | (((x) & 0x8) ? (1 << 29) : 0)) + +#define LCCR3_PDFOR_0 (0 << 30) +#define LCCR3_PDFOR_1 (1 << 30) +#define LCCR3_PDFOR_2 (2 << 30) +#define LCCR3_PDFOR_3 (3 << 30) + +#define LCCR4_PAL_FOR_0 (0 << 15) +#define LCCR4_PAL_FOR_1 (1 << 15) +#define LCCR4_PAL_FOR_2 (2 << 15) +#define LCCR4_PAL_FOR_3 (3 << 15) +#define LCCR4_PAL_FOR_MASK (3 << 15) + +#define FDADR0 (0x200) /* DMA Channel 0 Frame Descriptor Address Register */ +#define FDADR1 (0x210) /* DMA Channel 1 Frame Descriptor Address Register */ +#define FDADR2 (0x220) /* DMA Channel 2 Frame Descriptor Address Register */ +#define FDADR3 (0x230) /* DMA Channel 3 Frame Descriptor Address Register */ +#define FDADR4 (0x240) /* DMA Channel 4 Frame Descriptor Address Register */ +#define FDADR5 (0x250) /* DMA Channel 5 Frame Descriptor Address Register */ +#define FDADR6 (0x260) /* DMA Channel 6 Frame Descriptor Address Register */ + +#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ +#define LCCR0_CMS (1 << 1) /* Color/Monochrome Display Select */ +#define LCCR0_Color (LCCR0_CMS*0) /* Color display */ +#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ +#define LCCR0_SDS (1 << 2) /* Single/Dual Panel Display Select */ +#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ +#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ + +#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ +#define LCCR0_SFM (1 << 4) /* Start of frame mask */ +#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ +#define LCCR0_EFM (1 << 6) /* End of Frame mask */ +#define LCCR0_PAS (1 << 7) /* Passive/Active display Select */ +#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ +#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ +#define LCCR0_DPD (1 << 9) /* Double Pixel Data (monochrome) */ +#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */ +#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */ +#define LCCR0_DIS (1 << 10) /* LCD Disable */ +#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ +#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ +#define LCCR0_PDD_S 12 +#define LCCR0_BM (1 << 20) /* Branch mask */ +#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ +#define LCCR0_LCDT (1 << 22) /* LCD panel type */ +#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ +#define LCCR0_CMDIM (1 << 24) /* Command interrupt mask */ +#define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */ +#define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */ + +#define Fld(Size, Shft) (((Size) << 16) + (Shft)) +#define FShft(Field) ((Field) & 0x0000FFFF) + +#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ +#define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) + +#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ +#define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW)) + +#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */ +#define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW)) + +#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ +#define LCCR1_BegLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_BLW)) + +#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ +#define LCCR2_DisHght(Line) (((Line) - 1) << FShft (LCCR2_LPP)) + +#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */ +#define LCCR2_VrtSnchWdth(Tln) (((Tln) - 1) << FShft (LCCR2_VSW)) + +#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ +#define LCCR2_EndFrmDel(Tln) ((Tln) << FShft (LCCR2_EFW)) + +#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ +#define LCCR2_BegFrmDel(Tln) ((Tln) << FShft (LCCR2_BFW)) + +#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ +#define LCCR3_API_S 16 +#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ +#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ +#define LCCR3_PCP (1 << 22) /* Pixel Clock Polarity (L_PCLK) */ +#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ +#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ + +#define LCCR3_OEP (1 << 23) /* Output Enable Polarity */ +#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ +#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ + +#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ +#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ +#define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD))) + +#define LCCR3_ACB Fld (8, 8) /* AC Bias */ +#define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB))) + +#define LCCR3_HorSnchH (LCCR3_HSP*0) /* HSP Active High */ +#define LCCR3_HorSnchL (LCCR3_HSP*1) /* HSP Active Low */ + +#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* VSP Active High */ +#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* VSP Active Low */ + +#define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ +#define LCCR5_BSM(x) (1 << ((x) + 15)) /* branch mask */ +#define LCCR5_EOFM(x) (1 << ((x) + 7)) /* end of frame mask */ +#define LCCR5_SOFM(x) (1 << ((x) + 0)) /* start of frame mask */ + +#define LCSR_LDD (1 << 0) /* LCD Disable Done */ +#define LCSR_SOF (1 << 1) /* Start of frame */ +#define LCSR_BER (1 << 2) /* Bus error */ +#define LCSR_ABC (1 << 3) /* AC Bias count */ +#define LCSR_IUL (1 << 4) /* input FIFO underrun Lower panel */ +#define LCSR_IUU (1 << 5) /* input FIFO underrun Upper panel */ +#define LCSR_OU (1 << 6) /* output FIFO underrun */ +#define LCSR_QD (1 << 7) /* quick disable */ +#define LCSR_EOF (1 << 8) /* end of frame */ +#define LCSR_BS (1 << 9) /* branch status */ +#define LCSR_SINT (1 << 10) /* subsequent interrupt */ +#define LCSR_RD_ST (1 << 11) /* read status */ +#define LCSR_CMD_INT (1 << 12) /* command interrupt */ + +#define LCSR1_IU(x) (1 << ((x) + 23)) /* Input FIFO underrun */ +#define LCSR1_BS(x) (1 << ((x) + 15)) /* Branch Status */ +#define LCSR1_EOF(x) (1 << ((x) + 7)) /* End of Frame Status */ +#define LCSR1_SOF(x) (1 << ((x) - 1)) /* Start of Frame Status */ + +#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ + +/* overlay control registers */ +#define OVLxC1_PPL(x) ((((x) - 1) & 0x3ff) << 0) /* Pixels Per Line */ +#define OVLxC1_LPO(x) ((((x) - 1) & 0x3ff) << 10) /* Number of Lines */ +#define OVLxC1_BPP(x) (((x) & 0xf) << 20) /* Bits Per Pixel */ +#define OVLxC1_OEN (1 << 31) /* Enable bit for Overlay */ +#define OVLxC2_XPOS(x) (((x) & 0x3ff) << 0) /* Horizontal Position */ +#define OVLxC2_YPOS(x) (((x) & 0x3ff) << 10) /* Vertical Position */ +#define OVL2C2_PFOR(x) (((x) & 0x7) << 20) /* Pixel Format */ + +/* smartpanel related */ +#define PRSR_DATA(x) ((x) & 0xff) /* Panel Data */ +#define PRSR_A0 (1 << 8) /* Read Data Source */ +#define PRSR_ST_OK (1 << 9) /* Status OK */ +#define PRSR_CON_NT (1 << 10) /* Continue to Next Command */ + +#endif /* __ASM_ARCH_REGS_LCD_H */ diff --git a/drivers/video/fbdev/pxafb.c b/drivers/video/fbdev/pxafb.c index edf080f64a8c..ab5bc8272d8e 100644 --- a/drivers/video/fbdev/pxafb.c +++ b/drivers/video/fbdev/pxafb.c @@ -72,6 +72,7 @@ #define DEBUG_VAR 1 #include "pxafb.h" +#include "pxa3xx-regs.h" /* Bits which should not be set in machine configuration structures */ #define LCCR0_INVALID_CONFIG_MASK (LCCR0_OUM | LCCR0_BM | LCCR0_QDM |\ diff --git a/include/linux/platform_data/video-pxafb.h b/include/linux/platform_data/video-pxafb.h index b3d574778326..6333bac166a5 100644 --- a/include/linux/platform_data/video-pxafb.h +++ b/include/linux/platform_data/video-pxafb.h @@ -8,7 +8,6 @@ */ #include -#include /* * Supported LCD connections @@ -153,6 +152,27 @@ struct pxafb_mach_info { void pxa_set_fb_info(struct device *, struct pxafb_mach_info *); unsigned long pxafb_get_hsync_time(struct device *dev); +/* smartpanel related */ +#define SMART_CMD_A0 (0x1 << 8) +#define SMART_CMD_READ_STATUS_REG (0x0 << 9) +#define SMART_CMD_READ_FRAME_BUFFER ((0x0 << 9) | SMART_CMD_A0) +#define SMART_CMD_WRITE_COMMAND (0x1 << 9) +#define SMART_CMD_WRITE_DATA ((0x1 << 9) | SMART_CMD_A0) +#define SMART_CMD_WRITE_FRAME ((0x2 << 9) | SMART_CMD_A0) +#define SMART_CMD_WAIT_FOR_VSYNC (0x3 << 9) +#define SMART_CMD_NOOP (0x4 << 9) +#define SMART_CMD_INTERRUPT (0x5 << 9) + +#define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff)) +#define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff)) + +/* SMART_DELAY() is introduced for software controlled delay primitive which + * can be inserted between command sequences, unused command 0x6 is used here + * and delay ranges from 0ms ~ 255ms + */ +#define SMART_CMD_DELAY (0x6 << 9) +#define SMART_DELAY(ms) (SMART_CMD_DELAY | ((ms) & 0xff)) + #ifdef CONFIG_FB_PXA_SMARTPANEL extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); extern int pxafb_smart_flush(struct fb_info *info); -- cgit v1.2.3 From b83deaa741558babf4b8d51d34f6637ccfff1b26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 28 May 2020 22:57:40 +0200 Subject: ARM: pxa: move pcmcia board data into mach-pxa The drivers/pcmcia/pxa2xx_*.c are essentially part of the board files, but for historic reasons located in drivers/pcmcia. Move them into the same place as the actual board file to avoid lots of machine header inclusions. Cc: Marek Vasut Cc: Dominik Brodowski Cc: Jonathan Cameron Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/Makefile | 18 +- arch/arm/mach-pxa/balloon3-pcmcia.c | 137 +++++++++++++++ arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/balloon3.h | 181 ++++++++++++++++++++ arch/arm/mach-pxa/colibri-pcmcia.c | 165 ++++++++++++++++++ arch/arm/mach-pxa/e740-pcmcia.c | 127 ++++++++++++++ arch/arm/mach-pxa/hx4700-pcmcia.c | 118 +++++++++++++ arch/arm/mach-pxa/include/mach/balloon3.h | 181 -------------------- arch/arm/mach-pxa/include/mach/palmtc.h | 84 --------- arch/arm/mach-pxa/include/mach/palmtx.h | 110 ------------ arch/arm/mach-pxa/include/mach/trizeps4.h | 166 ------------------ arch/arm/mach-pxa/include/mach/vpac270.h | 38 ---- arch/arm/mach-pxa/palmld-pcmcia.c | 110 ++++++++++++ arch/arm/mach-pxa/palmtc-pcmcia.c | 162 ++++++++++++++++++ arch/arm/mach-pxa/palmtc.c | 2 +- arch/arm/mach-pxa/palmtc.h | 84 +++++++++ arch/arm/mach-pxa/palmtx-pcmcia.c | 111 ++++++++++++ arch/arm/mach-pxa/palmtx.c | 2 +- arch/arm/mach-pxa/palmtx.h | 110 ++++++++++++ arch/arm/mach-pxa/trizeps4-pcmcia.c | 200 ++++++++++++++++++++++ arch/arm/mach-pxa/trizeps4.c | 2 +- arch/arm/mach-pxa/trizeps4.h | 166 ++++++++++++++++++ arch/arm/mach-pxa/viper-pcmcia.c | 180 +++++++++++++++++++ arch/arm/mach-pxa/viper-pcmcia.h | 12 ++ arch/arm/mach-pxa/viper.c | 2 +- arch/arm/mach-pxa/vpac270-pcmcia.c | 137 +++++++++++++++ arch/arm/mach-pxa/vpac270.c | 2 +- arch/arm/mach-pxa/vpac270.h | 38 ++++ arch/arm/mach-pxa/zeus.c | 2 +- drivers/pcmcia/Makefile | 13 -- drivers/pcmcia/pxa2xx_balloon3.c | 137 --------------- drivers/pcmcia/pxa2xx_colibri.c | 165 ------------------ drivers/pcmcia/pxa2xx_e740.c | 127 -------------- drivers/pcmcia/pxa2xx_hx4700.c | 118 ------------- drivers/pcmcia/pxa2xx_palmld.c | 110 ------------ drivers/pcmcia/pxa2xx_palmtc.c | 162 ------------------ drivers/pcmcia/pxa2xx_palmtx.c | 111 ------------ drivers/pcmcia/pxa2xx_sharpsl.c | 2 +- drivers/pcmcia/pxa2xx_trizeps4.c | 200 ---------------------- drivers/pcmcia/pxa2xx_viper.c | 182 -------------------- drivers/pcmcia/pxa2xx_vpac270.c | 137 --------------- drivers/pcmcia/soc_common.h | 120 +------------ include/linux/platform_data/pcmcia-pxa2xx_viper.h | 12 -- include/pcmcia/soc_common.h | 125 ++++++++++++++ 44 files changed, 2183 insertions(+), 2187 deletions(-) create mode 100644 arch/arm/mach-pxa/balloon3-pcmcia.c create mode 100644 arch/arm/mach-pxa/balloon3.h create mode 100644 arch/arm/mach-pxa/colibri-pcmcia.c create mode 100644 arch/arm/mach-pxa/e740-pcmcia.c create mode 100644 arch/arm/mach-pxa/hx4700-pcmcia.c delete mode 100644 arch/arm/mach-pxa/include/mach/balloon3.h delete mode 100644 arch/arm/mach-pxa/include/mach/palmtc.h delete mode 100644 arch/arm/mach-pxa/include/mach/palmtx.h delete mode 100644 arch/arm/mach-pxa/include/mach/trizeps4.h delete mode 100644 arch/arm/mach-pxa/include/mach/vpac270.h create mode 100644 arch/arm/mach-pxa/palmld-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtc-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtc.h create mode 100644 arch/arm/mach-pxa/palmtx-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtx.h create mode 100644 arch/arm/mach-pxa/trizeps4-pcmcia.c create mode 100644 arch/arm/mach-pxa/trizeps4.h create mode 100644 arch/arm/mach-pxa/viper-pcmcia.c create mode 100644 arch/arm/mach-pxa/viper-pcmcia.h create mode 100644 arch/arm/mach-pxa/vpac270-pcmcia.c create mode 100644 arch/arm/mach-pxa/vpac270.h delete mode 100644 drivers/pcmcia/pxa2xx_balloon3.c delete mode 100644 drivers/pcmcia/pxa2xx_colibri.c delete mode 100644 drivers/pcmcia/pxa2xx_e740.c delete mode 100644 drivers/pcmcia/pxa2xx_hx4700.c delete mode 100644 drivers/pcmcia/pxa2xx_palmld.c delete mode 100644 drivers/pcmcia/pxa2xx_palmtc.c delete mode 100644 drivers/pcmcia/pxa2xx_palmtx.c delete mode 100644 drivers/pcmcia/pxa2xx_trizeps4.c delete mode 100644 drivers/pcmcia/pxa2xx_viper.c delete mode 100644 drivers/pcmcia/pxa2xx_vpac270.c delete mode 100644 include/linux/platform_data/pcmcia-pxa2xx_viper.h create mode 100644 include/pcmcia/soc_common.h (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 68730ceb8b7c..0aec36e67dc1 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -37,7 +37,8 @@ obj-$(CONFIG_MACH_SAAR) += saar.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_ARCH_VIPER) += viper.o obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o -obj-$(CONFIG_MACH_BALLOON3) += balloon3.o +obj-$(CONFIG_ARCOM_PCMCIA) += viper-pcmcia.o +obj-$(CONFIG_MACH_BALLOON3) += balloon3.o balloon3-pcmcia.o obj-$(CONFIG_MACH_CSB726) += csb726.o obj-$(CONFIG_CSB726_CSB701) += csb701.o obj-$(CONFIG_MACH_CM_X300) += cm-x300.o @@ -47,18 +48,20 @@ obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o obj-$(CONFIG_MACH_XCEP) += xcep.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o +obj-$(CONFIG_TRIZEPS_PCMCIA) += trizeps4-pcmcia.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_PCM027) += pcm027.o obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o -obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o +obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o colibri-pcmcia.o obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o -obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o -obj-$(CONFIG_MACH_VPAC270) += vpac270.o +obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o colibri-pcmcia.o +obj-$(CONFIG_MACH_VPAC270) += vpac270.o vpac270-pcmcia.o # End-user Products obj-$(CONFIG_MACH_H4700) += hx4700.o +obj-$(CONFIG_MACH_H4700) += hx4700-pcmcia.o obj-$(CONFIG_MACH_H5000) += h5000.o obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o obj-$(CONFIG_MACH_MAGICIAN) += magician.o @@ -66,12 +69,12 @@ obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o obj-$(CONFIG_PXA_EZX) += ezx.o obj-$(CONFIG_MACH_MP900C) += mp900.o obj-$(CONFIG_MACH_PALMTE2) += palmte2.o -obj-$(CONFIG_MACH_PALMTC) += palmtc.o +obj-$(CONFIG_MACH_PALMTC) += palmtc.o palmtc-pcmcia.o obj-$(CONFIG_MACH_PALM27X) += palm27x.o obj-$(CONFIG_MACH_PALMT5) += palmt5.o -obj-$(CONFIG_MACH_PALMTX) += palmtx.o +obj-$(CONFIG_MACH_PALMTX) += palmtx.o palmtx-pcmcia.o obj-$(CONFIG_MACH_PALMZ72) += palmz72.o -obj-$(CONFIG_MACH_PALMLD) += palmld.o +obj-$(CONFIG_MACH_PALMLD) += palmld.o palmld-pcmcia.o obj-$(CONFIG_PALM_TREO) += palmtreo.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o @@ -79,6 +82,7 @@ obj-$(CONFIG_MACH_POODLE) += poodle.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o +obj-$(CONFIG_MACH_E740) += e740-pcmcia.o obj-$(CONFIG_MACH_ZIPIT2) += z2.o obj-$(CONFIG_PXA_SYSTEMS_CPLDS) += pxa_cplds_irqs.o diff --git a/arch/arm/mach-pxa/balloon3-pcmcia.c b/arch/arm/mach-pxa/balloon3-pcmcia.c new file mode 100644 index 000000000000..6a27b76cc603 --- /dev/null +++ b/arch/arm/mach-pxa/balloon3-pcmcia.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_balloon3.c + * + * Balloon3 PCMCIA specific routines. + * + * Author: Nick Bane + * Created: June, 2006 + * Copyright: Toby Churchill Ltd + * Derived from pxa2xx_mainstone.c, by Nico Pitre + * + * Various modification by Marek Vasut + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "balloon3.h" + +#include + +#include + +static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + uint16_t ver; + + ver = __raw_readw(BALLOON3_FPGA_VER); + if (ver < 0x4f08) + pr_warn("The FPGA code, version 0x%04x, is too old. " + "PCMCIA/CF support might be broken in this version!", + ver); + + skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ; + skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD; + skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD"; + skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ; + skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG"; + + return 0; +} + +static unsigned long balloon3_pcmcia_status[2] = { + BALLOON3_CF_nSTSCHG_BVD1, + BALLOON3_CF_nSTSCHG_BVD1 +}; + +static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + uint16_t status; + int flip; + + /* This actually reads the STATUS register */ + status = __raw_readw(BALLOON3_CF_STATUS_REG); + flip = (status ^ balloon3_pcmcia_status[skt->nr]) + & BALLOON3_CF_nSTSCHG_BVD1; + /* + * Workaround for STSCHG which can't be deasserted: + * We therefore disable/enable corresponding IRQs + * as needed to avoid IRQ locks. + */ + if (flip) { + balloon3_pcmcia_status[skt->nr] = status; + if (status & BALLOON3_CF_nSTSCHG_BVD1) + enable_irq(BALLOON3_BP_NSTSCHG_IRQ); + else + disable_irq(BALLOON3_BP_NSTSCHG_IRQ); + } + + state->ready = !!(status & BALLOON3_CF_nIRQ); + state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1); + state->bvd2 = 0; /* not available */ + state->vs_3v = 1; /* Always true its a CF card */ + state->vs_Xv = 0; /* not available */ +} + +static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + + ((state->flags & SS_RESET) ? + BALLOON3_FPGA_SETnCLR : 0)); + return 0; +} + +static struct pcmcia_low_level balloon3_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = balloon3_pcmcia_hw_init, + .socket_state = balloon3_pcmcia_socket_state, + .configure_socket = balloon3_pcmcia_configure_socket, + .first = 0, + .nr = 1, +}; + +static struct platform_device *balloon3_pcmcia_device; + +static int __init balloon3_pcmcia_init(void) +{ + int ret; + + if (!machine_is_balloon3()) + return -ENODEV; + + balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!balloon3_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(balloon3_pcmcia_device, + &balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(balloon3_pcmcia_device); + + if (ret) + platform_device_put(balloon3_pcmcia_device); + + return ret; +} + +static void __exit balloon3_pcmcia_exit(void) +{ + platform_device_unregister(balloon3_pcmcia_device); +} + +module_init(balloon3_pcmcia_init); +module_exit(balloon3_pcmcia_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nick Bane "); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver"); diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 82f9299f67d3..896d47d9a8dc 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -40,7 +40,7 @@ #include #include "pxa27x.h" -#include +#include "balloon3.h" #include #include #include diff --git a/arch/arm/mach-pxa/balloon3.h b/arch/arm/mach-pxa/balloon3.h new file mode 100644 index 000000000000..f351358c0e5b --- /dev/null +++ b/arch/arm/mach-pxa/balloon3.h @@ -0,0 +1,181 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/asm-arm/arch-pxa/balloon3.h + * + * Authors: Nick Bane and Wookey + * Created: Oct, 2005 + * Copyright: Toby Churchill Ltd + * Cribbed from mainstone.c, by Nicholas Pitre + */ + +#ifndef ASM_ARCH_BALLOON3_H +#define ASM_ARCH_BALLOON3_H + +#include /* PXA_NR_BUILTIN_GPIO */ + +enum balloon3_features { + BALLOON3_FEATURE_OHCI, + BALLOON3_FEATURE_MMC, + BALLOON3_FEATURE_CF, + BALLOON3_FEATURE_AUDIO, + BALLOON3_FEATURE_TOPPOLY, +}; + +#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS +#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ +#define BALLOON3_FPGA_LENGTH 0x01000000 + +#define BALLOON3_FPGA_SETnCLR (0x1000) + +/* FPGA / CPLD registers for CF socket */ +#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) +#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) +/* FPGA / CPLD version register */ +#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) +/* FPGA / CPLD registers for NAND flash */ +#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) +#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) +#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) +#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) +#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) + +/* fpga/cpld interrupt control register */ +#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) +#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) + +#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) +#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) +#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) + +/* CF Status Register bits (read-only) bits */ +#define BALLOON3_CF_nIRQ (1 << 0) +#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) + +/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ +#define BALLOON3_CF_RESET (1 << 0) +#define BALLOON3_CF_ENABLE (1 << 1) +#define BALLOON3_CF_ADD_ENABLE (1 << 2) + +/* CF Interrupt sources */ +#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) +#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) + +/* NAND Control register */ +#define BALLOON3_NAND_CONTROL_FLWP (1 << 7) +#define BALLOON3_NAND_CONTROL_FLSE (1 << 6) +#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) +#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) +#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) +#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) +#define BALLOON3_NAND_CONTROL_FLALE (1 << 1) +#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) + +/* NAND Status register */ +#define BALLOON3_NAND_STAT_RNB (1 << 0) + +/* NAND Control2 register */ +#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) + +/* GPIOs for irqs */ +#define BALLOON3_GPIO_AUX_NIRQ (94) +#define BALLOON3_GPIO_CODEC_IRQ (95) + +/* Timer and Idle LED locations */ +#define BALLOON3_GPIO_LED_NAND (9) +#define BALLOON3_GPIO_LED_IDLE (10) + +/* backlight control */ +#define BALLOON3_GPIO_RUN_BACKLIGHT (99) + +#define BALLOON3_GPIO_S0_CD (105) + +/* NAND */ +#define BALLOON3_GPIO_RUN_NAND (102) + +/* PCF8574A Leds */ +#define BALLOON3_PCF_GPIO_BASE 160 +#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) +#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) +#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) +#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) +#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) +#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) +#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) +#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) + +/* FPGA Interrupt Mask/Acknowledge Register */ +#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ +#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ + +/* CPLD (and FPGA) interface definitions */ +#define CPLD_LCD0_DATA_SET 0x00 +#define CPLD_LCD0_DATA_CLR 0x10 +#define CPLD_LCD0_COMMAND_SET 0x01 +#define CPLD_LCD0_COMMAND_CLR 0x11 +#define CPLD_LCD1_DATA_SET 0x02 +#define CPLD_LCD1_DATA_CLR 0x12 +#define CPLD_LCD1_COMMAND_SET 0x03 +#define CPLD_LCD1_COMMAND_CLR 0x13 + +#define CPLD_MISC_SET 0x07 +#define CPLD_MISC_CLR 0x17 +#define CPLD_MISC_LOON_NRESET_BIT 0 +#define CPLD_MISC_LOON_UNSUSP_BIT 1 +#define CPLD_MISC_RUN_5V_BIT 2 +#define CPLD_MISC_CHG_D0_BIT 3 +#define CPLD_MISC_CHG_D1_BIT 4 +#define CPLD_MISC_DAC_NCS_BIT 5 + +#define CPLD_LCD_SET 0x08 +#define CPLD_LCD_CLR 0x18 +#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0 +#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1 +#define CPLD_LCD_LED_RED_BIT 4 +#define CPLD_LCD_LED_GREEN_BIT 5 +#define CPLD_LCD_NRESET_BIT 7 + +#define CPLD_LCD_RO_SET 0x09 +#define CPLD_LCD_RO_CLR 0x19 +#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0 +#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1 + +#define CPLD_SERIAL_SET 0x0a +#define CPLD_SERIAL_CLR 0x1a +#define CPLD_SERIAL_GSM_RI_BIT 0 +#define CPLD_SERIAL_GSM_CTS_BIT 1 +#define CPLD_SERIAL_GSM_DTR_BIT 2 +#define CPLD_SERIAL_LPR_CTS_BIT 3 +#define CPLD_SERIAL_TC232_CTS_BIT 4 +#define CPLD_SERIAL_TC232_DSR_BIT 5 + +#define CPLD_SROUTING_SET 0x0b +#define CPLD_SROUTING_CLR 0x1b +#define CPLD_SROUTING_MSP430_LPR 0 +#define CPLD_SROUTING_MSP430_TC232 1 +#define CPLD_SROUTING_MSP430_GSM 2 +#define CPLD_SROUTING_LOON_LPR (0 << 4) +#define CPLD_SROUTING_LOON_TC232 (1 << 4) +#define CPLD_SROUTING_LOON_GSM (2 << 4) + +#define CPLD_AROUTING_SET 0x0c +#define CPLD_AROUTING_CLR 0x1c +#define CPLD_AROUTING_MIC2PHONE_BIT 0 +#define CPLD_AROUTING_PHONE2INT_BIT 1 +#define CPLD_AROUTING_PHONE2EXT_BIT 2 +#define CPLD_AROUTING_LOONL2INT_BIT 3 +#define CPLD_AROUTING_LOONL2EXT_BIT 4 +#define CPLD_AROUTING_LOONR2PHONE_BIT 5 +#define CPLD_AROUTING_LOONR2INT_BIT 6 +#define CPLD_AROUTING_LOONR2EXT_BIT 7 + +/* Balloon3 Interrupts */ +#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) + +#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) +#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) + +#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) + +extern int balloon3_has(enum balloon3_features feature); + +#endif diff --git a/arch/arm/mach-pxa/colibri-pcmcia.c b/arch/arm/mach-pxa/colibri-pcmcia.c new file mode 100644 index 000000000000..9da7b478e5eb --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pcmcia.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_colibri.c + * + * Driver for Toradex Colibri PXA270 CF socket + * + * Copyright (C) 2010 Marek Vasut + */ + +#include +#include +#include +#include + +#include + +#include + +#define COLIBRI270_RESET_GPIO 53 +#define COLIBRI270_PPEN_GPIO 107 +#define COLIBRI270_BVD1_GPIO 83 +#define COLIBRI270_BVD2_GPIO 82 +#define COLIBRI270_DETECT_GPIO 84 +#define COLIBRI270_READY_GPIO 1 + +#define COLIBRI320_RESET_GPIO 77 +#define COLIBRI320_PPEN_GPIO 57 +#define COLIBRI320_BVD1_GPIO 53 +#define COLIBRI320_BVD2_GPIO 79 +#define COLIBRI320_DETECT_GPIO 81 +#define COLIBRI320_READY_GPIO 29 + +enum { + DETECT = 0, + READY = 1, + BVD1 = 2, + BVD2 = 3, + PPEN = 4, + RESET = 5, +}; + +/* Contents of this array are configured on-the-fly in init function */ +static struct gpio colibri_pcmcia_gpios[] = { + { 0, GPIOF_IN, "PCMCIA Detect" }, + { 0, GPIOF_IN, "PCMCIA Ready" }, + { 0, GPIOF_IN, "PCMCIA BVD1" }, + { 0, GPIOF_IN, "PCMCIA BVD2" }, + { 0, GPIOF_INIT_LOW, "PCMCIA PPEN" }, + { 0, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(colibri_pcmcia_gpios, + ARRAY_SIZE(colibri_pcmcia_gpios)); + if (ret) + goto err1; + + skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio); + skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio); + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + +err1: + return ret; +} + +static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(colibri_pcmcia_gpios, + ARRAY_SIZE(colibri_pcmcia_gpios)); +} + +static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + + state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio); + state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio); + state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio); + state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio); + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio, + !(state->Vcc == 33 && state->Vpp < 50)); + gpio_set_value(colibri_pcmcia_gpios[RESET].gpio, + state->flags & SS_RESET); + return 0; +} + +static struct pcmcia_low_level colibri_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = colibri_pcmcia_hw_init, + .hw_shutdown = colibri_pcmcia_hw_shutdown, + + .socket_state = colibri_pcmcia_socket_state, + .configure_socket = colibri_pcmcia_configure_socket, +}; + +static struct platform_device *colibri_pcmcia_device; + +static int __init colibri_pcmcia_init(void) +{ + int ret; + + if (!machine_is_colibri() && !machine_is_colibri320()) + return -ENODEV; + + colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!colibri_pcmcia_device) + return -ENOMEM; + + /* Colibri PXA270 */ + if (machine_is_colibri()) { + colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO; + colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO; + colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO; + colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO; + colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO; + colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO; + /* Colibri PXA320 */ + } else if (machine_is_colibri320()) { + colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO; + colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO; + colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO; + colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO; + colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO; + colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO; + } + + ret = platform_device_add_data(colibri_pcmcia_device, + &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(colibri_pcmcia_device); + + if (ret) + platform_device_put(colibri_pcmcia_device); + + return ret; +} + +static void __exit colibri_pcmcia_exit(void) +{ + platform_device_unregister(colibri_pcmcia_device); +} + +module_init(colibri_pcmcia_init); +module_exit(colibri_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/e740-pcmcia.c b/arch/arm/mach-pxa/e740-pcmcia.c new file mode 100644 index 000000000000..133535d7ac05 --- /dev/null +++ b/arch/arm/mach-pxa/e740-pcmcia.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Toshiba e740 PCMCIA specific routines. + * + * (c) 2004 Ian Molton + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include + +static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + if (skt->nr == 0) { + skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0; + skt->stat[SOC_STAT_CD].name = "CF card detect"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0; + skt->stat[SOC_STAT_RDY].name = "CF ready"; + } else { + skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1; + skt->stat[SOC_STAT_CD].name = "Wifi switch"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1; + skt->stat[SOC_STAT_RDY].name = "Wifi ready"; + } + + return 0; +} + +static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + if (state->flags & SS_RESET) { + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_RST0, 1); + else + gpio_set_value(GPIO_E740_PCMCIA_RST1, 1); + } else { + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_RST0, 0); + else + gpio_set_value(GPIO_E740_PCMCIA_RST1, 0); + } + + switch (state->Vcc) { + case 0: /* Socket off */ + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0); + else + gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1); + break; + case 50: + case 33: /* socket on */ + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1); + else + gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0); + break; + default: + printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc); + } + + return 0; +} + +static struct pcmcia_low_level e740_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = e740_pcmcia_hw_init, + .socket_state = e740_pcmcia_socket_state, + .configure_socket = e740_pcmcia_configure_socket, + .nr = 2, +}; + +static struct platform_device *e740_pcmcia_device; + +static int __init e740_pcmcia_init(void) +{ + int ret; + + if (!machine_is_e740()) + return -ENODEV; + + e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!e740_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops, + sizeof(e740_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(e740_pcmcia_device); + + if (ret) + platform_device_put(e740_pcmcia_device); + + return ret; +} + +static void __exit e740_pcmcia_exit(void) +{ + platform_device_unregister(e740_pcmcia_device); +} + +module_init(e740_pcmcia_init); +module_exit(e740_pcmcia_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Ian Molton "); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_DESCRIPTION("e740 PCMCIA platform support"); diff --git a/arch/arm/mach-pxa/hx4700-pcmcia.c b/arch/arm/mach-pxa/hx4700-pcmcia.c new file mode 100644 index 000000000000..e8acbfc9ef6c --- /dev/null +++ b/arch/arm/mach-pxa/hx4700-pcmcia.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Paul Parsons + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include + +static struct gpio gpios[] = { + { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" }, + { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" }, +}; + +static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); + if (ret) + goto out; + + /* + * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq(). + * The asic3 default IRQ type is level trigger low level detect, exactly + * the the signal present on GPIOD4_CF_nCD when a CF card is inserted. + * If the IRQ type is not changed, the asic3 interrupt handler will loop + * repeatedly because it is unable to clear the level trigger interrupt. + */ + irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH); + + skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD; + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + +out: + return ret; +} + +static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(gpios, ARRAY_SIZE(gpios)); +} + +static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + switch (state->Vcc) { + case 0: + gpio_set_value(EGPIO4_CF_3V3_ON, 0); + break; + case 33: + gpio_set_value(EGPIO4_CF_3V3_ON, 1); + break; + default: + printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc); + return -EINVAL; + } + + gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0); + + return 0; +} + +static struct pcmcia_low_level hx4700_pcmcia_ops = { + .owner = THIS_MODULE, + .nr = 1, + .hw_init = hx4700_pcmcia_hw_init, + .hw_shutdown = hx4700_pcmcia_hw_shutdown, + .socket_state = hx4700_pcmcia_socket_state, + .configure_socket = hx4700_pcmcia_configure_socket, +}; + +static struct platform_device *hx4700_pcmcia_device; + +static int __init hx4700_pcmcia_init(void) +{ + struct platform_device *pdev; + + if (!machine_is_h4700()) + return -ENODEV; + + pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1, + &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops)); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + hx4700_pcmcia_device = pdev; + + return 0; +} + +static void __exit hx4700_pcmcia_exit(void) +{ + platform_device_unregister(hx4700_pcmcia_device); +} + +module_init(hx4700_pcmcia_init); +module_exit(hx4700_pcmcia_exit); + +MODULE_AUTHOR("Paul Parsons "); +MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h deleted file mode 100644 index 04f3639c4082..000000000000 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ /dev/null @@ -1,181 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/balloon3.h - * - * Authors: Nick Bane and Wookey - * Created: Oct, 2005 - * Copyright: Toby Churchill Ltd - * Cribbed from mainstone.c, by Nicholas Pitre - */ - -#ifndef ASM_ARCH_BALLOON3_H -#define ASM_ARCH_BALLOON3_H - -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -enum balloon3_features { - BALLOON3_FEATURE_OHCI, - BALLOON3_FEATURE_MMC, - BALLOON3_FEATURE_CF, - BALLOON3_FEATURE_AUDIO, - BALLOON3_FEATURE_TOPPOLY, -}; - -#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS -#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ -#define BALLOON3_FPGA_LENGTH 0x01000000 - -#define BALLOON3_FPGA_SETnCLR (0x1000) - -/* FPGA / CPLD registers for CF socket */ -#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -/* FPGA / CPLD version register */ -#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) -/* FPGA / CPLD registers for NAND flash */ -#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) -#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) -#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) -#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) -#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) - -/* fpga/cpld interrupt control register */ -#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) -#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) - -#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) -#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) -#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) - -/* CF Status Register bits (read-only) bits */ -#define BALLOON3_CF_nIRQ (1 << 0) -#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) - -/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ -#define BALLOON3_CF_RESET (1 << 0) -#define BALLOON3_CF_ENABLE (1 << 1) -#define BALLOON3_CF_ADD_ENABLE (1 << 2) - -/* CF Interrupt sources */ -#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) -#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) - -/* NAND Control register */ -#define BALLOON3_NAND_CONTROL_FLWP (1 << 7) -#define BALLOON3_NAND_CONTROL_FLSE (1 << 6) -#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) -#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) -#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) -#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) -#define BALLOON3_NAND_CONTROL_FLALE (1 << 1) -#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) - -/* NAND Status register */ -#define BALLOON3_NAND_STAT_RNB (1 << 0) - -/* NAND Control2 register */ -#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) - -/* GPIOs for irqs */ -#define BALLOON3_GPIO_AUX_NIRQ (94) -#define BALLOON3_GPIO_CODEC_IRQ (95) - -/* Timer and Idle LED locations */ -#define BALLOON3_GPIO_LED_NAND (9) -#define BALLOON3_GPIO_LED_IDLE (10) - -/* backlight control */ -#define BALLOON3_GPIO_RUN_BACKLIGHT (99) - -#define BALLOON3_GPIO_S0_CD (105) - -/* NAND */ -#define BALLOON3_GPIO_RUN_NAND (102) - -/* PCF8574A Leds */ -#define BALLOON3_PCF_GPIO_BASE 160 -#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) -#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) -#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) -#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) -#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) -#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) -#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) -#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) - -/* FPGA Interrupt Mask/Acknowledge Register */ -#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ -#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ - -/* CPLD (and FPGA) interface definitions */ -#define CPLD_LCD0_DATA_SET 0x00 -#define CPLD_LCD0_DATA_CLR 0x10 -#define CPLD_LCD0_COMMAND_SET 0x01 -#define CPLD_LCD0_COMMAND_CLR 0x11 -#define CPLD_LCD1_DATA_SET 0x02 -#define CPLD_LCD1_DATA_CLR 0x12 -#define CPLD_LCD1_COMMAND_SET 0x03 -#define CPLD_LCD1_COMMAND_CLR 0x13 - -#define CPLD_MISC_SET 0x07 -#define CPLD_MISC_CLR 0x17 -#define CPLD_MISC_LOON_NRESET_BIT 0 -#define CPLD_MISC_LOON_UNSUSP_BIT 1 -#define CPLD_MISC_RUN_5V_BIT 2 -#define CPLD_MISC_CHG_D0_BIT 3 -#define CPLD_MISC_CHG_D1_BIT 4 -#define CPLD_MISC_DAC_NCS_BIT 5 - -#define CPLD_LCD_SET 0x08 -#define CPLD_LCD_CLR 0x18 -#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0 -#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1 -#define CPLD_LCD_LED_RED_BIT 4 -#define CPLD_LCD_LED_GREEN_BIT 5 -#define CPLD_LCD_NRESET_BIT 7 - -#define CPLD_LCD_RO_SET 0x09 -#define CPLD_LCD_RO_CLR 0x19 -#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0 -#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1 - -#define CPLD_SERIAL_SET 0x0a -#define CPLD_SERIAL_CLR 0x1a -#define CPLD_SERIAL_GSM_RI_BIT 0 -#define CPLD_SERIAL_GSM_CTS_BIT 1 -#define CPLD_SERIAL_GSM_DTR_BIT 2 -#define CPLD_SERIAL_LPR_CTS_BIT 3 -#define CPLD_SERIAL_TC232_CTS_BIT 4 -#define CPLD_SERIAL_TC232_DSR_BIT 5 - -#define CPLD_SROUTING_SET 0x0b -#define CPLD_SROUTING_CLR 0x1b -#define CPLD_SROUTING_MSP430_LPR 0 -#define CPLD_SROUTING_MSP430_TC232 1 -#define CPLD_SROUTING_MSP430_GSM 2 -#define CPLD_SROUTING_LOON_LPR (0 << 4) -#define CPLD_SROUTING_LOON_TC232 (1 << 4) -#define CPLD_SROUTING_LOON_GSM (2 << 4) - -#define CPLD_AROUTING_SET 0x0c -#define CPLD_AROUTING_CLR 0x1c -#define CPLD_AROUTING_MIC2PHONE_BIT 0 -#define CPLD_AROUTING_PHONE2INT_BIT 1 -#define CPLD_AROUTING_PHONE2EXT_BIT 2 -#define CPLD_AROUTING_LOONL2INT_BIT 3 -#define CPLD_AROUTING_LOONL2EXT_BIT 4 -#define CPLD_AROUTING_LOONR2PHONE_BIT 5 -#define CPLD_AROUTING_LOONR2INT_BIT 6 -#define CPLD_AROUTING_LOONR2EXT_BIT 7 - -/* Balloon3 Interrupts */ -#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) - -#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) -#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) - -#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) - -extern int balloon3_has(enum balloon3_features feature); - -#endif diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h deleted file mode 100644 index 9257a02c46e5..000000000000 --- a/arch/arm/mach-pxa/include/mach/palmtc.h +++ /dev/null @@ -1,84 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/palmtc-gpio.h - * - * GPIOs and interrupts for Palm Tungsten|C Handheld Computer - * - * Authors: Alex Osborne - * Marek Vasut - * Holger Bocklet - */ - -#ifndef _INCLUDE_PALMTC_H_ -#define _INCLUDE_PALMTC_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTC_EARPHONE_DETECT 2 -#define GPIO_NR_PALMTC_CRADLE_DETECT 5 -#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7 - -/* SD/MMC */ -#define GPIO_NR_PALMTC_SD_DETECT_N 12 -#define GPIO_NR_PALMTC_SD_POWER 32 -#define GPIO_NR_PALMTC_SD_READONLY 54 - -/* WLAN */ -#define GPIO_NR_PALMTC_PCMCIA_READY 13 -#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14 -#define GPIO_NR_PALMTC_PCMCIA_POWER1 15 -#define GPIO_NR_PALMTC_PCMCIA_POWER2 33 -#define GPIO_NR_PALMTC_PCMCIA_POWER3 55 -#define GPIO_NR_PALMTC_PCMCIA_RESET 78 - -/* UDC */ -#define GPIO_NR_PALMTC_USB_DETECT_N 4 -#define GPIO_NR_PALMTC_USB_POWER 36 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTC_BL_POWER 16 -#define GPIO_NR_PALMTC_LCD_POWER 44 -#define GPIO_NR_PALMTC_LCD_BLANK 38 - -/* UART */ -#define GPIO_NR_PALMTC_RS232_POWER 37 - -/* IRDA */ -#define GPIO_NR_PALMTC_IR_DISABLE 45 - -/* IRQs */ -#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) -#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) - -/* UCB1400 GPIOs */ -#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) -#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01) -#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03) -#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05) -#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07) - -/** HERE ARE INIT VALUES **/ -#define PALMTC_UCB1400_GPIO_OFFSET 0x80 - -/* BATTERY */ -#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ -#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ -#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */ - -#define PALMTC_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTC_MAX_INTENSITY 0xFE -#define PALMTC_DEFAULT_INTENSITY 0x7E -#define PALMTC_LIMIT_MASK 0x7F -#define PALMTC_PRESCALER 0x3F -#define PALMTC_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h deleted file mode 100644 index ec88abf0fc6c..000000000000 --- a/arch/arm/mach-pxa/include/mach/palmtx.h +++ /dev/null @@ -1,110 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm T|X Handheld Computer - * - * Based on palmld-gpio.h by Alex Osborne - * - * Authors: Marek Vasut - * Cristiano P. - * Jan Herman <2hp@seznam.cz> - */ - -#ifndef _INCLUDE_PALMTX_H_ -#define _INCLUDE_PALMTX_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTX_GPIO_RESET 1 - -#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ -#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 - -/* SD/MMC */ -#define GPIO_NR_PALMTX_SD_DETECT_N 14 -#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ -#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMTX_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMTX_IR_DISABLE 40 - -/* USB */ -#define GPIO_NR_PALMTX_USB_DETECT_N 13 -#define GPIO_NR_PALMTX_USB_PULLUP 93 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTX_BL_POWER 84 -#define GPIO_NR_PALMTX_LCD_POWER 96 - -/* LCD BORDER */ -#define GPIO_NR_PALMTX_BORDER_SWITCH 98 -#define GPIO_NR_PALMTX_BORDER_SELECT 22 - -/* BLUETOOTH */ -#define GPIO_NR_PALMTX_BT_POWER 17 -#define GPIO_NR_PALMTX_BT_RESET 83 - -/* PCMCIA (WiFi) */ -#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 -#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 -#define GPIO_NR_PALMTX_PCMCIA_RESET 79 -#define GPIO_NR_PALMTX_PCMCIA_READY 116 - -/* NAND Flash ... this GPIO may be incorrect! */ -#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) -#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) -#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) -#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) - -/** HERE ARE INIT VALUES **/ - -/* Various addresses */ -#define PALMTX_PCMCIA_PHYS 0x28000000 -#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) -#define PALMTX_PCMCIA_SIZE 0x100000 - -#define PALMTX_PHYS_RAM_START 0xa0000000 -#define PALMTX_PHYS_IO_START 0x40000000 - -#define PALMTX_STR_BASE 0xa0200000 - -#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ -#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ - -#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) -#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) -#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) -#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) - -/* TOUCHSCREEN */ -#define AC97_LINK_FRAME 21 - - -/* BATTERY */ -#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTX_MAX_INTENSITY 0xFE -#define PALMTX_DEFAULT_INTENSITY 0x7E -#define PALMTX_LIMIT_MASK 0x7F -#define PALMTX_PRESCALER 0x3F -#define PALMTX_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h deleted file mode 100644 index 27926629f9c6..000000000000 --- a/arch/arm/mach-pxa/include/mach/trizeps4.h +++ /dev/null @@ -1,166 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/************************************************************************ - * Include file for TRIZEPS4 SoM and ConXS eval-board - * Copyright (c) Jürgen Schindele - * 2006 - ************************************************************************/ - -/* - * Includes/Defines - */ -#ifndef _TRIPEPS4_H_ -#define _TRIPEPS4_H_ - -#include -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* physical memory regions */ -#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ -#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ -#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ -#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ -#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ - - /* Logic on ConXS-board CSFR register*/ -#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) - /* Logic on ConXS-board BOCR register*/ -#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) - /* Logic on ConXS-board IRCR register*/ -#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) - /* Logic on ConXS-board UPSR register*/ -#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) - /* Logic on ConXS-board DICR register*/ -#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) - -/* virtual memory regions */ -#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ -#define TRIZEPS4_CFSR_VIRT 0xF0100000 -#define TRIZEPS4_BOCR_VIRT 0xF0200000 -#define TRIZEPS4_DICR_VIRT 0xF0300000 -#define TRIZEPS4_IRCR_VIRT 0xF0400000 -#define TRIZEPS4_UPSR_VIRT 0xF0500000 - -/* size of flash */ -#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ - -/* Ethernet Controller Davicom DM9000 */ -#define GPIO_DM9000 101 -#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) - -/* UCB1400 audio / TS-controller */ -#define GPIO_UCB1400 1 -#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) - -/* PCMCIA socket Compact Flash */ -#define GPIO_PCD 11 /* PCMCIA Card Detect */ -#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) -#define GPIO_PRDY 13 /* READY / nINT */ -#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) - -/* MMC socket */ -#define GPIO_MMC_DET 12 -#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) - -/* DOC NAND chip */ -#define GPIO_DOC_LOCK 94 -#define GPIO_DOC_IRQ 93 -#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) - -/* SPI interface */ -#define GPIO_SPI 53 -#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) - -/* LEDS using tx2 / rx2 */ -#define GPIO_SYS_BUSY_LED 46 -#define GPIO_HEARTBEAT_LED 47 - -/* Off-module PIC on ConXS board */ -#define GPIO_PIC 0 -#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) - -#ifdef CONFIG_MACH_TRIZEPS_CONXS -/* for CONXS base board define these registers */ -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) - -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) - -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) - -#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) -#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) - -#ifndef __ASSEMBLY__ -static inline unsigned short CFSR_readw(void) -{ - /* [Compact Flash Status Register] is read only */ - return *((unsigned short *)CFSR_P2V(0x0C000000)); -} -static inline void BCR_writew(unsigned short value) -{ - /* [Board Control Regsiter] is write only */ - *((unsigned short *)BCR_P2V(0x0E000000)) = value; -} -static inline void DCR_writew(unsigned short value) -{ - /* [Display Control Register] is write only */ - *((unsigned short *)DCR_P2V(0x0E000000)) = value; -} -static inline void IRCR_writew(unsigned short value) -{ - /* [InfraRed data Control Register] is write only */ - *((unsigned short *)IRCR_P2V(0x0E000000)) = value; -} -#else -#define ConXS_CFSR CFSR_P2V(0x0C000000) -#define ConXS_BCR BCR_P2V(0x0E000000) -#define ConXS_DCR DCR_P2V(0x0F800000) -#define ConXS_IRCR IRCR_P2V(0x0F800000) -#endif -#else -/* for whatever baseboard define function registers */ -static inline unsigned short CFSR_readw(void) -{ - return 0; -} -static inline void BCR_writew(unsigned short value) -{ - ; -} -static inline void DCR_writew(unsigned short value) -{ - ; -} -static inline void IRCR_writew(unsigned short value) -{ - ; -} -#endif /* CONFIG_MACH_TRIZEPS_CONXS */ - -#define ConXS_CFSR_BVD_MASK 0x0003 -#define ConXS_CFSR_BVD1 (1 << 0) -#define ConXS_CFSR_BVD2 (1 << 1) -#define ConXS_CFSR_VS_MASK 0x000C -#define ConXS_CFSR_VS1 (1 << 2) -#define ConXS_CFSR_VS2 (1 << 3) -#define ConXS_CFSR_VS_5V (0x3 << 2) -#define ConXS_CFSR_VS_3V3 0x0 - -#define ConXS_BCR_S0_POW_EN0 (1 << 0) -#define ConXS_BCR_S0_POW_EN1 (1 << 1) -#define ConXS_BCR_L_DISP (1 << 4) -#define ConXS_BCR_CF_BUF_EN (1 << 5) -#define ConXS_BCR_CF_RESET (1 << 7) -#define ConXS_BCR_S0_VCC_3V3 0x1 -#define ConXS_BCR_S0_VCC_5V0 0x2 -#define ConXS_BCR_S0_VPP_12V 0x4 -#define ConXS_BCR_S0_VPP_3V3 0x8 - -#define ConXS_IRCR_MODE (1 << 0) -#define ConXS_IRCR_SD (1 << 1) - -#endif /* _TRIPEPS4_H_ */ diff --git a/arch/arm/mach-pxa/include/mach/vpac270.h b/arch/arm/mach-pxa/include/mach/vpac270.h deleted file mode 100644 index 0cd094d8c553..000000000000 --- a/arch/arm/mach-pxa/include/mach/vpac270.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Voipac PXA270 - * - * Copyright (C) 2010 - * Marek Vasut - */ - -#ifndef _INCLUDE_VPAC270_H_ -#define _INCLUDE_VPAC270_H_ - -#define GPIO1_VPAC270_USER_BTN 1 - -#define GPIO15_VPAC270_LED_ORANGE 15 - -#define GPIO81_VPAC270_BKL_ON 81 -#define GPIO83_VPAC270_NL_ON 83 - -#define GPIO52_VPAC270_SD_READONLY 52 -#define GPIO53_VPAC270_SD_DETECT_N 53 - -#define GPIO84_VPAC270_PCMCIA_CD 84 -#define GPIO35_VPAC270_PCMCIA_RDY 35 -#define GPIO107_VPAC270_PCMCIA_PPEN 107 -#define GPIO11_VPAC270_PCMCIA_RESET 11 -#define GPIO17_VPAC270_CF_CD 17 -#define GPIO12_VPAC270_CF_RDY 12 -#define GPIO16_VPAC270_CF_RESET 16 - -#define GPIO41_VPAC270_UDC_DETECT 41 - -#define GPIO114_VPAC270_ETH_IRQ 114 - -#define GPIO36_VPAC270_IDE_IRQ 36 - -#define GPIO113_VPAC270_TS_IRQ 113 - -#endif diff --git a/arch/arm/mach-pxa/palmld-pcmcia.c b/arch/arm/mach-pxa/palmld-pcmcia.c new file mode 100644 index 000000000000..07e0f7438db1 --- /dev/null +++ b/arch/arm/mach-pxa/palmld-pcmcia.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmld.c + * + * Driver for Palm LifeDrive PCMCIA + * + * Copyright (C) 2006 Alex Osborne + * Copyright (C) 2007-2011 Marek Vasut + */ + +#include +#include +#include + +#include +#include +#include + +static struct gpio palmld_pcmcia_gpios[] = { + { GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" }, + { GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmld_pcmcia_gpios, + ARRAY_SIZE(palmld_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios)); +} + +static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1); + gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET, + !!(state->flags & SS_RESET)); + + return 0; +} + +static struct pcmcia_low_level palmld_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 1, + .nr = 1, + + .hw_init = palmld_pcmcia_hw_init, + .hw_shutdown = palmld_pcmcia_hw_shutdown, + + .socket_state = palmld_pcmcia_socket_state, + .configure_socket = palmld_pcmcia_configure_socket, +}; + +static struct platform_device *palmld_pcmcia_device; + +static int __init palmld_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmld()) + return -ENODEV; + + palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmld_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops, + sizeof(palmld_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmld_pcmcia_device); + + if (ret) + platform_device_put(palmld_pcmcia_device); + + return ret; +} + +static void __exit palmld_pcmcia_exit(void) +{ + platform_device_unregister(palmld_pcmcia_device); +} + +module_init(palmld_pcmcia_init); +module_exit(palmld_pcmcia_exit); + +MODULE_AUTHOR("Alex Osborne ," + " Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtc-pcmcia.c b/arch/arm/mach-pxa/palmtc-pcmcia.c new file mode 100644 index 000000000000..8e3f382343fe --- /dev/null +++ b/arch/arm/mach-pxa/palmtc-pcmcia.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmtc.c + * + * Driver for Palm Tungsten|C PCMCIA + * + * Copyright (C) 2008 Alex Osborne + * Copyright (C) 2009-2011 Marek Vasut + */ + +#include +#include +#include +#include + +#include +#include "palmtc.h" +#include + +static struct gpio palmtc_pcmcia_gpios[] = { + { GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, + { GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, + { GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" }, + { GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, + { GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" }, +}; + +static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmtc_pcmcia_gpios, + ARRAY_SIZE(palmtc_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios)); +} + +static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int palmtc_wifi_powerdown(void) +{ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0); + mdelay(40); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0); + return 0; +} + +static int palmtc_wifi_powerup(void) +{ + int timeout = 50; + + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1); + mdelay(50); + + /* Power up the card, 1.8V first, after a while 3.3V */ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1); + mdelay(100); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1); + + /* Wait till the card is ready */ + while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) && + timeout) { + mdelay(1); + timeout--; + } + + /* Power down the WiFi in case of error */ + if (!timeout) { + palmtc_wifi_powerdown(); + return 1; + } + + /* Reset the card */ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); + mdelay(20); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0); + mdelay(25); + + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0); + + return 0; +} + +static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + int ret = 1; + + if (state->Vcc == 0) + ret = palmtc_wifi_powerdown(); + else if (state->Vcc == 33) + ret = palmtc_wifi_powerup(); + + return ret; +} + +static struct pcmcia_low_level palmtc_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = palmtc_pcmcia_hw_init, + .hw_shutdown = palmtc_pcmcia_hw_shutdown, + + .socket_state = palmtc_pcmcia_socket_state, + .configure_socket = palmtc_pcmcia_configure_socket, +}; + +static struct platform_device *palmtc_pcmcia_device; + +static int __init palmtc_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmtc()) + return -ENODEV; + + palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmtc_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops, + sizeof(palmtc_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmtc_pcmcia_device); + + if (ret) + platform_device_put(palmtc_pcmcia_device); + + return ret; +} + +static void __exit palmtc_pcmcia_exit(void) +{ + platform_device_unregister(palmtc_pcmcia_device); +} + +module_init(palmtc_pcmcia_init); +module_exit(palmtc_pcmcia_exit); + +MODULE_AUTHOR("Alex Osborne ," + " Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index c59fc76c0c3d..3054ffa397ad 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -30,7 +30,7 @@ #include "pxa25x.h" #include -#include +#include "palmtc.h" #include #include #include diff --git a/arch/arm/mach-pxa/palmtc.h b/arch/arm/mach-pxa/palmtc.h new file mode 100644 index 000000000000..afec057c2857 --- /dev/null +++ b/arch/arm/mach-pxa/palmtc.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/asm-arm/arch-pxa/palmtc-gpio.h + * + * GPIOs and interrupts for Palm Tungsten|C Handheld Computer + * + * Authors: Alex Osborne + * Marek Vasut + * Holger Bocklet + */ + +#ifndef _INCLUDE_PALMTC_H_ +#define _INCLUDE_PALMTC_H_ + +#include /* PXA_GPIO_TO_IRQ */ + +/** HERE ARE GPIOs **/ + +/* GPIOs */ +#define GPIO_NR_PALMTC_EARPHONE_DETECT 2 +#define GPIO_NR_PALMTC_CRADLE_DETECT 5 +#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7 + +/* SD/MMC */ +#define GPIO_NR_PALMTC_SD_DETECT_N 12 +#define GPIO_NR_PALMTC_SD_POWER 32 +#define GPIO_NR_PALMTC_SD_READONLY 54 + +/* WLAN */ +#define GPIO_NR_PALMTC_PCMCIA_READY 13 +#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14 +#define GPIO_NR_PALMTC_PCMCIA_POWER1 15 +#define GPIO_NR_PALMTC_PCMCIA_POWER2 33 +#define GPIO_NR_PALMTC_PCMCIA_POWER3 55 +#define GPIO_NR_PALMTC_PCMCIA_RESET 78 + +/* UDC */ +#define GPIO_NR_PALMTC_USB_DETECT_N 4 +#define GPIO_NR_PALMTC_USB_POWER 36 + +/* LCD/BACKLIGHT */ +#define GPIO_NR_PALMTC_BL_POWER 16 +#define GPIO_NR_PALMTC_LCD_POWER 44 +#define GPIO_NR_PALMTC_LCD_BLANK 38 + +/* UART */ +#define GPIO_NR_PALMTC_RS232_POWER 37 + +/* IRDA */ +#define GPIO_NR_PALMTC_IR_DISABLE 45 + +/* IRQs */ +#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) +#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) + +/* UCB1400 GPIOs */ +#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) +#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01) +#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03) +#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05) +#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07) + +/** HERE ARE INIT VALUES **/ +#define PALMTC_UCB1400_GPIO_OFFSET 0x80 + +/* BATTERY */ +#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ +#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ +#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */ +#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */ + +#define PALMTC_BAT_MEASURE_DELAY (HZ * 1) + +/* BACKLIGHT */ +#define PALMTC_MAX_INTENSITY 0xFE +#define PALMTC_DEFAULT_INTENSITY 0x7E +#define PALMTC_LIMIT_MASK 0x7F +#define PALMTC_PRESCALER 0x3F +#define PALMTC_PERIOD_NS 3500 + +#endif diff --git a/arch/arm/mach-pxa/palmtx-pcmcia.c b/arch/arm/mach-pxa/palmtx-pcmcia.c new file mode 100644 index 000000000000..8c2aaad93043 --- /dev/null +++ b/arch/arm/mach-pxa/palmtx-pcmcia.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmtx.c + * + * Driver for Palm T|X PCMCIA + * + * Copyright (C) 2007-2011 Marek Vasut + */ + +#include +#include +#include + +#include +#include "palmtx.h" +#include + +static struct gpio palmtx_pcmcia_gpios[] = { + { GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, + { GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, + { GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmtx_pcmcia_gpios, + ARRAY_SIZE(palmtx_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios)); +} + +static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1); + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1); + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET, + !!(state->flags & SS_RESET)); + + return 0; +} + +static struct pcmcia_low_level palmtx_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = palmtx_pcmcia_hw_init, + .hw_shutdown = palmtx_pcmcia_hw_shutdown, + + .socket_state = palmtx_pcmcia_socket_state, + .configure_socket = palmtx_pcmcia_configure_socket, +}; + +static struct platform_device *palmtx_pcmcia_device; + +static int __init palmtx_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmtx()) + return -ENODEV; + + palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmtx_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops, + sizeof(palmtx_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmtx_pcmcia_device); + + if (ret) + platform_device_put(palmtx_pcmcia_device); + + return ret; +} + +static void __exit palmtx_pcmcia_exit(void) +{ + platform_device_unregister(palmtx_pcmcia_device); +} + +module_init(palmtx_pcmcia_init); +module_exit(palmtx_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm T|X"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 097b88638863..86460d6ea721 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -33,7 +33,7 @@ #include "pxa27x.h" #include -#include +#include "palmtx.h" #include #include #include diff --git a/arch/arm/mach-pxa/palmtx.h b/arch/arm/mach-pxa/palmtx.h new file mode 100644 index 000000000000..a2bb993952d9 --- /dev/null +++ b/arch/arm/mach-pxa/palmtx.h @@ -0,0 +1,110 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * GPIOs and interrupts for Palm T|X Handheld Computer + * + * Based on palmld-gpio.h by Alex Osborne + * + * Authors: Marek Vasut + * Cristiano P. + * Jan Herman <2hp@seznam.cz> + */ + +#ifndef _INCLUDE_PALMTX_H_ +#define _INCLUDE_PALMTX_H_ + +#include /* PXA_GPIO_TO_IRQ */ + +/** HERE ARE GPIOs **/ + +/* GPIOs */ +#define GPIO_NR_PALMTX_GPIO_RESET 1 + +#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ +#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 +#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 + +/* SD/MMC */ +#define GPIO_NR_PALMTX_SD_DETECT_N 14 +#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ +#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ + +/* TOUCHSCREEN */ +#define GPIO_NR_PALMTX_WM9712_IRQ 27 + +/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ +#define GPIO_NR_PALMTX_IR_DISABLE 40 + +/* USB */ +#define GPIO_NR_PALMTX_USB_DETECT_N 13 +#define GPIO_NR_PALMTX_USB_PULLUP 93 + +/* LCD/BACKLIGHT */ +#define GPIO_NR_PALMTX_BL_POWER 84 +#define GPIO_NR_PALMTX_LCD_POWER 96 + +/* LCD BORDER */ +#define GPIO_NR_PALMTX_BORDER_SWITCH 98 +#define GPIO_NR_PALMTX_BORDER_SELECT 22 + +/* BLUETOOTH */ +#define GPIO_NR_PALMTX_BT_POWER 17 +#define GPIO_NR_PALMTX_BT_RESET 83 + +/* PCMCIA (WiFi) */ +#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 +#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 +#define GPIO_NR_PALMTX_PCMCIA_RESET 79 +#define GPIO_NR_PALMTX_PCMCIA_READY 116 + +/* NAND Flash ... this GPIO may be incorrect! */ +#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 + +/* INTERRUPTS */ +#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) +#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) +#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) +#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) + +/** HERE ARE INIT VALUES **/ + +/* Various addresses */ +#define PALMTX_PCMCIA_PHYS 0x28000000 +#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) +#define PALMTX_PCMCIA_SIZE 0x100000 + +#define PALMTX_PHYS_RAM_START 0xa0000000 +#define PALMTX_PHYS_IO_START 0x40000000 + +#define PALMTX_STR_BASE 0xa0200000 + +#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ +#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ + +#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) +#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) +#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) +#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) + +/* TOUCHSCREEN */ +#define AC97_LINK_FRAME 21 + + +/* BATTERY */ +#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ +#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ +#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ +#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ + +#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) + +/* BACKLIGHT */ +#define PALMTX_MAX_INTENSITY 0xFE +#define PALMTX_DEFAULT_INTENSITY 0x7E +#define PALMTX_LIMIT_MASK 0x7F +#define PALMTX_PRESCALER 0x3F +#define PALMTX_PERIOD_NS 3500 + +#endif diff --git a/arch/arm/mach-pxa/trizeps4-pcmcia.c b/arch/arm/mach-pxa/trizeps4-pcmcia.c new file mode 100644 index 000000000000..02d7bb0c538f --- /dev/null +++ b/arch/arm/mach-pxa/trizeps4-pcmcia.c @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_trizeps4.c + * + * TRIZEPS PCMCIA specific routines. + * + * Author: Jürgen Schindele + * Created: 20 02, 2006 + * Copyright: Jürgen Schindele + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include "trizeps4.h" + +#include + +extern void board_pcmcia_power(int power); + +static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + /* we dont have voltage/card/ready detection + * so we dont need interrupts for it + */ + switch (skt->nr) { + case 0: + skt->stat[SOC_STAT_CD].gpio = GPIO_PCD; + skt->stat[SOC_STAT_CD].name = "cs0_cd"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY; + skt->stat[SOC_STAT_RDY].name = "cs0_rdy"; + break; + default: + break; + } + /* release the reset of this card */ + pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq); + + return 0; +} + +static unsigned long trizeps_pcmcia_status[2]; + +static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + unsigned short status = 0, change; + status = CFSR_readw(); + change = (status ^ trizeps_pcmcia_status[skt->nr]) & + ConXS_CFSR_BVD_MASK; + if (change) { + trizeps_pcmcia_status[skt->nr] = status; + if (status & ConXS_CFSR_BVD1) { + /* enable_irq empty */ + } else { + /* disable_irq empty */ + } + } + + switch (skt->nr) { + case 0: + /* just fill in fix states */ + state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0; + state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0; + state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1; + state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1; + break; + +#ifndef CONFIG_MACH_TRIZEPS_CONXS + /* on ConXS we only have one slot. Second is inactive */ + case 1: + state->detect = 0; + state->ready = 0; + state->bvd1 = 0; + state->bvd2 = 0; + state->vs_3v = 0; + state->vs_Xv = 0; + break; + +#endif + } +} + +static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + int ret = 0; + unsigned short power = 0; + + /* we do nothing here just check a bit */ + switch (state->Vcc) { + case 0: power &= 0xfc; break; + case 33: power |= ConXS_BCR_S0_VCC_3V3; break; + case 50: + pr_err("%s(): Vcc 5V not supported in socket\n", __func__); + break; + default: + pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc); + ret = -1; + } + + switch (state->Vpp) { + case 0: power &= 0xf3; break; + case 33: power |= ConXS_BCR_S0_VPP_3V3; break; + case 120: + pr_err("%s(): Vpp 12V not supported in socket\n", __func__); + break; + default: + if (state->Vpp != state->Vcc) { + pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp); + ret = -1; + } + } + + switch (skt->nr) { + case 0: /* we only have 3.3V */ + board_pcmcia_power(power); + break; + +#ifndef CONFIG_MACH_TRIZEPS_CONXS + /* on ConXS we only have one slot. Second is inactive */ + case 1: +#endif + default: + break; + } + + return ret; +} + +static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt) +{ + /* default is on */ + board_pcmcia_power(0x9); +} + +static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) +{ + board_pcmcia_power(0x0); +} + +static struct pcmcia_low_level trizeps_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = trizeps_pcmcia_hw_init, + .socket_state = trizeps_pcmcia_socket_state, + .configure_socket = trizeps_pcmcia_configure_socket, + .socket_init = trizeps_pcmcia_socket_init, + .socket_suspend = trizeps_pcmcia_socket_suspend, +#ifdef CONFIG_MACH_TRIZEPS_CONXS + .nr = 1, +#else + .nr = 2, +#endif + .first = 0, +}; + +static struct platform_device *trizeps_pcmcia_device; + +static int __init trizeps_pcmcia_init(void) +{ + int ret; + + if (!machine_is_trizeps4() && !machine_is_trizeps4wl()) + return -ENODEV; + + trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!trizeps_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(trizeps_pcmcia_device, + &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops)); + + if (ret == 0) + ret = platform_device_add(trizeps_pcmcia_device); + + if (ret) + platform_device_put(trizeps_pcmcia_device); + + return ret; +} + +static void __exit trizeps_pcmcia_exit(void) +{ + platform_device_unregister(trizeps_pcmcia_device); +} + +fs_initcall(trizeps_pcmcia_init); +module_exit(trizeps_pcmcia_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Juergen Schindele"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 1337008cc760..fadfbb40cd6c 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -40,7 +40,7 @@ #include #include "pxa27x.h" -#include +#include "trizeps4.h" #include #include #include diff --git a/arch/arm/mach-pxa/trizeps4.h b/arch/arm/mach-pxa/trizeps4.h new file mode 100644 index 000000000000..7597b9de11e2 --- /dev/null +++ b/arch/arm/mach-pxa/trizeps4.h @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/************************************************************************ + * Include file for TRIZEPS4 SoM and ConXS eval-board + * Copyright (c) Jürgen Schindele + * 2006 + ************************************************************************/ + +/* + * Includes/Defines + */ +#ifndef _TRIPEPS4_H_ +#define _TRIPEPS4_H_ + +#include +#include /* PXA_GPIO_TO_IRQ */ + +/* physical memory regions */ +#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ +#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ +#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ +#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ +#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ + + /* Logic on ConXS-board CSFR register*/ +#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) + /* Logic on ConXS-board BOCR register*/ +#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) + /* Logic on ConXS-board IRCR register*/ +#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) + /* Logic on ConXS-board UPSR register*/ +#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) + /* Logic on ConXS-board DICR register*/ +#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) + +/* virtual memory regions */ +#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ + +#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ +#define TRIZEPS4_CFSR_VIRT 0xF0100000 +#define TRIZEPS4_BOCR_VIRT 0xF0200000 +#define TRIZEPS4_DICR_VIRT 0xF0300000 +#define TRIZEPS4_IRCR_VIRT 0xF0400000 +#define TRIZEPS4_UPSR_VIRT 0xF0500000 + +/* size of flash */ +#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 101 +#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) + +/* UCB1400 audio / TS-controller */ +#define GPIO_UCB1400 1 +#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) + +/* PCMCIA socket Compact Flash */ +#define GPIO_PCD 11 /* PCMCIA Card Detect */ +#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) +#define GPIO_PRDY 13 /* READY / nINT */ +#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) + +/* MMC socket */ +#define GPIO_MMC_DET 12 +#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) + +/* DOC NAND chip */ +#define GPIO_DOC_LOCK 94 +#define GPIO_DOC_IRQ 93 +#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) + +/* SPI interface */ +#define GPIO_SPI 53 +#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) + +/* LEDS using tx2 / rx2 */ +#define GPIO_SYS_BUSY_LED 46 +#define GPIO_HEARTBEAT_LED 47 + +/* Off-module PIC on ConXS board */ +#define GPIO_PIC 0 +#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) + +#ifdef CONFIG_MACH_TRIZEPS_CONXS +/* for CONXS base board define these registers */ +#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) +#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) + +#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) +#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) + +#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) +#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) + +#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) +#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) + +#ifndef __ASSEMBLY__ +static inline unsigned short CFSR_readw(void) +{ + /* [Compact Flash Status Register] is read only */ + return *((unsigned short *)CFSR_P2V(0x0C000000)); +} +static inline void BCR_writew(unsigned short value) +{ + /* [Board Control Regsiter] is write only */ + *((unsigned short *)BCR_P2V(0x0E000000)) = value; +} +static inline void DCR_writew(unsigned short value) +{ + /* [Display Control Register] is write only */ + *((unsigned short *)DCR_P2V(0x0E000000)) = value; +} +static inline void IRCR_writew(unsigned short value) +{ + /* [InfraRed data Control Register] is write only */ + *((unsigned short *)IRCR_P2V(0x0E000000)) = value; +} +#else +#define ConXS_CFSR CFSR_P2V(0x0C000000) +#define ConXS_BCR BCR_P2V(0x0E000000) +#define ConXS_DCR DCR_P2V(0x0F800000) +#define ConXS_IRCR IRCR_P2V(0x0F800000) +#endif +#else +/* for whatever baseboard define function registers */ +static inline unsigned short CFSR_readw(void) +{ + return 0; +} +static inline void BCR_writew(unsigned short value) +{ + ; +} +static inline void DCR_writew(unsigned short value) +{ + ; +} +static inline void IRCR_writew(unsigned short value) +{ + ; +} +#endif /* CONFIG_MACH_TRIZEPS_CONXS */ + +#define ConXS_CFSR_BVD_MASK 0x0003 +#define ConXS_CFSR_BVD1 (1 << 0) +#define ConXS_CFSR_BVD2 (1 << 1) +#define ConXS_CFSR_VS_MASK 0x000C +#define ConXS_CFSR_VS1 (1 << 2) +#define ConXS_CFSR_VS2 (1 << 3) +#define ConXS_CFSR_VS_5V (0x3 << 2) +#define ConXS_CFSR_VS_3V3 0x0 + +#define ConXS_BCR_S0_POW_EN0 (1 << 0) +#define ConXS_BCR_S0_POW_EN1 (1 << 1) +#define ConXS_BCR_L_DISP (1 << 4) +#define ConXS_BCR_CF_BUF_EN (1 << 5) +#define ConXS_BCR_CF_RESET (1 << 7) +#define ConXS_BCR_S0_VCC_3V3 0x1 +#define ConXS_BCR_S0_VCC_5V0 0x2 +#define ConXS_BCR_S0_VPP_12V 0x4 +#define ConXS_BCR_S0_VPP_3V3 0x8 + +#define ConXS_IRCR_MODE (1 << 0) +#define ConXS_IRCR_SD (1 << 1) + +#endif /* _TRIPEPS4_H_ */ diff --git a/arch/arm/mach-pxa/viper-pcmcia.c b/arch/arm/mach-pxa/viper-pcmcia.c new file mode 100644 index 000000000000..26599dcc49b3 --- /dev/null +++ b/arch/arm/mach-pxa/viper-pcmcia.c @@ -0,0 +1,180 @@ +/* + * Viper/Zeus PCMCIA support + * Copyright 2004 Arcom Control Systems + * + * Maintained by Marc Zyngier + * + * Based on: + * iPAQ h2200 PCMCIA support + * Copyright 2004 Koen Kooi + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "viper-pcmcia.h" + +static struct platform_device *arcom_pcmcia_dev; + +static inline struct arcom_pcmcia_pdata *viper_get_pdata(void) +{ + return arcom_pcmcia_dev->dev.platform_data; +} + +static int viper_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + unsigned long flags; + + skt->stat[SOC_STAT_CD].gpio = pdata->cd_gpio; + skt->stat[SOC_STAT_CD].name = "PCMCIA_CD"; + skt->stat[SOC_STAT_RDY].gpio = pdata->rdy_gpio; + skt->stat[SOC_STAT_RDY].name = "CF ready"; + + if (gpio_request(pdata->pwr_gpio, "CF power")) + goto err_request_pwr; + + local_irq_save(flags); + + if (gpio_direction_output(pdata->pwr_gpio, 0)) { + local_irq_restore(flags); + goto err_dir; + } + + local_irq_restore(flags); + + return 0; + +err_dir: + gpio_free(pdata->pwr_gpio); +err_request_pwr: + dev_err(&arcom_pcmcia_dev->dev, "Failed to setup PCMCIA GPIOs\n"); + return -1; +} + +/* + * Release all resources. + */ +static void viper_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + + gpio_free(pdata->pwr_gpio); +} + +static void viper_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; /* Can only apply 3.3V */ + state->vs_Xv = 0; +} + +static int viper_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + + /* Silently ignore Vpp, output enable, speaker enable. */ + pdata->reset(state->flags & SS_RESET); + + /* Apply socket voltage */ + switch (state->Vcc) { + case 0: + gpio_set_value(pdata->pwr_gpio, 0); + break; + case 33: + gpio_set_value(pdata->pwr_gpio, 1); + break; + default: + dev_err(&arcom_pcmcia_dev->dev, "Unsupported Vcc:%d\n", state->Vcc); + return -1; + } + + return 0; +} + +static struct pcmcia_low_level viper_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = viper_pcmcia_hw_init, + .hw_shutdown = viper_pcmcia_hw_shutdown, + .socket_state = viper_pcmcia_socket_state, + .configure_socket = viper_pcmcia_configure_socket, + .nr = 1, +}; + +static struct platform_device *viper_pcmcia_device; + +static int viper_pcmcia_probe(struct platform_device *pdev) +{ + int ret; + + /* I can't imagine more than one device, but you never know... */ + if (arcom_pcmcia_dev) + return -EEXIST; + + if (!pdev->dev.platform_data) + return -EINVAL; + + viper_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!viper_pcmcia_device) + return -ENOMEM; + + arcom_pcmcia_dev = pdev; + + viper_pcmcia_device->dev.parent = &pdev->dev; + + ret = platform_device_add_data(viper_pcmcia_device, + &viper_pcmcia_ops, + sizeof(viper_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(viper_pcmcia_device); + + if (ret) { + platform_device_put(viper_pcmcia_device); + arcom_pcmcia_dev = NULL; + } + + return ret; +} + +static int viper_pcmcia_remove(struct platform_device *pdev) +{ + platform_device_unregister(viper_pcmcia_device); + arcom_pcmcia_dev = NULL; + return 0; +} + +static struct platform_device_id viper_pcmcia_id_table[] = { + { .name = "viper-pcmcia", }, + { .name = "zeus-pcmcia", }, + { }, +}; + +static struct platform_driver viper_pcmcia_driver = { + .probe = viper_pcmcia_probe, + .remove = viper_pcmcia_remove, + .driver = { + .name = "arcom-pcmcia", + }, + .id_table = viper_pcmcia_id_table, +}; + +module_platform_driver(viper_pcmcia_driver); + +MODULE_DEVICE_TABLE(platform, viper_pcmcia_id_table); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/viper-pcmcia.h b/arch/arm/mach-pxa/viper-pcmcia.h new file mode 100644 index 000000000000..a23b58aff9e1 --- /dev/null +++ b/arch/arm/mach-pxa/viper-pcmcia.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ARCOM_PCMCIA_H +#define __ARCOM_PCMCIA_H + +struct arcom_pcmcia_pdata { + int cd_gpio; + int rdy_gpio; + int pwr_gpio; + void (*reset)(int state); +}; + +#endif diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index ac94b10bf8c1..600d9e80b00c 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -49,7 +49,7 @@ #include #include #include "regs-uart.h" -#include +#include "viper-pcmcia.h" #include "viper.h" #include diff --git a/arch/arm/mach-pxa/vpac270-pcmcia.c b/arch/arm/mach-pxa/vpac270-pcmcia.c new file mode 100644 index 000000000000..9fd990c8a5fb --- /dev/null +++ b/arch/arm/mach-pxa/vpac270-pcmcia.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_vpac270.c + * + * Driver for Voipac PXA270 PCMCIA and CF sockets + * + * Copyright (C) 2010-2011 Marek Vasut + */ + +#include +#include +#include + +#include + +#include "vpac270.h" + +#include + +static struct gpio vpac270_pcmcia_gpios[] = { + { GPIO107_VPAC270_PCMCIA_PPEN, GPIOF_INIT_LOW, "PCMCIA PPEN" }, + { GPIO11_VPAC270_PCMCIA_RESET, GPIOF_INIT_LOW, "PCMCIA Reset" }, +}; + +static struct gpio vpac270_cf_gpios[] = { + { GPIO16_VPAC270_CF_RESET, GPIOF_INIT_LOW, "CF Reset" }, +}; + +static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + if (skt->nr == 0) { + ret = gpio_request_array(vpac270_pcmcia_gpios, + ARRAY_SIZE(vpac270_pcmcia_gpios)); + + skt->stat[SOC_STAT_CD].gpio = GPIO84_VPAC270_PCMCIA_CD; + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO35_VPAC270_PCMCIA_RDY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + } else { + ret = gpio_request_array(vpac270_cf_gpios, + ARRAY_SIZE(vpac270_cf_gpios)); + + skt->stat[SOC_STAT_CD].gpio = GPIO17_VPAC270_CF_CD; + skt->stat[SOC_STAT_CD].name = "CF CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO12_VPAC270_CF_RDY; + skt->stat[SOC_STAT_RDY].name = "CF Ready"; + } + + return ret; +} + +static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + if (skt->nr == 0) + gpio_free_array(vpac270_pcmcia_gpios, + ARRAY_SIZE(vpac270_pcmcia_gpios)); + else + gpio_free_array(vpac270_cf_gpios, + ARRAY_SIZE(vpac270_cf_gpios)); +} + +static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + if (skt->nr == 0) { + gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET, + (state->flags & SS_RESET)); + gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN, + !(state->Vcc == 33 || state->Vcc == 50)); + } else { + gpio_set_value(GPIO16_VPAC270_CF_RESET, + (state->flags & SS_RESET)); + } + + return 0; +} + +static struct pcmcia_low_level vpac270_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 2, + + .hw_init = vpac270_pcmcia_hw_init, + .hw_shutdown = vpac270_pcmcia_hw_shutdown, + + .socket_state = vpac270_pcmcia_socket_state, + .configure_socket = vpac270_pcmcia_configure_socket, +}; + +static struct platform_device *vpac270_pcmcia_device; + +static int __init vpac270_pcmcia_init(void) +{ + int ret; + + if (!machine_is_vpac270()) + return -ENODEV; + + vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!vpac270_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(vpac270_pcmcia_device, + &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(vpac270_pcmcia_device); + + if (ret) + platform_device_put(vpac270_pcmcia_device); + + return ret; +} + +static void __exit vpac270_pcmcia_exit(void) +{ + platform_device_unregister(vpac270_pcmcia_device); +} + +module_init(vpac270_pcmcia_init); +module_exit(vpac270_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 7067d1464689..8f74bafcf1f9 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -30,7 +30,7 @@ #include "pxa27x.h" #include -#include +#include "vpac270.h" #include #include #include diff --git a/arch/arm/mach-pxa/vpac270.h b/arch/arm/mach-pxa/vpac270.h new file mode 100644 index 000000000000..0cd094d8c553 --- /dev/null +++ b/arch/arm/mach-pxa/vpac270.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * GPIOs and interrupts for Voipac PXA270 + * + * Copyright (C) 2010 + * Marek Vasut + */ + +#ifndef _INCLUDE_VPAC270_H_ +#define _INCLUDE_VPAC270_H_ + +#define GPIO1_VPAC270_USER_BTN 1 + +#define GPIO15_VPAC270_LED_ORANGE 15 + +#define GPIO81_VPAC270_BKL_ON 81 +#define GPIO83_VPAC270_NL_ON 83 + +#define GPIO52_VPAC270_SD_READONLY 52 +#define GPIO53_VPAC270_SD_DETECT_N 53 + +#define GPIO84_VPAC270_PCMCIA_CD 84 +#define GPIO35_VPAC270_PCMCIA_RDY 35 +#define GPIO107_VPAC270_PCMCIA_PPEN 107 +#define GPIO11_VPAC270_PCMCIA_RESET 11 +#define GPIO17_VPAC270_CF_CD 17 +#define GPIO12_VPAC270_CF_RDY 12 +#define GPIO16_VPAC270_CF_RESET 16 + +#define GPIO41_VPAC270_UDC_DETECT 41 + +#define GPIO114_VPAC270_ETH_IRQ 114 + +#define GPIO36_VPAC270_IDE_IRQ 36 + +#define GPIO113_VPAC270_TS_IRQ 113 + +#endif diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 67396e85bb66..2e6c8d156d77 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -47,7 +47,7 @@ #include #include "pm.h" #include -#include +#include "viper-pcmcia.h" #include "zeus.h" #include diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index c43267b18f55..c59ddde42007 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -50,18 +50,5 @@ sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o pxa2xx-obj-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o pxa2xx-obj-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o -pxa2xx-obj-$(CONFIG_ARCOM_PCMCIA) += pxa2xx_viper.o -pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA) += pxa2xx_trizeps4.o -pxa2xx-obj-$(CONFIG_MACH_PALMTX) += pxa2xx_palmtx.o -pxa2xx-obj-$(CONFIG_MACH_PALMTC) += pxa2xx_palmtc.o -pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o -pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o -pxa2xx-obj-$(CONFIG_MACH_VPAC270) += pxa2xx_vpac270.o -pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o -pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += pxa2xx_colibri.o -pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o -pxa2xx-obj-$(CONFIG_MACH_H4700) += pxa2xx_hx4700.o - obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y) - obj-$(CONFIG_PCMCIA_XXS1500) += xxs1500_ss.o diff --git a/drivers/pcmcia/pxa2xx_balloon3.c b/drivers/pcmcia/pxa2xx_balloon3.c deleted file mode 100644 index 5fe1da7a50e4..000000000000 --- a/drivers/pcmcia/pxa2xx_balloon3.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_balloon3.c - * - * Balloon3 PCMCIA specific routines. - * - * Author: Nick Bane - * Created: June, 2006 - * Copyright: Toby Churchill Ltd - * Derived from pxa2xx_mainstone.c, by Nico Pitre - * - * Various modification by Marek Vasut - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "soc_common.h" - -static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - uint16_t ver; - - ver = __raw_readw(BALLOON3_FPGA_VER); - if (ver < 0x4f08) - pr_warn("The FPGA code, version 0x%04x, is too old. " - "PCMCIA/CF support might be broken in this version!", - ver); - - skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ; - skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD"; - skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ; - skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG"; - - return 0; -} - -static unsigned long balloon3_pcmcia_status[2] = { - BALLOON3_CF_nSTSCHG_BVD1, - BALLOON3_CF_nSTSCHG_BVD1 -}; - -static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - uint16_t status; - int flip; - - /* This actually reads the STATUS register */ - status = __raw_readw(BALLOON3_CF_STATUS_REG); - flip = (status ^ balloon3_pcmcia_status[skt->nr]) - & BALLOON3_CF_nSTSCHG_BVD1; - /* - * Workaround for STSCHG which can't be deasserted: - * We therefore disable/enable corresponding IRQs - * as needed to avoid IRQ locks. - */ - if (flip) { - balloon3_pcmcia_status[skt->nr] = status; - if (status & BALLOON3_CF_nSTSCHG_BVD1) - enable_irq(BALLOON3_BP_NSTSCHG_IRQ); - else - disable_irq(BALLOON3_BP_NSTSCHG_IRQ); - } - - state->ready = !!(status & BALLOON3_CF_nIRQ); - state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1); - state->bvd2 = 0; /* not available */ - state->vs_3v = 1; /* Always true its a CF card */ - state->vs_Xv = 0; /* not available */ -} - -static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + - ((state->flags & SS_RESET) ? - BALLOON3_FPGA_SETnCLR : 0)); - return 0; -} - -static struct pcmcia_low_level balloon3_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = balloon3_pcmcia_hw_init, - .socket_state = balloon3_pcmcia_socket_state, - .configure_socket = balloon3_pcmcia_configure_socket, - .first = 0, - .nr = 1, -}; - -static struct platform_device *balloon3_pcmcia_device; - -static int __init balloon3_pcmcia_init(void) -{ - int ret; - - if (!machine_is_balloon3()) - return -ENODEV; - - balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!balloon3_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(balloon3_pcmcia_device, - &balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(balloon3_pcmcia_device); - - if (ret) - platform_device_put(balloon3_pcmcia_device); - - return ret; -} - -static void __exit balloon3_pcmcia_exit(void) -{ - platform_device_unregister(balloon3_pcmcia_device); -} - -module_init(balloon3_pcmcia_init); -module_exit(balloon3_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Nick Bane "); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver"); diff --git a/drivers/pcmcia/pxa2xx_colibri.c b/drivers/pcmcia/pxa2xx_colibri.c deleted file mode 100644 index f0f725e99604..000000000000 --- a/drivers/pcmcia/pxa2xx_colibri.c +++ /dev/null @@ -1,165 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_colibri.c - * - * Driver for Toradex Colibri PXA270 CF socket - * - * Copyright (C) 2010 Marek Vasut - */ - -#include -#include -#include -#include - -#include - -#include "soc_common.h" - -#define COLIBRI270_RESET_GPIO 53 -#define COLIBRI270_PPEN_GPIO 107 -#define COLIBRI270_BVD1_GPIO 83 -#define COLIBRI270_BVD2_GPIO 82 -#define COLIBRI270_DETECT_GPIO 84 -#define COLIBRI270_READY_GPIO 1 - -#define COLIBRI320_RESET_GPIO 77 -#define COLIBRI320_PPEN_GPIO 57 -#define COLIBRI320_BVD1_GPIO 53 -#define COLIBRI320_BVD2_GPIO 79 -#define COLIBRI320_DETECT_GPIO 81 -#define COLIBRI320_READY_GPIO 29 - -enum { - DETECT = 0, - READY = 1, - BVD1 = 2, - BVD2 = 3, - PPEN = 4, - RESET = 5, -}; - -/* Contents of this array are configured on-the-fly in init function */ -static struct gpio colibri_pcmcia_gpios[] = { - { 0, GPIOF_IN, "PCMCIA Detect" }, - { 0, GPIOF_IN, "PCMCIA Ready" }, - { 0, GPIOF_IN, "PCMCIA BVD1" }, - { 0, GPIOF_IN, "PCMCIA BVD2" }, - { 0, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { 0, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); - if (ret) - goto err1; - - skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio); - skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio); - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - -err1: - return ret; -} - -static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); -} - -static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - - state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio); - state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio); - state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio); - state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio); - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio, - !(state->Vcc == 33 && state->Vpp < 50)); - gpio_set_value(colibri_pcmcia_gpios[RESET].gpio, - state->flags & SS_RESET); - return 0; -} - -static struct pcmcia_low_level colibri_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = colibri_pcmcia_hw_init, - .hw_shutdown = colibri_pcmcia_hw_shutdown, - - .socket_state = colibri_pcmcia_socket_state, - .configure_socket = colibri_pcmcia_configure_socket, -}; - -static struct platform_device *colibri_pcmcia_device; - -static int __init colibri_pcmcia_init(void) -{ - int ret; - - if (!machine_is_colibri() && !machine_is_colibri320()) - return -ENODEV; - - colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!colibri_pcmcia_device) - return -ENOMEM; - - /* Colibri PXA270 */ - if (machine_is_colibri()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO; - /* Colibri PXA320 */ - } else if (machine_is_colibri320()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO; - } - - ret = platform_device_add_data(colibri_pcmcia_device, - &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(colibri_pcmcia_device); - - if (ret) - platform_device_put(colibri_pcmcia_device); - - return ret; -} - -static void __exit colibri_pcmcia_exit(void) -{ - platform_device_unregister(colibri_pcmcia_device); -} - -module_init(colibri_pcmcia_init); -module_exit(colibri_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c deleted file mode 100644 index 72caa6d05ab9..000000000000 --- a/drivers/pcmcia/pxa2xx_e740.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Toshiba e740 PCMCIA specific routines. - * - * (c) 2004 Ian Molton - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "soc_common.h" - -static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0; - skt->stat[SOC_STAT_CD].name = "CF card detect"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - } else { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1; - skt->stat[SOC_STAT_CD].name = "Wifi switch"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1; - skt->stat[SOC_STAT_RDY].name = "Wifi ready"; - } - - return 0; -} - -static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (state->flags & SS_RESET) { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 1); - } else { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 0); - } - - switch (state->Vcc) { - case 0: /* Socket off */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1); - break; - case 50: - case 33: /* socket on */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0); - break; - default: - printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc); - } - - return 0; -} - -static struct pcmcia_low_level e740_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = e740_pcmcia_hw_init, - .socket_state = e740_pcmcia_socket_state, - .configure_socket = e740_pcmcia_configure_socket, - .nr = 2, -}; - -static struct platform_device *e740_pcmcia_device; - -static int __init e740_pcmcia_init(void) -{ - int ret; - - if (!machine_is_e740()) - return -ENODEV; - - e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!e740_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops, - sizeof(e740_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(e740_pcmcia_device); - - if (ret) - platform_device_put(e740_pcmcia_device); - - return ret; -} - -static void __exit e740_pcmcia_exit(void) -{ - platform_device_unregister(e740_pcmcia_device); -} - -module_init(e740_pcmcia_init); -module_exit(e740_pcmcia_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton "); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("e740 PCMCIA platform support"); diff --git a/drivers/pcmcia/pxa2xx_hx4700.c b/drivers/pcmcia/pxa2xx_hx4700.c deleted file mode 100644 index 87b6a1639d94..000000000000 --- a/drivers/pcmcia/pxa2xx_hx4700.c +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Paul Parsons - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "soc_common.h" - -static struct gpio gpios[] = { - { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" }, - { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" }, -}; - -static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (ret) - goto out; - - /* - * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq(). - * The asic3 default IRQ type is level trigger low level detect, exactly - * the the signal present on GPIOD4_CF_nCD when a CF card is inserted. - * If the IRQ type is not changed, the asic3 interrupt handler will loop - * repeatedly because it is unable to clear the level trigger interrupt. - */ - irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH); - - skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - -out: - return ret; -} - -static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(gpios, ARRAY_SIZE(gpios)); -} - -static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - switch (state->Vcc) { - case 0: - gpio_set_value(EGPIO4_CF_3V3_ON, 0); - break; - case 33: - gpio_set_value(EGPIO4_CF_3V3_ON, 1); - break; - default: - printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc); - return -EINVAL; - } - - gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0); - - return 0; -} - -static struct pcmcia_low_level hx4700_pcmcia_ops = { - .owner = THIS_MODULE, - .nr = 1, - .hw_init = hx4700_pcmcia_hw_init, - .hw_shutdown = hx4700_pcmcia_hw_shutdown, - .socket_state = hx4700_pcmcia_socket_state, - .configure_socket = hx4700_pcmcia_configure_socket, -}; - -static struct platform_device *hx4700_pcmcia_device; - -static int __init hx4700_pcmcia_init(void) -{ - struct platform_device *pdev; - - if (!machine_is_h4700()) - return -ENODEV; - - pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1, - &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops)); - if (IS_ERR(pdev)) - return PTR_ERR(pdev); - - hx4700_pcmcia_device = pdev; - - return 0; -} - -static void __exit hx4700_pcmcia_exit(void) -{ - platform_device_unregister(hx4700_pcmcia_device); -} - -module_init(hx4700_pcmcia_init); -module_exit(hx4700_pcmcia_exit); - -MODULE_AUTHOR("Paul Parsons "); -MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c deleted file mode 100644 index cfff41ac9ca2..000000000000 --- a/drivers/pcmcia/pxa2xx_palmld.c +++ /dev/null @@ -1,110 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmld.c - * - * Driver for Palm LifeDrive PCMCIA - * - * Copyright (C) 2006 Alex Osborne - * Copyright (C) 2007-2011 Marek Vasut - */ - -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmld_pcmcia_gpios[] = { - { GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" }, - { GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmld_pcmcia_gpios, - ARRAY_SIZE(palmld_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios)); -} - -static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1); - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmld_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 1, - .nr = 1, - - .hw_init = palmld_pcmcia_hw_init, - .hw_shutdown = palmld_pcmcia_hw_shutdown, - - .socket_state = palmld_pcmcia_socket_state, - .configure_socket = palmld_pcmcia_configure_socket, -}; - -static struct platform_device *palmld_pcmcia_device; - -static int __init palmld_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmld()) - return -ENODEV; - - palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmld_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops, - sizeof(palmld_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmld_pcmcia_device); - - if (ret) - platform_device_put(palmld_pcmcia_device); - - return ret; -} - -static void __exit palmld_pcmcia_exit(void) -{ - platform_device_unregister(palmld_pcmcia_device); -} - -module_init(palmld_pcmcia_init); -module_exit(palmld_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne ," - " Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmtc.c b/drivers/pcmcia/pxa2xx_palmtc.c deleted file mode 100644 index 8fe05613ed04..000000000000 --- a/drivers/pcmcia/pxa2xx_palmtc.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtc.c - * - * Driver for Palm Tungsten|C PCMCIA - * - * Copyright (C) 2008 Alex Osborne - * Copyright (C) 2009-2011 Marek Vasut - */ - -#include -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmtc_pcmcia_gpios[] = { - { GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" }, - { GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, - { GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" }, -}; - -static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtc_pcmcia_gpios, - ARRAY_SIZE(palmtc_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios)); -} - -static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmtc_wifi_powerdown(void) -{ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0); - mdelay(40); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0); - return 0; -} - -static int palmtc_wifi_powerup(void) -{ - int timeout = 50; - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1); - mdelay(50); - - /* Power up the card, 1.8V first, after a while 3.3V */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1); - mdelay(100); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1); - - /* Wait till the card is ready */ - while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) && - timeout) { - mdelay(1); - timeout--; - } - - /* Power down the WiFi in case of error */ - if (!timeout) { - palmtc_wifi_powerdown(); - return 1; - } - - /* Reset the card */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - mdelay(20); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0); - mdelay(25); - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0); - - return 0; -} - -static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 1; - - if (state->Vcc == 0) - ret = palmtc_wifi_powerdown(); - else if (state->Vcc == 33) - ret = palmtc_wifi_powerup(); - - return ret; -} - -static struct pcmcia_low_level palmtc_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtc_pcmcia_hw_init, - .hw_shutdown = palmtc_pcmcia_hw_shutdown, - - .socket_state = palmtc_pcmcia_socket_state, - .configure_socket = palmtc_pcmcia_configure_socket, -}; - -static struct platform_device *palmtc_pcmcia_device; - -static int __init palmtc_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtc()) - return -ENODEV; - - palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtc_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops, - sizeof(palmtc_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtc_pcmcia_device); - - if (ret) - platform_device_put(palmtc_pcmcia_device); - - return ret; -} - -static void __exit palmtc_pcmcia_exit(void) -{ - platform_device_unregister(palmtc_pcmcia_device); -} - -module_init(palmtc_pcmcia_init); -module_exit(palmtc_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne ," - " Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmtx.c b/drivers/pcmcia/pxa2xx_palmtx.c deleted file mode 100644 index c449ca72cb87..000000000000 --- a/drivers/pcmcia/pxa2xx_palmtx.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtx.c - * - * Driver for Palm T|X PCMCIA - * - * Copyright (C) 2007-2011 Marek Vasut - */ - -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmtx_pcmcia_gpios[] = { - { GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtx_pcmcia_gpios, - ARRAY_SIZE(palmtx_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios)); -} - -static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmtx_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtx_pcmcia_hw_init, - .hw_shutdown = palmtx_pcmcia_hw_shutdown, - - .socket_state = palmtx_pcmcia_socket_state, - .configure_socket = palmtx_pcmcia_configure_socket, -}; - -static struct platform_device *palmtx_pcmcia_device; - -static int __init palmtx_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtx()) - return -ENODEV; - - palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtx_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops, - sizeof(palmtx_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtx_pcmcia_device); - - if (ret) - platform_device_put(palmtx_pcmcia_device); - - return ret; -} - -static void __exit palmtx_pcmcia_exit(void) -{ - platform_device_unregister(palmtx_pcmcia_device); -} - -module_init(palmtx_pcmcia_init); -module_exit(palmtx_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm T|X"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index 66fe1d1af12a..b3ba858f70cb 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c @@ -18,7 +18,7 @@ #include #include -#include "soc_common.h" +#include #define NO_KEEP_VS 0x0001 #define SCOOP_DEV platform_scoop_config->devs diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c deleted file mode 100644 index 6db8fe880ed4..000000000000 --- a/drivers/pcmcia/pxa2xx_trizeps4.c +++ /dev/null @@ -1,200 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_trizeps4.c - * - * TRIZEPS PCMCIA specific routines. - * - * Author: Jürgen Schindele - * Created: 20 02, 2006 - * Copyright: Jürgen Schindele - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "soc_common.h" - -extern void board_pcmcia_power(int power); - -static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - /* we dont have voltage/card/ready detection - * so we dont need interrupts for it - */ - switch (skt->nr) { - case 0: - skt->stat[SOC_STAT_CD].gpio = GPIO_PCD; - skt->stat[SOC_STAT_CD].name = "cs0_cd"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY; - skt->stat[SOC_STAT_RDY].name = "cs0_rdy"; - break; - default: - break; - } - /* release the reset of this card */ - pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq); - - return 0; -} - -static unsigned long trizeps_pcmcia_status[2]; - -static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - unsigned short status = 0, change; - status = CFSR_readw(); - change = (status ^ trizeps_pcmcia_status[skt->nr]) & - ConXS_CFSR_BVD_MASK; - if (change) { - trizeps_pcmcia_status[skt->nr] = status; - if (status & ConXS_CFSR_BVD1) { - /* enable_irq empty */ - } else { - /* disable_irq empty */ - } - } - - switch (skt->nr) { - case 0: - /* just fill in fix states */ - state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0; - state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0; - state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1; - state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1; - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: - state->detect = 0; - state->ready = 0; - state->bvd1 = 0; - state->bvd2 = 0; - state->vs_3v = 0; - state->vs_Xv = 0; - break; - -#endif - } -} - -static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 0; - unsigned short power = 0; - - /* we do nothing here just check a bit */ - switch (state->Vcc) { - case 0: power &= 0xfc; break; - case 33: power |= ConXS_BCR_S0_VCC_3V3; break; - case 50: - pr_err("%s(): Vcc 5V not supported in socket\n", __func__); - break; - default: - pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc); - ret = -1; - } - - switch (state->Vpp) { - case 0: power &= 0xf3; break; - case 33: power |= ConXS_BCR_S0_VPP_3V3; break; - case 120: - pr_err("%s(): Vpp 12V not supported in socket\n", __func__); - break; - default: - if (state->Vpp != state->Vcc) { - pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp); - ret = -1; - } - } - - switch (skt->nr) { - case 0: /* we only have 3.3V */ - board_pcmcia_power(power); - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: -#endif - default: - break; - } - - return ret; -} - -static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt) -{ - /* default is on */ - board_pcmcia_power(0x9); -} - -static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) -{ - board_pcmcia_power(0x0); -} - -static struct pcmcia_low_level trizeps_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = trizeps_pcmcia_hw_init, - .socket_state = trizeps_pcmcia_socket_state, - .configure_socket = trizeps_pcmcia_configure_socket, - .socket_init = trizeps_pcmcia_socket_init, - .socket_suspend = trizeps_pcmcia_socket_suspend, -#ifdef CONFIG_MACH_TRIZEPS_CONXS - .nr = 1, -#else - .nr = 2, -#endif - .first = 0, -}; - -static struct platform_device *trizeps_pcmcia_device; - -static int __init trizeps_pcmcia_init(void) -{ - int ret; - - if (!machine_is_trizeps4() && !machine_is_trizeps4wl()) - return -ENODEV; - - trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!trizeps_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(trizeps_pcmcia_device, - &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops)); - - if (ret == 0) - ret = platform_device_add(trizeps_pcmcia_device); - - if (ret) - platform_device_put(trizeps_pcmcia_device); - - return ret; -} - -static void __exit trizeps_pcmcia_exit(void) -{ - platform_device_unregister(trizeps_pcmcia_device); -} - -fs_initcall(trizeps_pcmcia_init); -module_exit(trizeps_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Juergen Schindele"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/drivers/pcmcia/pxa2xx_viper.c b/drivers/pcmcia/pxa2xx_viper.c deleted file mode 100644 index 7ac6647d286e..000000000000 --- a/drivers/pcmcia/pxa2xx_viper.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Viper/Zeus PCMCIA support - * Copyright 2004 Arcom Control Systems - * - * Maintained by Marc Zyngier - * - * Based on: - * iPAQ h2200 PCMCIA support - * Copyright 2004 Koen Kooi - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -#include "soc_common.h" -#include "pxa2xx_base.h" - -static struct platform_device *arcom_pcmcia_dev; - -static inline struct arcom_pcmcia_pdata *viper_get_pdata(void) -{ - return arcom_pcmcia_dev->dev.platform_data; -} - -static int viper_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - unsigned long flags; - - skt->stat[SOC_STAT_CD].gpio = pdata->cd_gpio; - skt->stat[SOC_STAT_CD].name = "PCMCIA_CD"; - skt->stat[SOC_STAT_RDY].gpio = pdata->rdy_gpio; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - - if (gpio_request(pdata->pwr_gpio, "CF power")) - goto err_request_pwr; - - local_irq_save(flags); - - if (gpio_direction_output(pdata->pwr_gpio, 0)) { - local_irq_restore(flags); - goto err_dir; - } - - local_irq_restore(flags); - - return 0; - -err_dir: - gpio_free(pdata->pwr_gpio); -err_request_pwr: - dev_err(&arcom_pcmcia_dev->dev, "Failed to setup PCMCIA GPIOs\n"); - return -1; -} - -/* - * Release all resources. - */ -static void viper_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - gpio_free(pdata->pwr_gpio); -} - -static void viper_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; /* Can only apply 3.3V */ - state->vs_Xv = 0; -} - -static int viper_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - /* Silently ignore Vpp, output enable, speaker enable. */ - pdata->reset(state->flags & SS_RESET); - - /* Apply socket voltage */ - switch (state->Vcc) { - case 0: - gpio_set_value(pdata->pwr_gpio, 0); - break; - case 33: - gpio_set_value(pdata->pwr_gpio, 1); - break; - default: - dev_err(&arcom_pcmcia_dev->dev, "Unsupported Vcc:%d\n", state->Vcc); - return -1; - } - - return 0; -} - -static struct pcmcia_low_level viper_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = viper_pcmcia_hw_init, - .hw_shutdown = viper_pcmcia_hw_shutdown, - .socket_state = viper_pcmcia_socket_state, - .configure_socket = viper_pcmcia_configure_socket, - .nr = 1, -}; - -static struct platform_device *viper_pcmcia_device; - -static int viper_pcmcia_probe(struct platform_device *pdev) -{ - int ret; - - /* I can't imagine more than one device, but you never know... */ - if (arcom_pcmcia_dev) - return -EEXIST; - - if (!pdev->dev.platform_data) - return -EINVAL; - - viper_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!viper_pcmcia_device) - return -ENOMEM; - - arcom_pcmcia_dev = pdev; - - viper_pcmcia_device->dev.parent = &pdev->dev; - - ret = platform_device_add_data(viper_pcmcia_device, - &viper_pcmcia_ops, - sizeof(viper_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(viper_pcmcia_device); - - if (ret) { - platform_device_put(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - } - - return ret; -} - -static int viper_pcmcia_remove(struct platform_device *pdev) -{ - platform_device_unregister(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - return 0; -} - -static struct platform_device_id viper_pcmcia_id_table[] = { - { .name = "viper-pcmcia", }, - { .name = "zeus-pcmcia", }, - { }, -}; - -static struct platform_driver viper_pcmcia_driver = { - .probe = viper_pcmcia_probe, - .remove = viper_pcmcia_remove, - .driver = { - .name = "arcom-pcmcia", - }, - .id_table = viper_pcmcia_id_table, -}; - -module_platform_driver(viper_pcmcia_driver); - -MODULE_DEVICE_TABLE(platform, viper_pcmcia_id_table); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c deleted file mode 100644 index 3565add03a5e..000000000000 --- a/drivers/pcmcia/pxa2xx_vpac270.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_vpac270.c - * - * Driver for Voipac PXA270 PCMCIA and CF sockets - * - * Copyright (C) 2010-2011 Marek Vasut - */ - -#include -#include -#include - -#include - -#include - -#include "soc_common.h" - -static struct gpio vpac270_pcmcia_gpios[] = { - { GPIO107_VPAC270_PCMCIA_PPEN, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { GPIO11_VPAC270_PCMCIA_RESET, GPIOF_INIT_LOW, "PCMCIA Reset" }, -}; - -static struct gpio vpac270_cf_gpios[] = { - { GPIO16_VPAC270_CF_RESET, GPIOF_INIT_LOW, "CF Reset" }, -}; - -static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - if (skt->nr == 0) { - ret = gpio_request_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO84_VPAC270_PCMCIA_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO35_VPAC270_PCMCIA_RDY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - } else { - ret = gpio_request_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO17_VPAC270_CF_CD; - skt->stat[SOC_STAT_CD].name = "CF CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO12_VPAC270_CF_RDY; - skt->stat[SOC_STAT_RDY].name = "CF Ready"; - } - - return ret; -} - -static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) - gpio_free_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - else - gpio_free_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); -} - -static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (skt->nr == 0) { - gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET, - (state->flags & SS_RESET)); - gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN, - !(state->Vcc == 33 || state->Vcc == 50)); - } else { - gpio_set_value(GPIO16_VPAC270_CF_RESET, - (state->flags & SS_RESET)); - } - - return 0; -} - -static struct pcmcia_low_level vpac270_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 2, - - .hw_init = vpac270_pcmcia_hw_init, - .hw_shutdown = vpac270_pcmcia_hw_shutdown, - - .socket_state = vpac270_pcmcia_socket_state, - .configure_socket = vpac270_pcmcia_configure_socket, -}; - -static struct platform_device *vpac270_pcmcia_device; - -static int __init vpac270_pcmcia_init(void) -{ - int ret; - - if (!machine_is_vpac270()) - return -ENODEV; - - vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!vpac270_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(vpac270_pcmcia_device, - &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(vpac270_pcmcia_device); - - if (ret) - platform_device_put(vpac270_pcmcia_device); - - return ret; -} - -static void __exit vpac270_pcmcia_exit(void) -{ - platform_device_unregister(vpac270_pcmcia_device); -} - -module_init(vpac270_pcmcia_init); -module_exit(vpac270_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/soc_common.h b/drivers/pcmcia/soc_common.h index 222e81c79365..17ef05aa8afe 100644 --- a/drivers/pcmcia/soc_common.h +++ b/drivers/pcmcia/soc_common.h @@ -13,137 +13,19 @@ /* include the world */ #include #include -#include #include - +#include struct device; struct gpio_desc; struct pcmcia_low_level; struct regulator; -struct soc_pcmcia_regulator { - struct regulator *reg; - bool on; -}; - -/* - * This structure encapsulates per-socket state which we might need to - * use when responding to a Card Services query of some kind. - */ -struct soc_pcmcia_socket { - struct pcmcia_socket socket; - - /* - * Info from low level handler - */ - unsigned int nr; - struct clk *clk; - - /* - * Core PCMCIA state - */ - const struct pcmcia_low_level *ops; - - unsigned int status; - socket_state_t cs_state; - - unsigned short spd_io[MAX_IO_WIN]; - unsigned short spd_mem[MAX_WIN]; - unsigned short spd_attr[MAX_WIN]; - - struct resource res_skt; - struct resource res_io; - struct resource res_mem; - struct resource res_attr; - void __iomem *virt_io; - - struct { - int gpio; - struct gpio_desc *desc; - unsigned int irq; - const char *name; - } stat[6]; -#define SOC_STAT_CD 0 /* Card detect */ -#define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */ -#define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */ -#define SOC_STAT_RDY 3 /* Ready / Interrupt */ -#define SOC_STAT_VS1 4 /* Voltage sense 1 */ -#define SOC_STAT_VS2 5 /* Voltage sense 2 */ - - struct gpio_desc *gpio_reset; - struct gpio_desc *gpio_bus_enable; - struct soc_pcmcia_regulator vcc; - struct soc_pcmcia_regulator vpp; - - unsigned int irq_state; - -#ifdef CONFIG_CPU_FREQ - struct notifier_block cpufreq_nb; -#endif - struct timer_list poll_timer; - struct list_head node; - void *driver_data; -}; - struct skt_dev_info { int nskt; struct soc_pcmcia_socket skt[]; }; -struct pcmcia_state { - unsigned detect: 1, - ready: 1, - bvd1: 1, - bvd2: 1, - wrprot: 1, - vs_3v: 1, - vs_Xv: 1; -}; - -struct pcmcia_low_level { - struct module *owner; - - /* first socket in system */ - int first; - /* nr of sockets */ - int nr; - - int (*hw_init)(struct soc_pcmcia_socket *); - void (*hw_shutdown)(struct soc_pcmcia_socket *); - - void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); - int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); - - /* - * Enable card status IRQs on (re-)initialisation. This can - * be called at initialisation, power management event, or - * pcmcia event. - */ - void (*socket_init)(struct soc_pcmcia_socket *); - - /* - * Disable card status IRQs and PCMCIA bus on suspend. - */ - void (*socket_suspend)(struct soc_pcmcia_socket *); - - /* - * Hardware specific timing routines. - * If provided, the get_timing routine overrides the SOC default. - */ - unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); - int (*set_timing)(struct soc_pcmcia_socket *); - int (*show_timing)(struct soc_pcmcia_socket *, char *); - -#ifdef CONFIG_CPU_FREQ - /* - * CPUFREQ support. - */ - int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); -#endif -}; - - struct soc_pcmcia_timing { unsigned short io; unsigned short mem; diff --git a/include/linux/platform_data/pcmcia-pxa2xx_viper.h b/include/linux/platform_data/pcmcia-pxa2xx_viper.h deleted file mode 100644 index a23b58aff9e1..000000000000 --- a/include/linux/platform_data/pcmcia-pxa2xx_viper.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ARCOM_PCMCIA_H -#define __ARCOM_PCMCIA_H - -struct arcom_pcmcia_pdata { - int cd_gpio; - int rdy_gpio; - int pwr_gpio; - void (*reset)(int state); -}; - -#endif diff --git a/include/pcmcia/soc_common.h b/include/pcmcia/soc_common.h new file mode 100644 index 000000000000..26f1473a06c5 --- /dev/null +++ b/include/pcmcia/soc_common.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#include + +struct module; +struct cpufreq_freqs; + +struct soc_pcmcia_regulator { + struct regulator *reg; + bool on; +}; + +struct pcmcia_state { + unsigned detect: 1, + ready: 1, + bvd1: 1, + bvd2: 1, + wrprot: 1, + vs_3v: 1, + vs_Xv: 1; +}; + +/* + * This structure encapsulates per-socket state which we might need to + * use when responding to a Card Services query of some kind. + */ +struct soc_pcmcia_socket { + struct pcmcia_socket socket; + + /* + * Info from low level handler + */ + unsigned int nr; + struct clk *clk; + + /* + * Core PCMCIA state + */ + const struct pcmcia_low_level *ops; + + unsigned int status; + socket_state_t cs_state; + + unsigned short spd_io[MAX_IO_WIN]; + unsigned short spd_mem[MAX_WIN]; + unsigned short spd_attr[MAX_WIN]; + + struct resource res_skt; + struct resource res_io; + struct resource res_mem; + struct resource res_attr; + void __iomem *virt_io; + + struct { + int gpio; + struct gpio_desc *desc; + unsigned int irq; + const char *name; + } stat[6]; +#define SOC_STAT_CD 0 /* Card detect */ +#define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */ +#define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */ +#define SOC_STAT_RDY 3 /* Ready / Interrupt */ +#define SOC_STAT_VS1 4 /* Voltage sense 1 */ +#define SOC_STAT_VS2 5 /* Voltage sense 2 */ + + struct gpio_desc *gpio_reset; + struct gpio_desc *gpio_bus_enable; + struct soc_pcmcia_regulator vcc; + struct soc_pcmcia_regulator vpp; + + unsigned int irq_state; + +#ifdef CONFIG_CPU_FREQ + struct notifier_block cpufreq_nb; +#endif + struct timer_list poll_timer; + struct list_head node; + void *driver_data; +}; + + +struct pcmcia_low_level { + struct module *owner; + + /* first socket in system */ + int first; + /* nr of sockets */ + int nr; + + int (*hw_init)(struct soc_pcmcia_socket *); + void (*hw_shutdown)(struct soc_pcmcia_socket *); + + void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); + int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); + + /* + * Enable card status IRQs on (re-)initialisation. This can + * be called at initialisation, power management event, or + * pcmcia event. + */ + void (*socket_init)(struct soc_pcmcia_socket *); + + /* + * Disable card status IRQs and PCMCIA bus on suspend. + */ + void (*socket_suspend)(struct soc_pcmcia_socket *); + + /* + * Hardware specific timing routines. + * If provided, the get_timing routine overrides the SOC default. + */ + unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); + int (*set_timing)(struct soc_pcmcia_socket *); + int (*show_timing)(struct soc_pcmcia_socket *, char *); + +#ifdef CONFIG_CPU_FREQ + /* + * CPUFREQ support. + */ + int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); +#endif +}; + + + -- cgit v1.2.3 From 9fe15316563cbd46601c770a7214ccc5e1925bfb Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 6 Aug 2019 15:13:18 +0200 Subject: ARM: omap1: innovator: move ohci phy power handling to board file The innovator board needs a special case for its phy control. Move the corresponding code into the board file and out of the common code by adding another callback. Acked-by: Felipe Balbi Acked-by: Tony Lindgren Signed-off-by: Arnd Bergmann --- arch/arm/mach-omap1/board-innovator.c | 19 +++++++++++++++++++ drivers/usb/host/ohci-omap.c | 31 +++++-------------------------- include/linux/platform_data/usb-omap1.h | 2 ++ 3 files changed, 26 insertions(+), 26 deletions(-) (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index e7d6735d4701..f169e172421d 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c @@ -290,6 +290,23 @@ static void __init innovator_init_smc91x(void) } #ifdef CONFIG_ARCH_OMAP15XX +/* + * Board specific gang-switched transceiver power on/off. + */ +static int innovator_omap_ohci_transceiver_power(int on) +{ + if (on) + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + else + __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) + & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), + INNOVATOR_FPGA_CAM_USB_CONTROL); + + return 0; +} + static struct omap_usb_config innovator1510_usb_config __initdata = { /* for bundled non-standard host and peripheral cables */ .hmc_mode = 4, @@ -300,6 +317,8 @@ static struct omap_usb_config innovator1510_usb_config __initdata = { .register_dev = 1, .pins[0] = 2, + + .transceiver_power = innovator_omap_ohci_transceiver_power, }; static const struct omap_lcd_config innovator1510_lcd_config __initconst = { diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 750a90c41a0a..069791d25abb 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c @@ -67,31 +67,6 @@ static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on) } } -/* - * Board specific gang-switched transceiver power on/off. - * NOTE: OSK supplies power from DC, not battery. - */ -static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on) -{ - if (on) { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (priv->power) - gpiod_set_value_cansleep(priv->power, 0); - } else { - if (machine_is_omap_innovator() && cpu_is_omap1510()) - __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) - & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), - INNOVATOR_FPGA_CAM_USB_CONTROL); - else if (priv->power) - gpiod_set_value_cansleep(priv->power, 1); - } - - return 0; -} - #ifdef CONFIG_USB_OTG static void start_hnp(struct ohci_hcd *ohci) @@ -202,7 +177,11 @@ static int ohci_omap_reset(struct usb_hcd *hcd) } /* FIXME hub_wq hub requests should manage power switching */ - omap_ohci_transceiver_power(priv, 1); + if (config->transceiver_power) + return config->transceiver_power(1); + + if (priv->power) + gpiod_set_value_cansleep(priv->power, 0); /* board init will have already handled HMC and mux setup. * any external transceiver should already be initialized diff --git a/include/linux/platform_data/usb-omap1.h b/include/linux/platform_data/usb-omap1.h index 878e572a78bf..e7b8dc92a269 100644 --- a/include/linux/platform_data/usb-omap1.h +++ b/include/linux/platform_data/usb-omap1.h @@ -50,6 +50,8 @@ struct omap_usb_config { int (*ocpi_enable)(void); void (*lb_reset)(void); + + int (*transceiver_power)(int on); }; #endif /* __LINUX_USB_OMAP1_H */ -- cgit v1.2.3 From fae74fb5d525f979085b6e70b883d7a7049bf15f Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 25 Apr 2022 19:32:55 +0200 Subject: gpio: pcf857x: Make teardown callback return void MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All teardown functions return 0. Also there is little sense in returning a negative error code from an i2c remove function as this only results in emitting an error message but the device is removed nevertheless. This patch is a preparation for making i2c remove callbacks return void. Signed-off-by: Uwe Kleine-König Signed-off-by: Bartosz Golaszewski --- arch/arm/mach-davinci/board-da830-evm.c | 3 +-- arch/arm/mach-davinci/board-dm644x-evm.c | 9 +++------ arch/arm/mach-davinci/board-dm646x-evm.c | 4 +--- drivers/gpio/gpio-pcf857x.c | 14 +++----------- include/linux/platform_data/pcf857x.h | 2 +- 5 files changed, 9 insertions(+), 23 deletions(-) (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 823c9cc98f18..52a452eff01c 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -473,11 +473,10 @@ static int __init da830_evm_ui_expander_setup(struct i2c_client *client, return 0; } -static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, +static void da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *context) { gpio_free(gpio + 6); - return 0; } static struct pcf857x_platform_data __initdata da830_evm_ui_expander_info = { diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index cce3a621eb20..b69fc17d6a8c 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -366,14 +366,13 @@ evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) return status; } -static int +static void evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) { if (evm_led_dev) { platform_device_unregister(evm_led_dev); evm_led_dev = NULL; } - return 0; } static struct pcf857x_platform_data pcf_data_u2 = { @@ -428,7 +427,7 @@ evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) return 0; } -static int +static void evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) { gpio_free(gpio + 1); @@ -439,7 +438,6 @@ evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) device_remove_file(&client->dev, &dev_attr_user_sw); gpio_free(sw_gpio); } - return 0; } static struct pcf857x_platform_data pcf_data_u18 = { @@ -488,7 +486,7 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) return 0; } -static int +static void evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) { gpio_free(gpio + 7); @@ -498,7 +496,6 @@ evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c) gpio_free(gpio + 2); gpio_free(gpio + 1); gpio_free(gpio + 0); - return 0; } static struct pcf857x_platform_data pcf_data_u35 = { diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index ee91d81ebbfd..625d2d626147 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -315,15 +315,13 @@ static int evm_pcf_setup(struct i2c_client *client, int gpio, return evm_led_setup(client, gpio+4, 4, c); } -static int evm_pcf_teardown(struct i2c_client *client, int gpio, +static void evm_pcf_teardown(struct i2c_client *client, int gpio, unsigned int ngpio, void *c) { BUG_ON(ngpio < 8); evm_sw_teardown(client, gpio, 4, c); evm_led_teardown(client, gpio+4, 4, c); - - return 0; } static struct pcf857x_platform_data pcf_data = { diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index b7568ee33696..e3a53dd5df1e 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c @@ -396,20 +396,12 @@ static int pcf857x_remove(struct i2c_client *client) { struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev); struct pcf857x *gpio = i2c_get_clientdata(client); - int status = 0; - if (pdata && pdata->teardown) { - status = pdata->teardown(client, - gpio->chip.base, gpio->chip.ngpio, + if (pdata && pdata->teardown) + pdata->teardown(client, gpio->chip.base, gpio->chip.ngpio, pdata->context); - if (status < 0) { - dev_err(&client->dev, "%s --> %d\n", - "teardown", status); - return status; - } - } - return status; + return 0; } static void pcf857x_shutdown(struct i2c_client *client) diff --git a/include/linux/platform_data/pcf857x.h b/include/linux/platform_data/pcf857x.h index 11d4ed78c7f4..01d0a3ea3aef 100644 --- a/include/linux/platform_data/pcf857x.h +++ b/include/linux/platform_data/pcf857x.h @@ -36,7 +36,7 @@ struct pcf857x_platform_data { int (*setup)(struct i2c_client *client, int gpio, unsigned ngpio, void *context); - int (*teardown)(struct i2c_client *client, + void (*teardown)(struct i2c_client *client, int gpio, unsigned ngpio, void *context); void *context; -- cgit v1.2.3 From c9bc1a0ef9f613a7bc1adfff4c67dc5e5d7d1709 Mon Sep 17 00:00:00 2001 From: "Dustin L. Howett" Date: Thu, 17 Feb 2022 10:59:30 -0600 Subject: platform/chrome: cros_ec_lpcs: reserve the MEC LPC I/O ports first Some ChromeOS EC devices (such as the Framework Laptop) only map I/O ports 0x800-0x807. Making the larger reservation required by the non-MEC LPC (the 0xFF ports for the memory map, and the 0xFF ports for the parameter region) is non-viable on these devices. Since we probe the MEC EC first, we can get away with a smaller reservation that covers the MEC EC ports. If we fall back to classic LPC, we can grow the reservation to cover the memory map and the parameter region. cros_ec_lpc_probe also interacted with I/O ports 0x800-0x807 without a reservation. Restructuring the code to request the MEC LPC region first obviates the need to do so. Signed-off-by: Dustin L. Howett Signed-off-by: Tzung-Bi Shih Link: https://lore.kernel.org/r/20220217165930.15081-3-dustin@howett.net --- drivers/platform/chrome/cros_ec_lpc.c | 39 +++++++++++++++++--------- include/linux/platform_data/cros_ec_commands.h | 10 +++++-- 2 files changed, 33 insertions(+), 16 deletions(-) (limited to 'include/linux/platform_data') diff --git a/drivers/platform/chrome/cros_ec_lpc.c b/drivers/platform/chrome/cros_ec_lpc.c index 1ec12d19c779..8eeef85a96b1 100644 --- a/drivers/platform/chrome/cros_ec_lpc.c +++ b/drivers/platform/chrome/cros_ec_lpc.c @@ -341,9 +341,14 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) u8 buf[2]; int irq, ret; - if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE, - dev_name(dev))) { - dev_err(dev, "couldn't reserve memmap region\n"); + /* + * The Framework Laptop (and possibly other non-ChromeOS devices) + * only exposes the eight I/O ports that are required for the Microchip EC. + * Requesting a larger reservation will fail. + */ + if (!devm_request_region(dev, EC_HOST_CMD_REGION0, + EC_HOST_CMD_MEC_REGION_SIZE, dev_name(dev))) { + dev_err(dev, "couldn't reserve MEC region\n"); return -EBUSY; } @@ -357,6 +362,12 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes; cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf); if (buf[0] != 'E' || buf[1] != 'C') { + if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE, + dev_name(dev))) { + dev_err(dev, "couldn't reserve memmap region\n"); + return -EBUSY; + } + /* Re-assign read/write operations for the non MEC variant */ cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes; cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes; @@ -366,17 +377,19 @@ static int cros_ec_lpc_probe(struct platform_device *pdev) dev_err(dev, "EC ID not detected\n"); return -ENODEV; } - } - if (!devm_request_region(dev, EC_HOST_CMD_REGION0, - EC_HOST_CMD_REGION_SIZE, dev_name(dev))) { - dev_err(dev, "couldn't reserve region0\n"); - return -EBUSY; - } - if (!devm_request_region(dev, EC_HOST_CMD_REGION1, - EC_HOST_CMD_REGION_SIZE, dev_name(dev))) { - dev_err(dev, "couldn't reserve region1\n"); - return -EBUSY; + /* Reserve the remaining I/O ports required by the non-MEC protocol. */ + if (!devm_request_region(dev, EC_HOST_CMD_REGION0 + EC_HOST_CMD_MEC_REGION_SIZE, + EC_HOST_CMD_REGION_SIZE - EC_HOST_CMD_MEC_REGION_SIZE, + dev_name(dev))) { + dev_err(dev, "couldn't reserve remainder of region0\n"); + return -EBUSY; + } + if (!devm_request_region(dev, EC_HOST_CMD_REGION1, + EC_HOST_CMD_REGION_SIZE, dev_name(dev))) { + dev_err(dev, "couldn't reserve region1\n"); + return -EBUSY; + } } ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index c23554531961..8cfa8cfca77e 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -51,10 +51,14 @@ /* * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff * and they tell the kernel that so we have to think of it as two parts. + * + * Other BIOSes report only the I/O port region spanned by the Microchip + * MEC series EC; an attempt to address a larger region may fail. */ -#define EC_HOST_CMD_REGION0 0x800 -#define EC_HOST_CMD_REGION1 0x880 -#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_REGION0 0x800 +#define EC_HOST_CMD_REGION1 0x880 +#define EC_HOST_CMD_REGION_SIZE 0x80 +#define EC_HOST_CMD_MEC_REGION_SIZE 0x8 /* EC command register bit functions */ #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ -- cgit v1.2.3 From 6d5f2207447b28dc73c25b3907e7ee32ee66bdbd Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 2 May 2022 19:08:27 +0200 Subject: gpio: max732x: Drop unused support for irq and setup code via platform data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The only user of max732x_platform_data is arch/arm/mach-pxa/littleton.c and it only uses .gpio_base. So drop the other members from the data struct and simplify the driver accordingly. The motivating side effect of this change is that the .remove() callback cannot return a nonzero error code any more which prepares making i2c remove callbacks return void. Signed-off-by: Uwe Kleine-König Signed-off-by: Bartosz Golaszewski --- drivers/gpio/gpio-max732x.c | 37 ++--------------------------------- include/linux/platform_data/max732x.h | 12 ------------ 2 files changed, 2 insertions(+), 47 deletions(-) (limited to 'include/linux/platform_data') diff --git a/drivers/gpio/gpio-max732x.c b/drivers/gpio/gpio-max732x.c index 238cbe926b9f..da6972117030 100644 --- a/drivers/gpio/gpio-max732x.c +++ b/drivers/gpio/gpio-max732x.c @@ -496,17 +496,13 @@ static int max732x_irq_setup(struct max732x_chip *chip, const struct i2c_device_id *id) { struct i2c_client *client = chip->client; - struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); int has_irq = max732x_features[id->driver_data] >> 32; int irq_base = 0; int ret; - if (((pdata && pdata->irq_base) || client->irq) - && has_irq != INT_NONE) { + if (client->irq && has_irq != INT_NONE) { struct gpio_irq_chip *girq; - if (pdata) - irq_base = pdata->irq_base; chip->irq_features = has_irq; mutex_init(&chip->irq_lock); @@ -540,10 +536,9 @@ static int max732x_irq_setup(struct max732x_chip *chip, const struct i2c_device_id *id) { struct i2c_client *client = chip->client; - struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); int has_irq = max732x_features[id->driver_data] >> 32; - if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE) + if (client->irq && has_irq != INT_NONE) dev_warn(&client->dev, "interrupt support not compiled in\n"); return 0; @@ -703,44 +698,16 @@ static int max732x_probe(struct i2c_client *client, if (ret) return ret; - if (pdata->setup) { - ret = pdata->setup(client, chip->gpio_chip.base, - chip->gpio_chip.ngpio, pdata->context); - if (ret < 0) - dev_warn(&client->dev, "setup failed, %d\n", ret); - } - i2c_set_clientdata(client, chip); return 0; } -static int max732x_remove(struct i2c_client *client) -{ - struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); - struct max732x_chip *chip = i2c_get_clientdata(client); - - if (pdata && pdata->teardown) { - int ret; - - ret = pdata->teardown(client, chip->gpio_chip.base, - chip->gpio_chip.ngpio, pdata->context); - if (ret < 0) { - dev_err(&client->dev, "%s failed, %d\n", - "teardown", ret); - return ret; - } - } - - return 0; -} - static struct i2c_driver max732x_driver = { .driver = { .name = "max732x", .of_match_table = of_match_ptr(max732x_of_table), }, .probe = max732x_probe, - .remove = max732x_remove, .id_table = max732x_id, }; diff --git a/include/linux/platform_data/max732x.h b/include/linux/platform_data/max732x.h index f231c635faec..423999207cd5 100644 --- a/include/linux/platform_data/max732x.h +++ b/include/linux/platform_data/max732x.h @@ -7,17 +7,5 @@ struct max732x_platform_data { /* number of the first GPIO */ unsigned gpio_base; - - /* interrupt base */ - int irq_base; - - void *context; /* param to setup/teardown */ - - int (*setup)(struct i2c_client *client, - unsigned gpio, unsigned ngpio, - void *context); - int (*teardown)(struct i2c_client *client, - unsigned gpio, unsigned ngpio, - void *context); }; #endif /* __LINUX_I2C_MAX732X_H */ -- cgit v1.2.3 From ac70f4d80df414223130b04d9b4435bf56dda654 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 11 Sep 2019 10:58:26 +0200 Subject: ARM: pxa: poodle: use platform data for poodle asoc driver The poodle audio driver shows its age by using a custom gpio api for the "locomo" support chip. In a perfect world, this would get converted to use gpiolib and a gpio lookup table. As the world is not perfect, just pass all the required data in a custom platform_data structure. to avoid the globally visible mach/poodle.h header. Acked-by: Mark Brown Acked-by: Robert Jarzmik Cc: alsa-devel@alsa-project.org Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/include/mach/poodle.h | 94 ------------------------------- arch/arm/mach-pxa/poodle.c | 30 ++++++---- arch/arm/mach-pxa/poodle.h | 92 ++++++++++++++++++++++++++++++ include/linux/platform_data/asoc-poodle.h | 16 ++++++ sound/soc/pxa/poodle.c | 49 ++++++++-------- 5 files changed, 154 insertions(+), 127 deletions(-) delete mode 100644 arch/arm/mach-pxa/include/mach/poodle.h create mode 100644 arch/arm/mach-pxa/poodle.h create mode 100644 include/linux/platform_data/asoc-poodle.h (limited to 'include/linux/platform_data') diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h deleted file mode 100644 index b56b19351a03..000000000000 --- a/arch/arm/mach-pxa/include/mach/poodle.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * arch/arm/mach-pxa/include/mach/poodle.h - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Based on: - * arch/arm/mach-sa1100/include/mach/collie.h - * - * ChangeLog: - * 04-06-2001 Lineo Japan, Inc. - * 04-16-2001 SHARP Corporation - * Update to 2.6 John Lenz - */ -#ifndef __ASM_ARCH_POODLE_H -#define __ASM_ARCH_POODLE_H 1 - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* - * GPIOs - */ -/* PXA GPIOs */ -#define POODLE_GPIO_ON_KEY (0) -#define POODLE_GPIO_AC_IN (1) -#define POODLE_GPIO_CO 16 -#define POODLE_GPIO_TP_INT (5) -#define POODLE_GPIO_TP_CS (24) -#define POODLE_GPIO_WAKEUP (11) /* change battery */ -#define POODLE_GPIO_GA_INT (10) -#define POODLE_GPIO_IR_ON (22) -#define POODLE_GPIO_HP_IN (4) -#define POODLE_GPIO_CF_IRQ (17) -#define POODLE_GPIO_CF_CD (14) -#define POODLE_GPIO_CF_STSCHG (14) -#define POODLE_GPIO_SD_PWR (33) -#define POODLE_GPIO_SD_PWR1 (3) -#define POODLE_GPIO_nSD_CLK (6) -#define POODLE_GPIO_nSD_WP (7) -#define POODLE_GPIO_nSD_INT (8) -#define POODLE_GPIO_nSD_DETECT (9) -#define POODLE_GPIO_MAIN_BAT_LOW (13) -#define POODLE_GPIO_BAT_COVER (13) -#define POODLE_GPIO_USB_PULLUP (20) -#define POODLE_GPIO_ADC_TEMP_ON (21) -#define POODLE_GPIO_BYPASS_ON (36) -#define POODLE_GPIO_CHRG_ON (38) -#define POODLE_GPIO_CHRG_FULL (16) -#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ - -/* PXA GPIOs */ -#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0) -#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) -#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4) -#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16) -#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) -#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11) -#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10) -#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) -#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) -#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8) -#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) -#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13) - -/* SCOOP GPIOs */ -#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 -#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13 -#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18 -#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20 -#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21 -#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22 - -#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) -#define POODLE_SCOOP_IO_OUT ( 0 ) - -#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) -#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) -#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) -#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) -#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9) -#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10) -#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11) - -#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) -#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) -#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) -#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12) -#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13) - -#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */ - -extern struct platform_device poodle_locomo_device; - -#endif /* __ASM_ARCH_POODLE_H */ diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index ca52882433d4..7772a39430ed 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c @@ -39,11 +39,13 @@ #include #include "pxa25x.h" -#include #include "udc.h" +#include "poodle.h" + +#include #include -#include #include +#include #include #include @@ -155,12 +157,6 @@ static struct scoop_pcmcia_config poodle_pcmcia_config = { EXPORT_SYMBOL(poodle_scoop_device); - -static struct platform_device poodle_audio_device = { - .name = "poodle-audio", - .id = -1, -}; - /* LoCoMo device */ static struct resource locomo_resources[] = { [0] = { @@ -179,7 +175,7 @@ static struct locomo_platform_data locomo_info = { .irq_base = IRQ_BOARD_START, }; -struct platform_device poodle_locomo_device = { +static struct platform_device poodle_locomo_device = { .name = "locomo", .id = 0, .num_resources = ARRAY_SIZE(locomo_resources), @@ -189,7 +185,21 @@ struct platform_device poodle_locomo_device = { }, }; -EXPORT_SYMBOL(poodle_locomo_device); +static struct poodle_audio_platform_data poodle_audio_pdata = { + .locomo_dev = &poodle_locomo_device.dev, + + .gpio_amp_on = POODLE_LOCOMO_GPIO_AMP_ON, + .gpio_mute_l = POODLE_LOCOMO_GPIO_MUTE_L, + .gpio_mute_r = POODLE_LOCOMO_GPIO_MUTE_R, + .gpio_232vcc_on = POODLE_LOCOMO_GPIO_232VCC_ON, + .gpio_jk_b = POODLE_LOCOMO_GPIO_JK_B, +}; + +static struct platform_device poodle_audio_device = { + .name = "poodle-audio", + .id = -1, + .dev.platform_data = &poodle_audio_pdata, +}; #if defined(CONFIG_SPI_PXA2XX) || defined(CONFIG_SPI_PXA2XX_MODULE) static struct pxa2xx_spi_controller poodle_spi_info = { diff --git a/arch/arm/mach-pxa/poodle.h b/arch/arm/mach-pxa/poodle.h new file mode 100644 index 000000000000..e675a3d1aa18 --- /dev/null +++ b/arch/arm/mach-pxa/poodle.h @@ -0,0 +1,92 @@ +/* + * arch/arm/mach-pxa/include/mach/poodle.h + * + * May be copied or modified under the terms of the GNU General Public + * License. See linux/COPYING for more information. + * + * Based on: + * arch/arm/mach-sa1100/include/mach/collie.h + * + * ChangeLog: + * 04-06-2001 Lineo Japan, Inc. + * 04-16-2001 SHARP Corporation + * Update to 2.6 John Lenz + */ +#ifndef __ASM_ARCH_POODLE_H +#define __ASM_ARCH_POODLE_H 1 + +#include /* PXA_GPIO_TO_IRQ */ + +/* + * GPIOs + */ +/* PXA GPIOs */ +#define POODLE_GPIO_ON_KEY (0) +#define POODLE_GPIO_AC_IN (1) +#define POODLE_GPIO_CO 16 +#define POODLE_GPIO_TP_INT (5) +#define POODLE_GPIO_TP_CS (24) +#define POODLE_GPIO_WAKEUP (11) /* change battery */ +#define POODLE_GPIO_GA_INT (10) +#define POODLE_GPIO_IR_ON (22) +#define POODLE_GPIO_HP_IN (4) +#define POODLE_GPIO_CF_IRQ (17) +#define POODLE_GPIO_CF_CD (14) +#define POODLE_GPIO_CF_STSCHG (14) +#define POODLE_GPIO_SD_PWR (33) +#define POODLE_GPIO_SD_PWR1 (3) +#define POODLE_GPIO_nSD_CLK (6) +#define POODLE_GPIO_nSD_WP (7) +#define POODLE_GPIO_nSD_INT (8) +#define POODLE_GPIO_nSD_DETECT (9) +#define POODLE_GPIO_MAIN_BAT_LOW (13) +#define POODLE_GPIO_BAT_COVER (13) +#define POODLE_GPIO_USB_PULLUP (20) +#define POODLE_GPIO_ADC_TEMP_ON (21) +#define POODLE_GPIO_BYPASS_ON (36) +#define POODLE_GPIO_CHRG_ON (38) +#define POODLE_GPIO_CHRG_FULL (16) +#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ + +/* PXA GPIOs */ +#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0) +#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1) +#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4) +#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16) +#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5) +#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11) +#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10) +#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17) +#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14) +#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8) +#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9) +#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13) + +/* SCOOP GPIOs */ +#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 +#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13 +#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18 +#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20 +#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21 +#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22 + +#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) +#define POODLE_SCOOP_IO_OUT ( 0 ) + +#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO) +#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) +#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) +#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) +#define POODLE_GPIO_L_PCLK (POODLE_SCOOP_GPIO_BASE + 9) +#define POODLE_GPIO_L_LCLK (POODLE_SCOOP_GPIO_BASE + 10) +#define POODLE_GPIO_HS_OUT (POODLE_SCOOP_GPIO_BASE + 11) + +#define POODLE_LOCOMO_GPIO_AMP_ON LOCOMO_GPIO(8) +#define POODLE_LOCOMO_GPIO_MUTE_L LOCOMO_GPIO(10) +#define POODLE_LOCOMO_GPIO_MUTE_R LOCOMO_GPIO(11) +#define POODLE_LOCOMO_GPIO_232VCC_ON LOCOMO_GPIO(12) +#define POODLE_LOCOMO_GPIO_JK_B LOCOMO_GPIO(13) + +#define POODLE_NR_IRQS (IRQ_BOARD_START + 4) /* 4 for LoCoMo */ + +#endif /* __ASM_ARCH_POODLE_H */ diff --git a/include/linux/platform_data/asoc-poodle.h b/include/linux/platform_data/asoc-poodle.h new file mode 100644 index 000000000000..2052fad55c5c --- /dev/null +++ b/include/linux/platform_data/asoc-poodle.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __LINUX_PLATFORM_DATA_POODLE_AUDIO +#define __LINUX_PLATFORM_DATA_POODLE_AUDIO + +/* locomo is not a proper gpio driver, and uses its own api */ +struct poodle_audio_platform_data { + struct device *locomo_dev; + + int gpio_amp_on; + int gpio_mute_l; + int gpio_mute_r; + int gpio_232vcc_on; + int gpio_jk_b; +}; + +#endif diff --git a/sound/soc/pxa/poodle.c b/sound/soc/pxa/poodle.c index 176a0441235a..5fdaa477e85d 100644 --- a/sound/soc/pxa/poodle.c +++ b/sound/soc/pxa/poodle.c @@ -21,8 +21,8 @@ #include #include -#include #include +#include #include "../codecs/wm8731.h" #include "pxa2xx-i2s.h" @@ -38,21 +38,23 @@ static int poodle_jack_func; static int poodle_spk_func; +static struct poodle_audio_platform_data *poodle_pdata; + static void poodle_ext_control(struct snd_soc_dapm_context *dapm) { /* set up jack connection */ if (poodle_jack_func == POODLE_HP) { /* set = unmute headphone */ - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 1); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 1); snd_soc_dapm_enable_pin(dapm, "Headphone Jack"); } else { - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 0); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 0); snd_soc_dapm_disable_pin(dapm, "Headphone Jack"); } @@ -80,10 +82,10 @@ static int poodle_startup(struct snd_pcm_substream *substream) static void poodle_shutdown(struct snd_pcm_substream *substream) { /* set = unmute headphone */ - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 1); - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 1); } static int poodle_hw_params(struct snd_pcm_substream *substream, @@ -174,11 +176,11 @@ static int poodle_amp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *k, int event) { if (SND_SOC_DAPM_EVENT_ON(event)) - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 0); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 0); else - locomo_gpio_write(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 1); + locomo_gpio_write(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 1); return 0; } @@ -254,13 +256,14 @@ static int poodle_probe(struct platform_device *pdev) struct snd_soc_card *card = &poodle; int ret; - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_AMP_ON, 0); + poodle_pdata = pdev->dev.platform_data; + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_amp_on, 0); /* should we mute HP at startup - burning power ?*/ - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_L, 0); - locomo_gpio_set_dir(&poodle_locomo_device.dev, - POODLE_LOCOMO_GPIO_MUTE_R, 0); + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_l, 0); + locomo_gpio_set_dir(poodle_pdata->locomo_dev, + poodle_pdata->gpio_mute_r, 0); card->dev = &pdev->dev; -- cgit v1.2.3 From 41929c9f628b9990d33a200c54bb0c919e089aa8 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 6 Apr 2022 22:55:05 +0200 Subject: clocksource/drivers/ixp4xx: Drop boardfile probe path The boardfiles for IXP4xx have been deleted. Delete all the quirks and code dealing with that boot path and rely solely on device tree boot. Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20220406205505.2332821-1-linus.walleij@linaro.org Signed-off-by: Daniel Lezcano --- drivers/clocksource/Kconfig | 2 +- drivers/clocksource/timer-ixp4xx.c | 25 ------------------------- include/linux/platform_data/timer-ixp4xx.h | 11 ----------- 3 files changed, 1 insertion(+), 37 deletions(-) delete mode 100644 include/linux/platform_data/timer-ixp4xx.h (limited to 'include/linux/platform_data') diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 1589ae7d5abb..8182ff2d12fe 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -80,7 +80,7 @@ config IXP4XX_TIMER bool "Intel XScale IXP4xx timer driver" if COMPILE_TEST depends on HAS_IOMEM select CLKSRC_MMIO - select TIMER_OF if OF + select TIMER_OF help Enables support for the Intel XScale IXP4xx SoC timer. diff --git a/drivers/clocksource/timer-ixp4xx.c b/drivers/clocksource/timer-ixp4xx.c index cbb184953510..720ed70a2964 100644 --- a/drivers/clocksource/timer-ixp4xx.c +++ b/drivers/clocksource/timer-ixp4xx.c @@ -19,8 +19,6 @@ #include #include #include -/* Goes away with OF conversion */ -#include /* * Constants to make it easy to access Timer Control/Status registers @@ -263,28 +261,6 @@ static struct platform_driver ixp4xx_timer_driver = { }; builtin_platform_driver(ixp4xx_timer_driver); -/** - * ixp4xx_timer_setup() - Timer setup function to be called from boardfiles - * @timerbase: physical base of timer block - * @timer_irq: Linux IRQ number for the timer - * @timer_freq: Fixed frequency of the timer - */ -void __init ixp4xx_timer_setup(resource_size_t timerbase, - int timer_irq, - unsigned int timer_freq) -{ - void __iomem *base; - - base = ioremap(timerbase, 0x100); - if (!base) { - pr_crit("IXP4xx: can't remap timer\n"); - return; - } - ixp4xx_timer_register(base, timer_irq, timer_freq); -} -EXPORT_SYMBOL_GPL(ixp4xx_timer_setup); - -#ifdef CONFIG_OF static __init int ixp4xx_of_timer_init(struct device_node *np) { void __iomem *base; @@ -315,4 +291,3 @@ out_unmap: return ret; } TIMER_OF_DECLARE(ixp4xx, "intel,ixp4xx-timer", ixp4xx_of_timer_init); -#endif diff --git a/include/linux/platform_data/timer-ixp4xx.h b/include/linux/platform_data/timer-ixp4xx.h deleted file mode 100644 index ee92ae7edaed..000000000000 --- a/include/linux/platform_data/timer-ixp4xx.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __TIMER_IXP4XX_H -#define __TIMER_IXP4XX_H - -#include - -void __init ixp4xx_timer_setup(resource_size_t timerbase, - int timer_irq, - unsigned int timer_freq); - -#endif -- cgit v1.2.3