From c678fa66341c7b82a57cfed0ba3656162e970f99 Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Mon, 21 Aug 2017 10:23:13 -0700 Subject: dmaengine: remove DMA_SG as it is dead code in kernel There are no in kernel consumers for DMA_SG op. Removing operation, dead code, and test code in dmatest. Signed-off-by: Dave Jiang Reviewed-by: Linus Walleij Cc: Gary Hook Cc: Ludovic Desroches Cc: Kedareswara rao Appana Cc: Li Yang Cc: Michal Simek Signed-off-by: Vinod Koul --- include/linux/dmaengine.h | 19 ------------------- 1 file changed, 19 deletions(-) (limited to 'include/linux/dmaengine.h') diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 533680860865..64fbd380c430 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -68,7 +68,6 @@ enum dma_transaction_type { DMA_MEMSET, DMA_MEMSET_SG, DMA_INTERRUPT, - DMA_SG, DMA_PRIVATE, DMA_ASYNC_TX, DMA_SLAVE, @@ -771,11 +770,6 @@ struct dma_device { unsigned int nents, int value, unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( struct dma_chan *chan, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_sg)( - struct dma_chan *chan, - struct scatterlist *dst_sg, unsigned int dst_nents, - struct scatterlist *src_sg, unsigned int src_nents, - unsigned long flags); struct dma_async_tx_descriptor *(*device_prep_slave_sg)( struct dma_chan *chan, struct scatterlist *sgl, @@ -905,19 +899,6 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memcpy( len, flags); } -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg( - struct dma_chan *chan, - struct scatterlist *dst_sg, unsigned int dst_nents, - struct scatterlist *src_sg, unsigned int src_nents, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_sg) - return NULL; - - return chan->device->device_prep_dma_sg(chan, dst_sg, dst_nents, - src_sg, src_nents, flags); -} - /** * dmaengine_terminate_all() - Terminate all active DMA transfers * @chan: The channel for which to terminate the transfers -- cgit v1.2.3 From 3e00ab4ac51c2ed47c28fd5000c47399f1a11cf5 Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Tue, 1 Aug 2017 19:41:42 +0530 Subject: dmaengine: add DMA_PREP_CMD for non-Data descriptors. Some of the DMA controllers are capable of issuing the commands to peripheral by the DMA. These commands can be list of register reads/writes and its different from normal data reads/writes. This patch adds new flag DMA_PREP_CMD in DMA API which tells the driver that the data passed to DMA API is command data and DMA controller driver will form descriptor in the required format. This flag can be used by any DMA controller driver which requires the descriptor in different format for non-Data descriptors. Signed-off-by: Abhishek Sahu Signed-off-by: Vinod Koul --- Documentation/dmaengine/provider.txt | 7 +++++++ include/linux/dmaengine.h | 4 ++++ 2 files changed, 11 insertions(+) (limited to 'include/linux/dmaengine.h') diff --git a/Documentation/dmaengine/provider.txt b/Documentation/dmaengine/provider.txt index e33bc1c8ed2c..bfadbfdf13ed 100644 --- a/Documentation/dmaengine/provider.txt +++ b/Documentation/dmaengine/provider.txt @@ -395,6 +395,13 @@ where to put them) when DMA_CTRL_REUSE is already set - Terminating the channel + * DMA_PREP_CMD + - If set, the client driver tells DMA controller that passed data in DMA + API is command data. + - Interpretation of command data is DMA controller specific. It can be + used for issuing commands to other peripherals/register reads/register + writes for which the descriptor should be in different format from + normal data descriptors. General Design Notes -------------------- diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 533680860865..dd4de1d40166 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -186,6 +186,9 @@ struct dma_interleaved_template { * on the result of this operation * @DMA_CTRL_REUSE: client can reuse the descriptor and submit again till * cleared or freed + * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is command + * data and the descriptor should be in different format from normal + * data descriptors. */ enum dma_ctrl_flags { DMA_PREP_INTERRUPT = (1 << 0), @@ -195,6 +198,7 @@ enum dma_ctrl_flags { DMA_PREP_CONTINUE = (1 << 4), DMA_PREP_FENCE = (1 << 5), DMA_CTRL_REUSE = (1 << 6), + DMA_PREP_CMD = (1 << 7), }; /** -- cgit v1.2.3 From 3f7632e1ba2c6f5ca2499d1ee8acf95599d4b7b6 Mon Sep 17 00:00:00 2001 From: Stefan Brüns Date: Tue, 12 Sep 2017 01:44:44 +0200 Subject: dmaengine: List all allowed values for src/dst_addr_width in kernel doc MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 93c6ee94c140 ("dma: Support for 3 bytes word size") and commit 534a729866f9 ("dmaengine: Add 16 bytes, 32 bytes and 64 bytes bus widths") added additional values for the allowed word size, but omitted these from the struct dma_slave_config documentation. Signed-off-by: Stefan Brüns Signed-off-by: Vinod Koul --- include/linux/dmaengine.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux/dmaengine.h') diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 8319101170fc..2910e7dadc7f 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -329,7 +329,7 @@ enum dma_slave_buswidth { * @src_addr_width: this is the width in bytes of the source (RX) * register where DMA data shall be read. If the source * is memory this may be ignored depending on architecture. - * Legal values: 1, 2, 4, 8. + * Legal values: 1, 2, 3, 4, 8, 16, 32, 64. * @dst_addr_width: same as src_addr_width but for destination * target (TX) mutatis mutandis. * @src_maxburst: the maximum number of words (note: words, as in -- cgit v1.2.3 From c2cbd4276eea1d3b204754653dd74d6e10ca207f Mon Sep 17 00:00:00 2001 From: Stefan Brüns Date: Tue, 12 Sep 2017 01:44:45 +0200 Subject: dmaengine: Mark struct dma_slave_caps kernel-doc correctly, clarify MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit struct dma_slave_caps documentation omitted the correct kernel-doc opening comment mark. Document byte granularity and interpretation of the src/dst_addr_widths bit flag fields used by struct dma_slave_caps and struct dma_device. Add punctuation to their "directions" member documentations, and cleanup wording of the description. Signed-off-by: Stefan Brüns Signed-off-by: Vinod Koul --- include/linux/dmaengine.h | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) (limited to 'include/linux/dmaengine.h') diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 2910e7dadc7f..f838764993eb 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -404,14 +404,16 @@ enum dma_residue_granularity { DMA_RESIDUE_GRANULARITY_BURST = 2, }; -/* struct dma_slave_caps - expose capabilities of a slave channel only - * - * @src_addr_widths: bit mask of src addr widths the channel supports - * @dst_addr_widths: bit mask of dstn addr widths the channel supports - * @directions: bit mask of slave direction the channel supported - * since the enum dma_transfer_direction is not defined as bits for each - * type of direction, the dma controller should fill (1 << ) and same - * should be checked by controller as well +/** + * struct dma_slave_caps - expose capabilities of a slave channel only + * @src_addr_widths: bit mask of src addr widths the channel supports. + * Width is specified in bytes, e.g. for a channel supporting + * a width of 4 the mask should have BIT(4) set. + * @dst_addr_widths: bit mask of dst addr widths the channel supports + * @directions: bit mask of slave directions the channel supports. + * Since the enum dma_transfer_direction is not defined as bit flag for + * each type, the dma controller should set BIT() and same + * should be checked by controller as well * @max_burst: max burst capability per-transfer * @cmd_pause: true, if pause and thereby resume is supported * @cmd_terminate: true, if terminate cmd is supported @@ -678,11 +680,13 @@ struct dma_filter { * @dev_id: unique device ID * @dev: struct device reference for dma mapping api * @src_addr_widths: bit mask of src addr widths the device supports + * Width is specified in bytes, e.g. for a device supporting + * a width of 4 the mask should have BIT(4) set. * @dst_addr_widths: bit mask of dst addr widths the device supports - * @directions: bit mask of slave direction the device supports since - * the enum dma_transfer_direction is not defined as bits for - * each type of direction, the dma controller should fill (1 << - * ) and same should be checked by controller as well + * @directions: bit mask of slave directions the device supports. + * Since the enum dma_transfer_direction is not defined as bit flag for + * each type, the dma controller should set BIT() and same + * should be checked by controller as well * @max_burst: max burst capability per-transfer * @residue_granularity: granularity of the transfer residue reported * by tx_status -- cgit v1.2.3