From 08d3df8c81537089fc8f21006b56f2f6fb23c6f8 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 1 Sep 2019 22:26:10 +0200 Subject: ARM: pxa: split up mach/hardware.h The mach/hardware.h is included in lots of places, and it provides three different things on pxa: - the cpu_is_pxa* macros - an indirect inclusion of mach/addr-map.h - the __REG() and io_pv2() helper macros Split it up into separate and mach/pxa-regs.h headers, then change all the files that use mach/hardware.h to include the exact set of those three headers that they actually need, allowing for further more targeted cleanup. linux/soc/pxa/cpu.h can remain permanently exported and is now in a global location along with similar headers. pxa-regs.h and addr-map.h are only used in a very small number of drivers now and can be moved to arch/arm/mach-pxa/ directly when those drivers are to pass the necessary data as resources. Cc: Michael Turquette Cc: Stephen Boyd Acked-by: Viresh Kumar Acked-by: Dmitry Torokhov Cc: Jacek Anaszewski Cc: Pavel Machek Acked-by: Ulf Hansson Cc: Dominik Brodowski Acked-by: Alexandre Belloni Cc: Greg Kroah-Hartman Cc: Guenter Roeck Acked-by: Mark Brown Cc: linux-clk@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: linux-leds@vger.kernel.org Cc: linux-mmc@vger.kernel.org Cc: linux-mtd@lists.infradead.org Cc: linux-rtc@vger.kernel.org Cc: linux-usb@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Cc: linux-watchdog@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Arnd Bergmann --- drivers/pcmcia/pxa2xx_base.c | 2 +- drivers/pcmcia/pxa2xx_sharpsl.c | 1 - drivers/pcmcia/sa1111_generic.c | 1 - drivers/pcmcia/sa1111_lubbock.c | 1 - drivers/pcmcia/soc_common.c | 2 -- 5 files changed, 1 insertion(+), 6 deletions(-) (limited to 'drivers/pcmcia') diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index d6d2f75f8f47..7cd1375d6087 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -23,8 +23,8 @@ #include #include #include +#include -#include #include #include #include diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index 5fdd25a9e28e..66fe1d1af12a 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c @@ -15,7 +15,6 @@ #include #include -#include #include #include diff --git a/drivers/pcmcia/sa1111_generic.c b/drivers/pcmcia/sa1111_generic.c index 29fdd174bc23..bce664bbdc98 100644 --- a/drivers/pcmcia/sa1111_generic.c +++ b/drivers/pcmcia/sa1111_generic.c @@ -17,7 +17,6 @@ #include -#include #include #include #include diff --git a/drivers/pcmcia/sa1111_lubbock.c b/drivers/pcmcia/sa1111_lubbock.c index 7feb8d61c639..f1b5160cb8fa 100644 --- a/drivers/pcmcia/sa1111_lubbock.c +++ b/drivers/pcmcia/sa1111_lubbock.c @@ -17,7 +17,6 @@ #include #include -#include #include #include diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c index 3a8c84bb174d..9276a628473d 100644 --- a/drivers/pcmcia/soc_common.c +++ b/drivers/pcmcia/soc_common.c @@ -47,8 +47,6 @@ #include #include -#include - #include "soc_common.h" static irqreturn_t soc_common_pcmcia_interrupt(int irq, void *dev); -- cgit v1.2.3 From b83deaa741558babf4b8d51d34f6637ccfff1b26 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Thu, 28 May 2020 22:57:40 +0200 Subject: ARM: pxa: move pcmcia board data into mach-pxa The drivers/pcmcia/pxa2xx_*.c are essentially part of the board files, but for historic reasons located in drivers/pcmcia. Move them into the same place as the actual board file to avoid lots of machine header inclusions. Cc: Marek Vasut Cc: Dominik Brodowski Cc: Jonathan Cameron Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/Makefile | 18 +- arch/arm/mach-pxa/balloon3-pcmcia.c | 137 +++++++++++++++ arch/arm/mach-pxa/balloon3.c | 2 +- arch/arm/mach-pxa/balloon3.h | 181 ++++++++++++++++++++ arch/arm/mach-pxa/colibri-pcmcia.c | 165 ++++++++++++++++++ arch/arm/mach-pxa/e740-pcmcia.c | 127 ++++++++++++++ arch/arm/mach-pxa/hx4700-pcmcia.c | 118 +++++++++++++ arch/arm/mach-pxa/include/mach/balloon3.h | 181 -------------------- arch/arm/mach-pxa/include/mach/palmtc.h | 84 --------- arch/arm/mach-pxa/include/mach/palmtx.h | 110 ------------ arch/arm/mach-pxa/include/mach/trizeps4.h | 166 ------------------ arch/arm/mach-pxa/include/mach/vpac270.h | 38 ---- arch/arm/mach-pxa/palmld-pcmcia.c | 110 ++++++++++++ arch/arm/mach-pxa/palmtc-pcmcia.c | 162 ++++++++++++++++++ arch/arm/mach-pxa/palmtc.c | 2 +- arch/arm/mach-pxa/palmtc.h | 84 +++++++++ arch/arm/mach-pxa/palmtx-pcmcia.c | 111 ++++++++++++ arch/arm/mach-pxa/palmtx.c | 2 +- arch/arm/mach-pxa/palmtx.h | 110 ++++++++++++ arch/arm/mach-pxa/trizeps4-pcmcia.c | 200 ++++++++++++++++++++++ arch/arm/mach-pxa/trizeps4.c | 2 +- arch/arm/mach-pxa/trizeps4.h | 166 ++++++++++++++++++ arch/arm/mach-pxa/viper-pcmcia.c | 180 +++++++++++++++++++ arch/arm/mach-pxa/viper-pcmcia.h | 12 ++ arch/arm/mach-pxa/viper.c | 2 +- arch/arm/mach-pxa/vpac270-pcmcia.c | 137 +++++++++++++++ arch/arm/mach-pxa/vpac270.c | 2 +- arch/arm/mach-pxa/vpac270.h | 38 ++++ arch/arm/mach-pxa/zeus.c | 2 +- drivers/pcmcia/Makefile | 13 -- drivers/pcmcia/pxa2xx_balloon3.c | 137 --------------- drivers/pcmcia/pxa2xx_colibri.c | 165 ------------------ drivers/pcmcia/pxa2xx_e740.c | 127 -------------- drivers/pcmcia/pxa2xx_hx4700.c | 118 ------------- drivers/pcmcia/pxa2xx_palmld.c | 110 ------------ drivers/pcmcia/pxa2xx_palmtc.c | 162 ------------------ drivers/pcmcia/pxa2xx_palmtx.c | 111 ------------ drivers/pcmcia/pxa2xx_sharpsl.c | 2 +- drivers/pcmcia/pxa2xx_trizeps4.c | 200 ---------------------- drivers/pcmcia/pxa2xx_viper.c | 182 -------------------- drivers/pcmcia/pxa2xx_vpac270.c | 137 --------------- drivers/pcmcia/soc_common.h | 120 +------------ include/linux/platform_data/pcmcia-pxa2xx_viper.h | 12 -- include/pcmcia/soc_common.h | 125 ++++++++++++++ 44 files changed, 2183 insertions(+), 2187 deletions(-) create mode 100644 arch/arm/mach-pxa/balloon3-pcmcia.c create mode 100644 arch/arm/mach-pxa/balloon3.h create mode 100644 arch/arm/mach-pxa/colibri-pcmcia.c create mode 100644 arch/arm/mach-pxa/e740-pcmcia.c create mode 100644 arch/arm/mach-pxa/hx4700-pcmcia.c delete mode 100644 arch/arm/mach-pxa/include/mach/balloon3.h delete mode 100644 arch/arm/mach-pxa/include/mach/palmtc.h delete mode 100644 arch/arm/mach-pxa/include/mach/palmtx.h delete mode 100644 arch/arm/mach-pxa/include/mach/trizeps4.h delete mode 100644 arch/arm/mach-pxa/include/mach/vpac270.h create mode 100644 arch/arm/mach-pxa/palmld-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtc-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtc.h create mode 100644 arch/arm/mach-pxa/palmtx-pcmcia.c create mode 100644 arch/arm/mach-pxa/palmtx.h create mode 100644 arch/arm/mach-pxa/trizeps4-pcmcia.c create mode 100644 arch/arm/mach-pxa/trizeps4.h create mode 100644 arch/arm/mach-pxa/viper-pcmcia.c create mode 100644 arch/arm/mach-pxa/viper-pcmcia.h create mode 100644 arch/arm/mach-pxa/vpac270-pcmcia.c create mode 100644 arch/arm/mach-pxa/vpac270.h delete mode 100644 drivers/pcmcia/pxa2xx_balloon3.c delete mode 100644 drivers/pcmcia/pxa2xx_colibri.c delete mode 100644 drivers/pcmcia/pxa2xx_e740.c delete mode 100644 drivers/pcmcia/pxa2xx_hx4700.c delete mode 100644 drivers/pcmcia/pxa2xx_palmld.c delete mode 100644 drivers/pcmcia/pxa2xx_palmtc.c delete mode 100644 drivers/pcmcia/pxa2xx_palmtx.c delete mode 100644 drivers/pcmcia/pxa2xx_trizeps4.c delete mode 100644 drivers/pcmcia/pxa2xx_viper.c delete mode 100644 drivers/pcmcia/pxa2xx_vpac270.c delete mode 100644 include/linux/platform_data/pcmcia-pxa2xx_viper.h create mode 100644 include/pcmcia/soc_common.h (limited to 'drivers/pcmcia') diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 68730ceb8b7c..0aec36e67dc1 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile @@ -37,7 +37,8 @@ obj-$(CONFIG_MACH_SAAR) += saar.o obj-$(CONFIG_ARCH_PXA_IDP) += idp.o obj-$(CONFIG_ARCH_VIPER) += viper.o obj-$(CONFIG_MACH_ARCOM_ZEUS) += zeus.o -obj-$(CONFIG_MACH_BALLOON3) += balloon3.o +obj-$(CONFIG_ARCOM_PCMCIA) += viper-pcmcia.o +obj-$(CONFIG_MACH_BALLOON3) += balloon3.o balloon3-pcmcia.o obj-$(CONFIG_MACH_CSB726) += csb726.o obj-$(CONFIG_CSB726_CSB701) += csb701.o obj-$(CONFIG_MACH_CM_X300) += cm-x300.o @@ -47,18 +48,20 @@ obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o obj-$(CONFIG_MACH_XCEP) += xcep.o obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o +obj-$(CONFIG_TRIZEPS_PCMCIA) += trizeps4-pcmcia.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_PCM027) += pcm027.o obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o -obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o +obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o colibri-pcmcia.o obj-$(CONFIG_MACH_COLIBRI_EVALBOARD) += colibri-evalboard.o obj-$(CONFIG_MACH_COLIBRI_PXA270_INCOME) += colibri-pxa270-income.o obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o -obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o -obj-$(CONFIG_MACH_VPAC270) += vpac270.o +obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o colibri-pcmcia.o +obj-$(CONFIG_MACH_VPAC270) += vpac270.o vpac270-pcmcia.o # End-user Products obj-$(CONFIG_MACH_H4700) += hx4700.o +obj-$(CONFIG_MACH_H4700) += hx4700-pcmcia.o obj-$(CONFIG_MACH_H5000) += h5000.o obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o obj-$(CONFIG_MACH_MAGICIAN) += magician.o @@ -66,12 +69,12 @@ obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o obj-$(CONFIG_PXA_EZX) += ezx.o obj-$(CONFIG_MACH_MP900C) += mp900.o obj-$(CONFIG_MACH_PALMTE2) += palmte2.o -obj-$(CONFIG_MACH_PALMTC) += palmtc.o +obj-$(CONFIG_MACH_PALMTC) += palmtc.o palmtc-pcmcia.o obj-$(CONFIG_MACH_PALM27X) += palm27x.o obj-$(CONFIG_MACH_PALMT5) += palmt5.o -obj-$(CONFIG_MACH_PALMTX) += palmtx.o +obj-$(CONFIG_MACH_PALMTX) += palmtx.o palmtx-pcmcia.o obj-$(CONFIG_MACH_PALMZ72) += palmz72.o -obj-$(CONFIG_MACH_PALMLD) += palmld.o +obj-$(CONFIG_MACH_PALMLD) += palmld.o palmld-pcmcia.o obj-$(CONFIG_PALM_TREO) += palmtreo.o obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o @@ -79,6 +82,7 @@ obj-$(CONFIG_MACH_POODLE) += poodle.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_ICONTROL) += icontrol.o mxm8x10.o obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o +obj-$(CONFIG_MACH_E740) += e740-pcmcia.o obj-$(CONFIG_MACH_ZIPIT2) += z2.o obj-$(CONFIG_PXA_SYSTEMS_CPLDS) += pxa_cplds_irqs.o diff --git a/arch/arm/mach-pxa/balloon3-pcmcia.c b/arch/arm/mach-pxa/balloon3-pcmcia.c new file mode 100644 index 000000000000..6a27b76cc603 --- /dev/null +++ b/arch/arm/mach-pxa/balloon3-pcmcia.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_balloon3.c + * + * Balloon3 PCMCIA specific routines. + * + * Author: Nick Bane + * Created: June, 2006 + * Copyright: Toby Churchill Ltd + * Derived from pxa2xx_mainstone.c, by Nico Pitre + * + * Various modification by Marek Vasut + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "balloon3.h" + +#include + +#include + +static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + uint16_t ver; + + ver = __raw_readw(BALLOON3_FPGA_VER); + if (ver < 0x4f08) + pr_warn("The FPGA code, version 0x%04x, is too old. " + "PCMCIA/CF support might be broken in this version!", + ver); + + skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ; + skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD; + skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD"; + skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ; + skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG"; + + return 0; +} + +static unsigned long balloon3_pcmcia_status[2] = { + BALLOON3_CF_nSTSCHG_BVD1, + BALLOON3_CF_nSTSCHG_BVD1 +}; + +static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + uint16_t status; + int flip; + + /* This actually reads the STATUS register */ + status = __raw_readw(BALLOON3_CF_STATUS_REG); + flip = (status ^ balloon3_pcmcia_status[skt->nr]) + & BALLOON3_CF_nSTSCHG_BVD1; + /* + * Workaround for STSCHG which can't be deasserted: + * We therefore disable/enable corresponding IRQs + * as needed to avoid IRQ locks. + */ + if (flip) { + balloon3_pcmcia_status[skt->nr] = status; + if (status & BALLOON3_CF_nSTSCHG_BVD1) + enable_irq(BALLOON3_BP_NSTSCHG_IRQ); + else + disable_irq(BALLOON3_BP_NSTSCHG_IRQ); + } + + state->ready = !!(status & BALLOON3_CF_nIRQ); + state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1); + state->bvd2 = 0; /* not available */ + state->vs_3v = 1; /* Always true its a CF card */ + state->vs_Xv = 0; /* not available */ +} + +static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + + ((state->flags & SS_RESET) ? + BALLOON3_FPGA_SETnCLR : 0)); + return 0; +} + +static struct pcmcia_low_level balloon3_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = balloon3_pcmcia_hw_init, + .socket_state = balloon3_pcmcia_socket_state, + .configure_socket = balloon3_pcmcia_configure_socket, + .first = 0, + .nr = 1, +}; + +static struct platform_device *balloon3_pcmcia_device; + +static int __init balloon3_pcmcia_init(void) +{ + int ret; + + if (!machine_is_balloon3()) + return -ENODEV; + + balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!balloon3_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(balloon3_pcmcia_device, + &balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(balloon3_pcmcia_device); + + if (ret) + platform_device_put(balloon3_pcmcia_device); + + return ret; +} + +static void __exit balloon3_pcmcia_exit(void) +{ + platform_device_unregister(balloon3_pcmcia_device); +} + +module_init(balloon3_pcmcia_init); +module_exit(balloon3_pcmcia_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Nick Bane "); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver"); diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c index 82f9299f67d3..896d47d9a8dc 100644 --- a/arch/arm/mach-pxa/balloon3.c +++ b/arch/arm/mach-pxa/balloon3.c @@ -40,7 +40,7 @@ #include #include "pxa27x.h" -#include +#include "balloon3.h" #include #include #include diff --git a/arch/arm/mach-pxa/balloon3.h b/arch/arm/mach-pxa/balloon3.h new file mode 100644 index 000000000000..f351358c0e5b --- /dev/null +++ b/arch/arm/mach-pxa/balloon3.h @@ -0,0 +1,181 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/asm-arm/arch-pxa/balloon3.h + * + * Authors: Nick Bane and Wookey + * Created: Oct, 2005 + * Copyright: Toby Churchill Ltd + * Cribbed from mainstone.c, by Nicholas Pitre + */ + +#ifndef ASM_ARCH_BALLOON3_H +#define ASM_ARCH_BALLOON3_H + +#include /* PXA_NR_BUILTIN_GPIO */ + +enum balloon3_features { + BALLOON3_FEATURE_OHCI, + BALLOON3_FEATURE_MMC, + BALLOON3_FEATURE_CF, + BALLOON3_FEATURE_AUDIO, + BALLOON3_FEATURE_TOPPOLY, +}; + +#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS +#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ +#define BALLOON3_FPGA_LENGTH 0x01000000 + +#define BALLOON3_FPGA_SETnCLR (0x1000) + +/* FPGA / CPLD registers for CF socket */ +#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) +#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) +/* FPGA / CPLD version register */ +#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) +/* FPGA / CPLD registers for NAND flash */ +#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) +#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) +#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) +#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) +#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) + +/* fpga/cpld interrupt control register */ +#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) +#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) + +#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) +#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) +#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) + +/* CF Status Register bits (read-only) bits */ +#define BALLOON3_CF_nIRQ (1 << 0) +#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) + +/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ +#define BALLOON3_CF_RESET (1 << 0) +#define BALLOON3_CF_ENABLE (1 << 1) +#define BALLOON3_CF_ADD_ENABLE (1 << 2) + +/* CF Interrupt sources */ +#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) +#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) + +/* NAND Control register */ +#define BALLOON3_NAND_CONTROL_FLWP (1 << 7) +#define BALLOON3_NAND_CONTROL_FLSE (1 << 6) +#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) +#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) +#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) +#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) +#define BALLOON3_NAND_CONTROL_FLALE (1 << 1) +#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) + +/* NAND Status register */ +#define BALLOON3_NAND_STAT_RNB (1 << 0) + +/* NAND Control2 register */ +#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) + +/* GPIOs for irqs */ +#define BALLOON3_GPIO_AUX_NIRQ (94) +#define BALLOON3_GPIO_CODEC_IRQ (95) + +/* Timer and Idle LED locations */ +#define BALLOON3_GPIO_LED_NAND (9) +#define BALLOON3_GPIO_LED_IDLE (10) + +/* backlight control */ +#define BALLOON3_GPIO_RUN_BACKLIGHT (99) + +#define BALLOON3_GPIO_S0_CD (105) + +/* NAND */ +#define BALLOON3_GPIO_RUN_NAND (102) + +/* PCF8574A Leds */ +#define BALLOON3_PCF_GPIO_BASE 160 +#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) +#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) +#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) +#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) +#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) +#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) +#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) +#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) + +/* FPGA Interrupt Mask/Acknowledge Register */ +#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ +#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ + +/* CPLD (and FPGA) interface definitions */ +#define CPLD_LCD0_DATA_SET 0x00 +#define CPLD_LCD0_DATA_CLR 0x10 +#define CPLD_LCD0_COMMAND_SET 0x01 +#define CPLD_LCD0_COMMAND_CLR 0x11 +#define CPLD_LCD1_DATA_SET 0x02 +#define CPLD_LCD1_DATA_CLR 0x12 +#define CPLD_LCD1_COMMAND_SET 0x03 +#define CPLD_LCD1_COMMAND_CLR 0x13 + +#define CPLD_MISC_SET 0x07 +#define CPLD_MISC_CLR 0x17 +#define CPLD_MISC_LOON_NRESET_BIT 0 +#define CPLD_MISC_LOON_UNSUSP_BIT 1 +#define CPLD_MISC_RUN_5V_BIT 2 +#define CPLD_MISC_CHG_D0_BIT 3 +#define CPLD_MISC_CHG_D1_BIT 4 +#define CPLD_MISC_DAC_NCS_BIT 5 + +#define CPLD_LCD_SET 0x08 +#define CPLD_LCD_CLR 0x18 +#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0 +#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1 +#define CPLD_LCD_LED_RED_BIT 4 +#define CPLD_LCD_LED_GREEN_BIT 5 +#define CPLD_LCD_NRESET_BIT 7 + +#define CPLD_LCD_RO_SET 0x09 +#define CPLD_LCD_RO_CLR 0x19 +#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0 +#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1 + +#define CPLD_SERIAL_SET 0x0a +#define CPLD_SERIAL_CLR 0x1a +#define CPLD_SERIAL_GSM_RI_BIT 0 +#define CPLD_SERIAL_GSM_CTS_BIT 1 +#define CPLD_SERIAL_GSM_DTR_BIT 2 +#define CPLD_SERIAL_LPR_CTS_BIT 3 +#define CPLD_SERIAL_TC232_CTS_BIT 4 +#define CPLD_SERIAL_TC232_DSR_BIT 5 + +#define CPLD_SROUTING_SET 0x0b +#define CPLD_SROUTING_CLR 0x1b +#define CPLD_SROUTING_MSP430_LPR 0 +#define CPLD_SROUTING_MSP430_TC232 1 +#define CPLD_SROUTING_MSP430_GSM 2 +#define CPLD_SROUTING_LOON_LPR (0 << 4) +#define CPLD_SROUTING_LOON_TC232 (1 << 4) +#define CPLD_SROUTING_LOON_GSM (2 << 4) + +#define CPLD_AROUTING_SET 0x0c +#define CPLD_AROUTING_CLR 0x1c +#define CPLD_AROUTING_MIC2PHONE_BIT 0 +#define CPLD_AROUTING_PHONE2INT_BIT 1 +#define CPLD_AROUTING_PHONE2EXT_BIT 2 +#define CPLD_AROUTING_LOONL2INT_BIT 3 +#define CPLD_AROUTING_LOONL2EXT_BIT 4 +#define CPLD_AROUTING_LOONR2PHONE_BIT 5 +#define CPLD_AROUTING_LOONR2INT_BIT 6 +#define CPLD_AROUTING_LOONR2EXT_BIT 7 + +/* Balloon3 Interrupts */ +#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) + +#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) +#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) + +#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) + +extern int balloon3_has(enum balloon3_features feature); + +#endif diff --git a/arch/arm/mach-pxa/colibri-pcmcia.c b/arch/arm/mach-pxa/colibri-pcmcia.c new file mode 100644 index 000000000000..9da7b478e5eb --- /dev/null +++ b/arch/arm/mach-pxa/colibri-pcmcia.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_colibri.c + * + * Driver for Toradex Colibri PXA270 CF socket + * + * Copyright (C) 2010 Marek Vasut + */ + +#include +#include +#include +#include + +#include + +#include + +#define COLIBRI270_RESET_GPIO 53 +#define COLIBRI270_PPEN_GPIO 107 +#define COLIBRI270_BVD1_GPIO 83 +#define COLIBRI270_BVD2_GPIO 82 +#define COLIBRI270_DETECT_GPIO 84 +#define COLIBRI270_READY_GPIO 1 + +#define COLIBRI320_RESET_GPIO 77 +#define COLIBRI320_PPEN_GPIO 57 +#define COLIBRI320_BVD1_GPIO 53 +#define COLIBRI320_BVD2_GPIO 79 +#define COLIBRI320_DETECT_GPIO 81 +#define COLIBRI320_READY_GPIO 29 + +enum { + DETECT = 0, + READY = 1, + BVD1 = 2, + BVD2 = 3, + PPEN = 4, + RESET = 5, +}; + +/* Contents of this array are configured on-the-fly in init function */ +static struct gpio colibri_pcmcia_gpios[] = { + { 0, GPIOF_IN, "PCMCIA Detect" }, + { 0, GPIOF_IN, "PCMCIA Ready" }, + { 0, GPIOF_IN, "PCMCIA BVD1" }, + { 0, GPIOF_IN, "PCMCIA BVD2" }, + { 0, GPIOF_INIT_LOW, "PCMCIA PPEN" }, + { 0, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(colibri_pcmcia_gpios, + ARRAY_SIZE(colibri_pcmcia_gpios)); + if (ret) + goto err1; + + skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio); + skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio); + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + +err1: + return ret; +} + +static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(colibri_pcmcia_gpios, + ARRAY_SIZE(colibri_pcmcia_gpios)); +} + +static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + + state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio); + state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio); + state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio); + state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio); + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio, + !(state->Vcc == 33 && state->Vpp < 50)); + gpio_set_value(colibri_pcmcia_gpios[RESET].gpio, + state->flags & SS_RESET); + return 0; +} + +static struct pcmcia_low_level colibri_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = colibri_pcmcia_hw_init, + .hw_shutdown = colibri_pcmcia_hw_shutdown, + + .socket_state = colibri_pcmcia_socket_state, + .configure_socket = colibri_pcmcia_configure_socket, +}; + +static struct platform_device *colibri_pcmcia_device; + +static int __init colibri_pcmcia_init(void) +{ + int ret; + + if (!machine_is_colibri() && !machine_is_colibri320()) + return -ENODEV; + + colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!colibri_pcmcia_device) + return -ENOMEM; + + /* Colibri PXA270 */ + if (machine_is_colibri()) { + colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO; + colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO; + colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO; + colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO; + colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO; + colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO; + /* Colibri PXA320 */ + } else if (machine_is_colibri320()) { + colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO; + colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO; + colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO; + colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO; + colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO; + colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO; + } + + ret = platform_device_add_data(colibri_pcmcia_device, + &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(colibri_pcmcia_device); + + if (ret) + platform_device_put(colibri_pcmcia_device); + + return ret; +} + +static void __exit colibri_pcmcia_exit(void) +{ + platform_device_unregister(colibri_pcmcia_device); +} + +module_init(colibri_pcmcia_init); +module_exit(colibri_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/e740-pcmcia.c b/arch/arm/mach-pxa/e740-pcmcia.c new file mode 100644 index 000000000000..133535d7ac05 --- /dev/null +++ b/arch/arm/mach-pxa/e740-pcmcia.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Toshiba e740 PCMCIA specific routines. + * + * (c) 2004 Ian Molton + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include + +static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + if (skt->nr == 0) { + skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0; + skt->stat[SOC_STAT_CD].name = "CF card detect"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0; + skt->stat[SOC_STAT_RDY].name = "CF ready"; + } else { + skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1; + skt->stat[SOC_STAT_CD].name = "Wifi switch"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1; + skt->stat[SOC_STAT_RDY].name = "Wifi ready"; + } + + return 0; +} + +static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + if (state->flags & SS_RESET) { + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_RST0, 1); + else + gpio_set_value(GPIO_E740_PCMCIA_RST1, 1); + } else { + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_RST0, 0); + else + gpio_set_value(GPIO_E740_PCMCIA_RST1, 0); + } + + switch (state->Vcc) { + case 0: /* Socket off */ + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0); + else + gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1); + break; + case 50: + case 33: /* socket on */ + if (skt->nr == 0) + gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1); + else + gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0); + break; + default: + printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc); + } + + return 0; +} + +static struct pcmcia_low_level e740_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = e740_pcmcia_hw_init, + .socket_state = e740_pcmcia_socket_state, + .configure_socket = e740_pcmcia_configure_socket, + .nr = 2, +}; + +static struct platform_device *e740_pcmcia_device; + +static int __init e740_pcmcia_init(void) +{ + int ret; + + if (!machine_is_e740()) + return -ENODEV; + + e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!e740_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops, + sizeof(e740_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(e740_pcmcia_device); + + if (ret) + platform_device_put(e740_pcmcia_device); + + return ret; +} + +static void __exit e740_pcmcia_exit(void) +{ + platform_device_unregister(e740_pcmcia_device); +} + +module_init(e740_pcmcia_init); +module_exit(e740_pcmcia_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Ian Molton "); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_DESCRIPTION("e740 PCMCIA platform support"); diff --git a/arch/arm/mach-pxa/hx4700-pcmcia.c b/arch/arm/mach-pxa/hx4700-pcmcia.c new file mode 100644 index 000000000000..e8acbfc9ef6c --- /dev/null +++ b/arch/arm/mach-pxa/hx4700-pcmcia.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2012 Paul Parsons + */ + +#include +#include +#include +#include +#include + +#include +#include + +#include + +static struct gpio gpios[] = { + { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" }, + { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" }, +}; + +static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); + if (ret) + goto out; + + /* + * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq(). + * The asic3 default IRQ type is level trigger low level detect, exactly + * the the signal present on GPIOD4_CF_nCD when a CF card is inserted. + * If the IRQ type is not changed, the asic3 interrupt handler will loop + * repeatedly because it is unable to clear the level trigger interrupt. + */ + irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH); + + skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD; + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + +out: + return ret; +} + +static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(gpios, ARRAY_SIZE(gpios)); +} + +static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + switch (state->Vcc) { + case 0: + gpio_set_value(EGPIO4_CF_3V3_ON, 0); + break; + case 33: + gpio_set_value(EGPIO4_CF_3V3_ON, 1); + break; + default: + printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc); + return -EINVAL; + } + + gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0); + + return 0; +} + +static struct pcmcia_low_level hx4700_pcmcia_ops = { + .owner = THIS_MODULE, + .nr = 1, + .hw_init = hx4700_pcmcia_hw_init, + .hw_shutdown = hx4700_pcmcia_hw_shutdown, + .socket_state = hx4700_pcmcia_socket_state, + .configure_socket = hx4700_pcmcia_configure_socket, +}; + +static struct platform_device *hx4700_pcmcia_device; + +static int __init hx4700_pcmcia_init(void) +{ + struct platform_device *pdev; + + if (!machine_is_h4700()) + return -ENODEV; + + pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1, + &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops)); + if (IS_ERR(pdev)) + return PTR_ERR(pdev); + + hx4700_pcmcia_device = pdev; + + return 0; +} + +static void __exit hx4700_pcmcia_exit(void) +{ + platform_device_unregister(hx4700_pcmcia_device); +} + +module_init(hx4700_pcmcia_init); +module_exit(hx4700_pcmcia_exit); + +MODULE_AUTHOR("Paul Parsons "); +MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h deleted file mode 100644 index 04f3639c4082..000000000000 --- a/arch/arm/mach-pxa/include/mach/balloon3.h +++ /dev/null @@ -1,181 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/balloon3.h - * - * Authors: Nick Bane and Wookey - * Created: Oct, 2005 - * Copyright: Toby Churchill Ltd - * Cribbed from mainstone.c, by Nicholas Pitre - */ - -#ifndef ASM_ARCH_BALLOON3_H -#define ASM_ARCH_BALLOON3_H - -#include "irqs.h" /* PXA_NR_BUILTIN_GPIO */ - -enum balloon3_features { - BALLOON3_FEATURE_OHCI, - BALLOON3_FEATURE_MMC, - BALLOON3_FEATURE_CF, - BALLOON3_FEATURE_AUDIO, - BALLOON3_FEATURE_TOPPOLY, -}; - -#define BALLOON3_FPGA_PHYS PXA_CS4_PHYS -#define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */ -#define BALLOON3_FPGA_LENGTH 0x01000000 - -#define BALLOON3_FPGA_SETnCLR (0x1000) - -/* FPGA / CPLD registers for CF socket */ -#define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -#define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008) -/* FPGA / CPLD version register */ -#define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c) -/* FPGA / CPLD registers for NAND flash */ -#define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000) -#define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000) -#define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010) -#define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014) -#define BALLOON3_NAND_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00014) - -/* fpga/cpld interrupt control register */ -#define BALLOON3_INT_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e0000C) -#define BALLOON3_VERSION_REG (BALLOON3_FPGA_VIRT + 0x00e0001c) - -#define BALLOON3_SAMOSA_ADDR_REG (BALLOON3_FPGA_VIRT + 0x00c00000) -#define BALLOON3_SAMOSA_DATA_REG (BALLOON3_FPGA_VIRT + 0x00c00004) -#define BALLOON3_SAMOSA_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00c0001c) - -/* CF Status Register bits (read-only) bits */ -#define BALLOON3_CF_nIRQ (1 << 0) -#define BALLOON3_CF_nSTSCHG_BVD1 (1 << 1) - -/* CF Control Set Register bits / CF Control Clear Register bits (write-only) */ -#define BALLOON3_CF_RESET (1 << 0) -#define BALLOON3_CF_ENABLE (1 << 1) -#define BALLOON3_CF_ADD_ENABLE (1 << 2) - -/* CF Interrupt sources */ -#define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0) -#define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1) - -/* NAND Control register */ -#define BALLOON3_NAND_CONTROL_FLWP (1 << 7) -#define BALLOON3_NAND_CONTROL_FLSE (1 << 6) -#define BALLOON3_NAND_CONTROL_FLCE3 (1 << 5) -#define BALLOON3_NAND_CONTROL_FLCE2 (1 << 4) -#define BALLOON3_NAND_CONTROL_FLCE1 (1 << 3) -#define BALLOON3_NAND_CONTROL_FLCE0 (1 << 2) -#define BALLOON3_NAND_CONTROL_FLALE (1 << 1) -#define BALLOON3_NAND_CONTROL_FLCLE (1 << 0) - -/* NAND Status register */ -#define BALLOON3_NAND_STAT_RNB (1 << 0) - -/* NAND Control2 register */ -#define BALLOON3_NAND_CONTROL2_16BIT (1 << 0) - -/* GPIOs for irqs */ -#define BALLOON3_GPIO_AUX_NIRQ (94) -#define BALLOON3_GPIO_CODEC_IRQ (95) - -/* Timer and Idle LED locations */ -#define BALLOON3_GPIO_LED_NAND (9) -#define BALLOON3_GPIO_LED_IDLE (10) - -/* backlight control */ -#define BALLOON3_GPIO_RUN_BACKLIGHT (99) - -#define BALLOON3_GPIO_S0_CD (105) - -/* NAND */ -#define BALLOON3_GPIO_RUN_NAND (102) - -/* PCF8574A Leds */ -#define BALLOON3_PCF_GPIO_BASE 160 -#define BALLOON3_PCF_GPIO_LED0 (BALLOON3_PCF_GPIO_BASE + 0) -#define BALLOON3_PCF_GPIO_LED1 (BALLOON3_PCF_GPIO_BASE + 1) -#define BALLOON3_PCF_GPIO_LED2 (BALLOON3_PCF_GPIO_BASE + 2) -#define BALLOON3_PCF_GPIO_LED3 (BALLOON3_PCF_GPIO_BASE + 3) -#define BALLOON3_PCF_GPIO_LED4 (BALLOON3_PCF_GPIO_BASE + 4) -#define BALLOON3_PCF_GPIO_LED5 (BALLOON3_PCF_GPIO_BASE + 5) -#define BALLOON3_PCF_GPIO_LED6 (BALLOON3_PCF_GPIO_BASE + 6) -#define BALLOON3_PCF_GPIO_LED7 (BALLOON3_PCF_GPIO_BASE + 7) - -/* FPGA Interrupt Mask/Acknowledge Register */ -#define BALLOON3_INT_S0_IRQ (1 << 0) /* PCMCIA 0 IRQ */ -#define BALLOON3_INT_S0_STSCHG (1 << 1) /* PCMCIA 0 status changed */ - -/* CPLD (and FPGA) interface definitions */ -#define CPLD_LCD0_DATA_SET 0x00 -#define CPLD_LCD0_DATA_CLR 0x10 -#define CPLD_LCD0_COMMAND_SET 0x01 -#define CPLD_LCD0_COMMAND_CLR 0x11 -#define CPLD_LCD1_DATA_SET 0x02 -#define CPLD_LCD1_DATA_CLR 0x12 -#define CPLD_LCD1_COMMAND_SET 0x03 -#define CPLD_LCD1_COMMAND_CLR 0x13 - -#define CPLD_MISC_SET 0x07 -#define CPLD_MISC_CLR 0x17 -#define CPLD_MISC_LOON_NRESET_BIT 0 -#define CPLD_MISC_LOON_UNSUSP_BIT 1 -#define CPLD_MISC_RUN_5V_BIT 2 -#define CPLD_MISC_CHG_D0_BIT 3 -#define CPLD_MISC_CHG_D1_BIT 4 -#define CPLD_MISC_DAC_NCS_BIT 5 - -#define CPLD_LCD_SET 0x08 -#define CPLD_LCD_CLR 0x18 -#define CPLD_LCD_BACKLIGHT_EN_0_BIT 0 -#define CPLD_LCD_BACKLIGHT_EN_1_BIT 1 -#define CPLD_LCD_LED_RED_BIT 4 -#define CPLD_LCD_LED_GREEN_BIT 5 -#define CPLD_LCD_NRESET_BIT 7 - -#define CPLD_LCD_RO_SET 0x09 -#define CPLD_LCD_RO_CLR 0x19 -#define CPLD_LCD_RO_LCD0_nWAIT_BIT 0 -#define CPLD_LCD_RO_LCD1_nWAIT_BIT 1 - -#define CPLD_SERIAL_SET 0x0a -#define CPLD_SERIAL_CLR 0x1a -#define CPLD_SERIAL_GSM_RI_BIT 0 -#define CPLD_SERIAL_GSM_CTS_BIT 1 -#define CPLD_SERIAL_GSM_DTR_BIT 2 -#define CPLD_SERIAL_LPR_CTS_BIT 3 -#define CPLD_SERIAL_TC232_CTS_BIT 4 -#define CPLD_SERIAL_TC232_DSR_BIT 5 - -#define CPLD_SROUTING_SET 0x0b -#define CPLD_SROUTING_CLR 0x1b -#define CPLD_SROUTING_MSP430_LPR 0 -#define CPLD_SROUTING_MSP430_TC232 1 -#define CPLD_SROUTING_MSP430_GSM 2 -#define CPLD_SROUTING_LOON_LPR (0 << 4) -#define CPLD_SROUTING_LOON_TC232 (1 << 4) -#define CPLD_SROUTING_LOON_GSM (2 << 4) - -#define CPLD_AROUTING_SET 0x0c -#define CPLD_AROUTING_CLR 0x1c -#define CPLD_AROUTING_MIC2PHONE_BIT 0 -#define CPLD_AROUTING_PHONE2INT_BIT 1 -#define CPLD_AROUTING_PHONE2EXT_BIT 2 -#define CPLD_AROUTING_LOONL2INT_BIT 3 -#define CPLD_AROUTING_LOONL2EXT_BIT 4 -#define CPLD_AROUTING_LOONR2PHONE_BIT 5 -#define CPLD_AROUTING_LOONR2INT_BIT 6 -#define CPLD_AROUTING_LOONR2EXT_BIT 7 - -/* Balloon3 Interrupts */ -#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) - -#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ) -#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ) - -#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) - -extern int balloon3_has(enum balloon3_features feature); - -#endif diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h deleted file mode 100644 index 9257a02c46e5..000000000000 --- a/arch/arm/mach-pxa/include/mach/palmtc.h +++ /dev/null @@ -1,84 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * linux/include/asm-arm/arch-pxa/palmtc-gpio.h - * - * GPIOs and interrupts for Palm Tungsten|C Handheld Computer - * - * Authors: Alex Osborne - * Marek Vasut - * Holger Bocklet - */ - -#ifndef _INCLUDE_PALMTC_H_ -#define _INCLUDE_PALMTC_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTC_EARPHONE_DETECT 2 -#define GPIO_NR_PALMTC_CRADLE_DETECT 5 -#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7 - -/* SD/MMC */ -#define GPIO_NR_PALMTC_SD_DETECT_N 12 -#define GPIO_NR_PALMTC_SD_POWER 32 -#define GPIO_NR_PALMTC_SD_READONLY 54 - -/* WLAN */ -#define GPIO_NR_PALMTC_PCMCIA_READY 13 -#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14 -#define GPIO_NR_PALMTC_PCMCIA_POWER1 15 -#define GPIO_NR_PALMTC_PCMCIA_POWER2 33 -#define GPIO_NR_PALMTC_PCMCIA_POWER3 55 -#define GPIO_NR_PALMTC_PCMCIA_RESET 78 - -/* UDC */ -#define GPIO_NR_PALMTC_USB_DETECT_N 4 -#define GPIO_NR_PALMTC_USB_POWER 36 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTC_BL_POWER 16 -#define GPIO_NR_PALMTC_LCD_POWER 44 -#define GPIO_NR_PALMTC_LCD_BLANK 38 - -/* UART */ -#define GPIO_NR_PALMTC_RS232_POWER 37 - -/* IRDA */ -#define GPIO_NR_PALMTC_IR_DISABLE 45 - -/* IRQs */ -#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) -#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) - -/* UCB1400 GPIOs */ -#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) -#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01) -#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03) -#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05) -#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07) - -/** HERE ARE INIT VALUES **/ -#define PALMTC_UCB1400_GPIO_OFFSET 0x80 - -/* BATTERY */ -#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ -#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ -#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */ - -#define PALMTC_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTC_MAX_INTENSITY 0xFE -#define PALMTC_DEFAULT_INTENSITY 0x7E -#define PALMTC_LIMIT_MASK 0x7F -#define PALMTC_PRESCALER 0x3F -#define PALMTC_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h deleted file mode 100644 index ec88abf0fc6c..000000000000 --- a/arch/arm/mach-pxa/include/mach/palmtx.h +++ /dev/null @@ -1,110 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Palm T|X Handheld Computer - * - * Based on palmld-gpio.h by Alex Osborne - * - * Authors: Marek Vasut - * Cristiano P. - * Jan Herman <2hp@seznam.cz> - */ - -#ifndef _INCLUDE_PALMTX_H_ -#define _INCLUDE_PALMTX_H_ - -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTX_GPIO_RESET 1 - -#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ -#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 - -/* SD/MMC */ -#define GPIO_NR_PALMTX_SD_DETECT_N 14 -#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ -#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMTX_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMTX_IR_DISABLE 40 - -/* USB */ -#define GPIO_NR_PALMTX_USB_DETECT_N 13 -#define GPIO_NR_PALMTX_USB_PULLUP 93 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTX_BL_POWER 84 -#define GPIO_NR_PALMTX_LCD_POWER 96 - -/* LCD BORDER */ -#define GPIO_NR_PALMTX_BORDER_SWITCH 98 -#define GPIO_NR_PALMTX_BORDER_SELECT 22 - -/* BLUETOOTH */ -#define GPIO_NR_PALMTX_BT_POWER 17 -#define GPIO_NR_PALMTX_BT_RESET 83 - -/* PCMCIA (WiFi) */ -#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 -#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 -#define GPIO_NR_PALMTX_PCMCIA_RESET 79 -#define GPIO_NR_PALMTX_PCMCIA_READY 116 - -/* NAND Flash ... this GPIO may be incorrect! */ -#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) -#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) -#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) -#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) - -/** HERE ARE INIT VALUES **/ - -/* Various addresses */ -#define PALMTX_PCMCIA_PHYS 0x28000000 -#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) -#define PALMTX_PCMCIA_SIZE 0x100000 - -#define PALMTX_PHYS_RAM_START 0xa0000000 -#define PALMTX_PHYS_IO_START 0x40000000 - -#define PALMTX_STR_BASE 0xa0200000 - -#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ -#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ - -#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) -#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) -#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) -#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) - -/* TOUCHSCREEN */ -#define AC97_LINK_FRAME 21 - - -/* BATTERY */ -#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTX_MAX_INTENSITY 0xFE -#define PALMTX_DEFAULT_INTENSITY 0x7E -#define PALMTX_LIMIT_MASK 0x7F -#define PALMTX_PRESCALER 0x3F -#define PALMTX_PERIOD_NS 3500 - -#endif diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h deleted file mode 100644 index 27926629f9c6..000000000000 --- a/arch/arm/mach-pxa/include/mach/trizeps4.h +++ /dev/null @@ -1,166 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/************************************************************************ - * Include file for TRIZEPS4 SoM and ConXS eval-board - * Copyright (c) Jürgen Schindele - * 2006 - ************************************************************************/ - -/* - * Includes/Defines - */ -#ifndef _TRIPEPS4_H_ -#define _TRIPEPS4_H_ - -#include -#include "irqs.h" /* PXA_GPIO_TO_IRQ */ - -/* physical memory regions */ -#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ -#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ -#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ -#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ -#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ - - /* Logic on ConXS-board CSFR register*/ -#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) - /* Logic on ConXS-board BOCR register*/ -#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) - /* Logic on ConXS-board IRCR register*/ -#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) - /* Logic on ConXS-board UPSR register*/ -#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) - /* Logic on ConXS-board DICR register*/ -#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) - -/* virtual memory regions */ -#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ -#define TRIZEPS4_CFSR_VIRT 0xF0100000 -#define TRIZEPS4_BOCR_VIRT 0xF0200000 -#define TRIZEPS4_DICR_VIRT 0xF0300000 -#define TRIZEPS4_IRCR_VIRT 0xF0400000 -#define TRIZEPS4_UPSR_VIRT 0xF0500000 - -/* size of flash */ -#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ - -/* Ethernet Controller Davicom DM9000 */ -#define GPIO_DM9000 101 -#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) - -/* UCB1400 audio / TS-controller */ -#define GPIO_UCB1400 1 -#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) - -/* PCMCIA socket Compact Flash */ -#define GPIO_PCD 11 /* PCMCIA Card Detect */ -#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) -#define GPIO_PRDY 13 /* READY / nINT */ -#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) - -/* MMC socket */ -#define GPIO_MMC_DET 12 -#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) - -/* DOC NAND chip */ -#define GPIO_DOC_LOCK 94 -#define GPIO_DOC_IRQ 93 -#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) - -/* SPI interface */ -#define GPIO_SPI 53 -#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) - -/* LEDS using tx2 / rx2 */ -#define GPIO_SYS_BUSY_LED 46 -#define GPIO_HEARTBEAT_LED 47 - -/* Off-module PIC on ConXS board */ -#define GPIO_PIC 0 -#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) - -#ifdef CONFIG_MACH_TRIZEPS_CONXS -/* for CONXS base board define these registers */ -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) - -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) - -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) - -#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) -#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) - -#ifndef __ASSEMBLY__ -static inline unsigned short CFSR_readw(void) -{ - /* [Compact Flash Status Register] is read only */ - return *((unsigned short *)CFSR_P2V(0x0C000000)); -} -static inline void BCR_writew(unsigned short value) -{ - /* [Board Control Regsiter] is write only */ - *((unsigned short *)BCR_P2V(0x0E000000)) = value; -} -static inline void DCR_writew(unsigned short value) -{ - /* [Display Control Register] is write only */ - *((unsigned short *)DCR_P2V(0x0E000000)) = value; -} -static inline void IRCR_writew(unsigned short value) -{ - /* [InfraRed data Control Register] is write only */ - *((unsigned short *)IRCR_P2V(0x0E000000)) = value; -} -#else -#define ConXS_CFSR CFSR_P2V(0x0C000000) -#define ConXS_BCR BCR_P2V(0x0E000000) -#define ConXS_DCR DCR_P2V(0x0F800000) -#define ConXS_IRCR IRCR_P2V(0x0F800000) -#endif -#else -/* for whatever baseboard define function registers */ -static inline unsigned short CFSR_readw(void) -{ - return 0; -} -static inline void BCR_writew(unsigned short value) -{ - ; -} -static inline void DCR_writew(unsigned short value) -{ - ; -} -static inline void IRCR_writew(unsigned short value) -{ - ; -} -#endif /* CONFIG_MACH_TRIZEPS_CONXS */ - -#define ConXS_CFSR_BVD_MASK 0x0003 -#define ConXS_CFSR_BVD1 (1 << 0) -#define ConXS_CFSR_BVD2 (1 << 1) -#define ConXS_CFSR_VS_MASK 0x000C -#define ConXS_CFSR_VS1 (1 << 2) -#define ConXS_CFSR_VS2 (1 << 3) -#define ConXS_CFSR_VS_5V (0x3 << 2) -#define ConXS_CFSR_VS_3V3 0x0 - -#define ConXS_BCR_S0_POW_EN0 (1 << 0) -#define ConXS_BCR_S0_POW_EN1 (1 << 1) -#define ConXS_BCR_L_DISP (1 << 4) -#define ConXS_BCR_CF_BUF_EN (1 << 5) -#define ConXS_BCR_CF_RESET (1 << 7) -#define ConXS_BCR_S0_VCC_3V3 0x1 -#define ConXS_BCR_S0_VCC_5V0 0x2 -#define ConXS_BCR_S0_VPP_12V 0x4 -#define ConXS_BCR_S0_VPP_3V3 0x8 - -#define ConXS_IRCR_MODE (1 << 0) -#define ConXS_IRCR_SD (1 << 1) - -#endif /* _TRIPEPS4_H_ */ diff --git a/arch/arm/mach-pxa/include/mach/vpac270.h b/arch/arm/mach-pxa/include/mach/vpac270.h deleted file mode 100644 index 0cd094d8c553..000000000000 --- a/arch/arm/mach-pxa/include/mach/vpac270.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * GPIOs and interrupts for Voipac PXA270 - * - * Copyright (C) 2010 - * Marek Vasut - */ - -#ifndef _INCLUDE_VPAC270_H_ -#define _INCLUDE_VPAC270_H_ - -#define GPIO1_VPAC270_USER_BTN 1 - -#define GPIO15_VPAC270_LED_ORANGE 15 - -#define GPIO81_VPAC270_BKL_ON 81 -#define GPIO83_VPAC270_NL_ON 83 - -#define GPIO52_VPAC270_SD_READONLY 52 -#define GPIO53_VPAC270_SD_DETECT_N 53 - -#define GPIO84_VPAC270_PCMCIA_CD 84 -#define GPIO35_VPAC270_PCMCIA_RDY 35 -#define GPIO107_VPAC270_PCMCIA_PPEN 107 -#define GPIO11_VPAC270_PCMCIA_RESET 11 -#define GPIO17_VPAC270_CF_CD 17 -#define GPIO12_VPAC270_CF_RDY 12 -#define GPIO16_VPAC270_CF_RESET 16 - -#define GPIO41_VPAC270_UDC_DETECT 41 - -#define GPIO114_VPAC270_ETH_IRQ 114 - -#define GPIO36_VPAC270_IDE_IRQ 36 - -#define GPIO113_VPAC270_TS_IRQ 113 - -#endif diff --git a/arch/arm/mach-pxa/palmld-pcmcia.c b/arch/arm/mach-pxa/palmld-pcmcia.c new file mode 100644 index 000000000000..07e0f7438db1 --- /dev/null +++ b/arch/arm/mach-pxa/palmld-pcmcia.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmld.c + * + * Driver for Palm LifeDrive PCMCIA + * + * Copyright (C) 2006 Alex Osborne + * Copyright (C) 2007-2011 Marek Vasut + */ + +#include +#include +#include + +#include +#include +#include + +static struct gpio palmld_pcmcia_gpios[] = { + { GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" }, + { GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmld_pcmcia_gpios, + ARRAY_SIZE(palmld_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios)); +} + +static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1); + gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET, + !!(state->flags & SS_RESET)); + + return 0; +} + +static struct pcmcia_low_level palmld_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 1, + .nr = 1, + + .hw_init = palmld_pcmcia_hw_init, + .hw_shutdown = palmld_pcmcia_hw_shutdown, + + .socket_state = palmld_pcmcia_socket_state, + .configure_socket = palmld_pcmcia_configure_socket, +}; + +static struct platform_device *palmld_pcmcia_device; + +static int __init palmld_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmld()) + return -ENODEV; + + palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmld_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops, + sizeof(palmld_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmld_pcmcia_device); + + if (ret) + platform_device_put(palmld_pcmcia_device); + + return ret; +} + +static void __exit palmld_pcmcia_exit(void) +{ + platform_device_unregister(palmld_pcmcia_device); +} + +module_init(palmld_pcmcia_init); +module_exit(palmld_pcmcia_exit); + +MODULE_AUTHOR("Alex Osborne ," + " Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtc-pcmcia.c b/arch/arm/mach-pxa/palmtc-pcmcia.c new file mode 100644 index 000000000000..8e3f382343fe --- /dev/null +++ b/arch/arm/mach-pxa/palmtc-pcmcia.c @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmtc.c + * + * Driver for Palm Tungsten|C PCMCIA + * + * Copyright (C) 2008 Alex Osborne + * Copyright (C) 2009-2011 Marek Vasut + */ + +#include +#include +#include +#include + +#include +#include "palmtc.h" +#include + +static struct gpio palmtc_pcmcia_gpios[] = { + { GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, + { GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, + { GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" }, + { GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, + { GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" }, +}; + +static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmtc_pcmcia_gpios, + ARRAY_SIZE(palmtc_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios)); +} + +static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int palmtc_wifi_powerdown(void) +{ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0); + mdelay(40); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0); + return 0; +} + +static int palmtc_wifi_powerup(void) +{ + int timeout = 50; + + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1); + mdelay(50); + + /* Power up the card, 1.8V first, after a while 3.3V */ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1); + mdelay(100); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1); + + /* Wait till the card is ready */ + while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) && + timeout) { + mdelay(1); + timeout--; + } + + /* Power down the WiFi in case of error */ + if (!timeout) { + palmtc_wifi_powerdown(); + return 1; + } + + /* Reset the card */ + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); + mdelay(20); + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0); + mdelay(25); + + gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0); + + return 0; +} + +static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + int ret = 1; + + if (state->Vcc == 0) + ret = palmtc_wifi_powerdown(); + else if (state->Vcc == 33) + ret = palmtc_wifi_powerup(); + + return ret; +} + +static struct pcmcia_low_level palmtc_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = palmtc_pcmcia_hw_init, + .hw_shutdown = palmtc_pcmcia_hw_shutdown, + + .socket_state = palmtc_pcmcia_socket_state, + .configure_socket = palmtc_pcmcia_configure_socket, +}; + +static struct platform_device *palmtc_pcmcia_device; + +static int __init palmtc_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmtc()) + return -ENODEV; + + palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmtc_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops, + sizeof(palmtc_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmtc_pcmcia_device); + + if (ret) + platform_device_put(palmtc_pcmcia_device); + + return ret; +} + +static void __exit palmtc_pcmcia_exit(void) +{ + platform_device_unregister(palmtc_pcmcia_device); +} + +module_init(palmtc_pcmcia_init); +module_exit(palmtc_pcmcia_exit); + +MODULE_AUTHOR("Alex Osborne ," + " Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtc.c b/arch/arm/mach-pxa/palmtc.c index c59fc76c0c3d..3054ffa397ad 100644 --- a/arch/arm/mach-pxa/palmtc.c +++ b/arch/arm/mach-pxa/palmtc.c @@ -30,7 +30,7 @@ #include "pxa25x.h" #include -#include +#include "palmtc.h" #include #include #include diff --git a/arch/arm/mach-pxa/palmtc.h b/arch/arm/mach-pxa/palmtc.h new file mode 100644 index 000000000000..afec057c2857 --- /dev/null +++ b/arch/arm/mach-pxa/palmtc.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * linux/include/asm-arm/arch-pxa/palmtc-gpio.h + * + * GPIOs and interrupts for Palm Tungsten|C Handheld Computer + * + * Authors: Alex Osborne + * Marek Vasut + * Holger Bocklet + */ + +#ifndef _INCLUDE_PALMTC_H_ +#define _INCLUDE_PALMTC_H_ + +#include /* PXA_GPIO_TO_IRQ */ + +/** HERE ARE GPIOs **/ + +/* GPIOs */ +#define GPIO_NR_PALMTC_EARPHONE_DETECT 2 +#define GPIO_NR_PALMTC_CRADLE_DETECT 5 +#define GPIO_NR_PALMTC_HOTSYNC_BUTTON 7 + +/* SD/MMC */ +#define GPIO_NR_PALMTC_SD_DETECT_N 12 +#define GPIO_NR_PALMTC_SD_POWER 32 +#define GPIO_NR_PALMTC_SD_READONLY 54 + +/* WLAN */ +#define GPIO_NR_PALMTC_PCMCIA_READY 13 +#define GPIO_NR_PALMTC_PCMCIA_PWRREADY 14 +#define GPIO_NR_PALMTC_PCMCIA_POWER1 15 +#define GPIO_NR_PALMTC_PCMCIA_POWER2 33 +#define GPIO_NR_PALMTC_PCMCIA_POWER3 55 +#define GPIO_NR_PALMTC_PCMCIA_RESET 78 + +/* UDC */ +#define GPIO_NR_PALMTC_USB_DETECT_N 4 +#define GPIO_NR_PALMTC_USB_POWER 36 + +/* LCD/BACKLIGHT */ +#define GPIO_NR_PALMTC_BL_POWER 16 +#define GPIO_NR_PALMTC_LCD_POWER 44 +#define GPIO_NR_PALMTC_LCD_BLANK 38 + +/* UART */ +#define GPIO_NR_PALMTC_RS232_POWER 37 + +/* IRDA */ +#define GPIO_NR_PALMTC_IR_DISABLE 45 + +/* IRQs */ +#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N) +#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY) + +/* UCB1400 GPIOs */ +#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) +#define GPIO_NR_PALMTC_HEADPHONE_DETECT (0x80 | 0x01) +#define GPIO_NR_PALMTC_SPEAKER_ENABLE (0x80 | 0x03) +#define GPIO_NR_PALMTC_VIBRA_POWER (0x80 | 0x05) +#define GPIO_NR_PALMTC_LED_POWER (0x80 | 0x07) + +/** HERE ARE INIT VALUES **/ +#define PALMTC_UCB1400_GPIO_OFFSET 0x80 + +/* BATTERY */ +#define PALMTC_BAT_MAX_VOLTAGE 4000 /* 4.00V maximum voltage */ +#define PALMTC_BAT_MIN_VOLTAGE 3550 /* 3.55V critical voltage */ +#define PALMTC_BAT_MAX_CURRENT 0 /* unknown */ +#define PALMTC_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMTC_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMTC_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMTC_MAX_LIFE_MINS 240 /* on-life in minutes */ + +#define PALMTC_BAT_MEASURE_DELAY (HZ * 1) + +/* BACKLIGHT */ +#define PALMTC_MAX_INTENSITY 0xFE +#define PALMTC_DEFAULT_INTENSITY 0x7E +#define PALMTC_LIMIT_MASK 0x7F +#define PALMTC_PRESCALER 0x3F +#define PALMTC_PERIOD_NS 3500 + +#endif diff --git a/arch/arm/mach-pxa/palmtx-pcmcia.c b/arch/arm/mach-pxa/palmtx-pcmcia.c new file mode 100644 index 000000000000..8c2aaad93043 --- /dev/null +++ b/arch/arm/mach-pxa/palmtx-pcmcia.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_palmtx.c + * + * Driver for Palm T|X PCMCIA + * + * Copyright (C) 2007-2011 Marek Vasut + */ + +#include +#include +#include + +#include +#include "palmtx.h" +#include + +static struct gpio palmtx_pcmcia_gpios[] = { + { GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, + { GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, + { GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, +}; + +static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request_array(palmtx_pcmcia_gpios, + ARRAY_SIZE(palmtx_pcmcia_gpios)); + + skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + + return ret; +} + +static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios)); +} + +static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->detect = 1; /* always inserted */ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1); + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1); + gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET, + !!(state->flags & SS_RESET)); + + return 0; +} + +static struct pcmcia_low_level palmtx_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = palmtx_pcmcia_hw_init, + .hw_shutdown = palmtx_pcmcia_hw_shutdown, + + .socket_state = palmtx_pcmcia_socket_state, + .configure_socket = palmtx_pcmcia_configure_socket, +}; + +static struct platform_device *palmtx_pcmcia_device; + +static int __init palmtx_pcmcia_init(void) +{ + int ret; + + if (!machine_is_palmtx()) + return -ENODEV; + + palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!palmtx_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops, + sizeof(palmtx_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(palmtx_pcmcia_device); + + if (ret) + platform_device_put(palmtx_pcmcia_device); + + return ret; +} + +static void __exit palmtx_pcmcia_exit(void) +{ + platform_device_unregister(palmtx_pcmcia_device); +} + +module_init(palmtx_pcmcia_init); +module_exit(palmtx_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Palm T|X"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 097b88638863..86460d6ea721 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -33,7 +33,7 @@ #include "pxa27x.h" #include -#include +#include "palmtx.h" #include #include #include diff --git a/arch/arm/mach-pxa/palmtx.h b/arch/arm/mach-pxa/palmtx.h new file mode 100644 index 000000000000..a2bb993952d9 --- /dev/null +++ b/arch/arm/mach-pxa/palmtx.h @@ -0,0 +1,110 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * GPIOs and interrupts for Palm T|X Handheld Computer + * + * Based on palmld-gpio.h by Alex Osborne + * + * Authors: Marek Vasut + * Cristiano P. + * Jan Herman <2hp@seznam.cz> + */ + +#ifndef _INCLUDE_PALMTX_H_ +#define _INCLUDE_PALMTX_H_ + +#include /* PXA_GPIO_TO_IRQ */ + +/** HERE ARE GPIOs **/ + +/* GPIOs */ +#define GPIO_NR_PALMTX_GPIO_RESET 1 + +#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ +#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 +#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 + +/* SD/MMC */ +#define GPIO_NR_PALMTX_SD_DETECT_N 14 +#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ +#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ + +/* TOUCHSCREEN */ +#define GPIO_NR_PALMTX_WM9712_IRQ 27 + +/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ +#define GPIO_NR_PALMTX_IR_DISABLE 40 + +/* USB */ +#define GPIO_NR_PALMTX_USB_DETECT_N 13 +#define GPIO_NR_PALMTX_USB_PULLUP 93 + +/* LCD/BACKLIGHT */ +#define GPIO_NR_PALMTX_BL_POWER 84 +#define GPIO_NR_PALMTX_LCD_POWER 96 + +/* LCD BORDER */ +#define GPIO_NR_PALMTX_BORDER_SWITCH 98 +#define GPIO_NR_PALMTX_BORDER_SELECT 22 + +/* BLUETOOTH */ +#define GPIO_NR_PALMTX_BT_POWER 17 +#define GPIO_NR_PALMTX_BT_RESET 83 + +/* PCMCIA (WiFi) */ +#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 +#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 +#define GPIO_NR_PALMTX_PCMCIA_RESET 79 +#define GPIO_NR_PALMTX_PCMCIA_READY 116 + +/* NAND Flash ... this GPIO may be incorrect! */ +#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 + +/* INTERRUPTS */ +#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N) +#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ) +#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT) +#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET) + +/** HERE ARE INIT VALUES **/ + +/* Various addresses */ +#define PALMTX_PCMCIA_PHYS 0x28000000 +#define PALMTX_PCMCIA_VIRT IOMEM(0xf0000000) +#define PALMTX_PCMCIA_SIZE 0x100000 + +#define PALMTX_PHYS_RAM_START 0xa0000000 +#define PALMTX_PHYS_IO_START 0x40000000 + +#define PALMTX_STR_BASE 0xa0200000 + +#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ +#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ + +#define PALMTX_NAND_ALE_PHYS (PALMTX_PHYS_NAND_START | (1 << 24)) +#define PALMTX_NAND_CLE_PHYS (PALMTX_PHYS_NAND_START | (1 << 25)) +#define PALMTX_NAND_ALE_VIRT IOMEM(0xff100000) +#define PALMTX_NAND_CLE_VIRT IOMEM(0xff200000) + +/* TOUCHSCREEN */ +#define AC97_LINK_FRAME 21 + + +/* BATTERY */ +#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ +#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ +#define PALMTX_BAT_MAX_CURRENT 0 /* unknown */ +#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ + +#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) + +/* BACKLIGHT */ +#define PALMTX_MAX_INTENSITY 0xFE +#define PALMTX_DEFAULT_INTENSITY 0x7E +#define PALMTX_LIMIT_MASK 0x7F +#define PALMTX_PRESCALER 0x3F +#define PALMTX_PERIOD_NS 3500 + +#endif diff --git a/arch/arm/mach-pxa/trizeps4-pcmcia.c b/arch/arm/mach-pxa/trizeps4-pcmcia.c new file mode 100644 index 000000000000..02d7bb0c538f --- /dev/null +++ b/arch/arm/mach-pxa/trizeps4-pcmcia.c @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_trizeps4.c + * + * TRIZEPS PCMCIA specific routines. + * + * Author: Jürgen Schindele + * Created: 20 02, 2006 + * Copyright: Jürgen Schindele + */ + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include "trizeps4.h" + +#include + +extern void board_pcmcia_power(int power); + +static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + /* we dont have voltage/card/ready detection + * so we dont need interrupts for it + */ + switch (skt->nr) { + case 0: + skt->stat[SOC_STAT_CD].gpio = GPIO_PCD; + skt->stat[SOC_STAT_CD].name = "cs0_cd"; + skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY; + skt->stat[SOC_STAT_RDY].name = "cs0_rdy"; + break; + default: + break; + } + /* release the reset of this card */ + pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq); + + return 0; +} + +static unsigned long trizeps_pcmcia_status[2]; + +static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + unsigned short status = 0, change; + status = CFSR_readw(); + change = (status ^ trizeps_pcmcia_status[skt->nr]) & + ConXS_CFSR_BVD_MASK; + if (change) { + trizeps_pcmcia_status[skt->nr] = status; + if (status & ConXS_CFSR_BVD1) { + /* enable_irq empty */ + } else { + /* disable_irq empty */ + } + } + + switch (skt->nr) { + case 0: + /* just fill in fix states */ + state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0; + state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0; + state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1; + state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1; + break; + +#ifndef CONFIG_MACH_TRIZEPS_CONXS + /* on ConXS we only have one slot. Second is inactive */ + case 1: + state->detect = 0; + state->ready = 0; + state->bvd1 = 0; + state->bvd2 = 0; + state->vs_3v = 0; + state->vs_Xv = 0; + break; + +#endif + } +} + +static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + int ret = 0; + unsigned short power = 0; + + /* we do nothing here just check a bit */ + switch (state->Vcc) { + case 0: power &= 0xfc; break; + case 33: power |= ConXS_BCR_S0_VCC_3V3; break; + case 50: + pr_err("%s(): Vcc 5V not supported in socket\n", __func__); + break; + default: + pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc); + ret = -1; + } + + switch (state->Vpp) { + case 0: power &= 0xf3; break; + case 33: power |= ConXS_BCR_S0_VPP_3V3; break; + case 120: + pr_err("%s(): Vpp 12V not supported in socket\n", __func__); + break; + default: + if (state->Vpp != state->Vcc) { + pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp); + ret = -1; + } + } + + switch (skt->nr) { + case 0: /* we only have 3.3V */ + board_pcmcia_power(power); + break; + +#ifndef CONFIG_MACH_TRIZEPS_CONXS + /* on ConXS we only have one slot. Second is inactive */ + case 1: +#endif + default: + break; + } + + return ret; +} + +static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt) +{ + /* default is on */ + board_pcmcia_power(0x9); +} + +static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) +{ + board_pcmcia_power(0x0); +} + +static struct pcmcia_low_level trizeps_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = trizeps_pcmcia_hw_init, + .socket_state = trizeps_pcmcia_socket_state, + .configure_socket = trizeps_pcmcia_configure_socket, + .socket_init = trizeps_pcmcia_socket_init, + .socket_suspend = trizeps_pcmcia_socket_suspend, +#ifdef CONFIG_MACH_TRIZEPS_CONXS + .nr = 1, +#else + .nr = 2, +#endif + .first = 0, +}; + +static struct platform_device *trizeps_pcmcia_device; + +static int __init trizeps_pcmcia_init(void) +{ + int ret; + + if (!machine_is_trizeps4() && !machine_is_trizeps4wl()) + return -ENODEV; + + trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!trizeps_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(trizeps_pcmcia_device, + &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops)); + + if (ret == 0) + ret = platform_device_add(trizeps_pcmcia_device); + + if (ret) + platform_device_put(trizeps_pcmcia_device); + + return ret; +} + +static void __exit trizeps_pcmcia_exit(void) +{ + platform_device_unregister(trizeps_pcmcia_device); +} + +fs_initcall(trizeps_pcmcia_init); +module_exit(trizeps_pcmcia_exit); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Juergen Schindele"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 1337008cc760..fadfbb40cd6c 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -40,7 +40,7 @@ #include #include "pxa27x.h" -#include +#include "trizeps4.h" #include #include #include diff --git a/arch/arm/mach-pxa/trizeps4.h b/arch/arm/mach-pxa/trizeps4.h new file mode 100644 index 000000000000..7597b9de11e2 --- /dev/null +++ b/arch/arm/mach-pxa/trizeps4.h @@ -0,0 +1,166 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/************************************************************************ + * Include file for TRIZEPS4 SoM and ConXS eval-board + * Copyright (c) Jürgen Schindele + * 2006 + ************************************************************************/ + +/* + * Includes/Defines + */ +#ifndef _TRIPEPS4_H_ +#define _TRIPEPS4_H_ + +#include +#include /* PXA_GPIO_TO_IRQ */ + +/* physical memory regions */ +#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ +#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ +#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ +#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ +#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ + + /* Logic on ConXS-board CSFR register*/ +#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) + /* Logic on ConXS-board BOCR register*/ +#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) + /* Logic on ConXS-board IRCR register*/ +#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) + /* Logic on ConXS-board UPSR register*/ +#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) + /* Logic on ConXS-board DICR register*/ +#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) + +/* virtual memory regions */ +#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ + +#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ +#define TRIZEPS4_CFSR_VIRT 0xF0100000 +#define TRIZEPS4_BOCR_VIRT 0xF0200000 +#define TRIZEPS4_DICR_VIRT 0xF0300000 +#define TRIZEPS4_IRCR_VIRT 0xF0400000 +#define TRIZEPS4_UPSR_VIRT 0xF0500000 + +/* size of flash */ +#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 101 +#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000) + +/* UCB1400 audio / TS-controller */ +#define GPIO_UCB1400 1 +#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400) + +/* PCMCIA socket Compact Flash */ +#define GPIO_PCD 11 /* PCMCIA Card Detect */ +#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD) +#define GPIO_PRDY 13 /* READY / nINT */ +#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY) + +/* MMC socket */ +#define GPIO_MMC_DET 12 +#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET) + +/* DOC NAND chip */ +#define GPIO_DOC_LOCK 94 +#define GPIO_DOC_IRQ 93 +#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ) + +/* SPI interface */ +#define GPIO_SPI 53 +#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI) + +/* LEDS using tx2 / rx2 */ +#define GPIO_SYS_BUSY_LED 46 +#define GPIO_HEARTBEAT_LED 47 + +/* Off-module PIC on ConXS board */ +#define GPIO_PIC 0 +#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC) + +#ifdef CONFIG_MACH_TRIZEPS_CONXS +/* for CONXS base board define these registers */ +#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) +#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) + +#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) +#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) + +#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) +#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) + +#define IRCR_P2V(x) ((x) - TRIZEPS4_IRCR_PHYS + TRIZEPS4_IRCR_VIRT) +#define IRCR_V2P(x) ((x) - TRIZEPS4_IRCR_VIRT + TRIZEPS4_IRCR_PHYS) + +#ifndef __ASSEMBLY__ +static inline unsigned short CFSR_readw(void) +{ + /* [Compact Flash Status Register] is read only */ + return *((unsigned short *)CFSR_P2V(0x0C000000)); +} +static inline void BCR_writew(unsigned short value) +{ + /* [Board Control Regsiter] is write only */ + *((unsigned short *)BCR_P2V(0x0E000000)) = value; +} +static inline void DCR_writew(unsigned short value) +{ + /* [Display Control Register] is write only */ + *((unsigned short *)DCR_P2V(0x0E000000)) = value; +} +static inline void IRCR_writew(unsigned short value) +{ + /* [InfraRed data Control Register] is write only */ + *((unsigned short *)IRCR_P2V(0x0E000000)) = value; +} +#else +#define ConXS_CFSR CFSR_P2V(0x0C000000) +#define ConXS_BCR BCR_P2V(0x0E000000) +#define ConXS_DCR DCR_P2V(0x0F800000) +#define ConXS_IRCR IRCR_P2V(0x0F800000) +#endif +#else +/* for whatever baseboard define function registers */ +static inline unsigned short CFSR_readw(void) +{ + return 0; +} +static inline void BCR_writew(unsigned short value) +{ + ; +} +static inline void DCR_writew(unsigned short value) +{ + ; +} +static inline void IRCR_writew(unsigned short value) +{ + ; +} +#endif /* CONFIG_MACH_TRIZEPS_CONXS */ + +#define ConXS_CFSR_BVD_MASK 0x0003 +#define ConXS_CFSR_BVD1 (1 << 0) +#define ConXS_CFSR_BVD2 (1 << 1) +#define ConXS_CFSR_VS_MASK 0x000C +#define ConXS_CFSR_VS1 (1 << 2) +#define ConXS_CFSR_VS2 (1 << 3) +#define ConXS_CFSR_VS_5V (0x3 << 2) +#define ConXS_CFSR_VS_3V3 0x0 + +#define ConXS_BCR_S0_POW_EN0 (1 << 0) +#define ConXS_BCR_S0_POW_EN1 (1 << 1) +#define ConXS_BCR_L_DISP (1 << 4) +#define ConXS_BCR_CF_BUF_EN (1 << 5) +#define ConXS_BCR_CF_RESET (1 << 7) +#define ConXS_BCR_S0_VCC_3V3 0x1 +#define ConXS_BCR_S0_VCC_5V0 0x2 +#define ConXS_BCR_S0_VPP_12V 0x4 +#define ConXS_BCR_S0_VPP_3V3 0x8 + +#define ConXS_IRCR_MODE (1 << 0) +#define ConXS_IRCR_SD (1 << 1) + +#endif /* _TRIPEPS4_H_ */ diff --git a/arch/arm/mach-pxa/viper-pcmcia.c b/arch/arm/mach-pxa/viper-pcmcia.c new file mode 100644 index 000000000000..26599dcc49b3 --- /dev/null +++ b/arch/arm/mach-pxa/viper-pcmcia.c @@ -0,0 +1,180 @@ +/* + * Viper/Zeus PCMCIA support + * Copyright 2004 Arcom Control Systems + * + * Maintained by Marc Zyngier + * + * Based on: + * iPAQ h2200 PCMCIA support + * Copyright 2004 Koen Kooi + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include "viper-pcmcia.h" + +static struct platform_device *arcom_pcmcia_dev; + +static inline struct arcom_pcmcia_pdata *viper_get_pdata(void) +{ + return arcom_pcmcia_dev->dev.platform_data; +} + +static int viper_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + unsigned long flags; + + skt->stat[SOC_STAT_CD].gpio = pdata->cd_gpio; + skt->stat[SOC_STAT_CD].name = "PCMCIA_CD"; + skt->stat[SOC_STAT_RDY].gpio = pdata->rdy_gpio; + skt->stat[SOC_STAT_RDY].name = "CF ready"; + + if (gpio_request(pdata->pwr_gpio, "CF power")) + goto err_request_pwr; + + local_irq_save(flags); + + if (gpio_direction_output(pdata->pwr_gpio, 0)) { + local_irq_restore(flags); + goto err_dir; + } + + local_irq_restore(flags); + + return 0; + +err_dir: + gpio_free(pdata->pwr_gpio); +err_request_pwr: + dev_err(&arcom_pcmcia_dev->dev, "Failed to setup PCMCIA GPIOs\n"); + return -1; +} + +/* + * Release all resources. + */ +static void viper_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + + gpio_free(pdata->pwr_gpio); +} + +static void viper_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; /* Can only apply 3.3V */ + state->vs_Xv = 0; +} + +static int viper_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); + + /* Silently ignore Vpp, output enable, speaker enable. */ + pdata->reset(state->flags & SS_RESET); + + /* Apply socket voltage */ + switch (state->Vcc) { + case 0: + gpio_set_value(pdata->pwr_gpio, 0); + break; + case 33: + gpio_set_value(pdata->pwr_gpio, 1); + break; + default: + dev_err(&arcom_pcmcia_dev->dev, "Unsupported Vcc:%d\n", state->Vcc); + return -1; + } + + return 0; +} + +static struct pcmcia_low_level viper_pcmcia_ops = { + .owner = THIS_MODULE, + .hw_init = viper_pcmcia_hw_init, + .hw_shutdown = viper_pcmcia_hw_shutdown, + .socket_state = viper_pcmcia_socket_state, + .configure_socket = viper_pcmcia_configure_socket, + .nr = 1, +}; + +static struct platform_device *viper_pcmcia_device; + +static int viper_pcmcia_probe(struct platform_device *pdev) +{ + int ret; + + /* I can't imagine more than one device, but you never know... */ + if (arcom_pcmcia_dev) + return -EEXIST; + + if (!pdev->dev.platform_data) + return -EINVAL; + + viper_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!viper_pcmcia_device) + return -ENOMEM; + + arcom_pcmcia_dev = pdev; + + viper_pcmcia_device->dev.parent = &pdev->dev; + + ret = platform_device_add_data(viper_pcmcia_device, + &viper_pcmcia_ops, + sizeof(viper_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(viper_pcmcia_device); + + if (ret) { + platform_device_put(viper_pcmcia_device); + arcom_pcmcia_dev = NULL; + } + + return ret; +} + +static int viper_pcmcia_remove(struct platform_device *pdev) +{ + platform_device_unregister(viper_pcmcia_device); + arcom_pcmcia_dev = NULL; + return 0; +} + +static struct platform_device_id viper_pcmcia_id_table[] = { + { .name = "viper-pcmcia", }, + { .name = "zeus-pcmcia", }, + { }, +}; + +static struct platform_driver viper_pcmcia_driver = { + .probe = viper_pcmcia_probe, + .remove = viper_pcmcia_remove, + .driver = { + .name = "arcom-pcmcia", + }, + .id_table = viper_pcmcia_id_table, +}; + +module_platform_driver(viper_pcmcia_driver); + +MODULE_DEVICE_TABLE(platform, viper_pcmcia_id_table); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/viper-pcmcia.h b/arch/arm/mach-pxa/viper-pcmcia.h new file mode 100644 index 000000000000..a23b58aff9e1 --- /dev/null +++ b/arch/arm/mach-pxa/viper-pcmcia.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __ARCOM_PCMCIA_H +#define __ARCOM_PCMCIA_H + +struct arcom_pcmcia_pdata { + int cd_gpio; + int rdy_gpio; + int pwr_gpio; + void (*reset)(int state); +}; + +#endif diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index ac94b10bf8c1..600d9e80b00c 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -49,7 +49,7 @@ #include #include #include "regs-uart.h" -#include +#include "viper-pcmcia.h" #include "viper.h" #include diff --git a/arch/arm/mach-pxa/vpac270-pcmcia.c b/arch/arm/mach-pxa/vpac270-pcmcia.c new file mode 100644 index 000000000000..9fd990c8a5fb --- /dev/null +++ b/arch/arm/mach-pxa/vpac270-pcmcia.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * linux/drivers/pcmcia/pxa2xx_vpac270.c + * + * Driver for Voipac PXA270 PCMCIA and CF sockets + * + * Copyright (C) 2010-2011 Marek Vasut + */ + +#include +#include +#include + +#include + +#include "vpac270.h" + +#include + +static struct gpio vpac270_pcmcia_gpios[] = { + { GPIO107_VPAC270_PCMCIA_PPEN, GPIOF_INIT_LOW, "PCMCIA PPEN" }, + { GPIO11_VPAC270_PCMCIA_RESET, GPIOF_INIT_LOW, "PCMCIA Reset" }, +}; + +static struct gpio vpac270_cf_gpios[] = { + { GPIO16_VPAC270_CF_RESET, GPIOF_INIT_LOW, "CF Reset" }, +}; + +static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + if (skt->nr == 0) { + ret = gpio_request_array(vpac270_pcmcia_gpios, + ARRAY_SIZE(vpac270_pcmcia_gpios)); + + skt->stat[SOC_STAT_CD].gpio = GPIO84_VPAC270_PCMCIA_CD; + skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO35_VPAC270_PCMCIA_RDY; + skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; + } else { + ret = gpio_request_array(vpac270_cf_gpios, + ARRAY_SIZE(vpac270_cf_gpios)); + + skt->stat[SOC_STAT_CD].gpio = GPIO17_VPAC270_CF_CD; + skt->stat[SOC_STAT_CD].name = "CF CD"; + skt->stat[SOC_STAT_RDY].gpio = GPIO12_VPAC270_CF_RDY; + skt->stat[SOC_STAT_RDY].name = "CF Ready"; + } + + return ret; +} + +static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + if (skt->nr == 0) + gpio_free_array(vpac270_pcmcia_gpios, + ARRAY_SIZE(vpac270_pcmcia_gpios)); + else + gpio_free_array(vpac270_cf_gpios, + ARRAY_SIZE(vpac270_cf_gpios)); +} + +static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + if (skt->nr == 0) { + gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET, + (state->flags & SS_RESET)); + gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN, + !(state->Vcc == 33 || state->Vcc == 50)); + } else { + gpio_set_value(GPIO16_VPAC270_CF_RESET, + (state->flags & SS_RESET)); + } + + return 0; +} + +static struct pcmcia_low_level vpac270_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 2, + + .hw_init = vpac270_pcmcia_hw_init, + .hw_shutdown = vpac270_pcmcia_hw_shutdown, + + .socket_state = vpac270_pcmcia_socket_state, + .configure_socket = vpac270_pcmcia_configure_socket, +}; + +static struct platform_device *vpac270_pcmcia_device; + +static int __init vpac270_pcmcia_init(void) +{ + int ret; + + if (!machine_is_vpac270()) + return -ENODEV; + + vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!vpac270_pcmcia_device) + return -ENOMEM; + + ret = platform_device_add_data(vpac270_pcmcia_device, + &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(vpac270_pcmcia_device); + + if (ret) + platform_device_put(vpac270_pcmcia_device); + + return ret; +} + +static void __exit vpac270_pcmcia_exit(void) +{ + platform_device_unregister(vpac270_pcmcia_device); +} + +module_init(vpac270_pcmcia_init); +module_exit(vpac270_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut "); +MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c index 7067d1464689..8f74bafcf1f9 100644 --- a/arch/arm/mach-pxa/vpac270.c +++ b/arch/arm/mach-pxa/vpac270.c @@ -30,7 +30,7 @@ #include "pxa27x.h" #include -#include +#include "vpac270.h" #include #include #include diff --git a/arch/arm/mach-pxa/vpac270.h b/arch/arm/mach-pxa/vpac270.h new file mode 100644 index 000000000000..0cd094d8c553 --- /dev/null +++ b/arch/arm/mach-pxa/vpac270.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * GPIOs and interrupts for Voipac PXA270 + * + * Copyright (C) 2010 + * Marek Vasut + */ + +#ifndef _INCLUDE_VPAC270_H_ +#define _INCLUDE_VPAC270_H_ + +#define GPIO1_VPAC270_USER_BTN 1 + +#define GPIO15_VPAC270_LED_ORANGE 15 + +#define GPIO81_VPAC270_BKL_ON 81 +#define GPIO83_VPAC270_NL_ON 83 + +#define GPIO52_VPAC270_SD_READONLY 52 +#define GPIO53_VPAC270_SD_DETECT_N 53 + +#define GPIO84_VPAC270_PCMCIA_CD 84 +#define GPIO35_VPAC270_PCMCIA_RDY 35 +#define GPIO107_VPAC270_PCMCIA_PPEN 107 +#define GPIO11_VPAC270_PCMCIA_RESET 11 +#define GPIO17_VPAC270_CF_CD 17 +#define GPIO12_VPAC270_CF_RDY 12 +#define GPIO16_VPAC270_CF_RESET 16 + +#define GPIO41_VPAC270_UDC_DETECT 41 + +#define GPIO114_VPAC270_ETH_IRQ 114 + +#define GPIO36_VPAC270_IDE_IRQ 36 + +#define GPIO113_VPAC270_TS_IRQ 113 + +#endif diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 67396e85bb66..2e6c8d156d77 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -47,7 +47,7 @@ #include #include "pm.h" #include -#include +#include "viper-pcmcia.h" #include "zeus.h" #include diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index c43267b18f55..c59ddde42007 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -50,18 +50,5 @@ sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o pxa2xx-obj-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o pxa2xx-obj-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o -pxa2xx-obj-$(CONFIG_ARCOM_PCMCIA) += pxa2xx_viper.o -pxa2xx-obj-$(CONFIG_TRIZEPS_PCMCIA) += pxa2xx_trizeps4.o -pxa2xx-obj-$(CONFIG_MACH_PALMTX) += pxa2xx_palmtx.o -pxa2xx-obj-$(CONFIG_MACH_PALMTC) += pxa2xx_palmtc.o -pxa2xx-obj-$(CONFIG_MACH_PALMLD) += pxa2xx_palmld.o -pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o -pxa2xx-obj-$(CONFIG_MACH_VPAC270) += pxa2xx_vpac270.o -pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o -pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += pxa2xx_colibri.o -pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o -pxa2xx-obj-$(CONFIG_MACH_H4700) += pxa2xx_hx4700.o - obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y) - obj-$(CONFIG_PCMCIA_XXS1500) += xxs1500_ss.o diff --git a/drivers/pcmcia/pxa2xx_balloon3.c b/drivers/pcmcia/pxa2xx_balloon3.c deleted file mode 100644 index 5fe1da7a50e4..000000000000 --- a/drivers/pcmcia/pxa2xx_balloon3.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_balloon3.c - * - * Balloon3 PCMCIA specific routines. - * - * Author: Nick Bane - * Created: June, 2006 - * Copyright: Toby Churchill Ltd - * Derived from pxa2xx_mainstone.c, by Nico Pitre - * - * Various modification by Marek Vasut - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include "soc_common.h" - -static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - uint16_t ver; - - ver = __raw_readw(BALLOON3_FPGA_VER); - if (ver < 0x4f08) - pr_warn("The FPGA code, version 0x%04x, is too old. " - "PCMCIA/CF support might be broken in this version!", - ver); - - skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ; - skt->stat[SOC_STAT_CD].gpio = BALLOON3_GPIO_S0_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA0 CD"; - skt->stat[SOC_STAT_BVD1].irq = BALLOON3_BP_NSTSCHG_IRQ; - skt->stat[SOC_STAT_BVD1].name = "PCMCIA0 STSCHG"; - - return 0; -} - -static unsigned long balloon3_pcmcia_status[2] = { - BALLOON3_CF_nSTSCHG_BVD1, - BALLOON3_CF_nSTSCHG_BVD1 -}; - -static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - uint16_t status; - int flip; - - /* This actually reads the STATUS register */ - status = __raw_readw(BALLOON3_CF_STATUS_REG); - flip = (status ^ balloon3_pcmcia_status[skt->nr]) - & BALLOON3_CF_nSTSCHG_BVD1; - /* - * Workaround for STSCHG which can't be deasserted: - * We therefore disable/enable corresponding IRQs - * as needed to avoid IRQ locks. - */ - if (flip) { - balloon3_pcmcia_status[skt->nr] = status; - if (status & BALLOON3_CF_nSTSCHG_BVD1) - enable_irq(BALLOON3_BP_NSTSCHG_IRQ); - else - disable_irq(BALLOON3_BP_NSTSCHG_IRQ); - } - - state->ready = !!(status & BALLOON3_CF_nIRQ); - state->bvd1 = !!(status & BALLOON3_CF_nSTSCHG_BVD1); - state->bvd2 = 0; /* not available */ - state->vs_3v = 1; /* Always true its a CF card */ - state->vs_Xv = 0; /* not available */ -} - -static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG + - ((state->flags & SS_RESET) ? - BALLOON3_FPGA_SETnCLR : 0)); - return 0; -} - -static struct pcmcia_low_level balloon3_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = balloon3_pcmcia_hw_init, - .socket_state = balloon3_pcmcia_socket_state, - .configure_socket = balloon3_pcmcia_configure_socket, - .first = 0, - .nr = 1, -}; - -static struct platform_device *balloon3_pcmcia_device; - -static int __init balloon3_pcmcia_init(void) -{ - int ret; - - if (!machine_is_balloon3()) - return -ENODEV; - - balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!balloon3_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(balloon3_pcmcia_device, - &balloon3_pcmcia_ops, sizeof(balloon3_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(balloon3_pcmcia_device); - - if (ret) - platform_device_put(balloon3_pcmcia_device); - - return ret; -} - -static void __exit balloon3_pcmcia_exit(void) -{ - platform_device_unregister(balloon3_pcmcia_device); -} - -module_init(balloon3_pcmcia_init); -module_exit(balloon3_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Nick Bane "); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver"); diff --git a/drivers/pcmcia/pxa2xx_colibri.c b/drivers/pcmcia/pxa2xx_colibri.c deleted file mode 100644 index f0f725e99604..000000000000 --- a/drivers/pcmcia/pxa2xx_colibri.c +++ /dev/null @@ -1,165 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_colibri.c - * - * Driver for Toradex Colibri PXA270 CF socket - * - * Copyright (C) 2010 Marek Vasut - */ - -#include -#include -#include -#include - -#include - -#include "soc_common.h" - -#define COLIBRI270_RESET_GPIO 53 -#define COLIBRI270_PPEN_GPIO 107 -#define COLIBRI270_BVD1_GPIO 83 -#define COLIBRI270_BVD2_GPIO 82 -#define COLIBRI270_DETECT_GPIO 84 -#define COLIBRI270_READY_GPIO 1 - -#define COLIBRI320_RESET_GPIO 77 -#define COLIBRI320_PPEN_GPIO 57 -#define COLIBRI320_BVD1_GPIO 53 -#define COLIBRI320_BVD2_GPIO 79 -#define COLIBRI320_DETECT_GPIO 81 -#define COLIBRI320_READY_GPIO 29 - -enum { - DETECT = 0, - READY = 1, - BVD1 = 2, - BVD2 = 3, - PPEN = 4, - RESET = 5, -}; - -/* Contents of this array are configured on-the-fly in init function */ -static struct gpio colibri_pcmcia_gpios[] = { - { 0, GPIOF_IN, "PCMCIA Detect" }, - { 0, GPIOF_IN, "PCMCIA Ready" }, - { 0, GPIOF_IN, "PCMCIA BVD1" }, - { 0, GPIOF_IN, "PCMCIA BVD2" }, - { 0, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { 0, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); - if (ret) - goto err1; - - skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpios[READY].gpio); - skt->stat[SOC_STAT_CD].irq = gpio_to_irq(colibri_pcmcia_gpios[DETECT].gpio); - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - -err1: - return ret; -} - -static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(colibri_pcmcia_gpios, - ARRAY_SIZE(colibri_pcmcia_gpios)); -} - -static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - - state->detect = !!gpio_get_value(colibri_pcmcia_gpios[DETECT].gpio); - state->ready = !!gpio_get_value(colibri_pcmcia_gpios[READY].gpio); - state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpios[BVD1].gpio); - state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpios[BVD2].gpio); - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(colibri_pcmcia_gpios[PPEN].gpio, - !(state->Vcc == 33 && state->Vpp < 50)); - gpio_set_value(colibri_pcmcia_gpios[RESET].gpio, - state->flags & SS_RESET); - return 0; -} - -static struct pcmcia_low_level colibri_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = colibri_pcmcia_hw_init, - .hw_shutdown = colibri_pcmcia_hw_shutdown, - - .socket_state = colibri_pcmcia_socket_state, - .configure_socket = colibri_pcmcia_configure_socket, -}; - -static struct platform_device *colibri_pcmcia_device; - -static int __init colibri_pcmcia_init(void) -{ - int ret; - - if (!machine_is_colibri() && !machine_is_colibri320()) - return -ENODEV; - - colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!colibri_pcmcia_device) - return -ENOMEM; - - /* Colibri PXA270 */ - if (machine_is_colibri()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI270_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI270_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI270_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI270_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI270_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI270_READY_GPIO; - /* Colibri PXA320 */ - } else if (machine_is_colibri320()) { - colibri_pcmcia_gpios[RESET].gpio = COLIBRI320_RESET_GPIO; - colibri_pcmcia_gpios[PPEN].gpio = COLIBRI320_PPEN_GPIO; - colibri_pcmcia_gpios[BVD1].gpio = COLIBRI320_BVD1_GPIO; - colibri_pcmcia_gpios[BVD2].gpio = COLIBRI320_BVD2_GPIO; - colibri_pcmcia_gpios[DETECT].gpio = COLIBRI320_DETECT_GPIO; - colibri_pcmcia_gpios[READY].gpio = COLIBRI320_READY_GPIO; - } - - ret = platform_device_add_data(colibri_pcmcia_device, - &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(colibri_pcmcia_device); - - if (ret) - platform_device_put(colibri_pcmcia_device); - - return ret; -} - -static void __exit colibri_pcmcia_exit(void) -{ - platform_device_unregister(colibri_pcmcia_device); -} - -module_init(colibri_pcmcia_init); -module_exit(colibri_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_e740.c b/drivers/pcmcia/pxa2xx_e740.c deleted file mode 100644 index 72caa6d05ab9..000000000000 --- a/drivers/pcmcia/pxa2xx_e740.c +++ /dev/null @@ -1,127 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Toshiba e740 PCMCIA specific routines. - * - * (c) 2004 Ian Molton - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - -#include "soc_common.h" - -static int e740_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD0; - skt->stat[SOC_STAT_CD].name = "CF card detect"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY0; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - } else { - skt->stat[SOC_STAT_CD].gpio = GPIO_E740_PCMCIA_CD1; - skt->stat[SOC_STAT_CD].name = "Wifi switch"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_E740_PCMCIA_RDY1; - skt->stat[SOC_STAT_RDY].name = "Wifi ready"; - } - - return 0; -} - -static void e740_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int e740_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (state->flags & SS_RESET) { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 1); - } else { - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_RST0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_RST1, 0); - } - - switch (state->Vcc) { - case 0: /* Socket off */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 0); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 1); - break; - case 50: - case 33: /* socket on */ - if (skt->nr == 0) - gpio_set_value(GPIO_E740_PCMCIA_PWR0, 1); - else - gpio_set_value(GPIO_E740_PCMCIA_PWR1, 0); - break; - default: - printk(KERN_ERR "e740_cs: Unsupported Vcc: %d\n", state->Vcc); - } - - return 0; -} - -static struct pcmcia_low_level e740_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = e740_pcmcia_hw_init, - .socket_state = e740_pcmcia_socket_state, - .configure_socket = e740_pcmcia_configure_socket, - .nr = 2, -}; - -static struct platform_device *e740_pcmcia_device; - -static int __init e740_pcmcia_init(void) -{ - int ret; - - if (!machine_is_e740()) - return -ENODEV; - - e740_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!e740_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(e740_pcmcia_device, &e740_pcmcia_ops, - sizeof(e740_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(e740_pcmcia_device); - - if (ret) - platform_device_put(e740_pcmcia_device); - - return ret; -} - -static void __exit e740_pcmcia_exit(void) -{ - platform_device_unregister(e740_pcmcia_device); -} - -module_init(e740_pcmcia_init); -module_exit(e740_pcmcia_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Ian Molton "); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_DESCRIPTION("e740 PCMCIA platform support"); diff --git a/drivers/pcmcia/pxa2xx_hx4700.c b/drivers/pcmcia/pxa2xx_hx4700.c deleted file mode 100644 index 87b6a1639d94..000000000000 --- a/drivers/pcmcia/pxa2xx_hx4700.c +++ /dev/null @@ -1,118 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (C) 2012 Paul Parsons - */ - -#include -#include -#include -#include -#include - -#include -#include - -#include "soc_common.h" - -static struct gpio gpios[] = { - { GPIO114_HX4700_CF_RESET, GPIOF_OUT_INIT_LOW, "CF reset" }, - { EGPIO4_CF_3V3_ON, GPIOF_OUT_INIT_LOW, "CF 3.3V enable" }, -}; - -static int hx4700_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); - if (ret) - goto out; - - /* - * IRQ type must be set before soc_pcmcia_hw_init() calls request_irq(). - * The asic3 default IRQ type is level trigger low level detect, exactly - * the the signal present on GPIOD4_CF_nCD when a CF card is inserted. - * If the IRQ type is not changed, the asic3 interrupt handler will loop - * repeatedly because it is unable to clear the level trigger interrupt. - */ - irq_set_irq_type(gpio_to_irq(GPIOD4_CF_nCD), IRQ_TYPE_EDGE_BOTH); - - skt->stat[SOC_STAT_CD].gpio = GPIOD4_CF_nCD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO60_HX4700_CF_RNB; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - -out: - return ret; -} - -static void hx4700_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(gpios, ARRAY_SIZE(gpios)); -} - -static void hx4700_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int hx4700_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - switch (state->Vcc) { - case 0: - gpio_set_value(EGPIO4_CF_3V3_ON, 0); - break; - case 33: - gpio_set_value(EGPIO4_CF_3V3_ON, 1); - break; - default: - printk(KERN_ERR "pcmcia: Unsupported Vcc: %d\n", state->Vcc); - return -EINVAL; - } - - gpio_set_value(GPIO114_HX4700_CF_RESET, (state->flags & SS_RESET) != 0); - - return 0; -} - -static struct pcmcia_low_level hx4700_pcmcia_ops = { - .owner = THIS_MODULE, - .nr = 1, - .hw_init = hx4700_pcmcia_hw_init, - .hw_shutdown = hx4700_pcmcia_hw_shutdown, - .socket_state = hx4700_pcmcia_socket_state, - .configure_socket = hx4700_pcmcia_configure_socket, -}; - -static struct platform_device *hx4700_pcmcia_device; - -static int __init hx4700_pcmcia_init(void) -{ - struct platform_device *pdev; - - if (!machine_is_h4700()) - return -ENODEV; - - pdev = platform_device_register_data(NULL, "pxa2xx-pcmcia", -1, - &hx4700_pcmcia_ops, sizeof(hx4700_pcmcia_ops)); - if (IS_ERR(pdev)) - return PTR_ERR(pdev); - - hx4700_pcmcia_device = pdev; - - return 0; -} - -static void __exit hx4700_pcmcia_exit(void) -{ - platform_device_unregister(hx4700_pcmcia_device); -} - -module_init(hx4700_pcmcia_init); -module_exit(hx4700_pcmcia_exit); - -MODULE_AUTHOR("Paul Parsons "); -MODULE_DESCRIPTION("HP iPAQ hx4700 PCMCIA driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmld.c b/drivers/pcmcia/pxa2xx_palmld.c deleted file mode 100644 index cfff41ac9ca2..000000000000 --- a/drivers/pcmcia/pxa2xx_palmld.c +++ /dev/null @@ -1,110 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmld.c - * - * Driver for Palm LifeDrive PCMCIA - * - * Copyright (C) 2006 Alex Osborne - * Copyright (C) 2007-2011 Marek Vasut - */ - -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmld_pcmcia_gpios[] = { - { GPIO_NR_PALMLD_PCMCIA_POWER, GPIOF_INIT_LOW, "PCMCIA Power" }, - { GPIO_NR_PALMLD_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmld_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmld_pcmcia_gpios, - ARRAY_SIZE(palmld_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMLD_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmld_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmld_pcmcia_gpios, ARRAY_SIZE(palmld_pcmcia_gpios)); -} - -static void palmld_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmld_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_POWER, 1); - gpio_set_value(GPIO_NR_PALMLD_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmld_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 1, - .nr = 1, - - .hw_init = palmld_pcmcia_hw_init, - .hw_shutdown = palmld_pcmcia_hw_shutdown, - - .socket_state = palmld_pcmcia_socket_state, - .configure_socket = palmld_pcmcia_configure_socket, -}; - -static struct platform_device *palmld_pcmcia_device; - -static int __init palmld_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmld()) - return -ENODEV; - - palmld_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmld_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmld_pcmcia_device, &palmld_pcmcia_ops, - sizeof(palmld_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmld_pcmcia_device); - - if (ret) - platform_device_put(palmld_pcmcia_device); - - return ret; -} - -static void __exit palmld_pcmcia_exit(void) -{ - platform_device_unregister(palmld_pcmcia_device); -} - -module_init(palmld_pcmcia_init); -module_exit(palmld_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne ," - " Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm LifeDrive"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmtc.c b/drivers/pcmcia/pxa2xx_palmtc.c deleted file mode 100644 index 8fe05613ed04..000000000000 --- a/drivers/pcmcia/pxa2xx_palmtc.c +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtc.c - * - * Driver for Palm Tungsten|C PCMCIA - * - * Copyright (C) 2008 Alex Osborne - * Copyright (C) 2009-2011 Marek Vasut - */ - -#include -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmtc_pcmcia_gpios[] = { - { GPIO_NR_PALMTC_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTC_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTC_PCMCIA_POWER3, GPIOF_INIT_LOW, "PCMCIA Power 3" }, - { GPIO_NR_PALMTC_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, - { GPIO_NR_PALMTC_PCMCIA_PWRREADY, GPIOF_IN, "PCMCIA Power Ready" }, -}; - -static int palmtc_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtc_pcmcia_gpios, - ARRAY_SIZE(palmtc_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTC_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtc_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtc_pcmcia_gpios, ARRAY_SIZE(palmtc_pcmcia_gpios)); -} - -static void palmtc_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int palmtc_wifi_powerdown(void) -{ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 0); - mdelay(40); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 0); - return 0; -} - -static int palmtc_wifi_powerup(void) -{ - int timeout = 50; - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 1); - mdelay(50); - - /* Power up the card, 1.8V first, after a while 3.3V */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER1, 1); - mdelay(100); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER2, 1); - - /* Wait till the card is ready */ - while (!gpio_get_value(GPIO_NR_PALMTC_PCMCIA_PWRREADY) && - timeout) { - mdelay(1); - timeout--; - } - - /* Power down the WiFi in case of error */ - if (!timeout) { - palmtc_wifi_powerdown(); - return 1; - } - - /* Reset the card */ - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 1); - mdelay(20); - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_RESET, 0); - mdelay(25); - - gpio_set_value(GPIO_NR_PALMTC_PCMCIA_POWER3, 0); - - return 0; -} - -static int palmtc_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 1; - - if (state->Vcc == 0) - ret = palmtc_wifi_powerdown(); - else if (state->Vcc == 33) - ret = palmtc_wifi_powerup(); - - return ret; -} - -static struct pcmcia_low_level palmtc_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtc_pcmcia_hw_init, - .hw_shutdown = palmtc_pcmcia_hw_shutdown, - - .socket_state = palmtc_pcmcia_socket_state, - .configure_socket = palmtc_pcmcia_configure_socket, -}; - -static struct platform_device *palmtc_pcmcia_device; - -static int __init palmtc_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtc()) - return -ENODEV; - - palmtc_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtc_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtc_pcmcia_device, &palmtc_pcmcia_ops, - sizeof(palmtc_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtc_pcmcia_device); - - if (ret) - platform_device_put(palmtc_pcmcia_device); - - return ret; -} - -static void __exit palmtc_pcmcia_exit(void) -{ - platform_device_unregister(palmtc_pcmcia_device); -} - -module_init(palmtc_pcmcia_init); -module_exit(palmtc_pcmcia_exit); - -MODULE_AUTHOR("Alex Osborne ," - " Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm Tungsten|C"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_palmtx.c b/drivers/pcmcia/pxa2xx_palmtx.c deleted file mode 100644 index c449ca72cb87..000000000000 --- a/drivers/pcmcia/pxa2xx_palmtx.c +++ /dev/null @@ -1,111 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_palmtx.c - * - * Driver for Palm T|X PCMCIA - * - * Copyright (C) 2007-2011 Marek Vasut - */ - -#include -#include -#include - -#include -#include -#include "soc_common.h" - -static struct gpio palmtx_pcmcia_gpios[] = { - { GPIO_NR_PALMTX_PCMCIA_POWER1, GPIOF_INIT_LOW, "PCMCIA Power 1" }, - { GPIO_NR_PALMTX_PCMCIA_POWER2, GPIOF_INIT_LOW, "PCMCIA Power 2" }, - { GPIO_NR_PALMTX_PCMCIA_RESET, GPIOF_INIT_HIGH,"PCMCIA Reset" }, -}; - -static int palmtx_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - ret = gpio_request_array(palmtx_pcmcia_gpios, - ARRAY_SIZE(palmtx_pcmcia_gpios)); - - skt->stat[SOC_STAT_RDY].gpio = GPIO_NR_PALMTX_PCMCIA_READY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - - return ret; -} - -static void palmtx_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - gpio_free_array(palmtx_pcmcia_gpios, ARRAY_SIZE(palmtx_pcmcia_gpios)); -} - -static void palmtx_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->detect = 1; /* always inserted */ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -palmtx_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER1, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_POWER2, 1); - gpio_set_value(GPIO_NR_PALMTX_PCMCIA_RESET, - !!(state->flags & SS_RESET)); - - return 0; -} - -static struct pcmcia_low_level palmtx_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 1, - - .hw_init = palmtx_pcmcia_hw_init, - .hw_shutdown = palmtx_pcmcia_hw_shutdown, - - .socket_state = palmtx_pcmcia_socket_state, - .configure_socket = palmtx_pcmcia_configure_socket, -}; - -static struct platform_device *palmtx_pcmcia_device; - -static int __init palmtx_pcmcia_init(void) -{ - int ret; - - if (!machine_is_palmtx()) - return -ENODEV; - - palmtx_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!palmtx_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(palmtx_pcmcia_device, &palmtx_pcmcia_ops, - sizeof(palmtx_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(palmtx_pcmcia_device); - - if (ret) - platform_device_put(palmtx_pcmcia_device); - - return ret; -} - -static void __exit palmtx_pcmcia_exit(void) -{ - platform_device_unregister(palmtx_pcmcia_device); -} - -module_init(palmtx_pcmcia_init); -module_exit(palmtx_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Palm T|X"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_sharpsl.c b/drivers/pcmcia/pxa2xx_sharpsl.c index 66fe1d1af12a..b3ba858f70cb 100644 --- a/drivers/pcmcia/pxa2xx_sharpsl.c +++ b/drivers/pcmcia/pxa2xx_sharpsl.c @@ -18,7 +18,7 @@ #include #include -#include "soc_common.h" +#include #define NO_KEEP_VS 0x0001 #define SCOOP_DEV platform_scoop_config->devs diff --git a/drivers/pcmcia/pxa2xx_trizeps4.c b/drivers/pcmcia/pxa2xx_trizeps4.c deleted file mode 100644 index 6db8fe880ed4..000000000000 --- a/drivers/pcmcia/pxa2xx_trizeps4.c +++ /dev/null @@ -1,200 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_trizeps4.c - * - * TRIZEPS PCMCIA specific routines. - * - * Author: Jürgen Schindele - * Created: 20 02, 2006 - * Copyright: Jürgen Schindele - */ - -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -#include "soc_common.h" - -extern void board_pcmcia_power(int power); - -static int trizeps_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - /* we dont have voltage/card/ready detection - * so we dont need interrupts for it - */ - switch (skt->nr) { - case 0: - skt->stat[SOC_STAT_CD].gpio = GPIO_PCD; - skt->stat[SOC_STAT_CD].name = "cs0_cd"; - skt->stat[SOC_STAT_RDY].gpio = GPIO_PRDY; - skt->stat[SOC_STAT_RDY].name = "cs0_rdy"; - break; - default: - break; - } - /* release the reset of this card */ - pr_debug("%s: sock %d irq %d\n", __func__, skt->nr, skt->socket.pci_irq); - - return 0; -} - -static unsigned long trizeps_pcmcia_status[2]; - -static void trizeps_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - unsigned short status = 0, change; - status = CFSR_readw(); - change = (status ^ trizeps_pcmcia_status[skt->nr]) & - ConXS_CFSR_BVD_MASK; - if (change) { - trizeps_pcmcia_status[skt->nr] = status; - if (status & ConXS_CFSR_BVD1) { - /* enable_irq empty */ - } else { - /* disable_irq empty */ - } - } - - switch (skt->nr) { - case 0: - /* just fill in fix states */ - state->bvd1 = (status & ConXS_CFSR_BVD1) ? 1 : 0; - state->bvd2 = (status & ConXS_CFSR_BVD2) ? 1 : 0; - state->vs_3v = (status & ConXS_CFSR_VS1) ? 0 : 1; - state->vs_Xv = (status & ConXS_CFSR_VS2) ? 0 : 1; - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: - state->detect = 0; - state->ready = 0; - state->bvd1 = 0; - state->bvd2 = 0; - state->vs_3v = 0; - state->vs_Xv = 0; - break; - -#endif - } -} - -static int trizeps_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - int ret = 0; - unsigned short power = 0; - - /* we do nothing here just check a bit */ - switch (state->Vcc) { - case 0: power &= 0xfc; break; - case 33: power |= ConXS_BCR_S0_VCC_3V3; break; - case 50: - pr_err("%s(): Vcc 5V not supported in socket\n", __func__); - break; - default: - pr_err("%s(): bad Vcc %u\n", __func__, state->Vcc); - ret = -1; - } - - switch (state->Vpp) { - case 0: power &= 0xf3; break; - case 33: power |= ConXS_BCR_S0_VPP_3V3; break; - case 120: - pr_err("%s(): Vpp 12V not supported in socket\n", __func__); - break; - default: - if (state->Vpp != state->Vcc) { - pr_err("%s(): bad Vpp %u\n", __func__, state->Vpp); - ret = -1; - } - } - - switch (skt->nr) { - case 0: /* we only have 3.3V */ - board_pcmcia_power(power); - break; - -#ifndef CONFIG_MACH_TRIZEPS_CONXS - /* on ConXS we only have one slot. Second is inactive */ - case 1: -#endif - default: - break; - } - - return ret; -} - -static void trizeps_pcmcia_socket_init(struct soc_pcmcia_socket *skt) -{ - /* default is on */ - board_pcmcia_power(0x9); -} - -static void trizeps_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) -{ - board_pcmcia_power(0x0); -} - -static struct pcmcia_low_level trizeps_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = trizeps_pcmcia_hw_init, - .socket_state = trizeps_pcmcia_socket_state, - .configure_socket = trizeps_pcmcia_configure_socket, - .socket_init = trizeps_pcmcia_socket_init, - .socket_suspend = trizeps_pcmcia_socket_suspend, -#ifdef CONFIG_MACH_TRIZEPS_CONXS - .nr = 1, -#else - .nr = 2, -#endif - .first = 0, -}; - -static struct platform_device *trizeps_pcmcia_device; - -static int __init trizeps_pcmcia_init(void) -{ - int ret; - - if (!machine_is_trizeps4() && !machine_is_trizeps4wl()) - return -ENODEV; - - trizeps_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!trizeps_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(trizeps_pcmcia_device, - &trizeps_pcmcia_ops, sizeof(trizeps_pcmcia_ops)); - - if (ret == 0) - ret = platform_device_add(trizeps_pcmcia_device); - - if (ret) - platform_device_put(trizeps_pcmcia_device); - - return ret; -} - -static void __exit trizeps_pcmcia_exit(void) -{ - platform_device_unregister(trizeps_pcmcia_device); -} - -fs_initcall(trizeps_pcmcia_init); -module_exit(trizeps_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Juergen Schindele"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); diff --git a/drivers/pcmcia/pxa2xx_viper.c b/drivers/pcmcia/pxa2xx_viper.c deleted file mode 100644 index 7ac6647d286e..000000000000 --- a/drivers/pcmcia/pxa2xx_viper.c +++ /dev/null @@ -1,182 +0,0 @@ -/* - * Viper/Zeus PCMCIA support - * Copyright 2004 Arcom Control Systems - * - * Maintained by Marc Zyngier - * - * Based on: - * iPAQ h2200 PCMCIA support - * Copyright 2004 Koen Kooi - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include - -#include "soc_common.h" -#include "pxa2xx_base.h" - -static struct platform_device *arcom_pcmcia_dev; - -static inline struct arcom_pcmcia_pdata *viper_get_pdata(void) -{ - return arcom_pcmcia_dev->dev.platform_data; -} - -static int viper_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - unsigned long flags; - - skt->stat[SOC_STAT_CD].gpio = pdata->cd_gpio; - skt->stat[SOC_STAT_CD].name = "PCMCIA_CD"; - skt->stat[SOC_STAT_RDY].gpio = pdata->rdy_gpio; - skt->stat[SOC_STAT_RDY].name = "CF ready"; - - if (gpio_request(pdata->pwr_gpio, "CF power")) - goto err_request_pwr; - - local_irq_save(flags); - - if (gpio_direction_output(pdata->pwr_gpio, 0)) { - local_irq_restore(flags); - goto err_dir; - } - - local_irq_restore(flags); - - return 0; - -err_dir: - gpio_free(pdata->pwr_gpio); -err_request_pwr: - dev_err(&arcom_pcmcia_dev->dev, "Failed to setup PCMCIA GPIOs\n"); - return -1; -} - -/* - * Release all resources. - */ -static void viper_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - gpio_free(pdata->pwr_gpio); -} - -static void viper_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; /* Can only apply 3.3V */ - state->vs_Xv = 0; -} - -static int viper_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - struct arcom_pcmcia_pdata *pdata = viper_get_pdata(); - - /* Silently ignore Vpp, output enable, speaker enable. */ - pdata->reset(state->flags & SS_RESET); - - /* Apply socket voltage */ - switch (state->Vcc) { - case 0: - gpio_set_value(pdata->pwr_gpio, 0); - break; - case 33: - gpio_set_value(pdata->pwr_gpio, 1); - break; - default: - dev_err(&arcom_pcmcia_dev->dev, "Unsupported Vcc:%d\n", state->Vcc); - return -1; - } - - return 0; -} - -static struct pcmcia_low_level viper_pcmcia_ops = { - .owner = THIS_MODULE, - .hw_init = viper_pcmcia_hw_init, - .hw_shutdown = viper_pcmcia_hw_shutdown, - .socket_state = viper_pcmcia_socket_state, - .configure_socket = viper_pcmcia_configure_socket, - .nr = 1, -}; - -static struct platform_device *viper_pcmcia_device; - -static int viper_pcmcia_probe(struct platform_device *pdev) -{ - int ret; - - /* I can't imagine more than one device, but you never know... */ - if (arcom_pcmcia_dev) - return -EEXIST; - - if (!pdev->dev.platform_data) - return -EINVAL; - - viper_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!viper_pcmcia_device) - return -ENOMEM; - - arcom_pcmcia_dev = pdev; - - viper_pcmcia_device->dev.parent = &pdev->dev; - - ret = platform_device_add_data(viper_pcmcia_device, - &viper_pcmcia_ops, - sizeof(viper_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(viper_pcmcia_device); - - if (ret) { - platform_device_put(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - } - - return ret; -} - -static int viper_pcmcia_remove(struct platform_device *pdev) -{ - platform_device_unregister(viper_pcmcia_device); - arcom_pcmcia_dev = NULL; - return 0; -} - -static struct platform_device_id viper_pcmcia_id_table[] = { - { .name = "viper-pcmcia", }, - { .name = "zeus-pcmcia", }, - { }, -}; - -static struct platform_driver viper_pcmcia_driver = { - .probe = viper_pcmcia_probe, - .remove = viper_pcmcia_remove, - .driver = { - .name = "arcom-pcmcia", - }, - .id_table = viper_pcmcia_id_table, -}; - -module_platform_driver(viper_pcmcia_driver); - -MODULE_DEVICE_TABLE(platform, viper_pcmcia_id_table); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/pxa2xx_vpac270.c b/drivers/pcmcia/pxa2xx_vpac270.c deleted file mode 100644 index 3565add03a5e..000000000000 --- a/drivers/pcmcia/pxa2xx_vpac270.c +++ /dev/null @@ -1,137 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * linux/drivers/pcmcia/pxa2xx_vpac270.c - * - * Driver for Voipac PXA270 PCMCIA and CF sockets - * - * Copyright (C) 2010-2011 Marek Vasut - */ - -#include -#include -#include - -#include - -#include - -#include "soc_common.h" - -static struct gpio vpac270_pcmcia_gpios[] = { - { GPIO107_VPAC270_PCMCIA_PPEN, GPIOF_INIT_LOW, "PCMCIA PPEN" }, - { GPIO11_VPAC270_PCMCIA_RESET, GPIOF_INIT_LOW, "PCMCIA Reset" }, -}; - -static struct gpio vpac270_cf_gpios[] = { - { GPIO16_VPAC270_CF_RESET, GPIOF_INIT_LOW, "CF Reset" }, -}; - -static int vpac270_pcmcia_hw_init(struct soc_pcmcia_socket *skt) -{ - int ret; - - if (skt->nr == 0) { - ret = gpio_request_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO84_VPAC270_PCMCIA_CD; - skt->stat[SOC_STAT_CD].name = "PCMCIA CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO35_VPAC270_PCMCIA_RDY; - skt->stat[SOC_STAT_RDY].name = "PCMCIA Ready"; - } else { - ret = gpio_request_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); - - skt->stat[SOC_STAT_CD].gpio = GPIO17_VPAC270_CF_CD; - skt->stat[SOC_STAT_CD].name = "CF CD"; - skt->stat[SOC_STAT_RDY].gpio = GPIO12_VPAC270_CF_RDY; - skt->stat[SOC_STAT_RDY].name = "CF Ready"; - } - - return ret; -} - -static void vpac270_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) -{ - if (skt->nr == 0) - gpio_free_array(vpac270_pcmcia_gpios, - ARRAY_SIZE(vpac270_pcmcia_gpios)); - else - gpio_free_array(vpac270_cf_gpios, - ARRAY_SIZE(vpac270_cf_gpios)); -} - -static void vpac270_pcmcia_socket_state(struct soc_pcmcia_socket *skt, - struct pcmcia_state *state) -{ - state->vs_3v = 1; - state->vs_Xv = 0; -} - -static int -vpac270_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, - const socket_state_t *state) -{ - if (skt->nr == 0) { - gpio_set_value(GPIO11_VPAC270_PCMCIA_RESET, - (state->flags & SS_RESET)); - gpio_set_value(GPIO107_VPAC270_PCMCIA_PPEN, - !(state->Vcc == 33 || state->Vcc == 50)); - } else { - gpio_set_value(GPIO16_VPAC270_CF_RESET, - (state->flags & SS_RESET)); - } - - return 0; -} - -static struct pcmcia_low_level vpac270_pcmcia_ops = { - .owner = THIS_MODULE, - - .first = 0, - .nr = 2, - - .hw_init = vpac270_pcmcia_hw_init, - .hw_shutdown = vpac270_pcmcia_hw_shutdown, - - .socket_state = vpac270_pcmcia_socket_state, - .configure_socket = vpac270_pcmcia_configure_socket, -}; - -static struct platform_device *vpac270_pcmcia_device; - -static int __init vpac270_pcmcia_init(void) -{ - int ret; - - if (!machine_is_vpac270()) - return -ENODEV; - - vpac270_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); - if (!vpac270_pcmcia_device) - return -ENOMEM; - - ret = platform_device_add_data(vpac270_pcmcia_device, - &vpac270_pcmcia_ops, sizeof(vpac270_pcmcia_ops)); - - if (!ret) - ret = platform_device_add(vpac270_pcmcia_device); - - if (ret) - platform_device_put(vpac270_pcmcia_device); - - return ret; -} - -static void __exit vpac270_pcmcia_exit(void) -{ - platform_device_unregister(vpac270_pcmcia_device); -} - -module_init(vpac270_pcmcia_init); -module_exit(vpac270_pcmcia_exit); - -MODULE_AUTHOR("Marek Vasut "); -MODULE_DESCRIPTION("PCMCIA support for Voipac PXA270"); -MODULE_ALIAS("platform:pxa2xx-pcmcia"); -MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/soc_common.h b/drivers/pcmcia/soc_common.h index 222e81c79365..17ef05aa8afe 100644 --- a/drivers/pcmcia/soc_common.h +++ b/drivers/pcmcia/soc_common.h @@ -13,137 +13,19 @@ /* include the world */ #include #include -#include #include - +#include struct device; struct gpio_desc; struct pcmcia_low_level; struct regulator; -struct soc_pcmcia_regulator { - struct regulator *reg; - bool on; -}; - -/* - * This structure encapsulates per-socket state which we might need to - * use when responding to a Card Services query of some kind. - */ -struct soc_pcmcia_socket { - struct pcmcia_socket socket; - - /* - * Info from low level handler - */ - unsigned int nr; - struct clk *clk; - - /* - * Core PCMCIA state - */ - const struct pcmcia_low_level *ops; - - unsigned int status; - socket_state_t cs_state; - - unsigned short spd_io[MAX_IO_WIN]; - unsigned short spd_mem[MAX_WIN]; - unsigned short spd_attr[MAX_WIN]; - - struct resource res_skt; - struct resource res_io; - struct resource res_mem; - struct resource res_attr; - void __iomem *virt_io; - - struct { - int gpio; - struct gpio_desc *desc; - unsigned int irq; - const char *name; - } stat[6]; -#define SOC_STAT_CD 0 /* Card detect */ -#define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */ -#define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */ -#define SOC_STAT_RDY 3 /* Ready / Interrupt */ -#define SOC_STAT_VS1 4 /* Voltage sense 1 */ -#define SOC_STAT_VS2 5 /* Voltage sense 2 */ - - struct gpio_desc *gpio_reset; - struct gpio_desc *gpio_bus_enable; - struct soc_pcmcia_regulator vcc; - struct soc_pcmcia_regulator vpp; - - unsigned int irq_state; - -#ifdef CONFIG_CPU_FREQ - struct notifier_block cpufreq_nb; -#endif - struct timer_list poll_timer; - struct list_head node; - void *driver_data; -}; - struct skt_dev_info { int nskt; struct soc_pcmcia_socket skt[]; }; -struct pcmcia_state { - unsigned detect: 1, - ready: 1, - bvd1: 1, - bvd2: 1, - wrprot: 1, - vs_3v: 1, - vs_Xv: 1; -}; - -struct pcmcia_low_level { - struct module *owner; - - /* first socket in system */ - int first; - /* nr of sockets */ - int nr; - - int (*hw_init)(struct soc_pcmcia_socket *); - void (*hw_shutdown)(struct soc_pcmcia_socket *); - - void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); - int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); - - /* - * Enable card status IRQs on (re-)initialisation. This can - * be called at initialisation, power management event, or - * pcmcia event. - */ - void (*socket_init)(struct soc_pcmcia_socket *); - - /* - * Disable card status IRQs and PCMCIA bus on suspend. - */ - void (*socket_suspend)(struct soc_pcmcia_socket *); - - /* - * Hardware specific timing routines. - * If provided, the get_timing routine overrides the SOC default. - */ - unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); - int (*set_timing)(struct soc_pcmcia_socket *); - int (*show_timing)(struct soc_pcmcia_socket *, char *); - -#ifdef CONFIG_CPU_FREQ - /* - * CPUFREQ support. - */ - int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); -#endif -}; - - struct soc_pcmcia_timing { unsigned short io; unsigned short mem; diff --git a/include/linux/platform_data/pcmcia-pxa2xx_viper.h b/include/linux/platform_data/pcmcia-pxa2xx_viper.h deleted file mode 100644 index a23b58aff9e1..000000000000 --- a/include/linux/platform_data/pcmcia-pxa2xx_viper.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ARCOM_PCMCIA_H -#define __ARCOM_PCMCIA_H - -struct arcom_pcmcia_pdata { - int cd_gpio; - int rdy_gpio; - int pwr_gpio; - void (*reset)(int state); -}; - -#endif diff --git a/include/pcmcia/soc_common.h b/include/pcmcia/soc_common.h new file mode 100644 index 000000000000..26f1473a06c5 --- /dev/null +++ b/include/pcmcia/soc_common.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#include + +struct module; +struct cpufreq_freqs; + +struct soc_pcmcia_regulator { + struct regulator *reg; + bool on; +}; + +struct pcmcia_state { + unsigned detect: 1, + ready: 1, + bvd1: 1, + bvd2: 1, + wrprot: 1, + vs_3v: 1, + vs_Xv: 1; +}; + +/* + * This structure encapsulates per-socket state which we might need to + * use when responding to a Card Services query of some kind. + */ +struct soc_pcmcia_socket { + struct pcmcia_socket socket; + + /* + * Info from low level handler + */ + unsigned int nr; + struct clk *clk; + + /* + * Core PCMCIA state + */ + const struct pcmcia_low_level *ops; + + unsigned int status; + socket_state_t cs_state; + + unsigned short spd_io[MAX_IO_WIN]; + unsigned short spd_mem[MAX_WIN]; + unsigned short spd_attr[MAX_WIN]; + + struct resource res_skt; + struct resource res_io; + struct resource res_mem; + struct resource res_attr; + void __iomem *virt_io; + + struct { + int gpio; + struct gpio_desc *desc; + unsigned int irq; + const char *name; + } stat[6]; +#define SOC_STAT_CD 0 /* Card detect */ +#define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */ +#define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */ +#define SOC_STAT_RDY 3 /* Ready / Interrupt */ +#define SOC_STAT_VS1 4 /* Voltage sense 1 */ +#define SOC_STAT_VS2 5 /* Voltage sense 2 */ + + struct gpio_desc *gpio_reset; + struct gpio_desc *gpio_bus_enable; + struct soc_pcmcia_regulator vcc; + struct soc_pcmcia_regulator vpp; + + unsigned int irq_state; + +#ifdef CONFIG_CPU_FREQ + struct notifier_block cpufreq_nb; +#endif + struct timer_list poll_timer; + struct list_head node; + void *driver_data; +}; + + +struct pcmcia_low_level { + struct module *owner; + + /* first socket in system */ + int first; + /* nr of sockets */ + int nr; + + int (*hw_init)(struct soc_pcmcia_socket *); + void (*hw_shutdown)(struct soc_pcmcia_socket *); + + void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); + int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); + + /* + * Enable card status IRQs on (re-)initialisation. This can + * be called at initialisation, power management event, or + * pcmcia event. + */ + void (*socket_init)(struct soc_pcmcia_socket *); + + /* + * Disable card status IRQs and PCMCIA bus on suspend. + */ + void (*socket_suspend)(struct soc_pcmcia_socket *); + + /* + * Hardware specific timing routines. + * If provided, the get_timing routine overrides the SOC default. + */ + unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); + int (*set_timing)(struct soc_pcmcia_socket *); + int (*show_timing)(struct soc_pcmcia_socket *, char *); + +#ifdef CONFIG_CPU_FREQ + /* + * CPUFREQ support. + */ + int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); +#endif +}; + + + -- cgit v1.2.3 From 6a946f1bd5cc966c9dd377b14efa4cec388101ce Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 18 Sep 2019 14:50:37 +0200 Subject: ARM: pxa: pcmcia: move smemc configuration back to arch Rather than poking at the smemc registers directly from the pcmcia/pxa2xx_base driver, move those bits into machine file to have a cleaner interface. Cc: Dominik Brodowski Link: https://lore.kernel.org/lkml/87d0egjzxk.fsf@belgarion.home/ Signed-off-by: Arnd Bergmann --- arch/arm/mach-pxa/generic.c | 29 +++++++++++++++++++++++++++ drivers/pcmcia/pxa2xx_base.c | 46 +++++++++++++++---------------------------- include/linux/soc/pxa/smemc.h | 10 ++++++++++ 3 files changed, 55 insertions(+), 30 deletions(-) create mode 100644 include/linux/soc/pxa/smemc.h (limited to 'drivers/pcmcia') diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index f9083c4f0aea..fe1d55d328e5 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -70,6 +70,35 @@ unsigned int get_clk_frequency_khz(int info) } EXPORT_SYMBOL(get_clk_frequency_khz); +void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio) +{ + __raw_writel(mcmem, MCMEM(sock)); + __raw_writel(mcatt, MCATT(sock)); + __raw_writel(mcio, MCIO(sock)); +} +EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_timing); + +void pxa_smemc_set_pcmcia_socket(int nr) +{ + switch (nr) { + case 0: + __raw_writel(0, MECR); + break; + case 1: + /* + * We have at least one socket, so set MECR:CIT + * (Card Is There) + */ + __raw_writel(MECR_CIT, MECR); + break; + case 2: + /* Set CIT and MECR:NOS (Number Of Sockets) */ + __raw_writel(MECR_CIT | MECR_NOS, MECR); + break; + } +} +EXPORT_SYMBOL_GPL(pxa_smemc_set_pcmcia_socket); + /* * Intel PXA2xx internal register mapping. * diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index 7cd1375d6087..0ea41f1411e5 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -24,11 +24,10 @@ #include #include #include +#include -#include #include #include -#include #include #include @@ -113,7 +112,7 @@ static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz); } -static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) +static uint32_t pxa2xx_pcmcia_mcmem(int sock, int speed, int clock) { uint32_t val; @@ -124,12 +123,10 @@ static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCMEM(sock)); - - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) +static int pxa2xx_pcmcia_mcio(int sock, int speed, int clock) { uint32_t val; @@ -140,12 +137,11 @@ static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCIO(sock)); - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) +static int pxa2xx_pcmcia_mcatt(int sock, int speed, int clock) { uint32_t val; @@ -156,31 +152,26 @@ static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); - __raw_writel(val, MCATT(sock)); - return 0; + return val; } -static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) +static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) { + unsigned long clk = clk_get_rate(skt->clk) / 10000; struct soc_pcmcia_timing timing; int sock = skt->nr; soc_common_pcmcia_get_timing(skt, &timing); - pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); - pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); - pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); + pxa_smemc_set_pcmcia_timing(sock, + pxa2xx_pcmcia_mcmem(sock, timing.mem, clk), + pxa2xx_pcmcia_mcatt(sock, timing.attr, clk), + pxa2xx_pcmcia_mcio(sock, timing.io, clk)); return 0; } -static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) -{ - unsigned long clk = clk_get_rate(skt->clk); - return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000); -} - #ifdef CONFIG_CPU_FREQ static int @@ -215,18 +206,13 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, void pxa2xx_configure_sockets(struct device *dev, struct pcmcia_low_level *ops) { - /* - * We have at least one socket, so set MECR:CIT - * (Card Is There) - */ - uint32_t mecr = MECR_CIT; + int nr = 1; - /* Set MECR:NOS (Number Of Sockets) */ if ((ops->first + ops->nr) > 1 || machine_is_viper() || machine_is_arcom_zeus()) - mecr |= MECR_NOS; + nr = 2; - __raw_writel(mecr, MECR); + pxa_smemc_set_pcmcia_socket(nr); } EXPORT_SYMBOL(pxa2xx_configure_sockets); diff --git a/include/linux/soc/pxa/smemc.h b/include/linux/soc/pxa/smemc.h new file mode 100644 index 000000000000..cbf1a2d8af29 --- /dev/null +++ b/include/linux/soc/pxa/smemc.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __PXA_REGS_H +#define __PXA_REGS_H + +#include + +void pxa_smemc_set_pcmcia_timing(int sock, u32 mcmem, u32 mcatt, u32 mcio); +void pxa_smemc_set_pcmcia_socket(int nr); + +#endif -- cgit v1.2.3 From 645b302673bb74930b5f38f1d5b7e7532f164595 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sun, 24 Apr 2022 14:36:35 +0200 Subject: ARM: pxa/sa1100: move I/O space to PCI_IOBASE PXA and StrongARM1100 traditionally map their I/O space 1:1 into virtual memory, using a per-bus io_offset that matches the base address of the ioremap mapping. In order for PXA to work in a multiplatform config, this needs to change so I/O space starts at PCI_IOBASE (0xfee00000). Since the pcmcia soc_common support is shared with StrongARM1100, both have to change at the same time. The affected machines are: - Anything with a PCMCIA slot now uses pci_remap_iospace, which is made available to PCMCIA configurations as well, rather than just PCI. The first PCMCIA slot now starts at port number 0x10000. - The Zeus and Viper platforms have PC/104-style ISA buses, which have a static mapping for both I/O and memory space at 0xf1000000, which can no longer work. It does not appear to have any in-tree users, so moving it to port number 0 makes them behave like a traditional PC. - SA1100 does support ISA slots in theory, but all machines that originally enabled this appear to have been removed from the tree ages ago, and the I/O space is never mapped anywhere. - The Nanoengine machine has support for PCI slots, but looks like this never included I/O space, the resources only define the location for memory and config space. With this, the definitions of __io() and IO_SPACE_LIMIT can be simplified, as the only remaining cases are the generic PCI_IOBASE and the custom inb()/outb() macros on RiscPC. S3C24xx still has a custom inb()/outb() in this here, but this is already removed in another branch. Signed-off-by: Arnd Bergmann --- arch/arm/include/asm/io.h | 27 ++++----------------------- arch/arm/mach-pxa/viper.c | 12 ++++++++++++ arch/arm/mach-pxa/zeus.c | 12 ++++++++++++ arch/arm/mm/ioremap.c | 2 +- drivers/pcmcia/soc_common.c | 17 +++++++++-------- include/pcmcia/soc_common.h | 2 +- 6 files changed, 39 insertions(+), 33 deletions(-) (limited to 'drivers/pcmcia') diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 0c70eb688a00..f36ca0da8427 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -174,7 +174,7 @@ static inline void __iomem *__typesafe_io(unsigned long addr) #define PCI_IO_VIRT_BASE 0xfee00000 #define PCI_IOBASE ((void __iomem *)PCI_IO_VIRT_BASE) -#if defined(CONFIG_PCI) +#if defined(CONFIG_PCI) || IS_ENABLED(CONFIG_PCMCIA) void pci_ioremap_set_mem_type(int mem_type); #else static inline void pci_ioremap_set_mem_type(int mem_type) {} @@ -200,32 +200,13 @@ void __iomem *pci_remap_cfgspace(resource_size_t res_cookie, size_t size); */ #ifdef CONFIG_NEED_MACH_IO_H #include -#elif defined(CONFIG_PCI) -#define IO_SPACE_LIMIT ((resource_size_t)0xfffff) -#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT)) #else -#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT) -#endif - -/* - * This is the limit of PC card/PCI/ISA IO space, which is by default - * 64K if we have PC card, PCI or ISA support. Otherwise, default to - * zero to prevent ISA/PCI drivers claiming IO space (and potentially - * oopsing.) - * - * Only set this larger if you really need inb() et.al. to operate over - * a larger address space. Note that SOC_COMMON ioremaps each sockets - * IO space area, and so inb() et.al. must be defined to operate as per - * readb() et.al. on such platforms. - */ -#ifndef IO_SPACE_LIMIT -#if defined(CONFIG_PCMCIA_SOC_COMMON) || defined(CONFIG_PCMCIA_SOC_COMMON_MODULE) -#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff) -#elif defined(CONFIG_PCI) || defined(CONFIG_ISA) || defined(CONFIG_PCCARD) -#define IO_SPACE_LIMIT ((resource_size_t)0xffff) +#if IS_ENABLED(CONFIG_PCMCIA) || defined(CONFIG_PCI) +#define IO_SPACE_LIMIT ((resource_size_t)0xfffff) #else #define IO_SPACE_LIMIT ((resource_size_t)0) #endif +#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT)) #endif /* diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c index 0782f0ed5a6e..5b43351ee840 100644 --- a/arch/arm/mach-pxa/viper.c +++ b/arch/arm/mach-pxa/viper.c @@ -998,6 +998,18 @@ static struct map_desc viper_io_desc[] __initdata = { .length = 0x00800000, .type = MT_DEVICE, }, + { + /* + * ISA I/O space mapping: + * - ports 0x0000-0x0fff are PC/104 + * - ports 0x10000-0x10fff are PCMCIA slot 1 + * - ports 0x11000-0x11fff are PC/104 + */ + .virtual = PCI_IO_VIRT_BASE, + .pfn = __phys_to_pfn(0x30000000), + .length = 0x1000, + .type = MT_DEVICE, + }, }; static void __init viper_map_io(void) diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c index 1fdef9426784..ff0d8bb9f557 100644 --- a/arch/arm/mach-pxa/zeus.c +++ b/arch/arm/mach-pxa/zeus.c @@ -929,6 +929,18 @@ static struct map_desc zeus_io_desc[] __initdata = { .length = 0x00800000, .type = MT_DEVICE, }, + { + /* + * ISA I/O space mapping: + * - ports 0x0000-0x0fff are PC/104 + * - ports 0x10000-0x10fff are PCMCIA slot 1 + * - ports 0x11000-0x11fff are PC/104 + */ + .virtual = PCI_IO_VIRT_BASE, + .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS), + .length = 0x1000, + .type = MT_DEVICE, + }, }; static void __init zeus_map_io(void) diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index aa08bcb72db9..aec5347db265 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -455,7 +455,7 @@ void iounmap(volatile void __iomem *cookie) } EXPORT_SYMBOL(iounmap); -#ifdef CONFIG_PCI +#if defined(CONFIG_PCI) || IS_ENABLED(CONFIG_PCMCIA) static int pci_ioremap_mem_type = MT_DEVICE; void pci_ioremap_set_mem_type(int mem_type) diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c index 9276a628473d..61b0c8952bb5 100644 --- a/drivers/pcmcia/soc_common.c +++ b/drivers/pcmcia/soc_common.c @@ -46,6 +46,7 @@ #include #include #include +#include #include "soc_common.h" @@ -782,8 +783,7 @@ void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt) /* should not be required; violates some lowlevel drivers */ soc_common_pcmcia_config_skt(skt, &dead_socket); - iounmap(skt->virt_io); - skt->virt_io = NULL; + iounmap(PCI_IOBASE + skt->res_io_io.start); release_resource(&skt->res_attr); release_resource(&skt->res_mem); release_resource(&skt->res_io); @@ -816,11 +816,12 @@ int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt) if (ret) goto out_err_4; - skt->virt_io = ioremap(skt->res_io.start, 0x10000); - if (skt->virt_io == NULL) { - ret = -ENOMEM; + skt->res_io_io = (struct resource) + DEFINE_RES_IO_NAMED(skt->nr * 0x1000 + 0x10000, 0x1000, + "PCMCIA I/O"); + ret = pci_remap_iospace(&skt->res_io_io, skt->res_io.start); + if (ret) goto out_err_5; - } /* * We initialize default socket timing here, because @@ -838,7 +839,7 @@ int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt) skt->socket.resource_ops = &pccard_static_ops; skt->socket.irq_mask = 0; skt->socket.map_size = PAGE_SIZE; - skt->socket.io_offset = (unsigned long)skt->virt_io; + skt->socket.io_offset = (unsigned long)skt->res_io_io.start; skt->status = soc_common_pcmcia_skt_state(skt); @@ -872,7 +873,7 @@ int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt) out_err_7: soc_pcmcia_hw_shutdown(skt); out_err_6: - iounmap(skt->virt_io); + iounmap(PCI_IOBASE + skt->res_io_io.start); out_err_5: release_resource(&skt->res_attr); out_err_4: diff --git a/include/pcmcia/soc_common.h b/include/pcmcia/soc_common.h index 26f1473a06c5..d4f18f4679df 100644 --- a/include/pcmcia/soc_common.h +++ b/include/pcmcia/soc_common.h @@ -46,9 +46,9 @@ struct soc_pcmcia_socket { struct resource res_skt; struct resource res_io; + struct resource res_io_io; struct resource res_mem; struct resource res_attr; - void __iomem *virt_io; struct { int gpio; -- cgit v1.2.3