From 2fae5e3670a666039e6f2fd63e1a5d320c71b913 Mon Sep 17 00:00:00 2001 From: Michael Chan Date: Sun, 4 Mar 2012 14:48:15 +0000 Subject: tg3: Fix poor tx performance on 57766 after MTU change GRC reset causes the read DMA engine to go into a mode that breaks up requests into 256 bytes. A PHY reset is required to bring it back to the normal mode. Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/ethernet/broadcom/tg3.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 0da93dbbd0c8..a8490a473a1c 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c @@ -12267,7 +12267,7 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, static int tg3_change_mtu(struct net_device *dev, int new_mtu) { struct tg3 *tp = netdev_priv(dev); - int err; + int err, reset_phy = 0; if (new_mtu < TG3_MIN_MTU || new_mtu > TG3_MAX_MTU(tp)) return -EINVAL; @@ -12290,7 +12290,13 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu) tg3_set_mtu(dev, tp, new_mtu); - err = tg3_restart_hw(tp, 0); + /* Reset PHY, otherwise the read DMA engine will be in a mode that + * breaks all requests to 256 bytes. + */ + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766) + reset_phy = 1; + + err = tg3_restart_hw(tp, reset_phy); if (!err) tg3_netif_start(tp); -- cgit v1.2.3