From 656cd75c387383fe3a63e21204107abf5515ecfc Mon Sep 17 00:00:00 2001 From: Sujith Manoharan Date: Mon, 9 Mar 2015 14:20:08 +0530 Subject: ath9k: Initialize pll_pwrsave for AR9462/AR9565 Cards based on AR9462/AR9565 support more PCIE power save mechanisms, so register them correctly. Signed-off-by: Sujith Manoharan Signed-off-by: Kalle Valo --- drivers/net/wireless/ath/ath9k/init.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/net/wireless/ath/ath9k/init.c') diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index ca66fab78fba..de862ad13b51 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c @@ -440,6 +440,7 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc) /* * The default value of pll_pwrsave is 1. * For certain AR9485 cards, it is set to 0. + * For AR9462, AR9565 it's set to 7. */ ah->config.pll_pwrsave = 1; -- cgit v1.2.3