From c47dda7d179dde17697c3f839f150fecaf6770cb Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 22 Dec 2010 21:04:11 +0900 Subject: pch_phub: add new device ML7213 Add ML7213 device information. ML7213 is companion chip of Intel Atom E6xx series for IVI(In-Vehicle Infotainment). ML7213 is completely compatible for Intel EG20T PCH. Signed-off-by: Tomoya MORINAGA Signed-off-by: Greg Kroah-Hartman --- drivers/misc/pch_phub.c | 69 +++++++++++++++++++++++++++++++++---------------- 1 file changed, 47 insertions(+), 22 deletions(-) (limited to 'drivers/misc/pch_phub.c') diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 744b804aca15..98bffc471b17 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. + * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,7 +33,12 @@ #define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ #define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ #define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ -#define PCH_PHUB_ROM_START_ADDR 0x14 /* ROM data area start address offset */ +#define PCH_PHUB_MAC_START_ADDR 0x20C /* MAC data area start address offset */ +#define PCH_PHUB_ROM_START_ADDR_EG20T 0x14 /* ROM data area start address offset + (Intel EG20T PCH)*/ +#define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address + offset(OKI SEMICONDUCTOR ML7213) + */ /* MAX number of INT_REDUCE_CONTROL registers */ #define MAX_NUM_INT_REDUCE_CONTROL_REG 128 @@ -42,6 +47,10 @@ #define CLKCFG_CAN_50MHZ 0x12000000 #define CLKCFG_CANCLK_MASK 0xFF000000 +/* Macros for ML7213 */ +#define PCI_VENDOR_ID_ROHM 0x10db +#define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A + /* SROM ACCESS Macro */ #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) @@ -298,7 +307,7 @@ static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip, { unsigned int mem_addr; - mem_addr = PCH_PHUB_ROM_START_ADDR + + mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + pch_phub_mac_offset[offset_address]; pch_phub_read_serial_rom(chip, mem_addr, data); @@ -315,7 +324,7 @@ static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip, int retval; unsigned int mem_addr; - mem_addr = PCH_PHUB_ROM_START_ADDR + + mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + pch_phub_mac_offset[offset_address]; retval = pch_phub_write_serial_rom(chip, mem_addr, data); @@ -594,23 +603,38 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev, "pch_phub_extrom_base_address variable is %p\n", __func__, chip->pch_phub_extrom_base_address); - pci_set_drvdata(pdev, chip); - - retval = sysfs_create_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); - if (retval) - goto err_sysfs_create; - - retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); - if (retval) - goto exit_bin_attr; - - pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET, - CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK); + if (id->driver_data == 1) { + retval = sysfs_create_file(&pdev->dev.kobj, + &dev_attr_pch_mac.attr); + if (retval) + goto err_sysfs_create; - /* set the prefech value */ - iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); - /* set the interrupt delay value */ - iowrite32(0x25, chip->pch_phub_base_address + 0x44); + retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); + if (retval) + goto exit_bin_attr; + + pch_phub_read_modify_write_reg(chip, + (unsigned int)CLKCFG_REG_OFFSET, + CLKCFG_CAN_50MHZ, + CLKCFG_CANCLK_MASK); + + /* set the prefech value */ + iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); + /* set the interrupt delay value */ + iowrite32(0x25, chip->pch_phub_base_address + 0x44); + } else if (id->driver_data == 2) { + retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); + if (retval) + goto err_sysfs_create; + /* set the prefech value + * Device2(USB OHCI #1/ USB EHCI #1/ USB Device):a + * Device4(SDIO #0,1,2):f + * Device6(SATA 2):f + * Device8(USB OHCI #0/ USB EHCI #0):a + */ + iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); + } + pci_set_drvdata(pdev, chip); return 0; exit_bin_attr: @@ -687,8 +711,9 @@ static int pch_phub_resume(struct pci_dev *pdev) #endif /* CONFIG_PM */ static struct pci_device_id pch_phub_pcidev_id[] = { - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH1_PHUB)}, - {0,} + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH1_PHUB), 1, }, + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, + { } }; static struct pci_driver pch_phub_driver = { -- cgit v1.2.3 From 1a738dcf6dac74a0ce10853a068d822f66f73268 Mon Sep 17 00:00:00 2001 From: Tomoya MORINAGA Date: Wed, 22 Dec 2010 21:04:11 +0900 Subject: pch_phub: add new device ML7213 Add ML7213 device information. ML7213 is companion chip of Intel Atom E6xx series for IVI(In-Vehicle Infotainment). ML7213 is completely compatible for Intel EG20T PCH. Signed-off-by: Tomoya MORINAGA Signed-off-by: Greg Kroah-Hartman --- drivers/misc/Kconfig | 7 ++++- drivers/misc/pch_phub.c | 69 +++++++++++++++++++++++++++++++++---------------- 2 files changed, 53 insertions(+), 23 deletions(-) (limited to 'drivers/misc/pch_phub.c') diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index cc8e49db45fe..b7d5ef234ac9 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -441,7 +441,7 @@ config BMP085 module will be called bmp085. config PCH_PHUB - tristate "PCH Packet Hub of Intel Topcliff" + tristate "PCH Packet Hub of Intel Topcliff / OKI SEMICONDUCTOR ML7213" depends on PCI help This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of @@ -449,6 +449,11 @@ config PCH_PHUB processor. The Topcliff has MAC address and Option ROM data in SROM. This driver can access MAC address and Option ROM data in SROM. + This driver also can be used for OKI SEMICONDUCTOR's ML7213 which is + for IVI(In-Vehicle Infotainment) use. + ML7213 is companion chip for Intel Atom E6xx series. + ML7213 is completely compatible for Intel EG20T PCH. + To compile this driver as a module, choose M here: the module will be called pch_phub. diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 744b804aca15..98bffc471b17 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. + * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,7 +33,12 @@ #define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ #define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ #define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ -#define PCH_PHUB_ROM_START_ADDR 0x14 /* ROM data area start address offset */ +#define PCH_PHUB_MAC_START_ADDR 0x20C /* MAC data area start address offset */ +#define PCH_PHUB_ROM_START_ADDR_EG20T 0x14 /* ROM data area start address offset + (Intel EG20T PCH)*/ +#define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address + offset(OKI SEMICONDUCTOR ML7213) + */ /* MAX number of INT_REDUCE_CONTROL registers */ #define MAX_NUM_INT_REDUCE_CONTROL_REG 128 @@ -42,6 +47,10 @@ #define CLKCFG_CAN_50MHZ 0x12000000 #define CLKCFG_CANCLK_MASK 0xFF000000 +/* Macros for ML7213 */ +#define PCI_VENDOR_ID_ROHM 0x10db +#define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A + /* SROM ACCESS Macro */ #define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) @@ -298,7 +307,7 @@ static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip, { unsigned int mem_addr; - mem_addr = PCH_PHUB_ROM_START_ADDR + + mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + pch_phub_mac_offset[offset_address]; pch_phub_read_serial_rom(chip, mem_addr, data); @@ -315,7 +324,7 @@ static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip, int retval; unsigned int mem_addr; - mem_addr = PCH_PHUB_ROM_START_ADDR + + mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + pch_phub_mac_offset[offset_address]; retval = pch_phub_write_serial_rom(chip, mem_addr, data); @@ -594,23 +603,38 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev, "pch_phub_extrom_base_address variable is %p\n", __func__, chip->pch_phub_extrom_base_address); - pci_set_drvdata(pdev, chip); - - retval = sysfs_create_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr); - if (retval) - goto err_sysfs_create; - - retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); - if (retval) - goto exit_bin_attr; - - pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET, - CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK); + if (id->driver_data == 1) { + retval = sysfs_create_file(&pdev->dev.kobj, + &dev_attr_pch_mac.attr); + if (retval) + goto err_sysfs_create; - /* set the prefech value */ - iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); - /* set the interrupt delay value */ - iowrite32(0x25, chip->pch_phub_base_address + 0x44); + retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); + if (retval) + goto exit_bin_attr; + + pch_phub_read_modify_write_reg(chip, + (unsigned int)CLKCFG_REG_OFFSET, + CLKCFG_CAN_50MHZ, + CLKCFG_CANCLK_MASK); + + /* set the prefech value */ + iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); + /* set the interrupt delay value */ + iowrite32(0x25, chip->pch_phub_base_address + 0x44); + } else if (id->driver_data == 2) { + retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); + if (retval) + goto err_sysfs_create; + /* set the prefech value + * Device2(USB OHCI #1/ USB EHCI #1/ USB Device):a + * Device4(SDIO #0,1,2):f + * Device6(SATA 2):f + * Device8(USB OHCI #0/ USB EHCI #0):a + */ + iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); + } + pci_set_drvdata(pdev, chip); return 0; exit_bin_attr: @@ -687,8 +711,9 @@ static int pch_phub_resume(struct pci_dev *pdev) #endif /* CONFIG_PM */ static struct pci_device_id pch_phub_pcidev_id[] = { - {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH1_PHUB)}, - {0,} + { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH1_PHUB), 1, }, + { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, + { } }; static struct pci_driver pch_phub_driver = { -- cgit v1.2.3 From 6ae705b23be8da52d3163be9d81e9b767876aaf9 Mon Sep 17 00:00:00 2001 From: Denis Turischev Date: Thu, 10 Mar 2011 15:14:00 +0200 Subject: pch_uart: reference clock on CM-iTC Default clock source for UARTs on Topcliff is external UART_CLK. On CM-iTC USB_48MHz is used instead. After VCO2PLL and DIV manipulations UARTs will receive 192 MHz. Clock manipulations on Topcliff are controlled in pch_phub.c v2: redone against the linux-next tree v3: redone against linux/kernel/git/next/linux-next.git snapshot Signed-off-by: Denis Turischev Signed-off-by: Greg Kroah-Hartman --- drivers/misc/pch_phub.c | 16 ++++++++++++++++ drivers/tty/serial/pch_uart.c | 9 +++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) (limited to 'drivers/misc/pch_phub.c') diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 98bffc471b17..5dd0b921bfc6 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c @@ -27,6 +27,7 @@ #include #include #include +#include #define PHUB_STATUS 0x00 /* Status Register offset */ #define PHUB_CONTROL 0x04 /* Control Register offset */ @@ -46,6 +47,13 @@ #define PCH_MINOR_NOS 1 #define CLKCFG_CAN_50MHZ 0x12000000 #define CLKCFG_CANCLK_MASK 0xFF000000 +#define CLKCFG_UART_MASK 0xFFFFFF + +/* CM-iTC */ +#define CLKCFG_UART_48MHZ (1 << 16) +#define CLKCFG_BAUDDIV (2 << 20) +#define CLKCFG_PLL2VCO (8 << 9) +#define CLKCFG_UARTCLKSEL (1 << 18) /* Macros for ML7213 */ #define PCI_VENDOR_ID_ROHM 0x10db @@ -618,6 +626,14 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev, CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK); + /* quirk for CM-iTC board */ + if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC")) + pch_phub_read_modify_write_reg(chip, + (unsigned int)CLKCFG_REG_OFFSET, + CLKCFG_UART_48MHZ | CLKCFG_BAUDDIV | + CLKCFG_PLL2VCO | CLKCFG_UARTCLKSEL, + CLKCFG_UART_MASK); + /* set the prefech value */ iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); /* set the interrupt delay value */ diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c index a5ce9a5c018d..a9ad7f33526d 100644 --- a/drivers/tty/serial/pch_uart.c +++ b/drivers/tty/serial/pch_uart.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -1404,14 +1405,18 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, if (!rxbuf) goto init_port_free_txbuf; + base_baud = 1843200; /* 1.8432MHz */ + + /* quirk for CM-iTC board */ + if (strstr(dmi_get_system_info(DMI_BOARD_NAME), "CM-iTC")) + base_baud = 192000000; /* 192.0MHz */ + switch (port_type) { case PORT_UNKNOWN: fifosize = 256; /* EG20T/ML7213: UART0 */ - base_baud = 1843200; /* 1.8432MHz */ break; case PORT_8250: fifosize = 64; /* EG20T:UART1~3 ML7213: UART1~2*/ - base_baud = 1843200; /* 1.8432MHz */ break; default: dev_err(&pdev->dev, "Invalid Port Type(=%d)\n", port_type); -- cgit v1.2.3 From b259514282d54323aaadead3dac4823ea01f9b89 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 22 Mar 2011 16:34:02 -0700 Subject: drivers/misc/pch_phub.c: add MODULE_DEVICE_TABLE The device table is required to load modules based on modaliases. Signed-off-by: Axel Lin Cc: Masayuki Ohtak Cc: Greg Kroah-Hartman Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/misc/pch_phub.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/misc/pch_phub.c') diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c index 380ba806495d..a19cb710a246 100644 --- a/drivers/misc/pch_phub.c +++ b/drivers/misc/pch_phub.c @@ -735,6 +735,7 @@ static struct pci_device_id pch_phub_pcidev_id[] = { { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, { } }; +MODULE_DEVICE_TABLE(pci, pch_phub_pcidev_id); static struct pci_driver pch_phub_driver = { .name = "pch_phub", -- cgit v1.2.3