From 40592a17b8747903be95338f461573916a71d739 Mon Sep 17 00:00:00 2001 From: Ilija Hadzic Date: Wed, 2 Jan 2013 18:27:43 -0500 Subject: drm/radeon: refactor vline packet parsing function MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit vline packet parsing function for R600 and Evergreen+ are the same, except that they use different registers. Factor out the algorithm into a common function that uses register table passed from ASIC-specific caller. This reduces ASIC-specific function to (trivial) setup of register table and call into the common function. Signed-off-by: Ilija Hadzic Reviewed-by: Marek Olšák Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/radeon_reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/radeon/radeon_reg.h') diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index ce7e9f29cc89..7e2c2b7cf188 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h @@ -3719,4 +3719,6 @@ #define RADEON_PACKET3_NOP 0x10 +#define RADEON_VLINE_STAT (1 << 12) + #endif -- cgit v1.2.3