From 49f81d80ab8496c400dee63b31530723a390911f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 12 Jan 2018 08:48:54 +0100 Subject: drm/pl111: Support handling bridge timings If the bridge has a too strict setup time for the incoming signals, we may not be fast enough and then we need to compensate by outputting the signal on the inverse clock edge so it is for sure stable when the bridge samples it. Since bridges in difference to panels does not expose their connectors, make the connector optional in the display setup code. Acked-by: Laurent Pinchart Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Signed-off-by: Archit Taneja Link: https://patchwork.freedesktop.org/patch/msgid/20180112074854.9560-4-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_drv.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index acb738c69873..19e1725c3ef6 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -108,11 +108,17 @@ static int pl111_modeset_init(struct drm_device *dev) ret = PTR_ERR(bridge); goto out_config; } - /* - * TODO: when we are using a different bridge than a panel - * (such as a dumb VGA connector) we need to devise a different - * method to get the connector out of the bridge. - */ + } else if (bridge) { + dev_info(dev->dev, "Using non-panel bridge\n"); + } else { + dev_err(dev->dev, "No bridge, exiting\n"); + return -ENODEV; + } + + priv->bridge = bridge; + if (panel) { + priv->panel = panel; + priv->connector = panel->connector; } ret = pl111_display_init(dev); @@ -126,10 +132,6 @@ static int pl111_modeset_init(struct drm_device *dev) if (ret) return ret; - priv->bridge = bridge; - priv->panel = panel; - priv->connector = panel->connector; - ret = drm_vblank_init(dev, 1); if (ret != 0) { dev_err(dev->dev, "Failed to init vblank\n"); -- cgit v1.2.3 From 3d95f76a11afdcbc9aa6d09a9eaac70e057e7be3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 6 Feb 2018 10:35:36 +0100 Subject: drm/pl111: Properly detect the ARM PL110 variants With a bit of refactoring we can contain the variant data for the strange PL110 versions that is feature-incomplete PL110 for the ARM Integrator/CP and somewhere inbetween PL110 and PL111 for the ARM Versatile AB and Versatile PB. We also accomodate for the custom duct-taped RGB565/BGR565 support in the Versatile variant. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-1-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_drm.h | 3 ++ drivers/gpu/drm/pl111/pl111_drv.c | 37 ++++----------- drivers/gpu/drm/pl111/pl111_versatile.c | 84 +++++++++++++++++++++++++-------- 3 files changed, 78 insertions(+), 46 deletions(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 07fa2cdb364a..bc04b54014a7 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -36,12 +36,15 @@ struct drm_minor; * struct pl111_variant_data - encodes IP differences * @name: the name of this variant * @is_pl110: this is the early PL110 variant + * @external_bgr: this is the Versatile Pl110 variant with external + * BGR/RGB routing * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats */ struct pl111_variant_data { const char *name; bool is_pl110; + bool external_bgr; const u32 *formats; unsigned int nformats; }; diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 19e1725c3ef6..ad8dfead2d00 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -193,7 +193,7 @@ static int pl111_amba_probe(struct amba_device *amba_dev, { struct device *dev = &amba_dev->dev; struct pl111_drm_dev_private *priv; - struct pl111_variant_data *variant = id->data; + const struct pl111_variant_data *variant = id->data; struct drm_device *drm; int ret; @@ -209,27 +209,10 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; - /* - * The PL110 and PL111 variants have two registers - * swapped: interrupt enable and control. For this reason - * we use offsets that we can change per variant. - */ + /* The two variants swap this register */ if (variant->is_pl110) { - /* - * The ARM Versatile boards are even more special: - * their PrimeCell ID say they are PL110 but the - * control and interrupt enable registers are anyway - * swapped to the PL111 order so they are not following - * the PL110 datasheet. - */ - if (of_machine_is_compatible("arm,versatile-ab") || - of_machine_is_compatible("arm,versatile-pb")) { - priv->ienb = CLCD_PL111_IENB; - priv->ctrl = CLCD_PL111_CNTL; - } else { - priv->ienb = CLCD_PL110_IENB; - priv->ctrl = CLCD_PL110_CNTL; - } + priv->ienb = CLCD_PL110_IENB; + priv->ctrl = CLCD_PL110_CNTL; } else { priv->ienb = CLCD_PL111_IENB; priv->ctrl = CLCD_PL111_CNTL; @@ -241,6 +224,11 @@ static int pl111_amba_probe(struct amba_device *amba_dev, return PTR_ERR(priv->regs); } + /* This may override some variant settings */ + ret = pl111_versatile_init(dev, priv); + if (ret) + goto dev_unref; + /* turn off interrupts before requesting the irq */ writel(0, priv->regs + priv->ienb); @@ -251,10 +239,6 @@ static int pl111_amba_probe(struct amba_device *amba_dev, return ret; } - ret = pl111_versatile_init(dev, priv); - if (ret) - goto dev_unref; - ret = pl111_modeset_init(drm); if (ret != 0) goto dev_unref; @@ -286,8 +270,7 @@ static int pl111_amba_remove(struct amba_device *amba_dev) } /* - * This variant exist in early versions like the ARM Integrator - * and this version lacks the 565 and 444 pixel formats. + * This early variant lacks the 565 and 444 pixel formats. */ static const u32 pl110_pixel_formats[] = { DRM_FORMAT_ABGR8888, diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 97d4af6925a3..1fe825139d9b 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -1,3 +1,4 @@ +#include #include #include #include @@ -64,10 +65,8 @@ static const struct of_device_id versatile_clcd_of_match[] = { #define INTEGRATOR_CLCD_LCDBIASEN BIT(8) #define INTEGRATOR_CLCD_LCDBIASUP BIT(9) #define INTEGRATOR_CLCD_LCDBIASDN BIT(10) -/* Bits 11,12,13 controls the LCD type */ -#define INTEGRATOR_CLCD_LCDMUX_MASK (BIT(11)|BIT(12)|BIT(13)) +/* Bits 11,12,13 controls the LCD or VGA bridge type */ #define INTEGRATOR_CLCD_LCDMUX_LCD24 BIT(11) -#define INTEGRATOR_CLCD_LCDMUX_VGA565 BIT(12) #define INTEGRATOR_CLCD_LCDMUX_SHARP (BIT(11)|BIT(12)) #define INTEGRATOR_CLCD_LCDMUX_VGA555 BIT(13) #define INTEGRATOR_CLCD_LCDMUX_VGA24 (BIT(11)|BIT(12)|BIT(13)) @@ -82,16 +81,7 @@ static const struct of_device_id versatile_clcd_of_match[] = { /* 0 = 24bit VGA, 1 = 18bit VGA */ #define INTEGRATOR_CLCD_LCD_N24BITEN BIT(19) -#define INTEGRATOR_CLCD_MASK (INTEGRATOR_CLCD_LCDBIASEN | \ - INTEGRATOR_CLCD_LCDBIASUP | \ - INTEGRATOR_CLCD_LCDBIASDN | \ - INTEGRATOR_CLCD_LCDMUX_MASK | \ - INTEGRATOR_CLCD_LCD0_EN | \ - INTEGRATOR_CLCD_LCD1_EN | \ - INTEGRATOR_CLCD_LCD_STATIC1 | \ - INTEGRATOR_CLCD_LCD_STATIC2 | \ - INTEGRATOR_CLCD_LCD_STATIC | \ - INTEGRATOR_CLCD_LCD_N24BITEN) +#define INTEGRATOR_CLCD_MASK GENMASK(19, 8) static void pl111_integrator_enable(struct drm_device *drm, u32 format) { @@ -106,11 +96,8 @@ static void pl111_integrator_enable(struct drm_device *drm, u32 format) switch (format) { case DRM_FORMAT_XBGR8888: case DRM_FORMAT_XRGB8888: - break; - case DRM_FORMAT_BGR565: - case DRM_FORMAT_RGB565: - /* truecolor RGB565 */ - val |= INTEGRATOR_CLCD_LCDMUX_VGA565; + /* 24bit formats */ + val |= INTEGRATOR_CLCD_LCDMUX_VGA24; break; case DRM_FORMAT_XBGR1555: case DRM_FORMAT_XRGB1555: @@ -217,6 +204,55 @@ static void pl111_realview_clcd_enable(struct drm_device *drm, u32 format) SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH); } +/* PL110 pixel formats for Integrator, vanilla PL110 */ +static const u32 pl110_integrator_pixel_formats[] = { + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, +}; + +/* Extended PL110 pixel formats for Integrator and Versatile */ +static const u32 pl110_versatile_pixel_formats[] = { + DRM_FORMAT_ABGR8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, + DRM_FORMAT_BGR565, /* Uses external PLD */ + DRM_FORMAT_RGB565, /* Uses external PLD */ + DRM_FORMAT_ABGR1555, + DRM_FORMAT_XBGR1555, + DRM_FORMAT_ARGB1555, + DRM_FORMAT_XRGB1555, +}; + +/* + * The Integrator variant is a PL110 with a bunch of broken, or not + * yet implemented features + */ +static const struct pl111_variant_data pl110_integrator = { + .name = "PL110 Integrator", + .is_pl110 = true, + .formats = pl110_integrator_pixel_formats, + .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats), +}; + +/* + * This is the in-between PL110 variant found in the ARM Versatile, + * supporting RGB565/BGR565 + */ +static const struct pl111_variant_data pl110_versatile = { + .name = "PL110 Versatile", + .is_pl110 = true, + .external_bgr = true, + .formats = pl110_versatile_pixel_formats, + .nformats = ARRAY_SIZE(pl110_versatile_pixel_formats), +}; + int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) { const struct of_device_id *clcd_id; @@ -241,14 +277,24 @@ int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) switch (versatile_clcd_type) { case INTEGRATOR_CLCD_CM: versatile_syscon_map = map; + priv->variant = &pl110_integrator; priv->variant_display_enable = pl111_integrator_enable; dev_info(dev, "set up callbacks for Integrator PL110\n"); break; case VERSATILE_CLCD: versatile_syscon_map = map; + /* This can do RGB565 with external PLD */ + priv->variant = &pl110_versatile; priv->variant_display_enable = pl111_versatile_enable; priv->variant_display_disable = pl111_versatile_disable; - dev_info(dev, "set up callbacks for Versatile PL110+\n"); + /* + * The Versatile has a variant halfway between PL110 + * and PL111 where these two registers have already been + * swapped. + */ + priv->ienb = CLCD_PL111_IENB; + priv->ctrl = CLCD_PL111_CNTL; + dev_info(dev, "set up callbacks for Versatile PL110\n"); break; case REALVIEW_CLCD_EB: case REALVIEW_CLCD_PB1176: -- cgit v1.2.3 From 08e3211251e36a506ff6b0c31620e362b5800f47 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 6 Feb 2018 10:35:39 +0100 Subject: drm/pl111: Support variants with broken VBLANK The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their vertical and next base interrupts are not functional. Support these variants by simply disabling the use of the vblank interrupt on these variants. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-4-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_display.c | 6 ++++-- drivers/gpu/drm/pl111/pl111_drm.h | 2 ++ drivers/gpu/drm/pl111/pl111_drv.c | 19 +++++++++++-------- drivers/gpu/drm/pl111/pl111_versatile.c | 1 + 4 files changed, 18 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 4d4e38b4c9d5..d75923896609 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -256,7 +256,8 @@ static void pl111_display_enable(struct drm_simple_display_pipe *pipe, cntl |= CNTL_LCDPWR; writel(cntl, priv->regs + priv->ctrl); - drm_crtc_vblank_on(crtc); + if (!priv->variant->broken_vblank) + drm_crtc_vblank_on(crtc); } void pl111_display_disable(struct drm_simple_display_pipe *pipe) @@ -266,7 +267,8 @@ void pl111_display_disable(struct drm_simple_display_pipe *pipe) struct pl111_drm_dev_private *priv = drm->dev_private; u32 cntl; - drm_crtc_vblank_off(crtc); + if (!priv->variant->broken_vblank) + drm_crtc_vblank_off(crtc); /* Power Down */ cntl = readl(priv->regs + priv->ctrl); diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index a9b18195d11d..6d0e450e51b1 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -40,6 +40,7 @@ struct drm_minor; * BGR/RGB routing * @broken_clockdivider: the clock divider is broken and we need to * use the supplied clock directly + * @broken_vblank: the vblank IRQ is broken on this variant * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats */ @@ -48,6 +49,7 @@ struct pl111_variant_data { bool is_pl110; bool external_bgr; bool broken_clockdivider; + bool broken_vblank; const u32 *formats; unsigned int nformats; }; diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index ad8dfead2d00..94fbc7cc5e19 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -132,10 +132,12 @@ static int pl111_modeset_init(struct drm_device *dev) if (ret) return ret; - ret = drm_vblank_init(dev, 1); - if (ret != 0) { - dev_err(dev->dev, "Failed to init vblank\n"); - goto out_bridge; + if (!priv->variant->broken_vblank) { + ret = drm_vblank_init(dev, 1); + if (ret != 0) { + dev_err(dev->dev, "Failed to init vblank\n"); + goto out_bridge; + } } drm_mode_config_reset(dev); @@ -172,10 +174,6 @@ static struct drm_driver pl111_drm_driver = { .dumb_create = drm_gem_cma_dumb_create, .gem_free_object_unlocked = drm_gem_cma_free_object, .gem_vm_ops = &drm_gem_cma_vm_ops, - - .enable_vblank = pl111_enable_vblank, - .disable_vblank = pl111_disable_vblank, - .prime_handle_to_fd = drm_gem_prime_handle_to_fd, .prime_fd_to_handle = drm_gem_prime_fd_to_handle, .gem_prime_import = drm_gem_prime_import, @@ -201,6 +199,11 @@ static int pl111_amba_probe(struct amba_device *amba_dev, if (!priv) return -ENOMEM; + if (!variant->broken_vblank) { + pl111_drm_driver.enable_vblank = pl111_enable_vblank; + pl111_drm_driver.disable_vblank = pl111_disable_vblank; + } + drm = drm_dev_alloc(&pl111_drm_driver, dev); if (IS_ERR(drm)) return PTR_ERR(drm); diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 4b0a54825424..05a4b89e0934 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -238,6 +238,7 @@ static const struct pl111_variant_data pl110_integrator = { .name = "PL110 Integrator", .is_pl110 = true, .broken_clockdivider = true, + .broken_vblank = true, .formats = pl110_integrator_pixel_formats, .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats), }; -- cgit v1.2.3 From 3b6ec458578bf065e102e8bb4b9e61dbc0caf5a4 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 6 Feb 2018 10:35:40 +0100 Subject: drm/pl111: Support multiple endpoints on the CLCD The Versatile PL110 implementations use multiple endpoints: from the PL111 port, the lines are routed through a PLD, and from there forked so the same lines go to a VGA DAC and an external TFT panel connector. This is discrete wireing so there is no way to turn of one output, i.e. this is really two endpoints, not two ports. We model this with multiple endpoints, so we need to loop over the available endpoints, check for panel or bridge on each and accumulate the result before continuing. The code already will give the panel preference over the bridge, if present, so the output will be sent to the panel if both a panel and a bridge is present on two endpoints of the same port. If they all return -EPROBE_DEFER we return -EPROBE_DEFER as well. If just one endpoint is present on the port, the behaviour is the same as before. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-5-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_drv.c | 62 +++++++++++++++++++++++++++++++++++---- 1 file changed, 56 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 94fbc7cc5e19..1231905150d0 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -58,6 +58,8 @@ #include #include #include +#include +#include #include #include @@ -85,9 +87,13 @@ static int pl111_modeset_init(struct drm_device *dev) { struct drm_mode_config *mode_config; struct pl111_drm_dev_private *priv = dev->dev_private; - struct drm_panel *panel; - struct drm_bridge *bridge; + struct device_node *np = dev->dev->of_node; + struct device_node *remote; + struct drm_panel *panel = NULL; + struct drm_bridge *bridge = NULL; + bool defer = false; int ret = 0; + int i; drm_mode_config_init(dev); mode_config = &dev->mode_config; @@ -97,10 +103,54 @@ static int pl111_modeset_init(struct drm_device *dev) mode_config->min_height = 1; mode_config->max_height = 768; - ret = drm_of_find_panel_or_bridge(dev->dev->of_node, - 0, 0, &panel, &bridge); - if (ret && ret != -ENODEV) - return ret; + i = 0; + for_each_endpoint_of_node(np, remote) { + struct drm_panel *tmp_panel; + struct drm_bridge *tmp_bridge; + + dev_dbg(dev->dev, "checking endpoint %d\n", i); + + ret = drm_of_find_panel_or_bridge(dev->dev->of_node, + 0, i, + &tmp_panel, + &tmp_bridge); + if (ret) { + if (ret == -EPROBE_DEFER) { + /* + * Something deferred, but that is often just + * another way of saying -ENODEV, but let's + * cast a vote for later deferral. + */ + defer = true; + } else if (ret != -ENODEV) { + /* Continue, maybe something else is working */ + dev_err(dev->dev, + "endpoint %d returns %d\n", i, ret); + } + } + + if (tmp_panel) { + dev_info(dev->dev, + "found panel on endpoint %d\n", i); + panel = tmp_panel; + } + if (tmp_bridge) { + dev_info(dev->dev, + "found bridge on endpoint %d\n", i); + bridge = tmp_bridge; + } + + i++; + } + + /* + * If we can't find neither panel nor bridge on any of the + * endpoints, and any of them retured -EPROBE_DEFER, then + * let's defer this driver too. + */ + if ((!panel && !bridge) && defer) + return -EPROBE_DEFER; + if (panel) { bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_Unknown); -- cgit v1.2.3 From 6c7d091008d0d095adb3f65d667a234d372f4472 Mon Sep 17 00:00:00 2001 From: Oleksandr Andrushchenko Date: Mon, 12 Feb 2018 10:52:54 +0200 Subject: drm/pl111: Do not use deprecated drm_driver.{enable|disable)_vblank Do not use deprecated drm_driver.{enable|disable)_vblank callbacks, but use drm_simple_kms_helpe's pipe callbacks instead. Signed-off-by: Oleksandr Andrushchenko Cc: Eric Anholt Reviewed-by: Eric Anholt Tested-by: Eric Anholt Signed-off-by: Daniel Vetter Link: https://patchwork.freedesktop.org/patch/msgid/1518425574-32671-5-git-send-email-andr2000@gmail.com --- drivers/gpu/drm/pl111/pl111_display.c | 15 ++++++++++++--- drivers/gpu/drm/pl111/pl111_drm.h | 2 -- drivers/gpu/drm/pl111/pl111_drv.c | 5 ----- 3 files changed, 12 insertions(+), 10 deletions(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index d75923896609..5b8368c76734 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -321,8 +321,10 @@ static void pl111_display_update(struct drm_simple_display_pipe *pipe, } } -int pl111_enable_vblank(struct drm_device *drm, unsigned int crtc) +static int pl111_display_enable_vblank(struct drm_simple_display_pipe *pipe) { + struct drm_crtc *crtc = &pipe->crtc; + struct drm_device *drm = crtc->dev; struct pl111_drm_dev_private *priv = drm->dev_private; writel(CLCD_IRQ_NEXTBASE_UPDATE, priv->regs + priv->ienb); @@ -330,8 +332,10 @@ int pl111_enable_vblank(struct drm_device *drm, unsigned int crtc) return 0; } -void pl111_disable_vblank(struct drm_device *drm, unsigned int crtc) +static void pl111_display_disable_vblank(struct drm_simple_display_pipe *pipe) { + struct drm_crtc *crtc = &pipe->crtc; + struct drm_device *drm = crtc->dev; struct pl111_drm_dev_private *priv = drm->dev_private; writel(0, priv->regs + priv->ienb); @@ -343,7 +347,7 @@ static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, return drm_gem_fb_prepare_fb(&pipe->plane, plane_state); } -static const struct drm_simple_display_pipe_funcs pl111_display_funcs = { +static struct drm_simple_display_pipe_funcs pl111_display_funcs = { .check = pl111_display_check, .enable = pl111_display_enable, .disable = pl111_display_disable, @@ -502,6 +506,11 @@ int pl111_display_init(struct drm_device *drm) if (ret) return ret; + if (!priv->variant->broken_vblank) { + pl111_display_funcs.enable_vblank = pl111_display_enable_vblank; + pl111_display_funcs.disable_vblank = pl111_display_disable_vblank; + } + ret = drm_simple_display_pipe_init(drm, &priv->pipe, &pl111_display_funcs, priv->variant->formats, diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 6d0e450e51b1..8e252b561e2c 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -79,8 +79,6 @@ struct pl111_drm_dev_private { }; int pl111_display_init(struct drm_device *dev); -int pl111_enable_vblank(struct drm_device *drm, unsigned int crtc); -void pl111_disable_vblank(struct drm_device *drm, unsigned int crtc); irqreturn_t pl111_irq(int irq, void *data); int pl111_debugfs_init(struct drm_minor *minor); diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index 1231905150d0..a7a3a49956c5 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -249,11 +249,6 @@ static int pl111_amba_probe(struct amba_device *amba_dev, if (!priv) return -ENOMEM; - if (!variant->broken_vblank) { - pl111_drm_driver.enable_vblank = pl111_enable_vblank; - pl111_drm_driver.disable_vblank = pl111_disable_vblank; - } - drm = drm_dev_alloc(&pl111_drm_driver, dev); if (IS_ERR(drm)) return PTR_ERR(drm); -- cgit v1.2.3 From 9f8d4fe94eb4fb958fc92ee91a3ec54ab378339c Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 2 Mar 2018 10:09:45 +0100 Subject: drm/pl111: Make the default BPP a per-variant variable The PL110, Integrator and Versatile boards strongly prefer to use 16 BPP even if other modes are supported, both to keep down memory consumption and also to easier find a good match to supported resolutions with consideration taken to the memory bandwidth of the platforms. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Link: https://patchwork.freedesktop.org/patch/msgid/20180302090948.6399-2-linus.walleij@linaro.org Link: https://patchwork.freedesktop.org/patch/msgid/20180307084316.23623-1-linus.walleij@linaro.org Link: https://patchwork.freedesktop.org/patch/msgid/20180307084316.23623-1-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_drm.h | 2 ++ drivers/gpu/drm/pl111/pl111_drv.c | 4 +++- drivers/gpu/drm/pl111/pl111_versatile.c | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 8e252b561e2c..2a93e0134061 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -43,6 +43,7 @@ struct drm_minor; * @broken_vblank: the vblank IRQ is broken on this variant * @formats: array of supported pixel formats on this variant * @nformats: the length of the array of supported pixel formats + * @fb_bpp: desired bits per pixel on the default framebuffer */ struct pl111_variant_data { const char *name; @@ -52,6 +53,7 @@ struct pl111_variant_data { bool broken_vblank; const u32 *formats; unsigned int nformats; + unsigned int fb_bpp; }; struct pl111_drm_dev_private { diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index a7a3a49956c5..e92a406c9ea9 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -192,7 +192,7 @@ static int pl111_modeset_init(struct drm_device *dev) drm_mode_config_reset(dev); - drm_fb_cma_fbdev_init(dev, 32, 0); + drm_fb_cma_fbdev_init(dev, priv->variant->fb_bpp, 0); drm_kms_helper_poll_init(dev); @@ -336,6 +336,7 @@ static const struct pl111_variant_data pl110_variant = { .is_pl110 = true, .formats = pl110_pixel_formats, .nformats = ARRAY_SIZE(pl110_pixel_formats), + .fb_bpp = 16, }; /* RealView, Versatile Express etc use this modern variant */ @@ -360,6 +361,7 @@ static const struct pl111_variant_data pl111_variant = { .name = "PL111", .formats = pl111_pixel_formats, .nformats = ARRAY_SIZE(pl111_pixel_formats), + .fb_bpp = 32, }; static const struct amba_id pl111_id_table[] = { diff --git a/drivers/gpu/drm/pl111/pl111_versatile.c b/drivers/gpu/drm/pl111/pl111_versatile.c index 05a4b89e0934..2c6fc50b0c12 100644 --- a/drivers/gpu/drm/pl111/pl111_versatile.c +++ b/drivers/gpu/drm/pl111/pl111_versatile.c @@ -241,6 +241,7 @@ static const struct pl111_variant_data pl110_integrator = { .broken_vblank = true, .formats = pl110_integrator_pixel_formats, .nformats = ARRAY_SIZE(pl110_integrator_pixel_formats), + .fb_bpp = 16, }; /* @@ -253,6 +254,7 @@ static const struct pl111_variant_data pl110_versatile = { .external_bgr = true, .formats = pl110_versatile_pixel_formats, .nformats = ARRAY_SIZE(pl110_versatile_pixel_formats), + .fb_bpp = 16, }; int pl111_versatile_init(struct device *dev, struct pl111_drm_dev_private *priv) -- cgit v1.2.3 From df99dd9202216f54eaf672e07808e9198d868af6 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 7 Mar 2018 22:58:19 +0100 Subject: drm/pl111: Use max memory bandwidth for resolution We were previously selecting 1024x768 and 32BPP as the default set-up for the PL111 consumers. This does not work on elder systems: the device tree bindings support a property "max-memory-bandwidth" in bytes/second that states that if you exceed this the memory bus will saturate. The result is flickering and unstable images. Parse the "max-memory-bandwidth" and respect it when intializing the driver. On the RealView PB11MP, Versatile and Integrator/CP we get a nice console as default with this code. Reviewed-by: Eric Anholt Signed-off-by: Linus Walleij Link: https://patchwork.freedesktop.org/patch/msgid/20180307215819.15814-1-linus.walleij@linaro.org --- drivers/gpu/drm/pl111/pl111_display.c | 36 +++++++++++++++++++++++++++++++++++ drivers/gpu/drm/pl111/pl111_drm.h | 1 + drivers/gpu/drm/pl111/pl111_drv.c | 6 ++++++ 3 files changed, 43 insertions(+) (limited to 'drivers/gpu/drm/pl111/pl111_drv.c') diff --git a/drivers/gpu/drm/pl111/pl111_display.c b/drivers/gpu/drm/pl111/pl111_display.c index 5b8368c76734..310646427907 100644 --- a/drivers/gpu/drm/pl111/pl111_display.c +++ b/drivers/gpu/drm/pl111/pl111_display.c @@ -50,6 +50,41 @@ irqreturn_t pl111_irq(int irq, void *data) return status; } +static enum drm_mode_status +pl111_mode_valid(struct drm_crtc *crtc, + const struct drm_display_mode *mode) +{ + struct drm_device *drm = crtc->dev; + struct pl111_drm_dev_private *priv = drm->dev_private; + u32 cpp = priv->variant->fb_bpp / 8; + u64 bw; + + /* + * We use the pixelclock to also account for interlaced modes, the + * resulting bandwidth is in bytes per second. + */ + bw = mode->clock * 1000; /* In Hz */ + bw = bw * mode->hdisplay * mode->vdisplay * cpp; + bw = div_u64(bw, mode->htotal * mode->vtotal); + + /* + * If no bandwidth constraints, anything goes, else + * check if we are too fast. + */ + if (priv->memory_bw && (bw > priv->memory_bw)) { + DRM_DEBUG_KMS("%d x %d @ %d Hz, %d cpp, bw %llu too fast\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_BAD; + } + DRM_DEBUG_KMS("%d x %d @ %d Hz, %d cpp, bw %llu bytes/s OK\n", + mode->hdisplay, mode->vdisplay, + mode->clock * 1000, cpp, bw); + + return MODE_OK; +} + static int pl111_display_check(struct drm_simple_display_pipe *pipe, struct drm_plane_state *pstate, struct drm_crtc_state *cstate) @@ -348,6 +383,7 @@ static int pl111_display_prepare_fb(struct drm_simple_display_pipe *pipe, } static struct drm_simple_display_pipe_funcs pl111_display_funcs = { + .mode_valid = pl111_mode_valid, .check = pl111_display_check, .enable = pl111_display_enable, .disable = pl111_display_disable, diff --git a/drivers/gpu/drm/pl111/pl111_drm.h b/drivers/gpu/drm/pl111/pl111_drm.h index 2a93e0134061..8639b2d4ddf7 100644 --- a/drivers/gpu/drm/pl111/pl111_drm.h +++ b/drivers/gpu/drm/pl111/pl111_drm.h @@ -65,6 +65,7 @@ struct pl111_drm_dev_private { struct drm_simple_display_pipe pipe; void *regs; + u32 memory_bw; u32 ienb; u32 ctrl; /* The pixel clock (a reference to our clock divider off of CLCDCLK). */ diff --git a/drivers/gpu/drm/pl111/pl111_drv.c b/drivers/gpu/drm/pl111/pl111_drv.c index e92a406c9ea9..4621259d5387 100644 --- a/drivers/gpu/drm/pl111/pl111_drv.c +++ b/drivers/gpu/drm/pl111/pl111_drv.c @@ -257,6 +257,12 @@ static int pl111_amba_probe(struct amba_device *amba_dev, drm->dev_private = priv; priv->variant = variant; + if (of_property_read_u32(dev->of_node, "max-memory-bandwidth", + &priv->memory_bw)) { + dev_info(dev, "no max memory bandwidth specified, assume unlimited\n"); + priv->memory_bw = 0; + } + /* The two variants swap this register */ if (variant->is_pl110) { priv->ienb = CLCD_PL110_IENB; -- cgit v1.2.3