From 74137ffcd1dfd6537bbfdd1d1149942412280e9e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:08 +1000 Subject: drm/nouveau/msvld: cosmetic changes This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 26 ++++++++++------------- 1 file changed, 11 insertions(+), 15 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index b8d1e0f521ef..0730198daea7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -24,10 +24,6 @@ #include #include -struct gf100_msvld_priv { - struct nvkm_falcon base; -}; - /******************************************************************************* * MSVLD object classes ******************************************************************************/ @@ -62,15 +58,15 @@ gf100_msvld_cclass = { static int gf100_msvld_init(struct nvkm_object *object) { - struct gf100_msvld_priv *priv = (void *)object; + struct nvkm_falcon *msvld = (void *)object; int ret; - ret = nvkm_falcon_init(&priv->base); + ret = nvkm_falcon_init(msvld); if (ret) return ret; - nv_wr32(priv, 0x084010, 0x0000fff2); - nv_wr32(priv, 0x08401c, 0x0000fff2); + nv_wr32(msvld, 0x084010, 0x0000fff2); + nv_wr32(msvld, 0x08401c, 0x0000fff2); return 0; } @@ -79,19 +75,19 @@ gf100_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, struct nvkm_object **pobject) { - struct gf100_msvld_priv *priv; + struct nvkm_falcon *msvld; int ret; ret = nvkm_falcon_create(parent, engine, oclass, 0x084000, true, - "PMSVLD", "msvld", &priv); - *pobject = nv_object(priv); + "PMSVLD", "msvld", &msvld); + *pobject = nv_object(msvld); if (ret) return ret; - nv_subdev(priv)->unit = 0x00008000; - nv_subdev(priv)->intr = nvkm_falcon_intr; - nv_engine(priv)->cclass = &gf100_msvld_cclass; - nv_engine(priv)->sclass = gf100_msvld_sclass; + nv_subdev(msvld)->unit = 0x00008000; + nv_subdev(msvld)->intr = nvkm_falcon_intr; + nv_engine(msvld)->cclass = &gf100_msvld_cclass; + nv_engine(msvld)->sclass = gf100_msvld_sclass; return 0; } -- cgit v1.2.3 From f2d85ad1a63130ba31434d042b6c76f24f6b9673 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:10 +1000 Subject: drm/nouveau/msvld: switch to device pri macros Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c | 5 +++-- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 5 +++-- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c | 5 +++-- 3 files changed, 9 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c index 055bc2141f6b..c7d981cad822 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c @@ -61,14 +61,15 @@ static int g98_msvld_init(struct nvkm_object *object) { struct nvkm_falcon *msvld = (void *)object; + struct nvkm_device *device = msvld->engine.subdev.device; int ret; ret = nvkm_falcon_init(msvld); if (ret) return ret; - nv_wr32(msvld, 0x084010, 0x0000ffd2); - nv_wr32(msvld, 0x08401c, 0x0000fff2); + nvkm_wr32(device, 0x084010, 0x0000ffd2); + nvkm_wr32(device, 0x08401c, 0x0000fff2); return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index 0730198daea7..156ebcf22a27 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -59,14 +59,15 @@ static int gf100_msvld_init(struct nvkm_object *object) { struct nvkm_falcon *msvld = (void *)object; + struct nvkm_device *device = msvld->engine.subdev.device; int ret; ret = nvkm_falcon_init(msvld); if (ret) return ret; - nv_wr32(msvld, 0x084010, 0x0000fff2); - nv_wr32(msvld, 0x08401c, 0x0000fff2); + nvkm_wr32(device, 0x084010, 0x0000fff2); + nvkm_wr32(device, 0x08401c, 0x0000fff2); return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c index e19ebfdaae6a..870e61465b07 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c @@ -59,14 +59,15 @@ static int gk104_msvld_init(struct nvkm_object *object) { struct nvkm_falcon *msvld = (void *)object; + struct nvkm_device *device = msvld->engine.subdev.device; int ret; ret = nvkm_falcon_init(msvld); if (ret) return ret; - nv_wr32(msvld, 0x084010, 0x0000fff2); - nv_wr32(msvld, 0x08401c, 0x0000fff2); + nvkm_wr32(device, 0x084010, 0x0000fff2); + nvkm_wr32(device, 0x08401c, 0x0000fff2); return 0; } -- cgit v1.2.3 From 63902181a7ce9177c476103694cbdf45ee5c0578 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:13 +1000 Subject: drm/nouveau/falcon: remove object accessor functions Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/include/nvkm/engine/falcon.h | 2 - drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c | 9 +-- drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c | 26 +++---- drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 85 ++++++++++------------ drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c | 2 - drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c | 2 - 13 files changed, 55 insertions(+), 85 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h index 7532cd785c88..3ce0ffc8ef86 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -76,6 +76,4 @@ void nvkm_falcon_intr(struct nvkm_subdev *subdev); #define _nvkm_falcon_dtor _nvkm_engine_dtor int _nvkm_falcon_init(struct nvkm_object *); int _nvkm_falcon_fini(struct nvkm_object *, bool); -u32 _nvkm_falcon_rd32(struct nvkm_object *, u64); -void _nvkm_falcon_wr32(struct nvkm_object *, u64, u32); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c index bbe07c4d0843..1989f659716c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c @@ -75,13 +75,16 @@ static int gf100_ce_init(struct nvkm_object *object) { struct nvkm_falcon *ce = (void *)object; + struct nvkm_device *device = ce->engine.subdev.device; + const int idx = nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0; + u32 base = idx * 0x1000; int ret; ret = nvkm_falcon_init(ce); if (ret) return ret; - nv_wo32(ce, 0x084, nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0); + nvkm_wr32(device, 0x104084 + base, idx); return 0; } @@ -143,8 +146,6 @@ gf100_ce0_oclass = { .dtor = _nvkm_falcon_dtor, .init = gf100_ce_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; @@ -156,7 +157,5 @@ gf100_ce1_oclass = { .dtor = _nvkm_falcon_dtor, .init = gf100_ce_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c index 49aeeb74990a..b52acdcaa81e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c @@ -72,19 +72,21 @@ gt215_ce_isr_error_name[] = { void gt215_ce_intr(struct nvkm_subdev *subdev) { - struct nvkm_fifo *fifo = nvkm_fifo(subdev); - struct nvkm_engine *engine = nv_engine(subdev); - struct nvkm_falcon *falcon = (void *)subdev; + struct nvkm_falcon *ce = (void *)subdev; + struct nvkm_engine *engine = &ce->engine; + struct nvkm_device *device = engine->subdev.device; + struct nvkm_fifo *fifo = device->fifo; struct nvkm_object *engctx; const struct nvkm_enum *en; - u32 dispatch = nv_ro32(falcon, 0x01c); - u32 stat = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16); - u64 inst = nv_ro32(falcon, 0x050) & 0x3fffffff; - u32 ssta = nv_ro32(falcon, 0x040) & 0x0000ffff; - u32 addr = nv_ro32(falcon, 0x040) >> 16; + const u32 base = (nv_subidx(subdev) - NVDEV_ENGINE_CE0) * 0x1000; + u32 dispatch = nvkm_rd32(device, 0x10401c + base); + u32 stat = nvkm_rd32(device, 0x104008 + base) & dispatch & ~(dispatch >> 16); + u64 inst = nvkm_rd32(device, 0x104050 + base) & 0x3fffffff; + u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff; + u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16; u32 mthd = (addr & 0x07ff) << 2; u32 subc = (addr & 0x3800) >> 11; - u32 data = nv_ro32(falcon, 0x044); + u32 data = nvkm_rd32(device, 0x104044 + base); int chid; engctx = nvkm_engctx_get(engine, inst); @@ -97,13 +99,13 @@ gt215_ce_intr(struct nvkm_subdev *subdev) "mthd %04x data %08x\n", ssta, en ? en->name : "", chid, inst << 12, nvkm_client_name(engctx), subc, mthd, data); - nv_wo32(falcon, 0x004, 0x00000040); + nvkm_wr32(device, 0x104004 + base, 0x00000040); stat &= ~0x00000040; } if (stat) { nvkm_error(subdev, "intr %08x\n", stat); - nv_wo32(falcon, 0x004, stat); + nvkm_wr32(device, 0x104004 + base, stat); } nvkm_engctx_put(engctx); @@ -143,7 +145,5 @@ gt215_ce_oclass = { .dtor = _nvkm_falcon_dtor, .init = _nvkm_falcon_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c index e0e76756a127..dcf1782675fe 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c @@ -27,35 +27,23 @@ void nvkm_falcon_intr(struct nvkm_subdev *subdev) { struct nvkm_falcon *falcon = (void *)subdev; - u32 dispatch = nv_ro32(falcon, 0x01c); - u32 intr = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16); + struct nvkm_device *device = falcon->engine.subdev.device; + const u32 base = falcon->addr; + u32 dispatch = nvkm_rd32(device, base + 0x01c); + u32 intr = nvkm_rd32(device, base + 0x008) & dispatch & ~(dispatch >> 16); if (intr & 0x00000010) { nvkm_debug(subdev, "ucode halted\n"); - nv_wo32(falcon, 0x004, 0x00000010); + nvkm_wr32(device, base + 0x004, 0x00000010); intr &= ~0x00000010; } if (intr) { nvkm_error(subdev, "intr %08x\n", intr); - nv_wo32(falcon, 0x004, intr); + nvkm_wr32(device, base + 0x004, intr); } } -u32 -_nvkm_falcon_rd32(struct nvkm_object *object, u64 addr) -{ - struct nvkm_falcon *falcon = (void *)object; - return nvkm_rd32(falcon->engine.subdev.device, falcon->addr + addr); -} - -void -_nvkm_falcon_wr32(struct nvkm_object *object, u64 addr, u32 data) -{ - struct nvkm_falcon *falcon = (void *)object; - nvkm_wr32(falcon->engine.subdev.device, falcon->addr + addr, data); -} - static void * vmemdup(const void *src, size_t len) { @@ -74,6 +62,7 @@ _nvkm_falcon_init(struct nvkm_object *object) struct nvkm_device *device = subdev->device; const struct firmware *fw; char name[32] = "internal"; + const u32 base = falcon->addr; int ret, i; u32 caps; @@ -87,12 +76,12 @@ _nvkm_falcon_init(struct nvkm_object *object) falcon->version = 0; falcon->secret = (falcon->addr == 0x087000) ? 1 : 0; } else { - caps = nv_ro32(falcon, 0x12c); + caps = nvkm_rd32(device, base + 0x12c); falcon->version = (caps & 0x0000000f); falcon->secret = (caps & 0x00000030) >> 4; } - caps = nv_ro32(falcon, 0x108); + caps = nvkm_rd32(device, base + 0x108); falcon->code.limit = (caps & 0x000001ff) << 8; falcon->data.limit = (caps & 0x0003fe00) >> 1; @@ -105,20 +94,20 @@ _nvkm_falcon_init(struct nvkm_object *object) if (falcon->secret && falcon->version < 4) { if (!falcon->version) { nvkm_msec(device, 2000, - if (nv_ro32(falcon, 0x008) & 0x00000010) + if (nvkm_rd32(device, base + 0x008) & 0x00000010) break; ); } else { nvkm_msec(device, 2000, - if (!(nv_ro32(falcon, 0x180) & 0x80000000)) + if (!(nvkm_rd32(device, base + 0x180) & 0x80000000)) break; ); } - nv_wo32(falcon, 0x004, 0x00000010); + nvkm_wr32(device, base + 0x004, 0x00000010); } /* disable all interrupts */ - nv_wo32(falcon, 0x014, 0xffffffff); + nvkm_wr32(device, base + 0x014, 0xffffffff); /* no default ucode provided by the engine implementation, try and * locate a "self-bootstrapping" firmware image for the engine @@ -193,13 +182,13 @@ _nvkm_falcon_init(struct nvkm_object *object) /* upload firmware bootloader (or the full code segments) */ if (falcon->core) { if (device->card_type < NV_C0) - nv_wo32(falcon, 0x618, 0x04000000); + nvkm_wr32(device, base + 0x618, 0x04000000); else - nv_wo32(falcon, 0x618, 0x00000114); - nv_wo32(falcon, 0x11c, 0); - nv_wo32(falcon, 0x110, falcon->core->addr >> 8); - nv_wo32(falcon, 0x114, 0); - nv_wo32(falcon, 0x118, 0x00006610); + nvkm_wr32(device, base + 0x618, 0x00000114); + nvkm_wr32(device, base + 0x11c, 0); + nvkm_wr32(device, base + 0x110, falcon->core->addr >> 8); + nvkm_wr32(device, base + 0x114, 0); + nvkm_wr32(device, base + 0x118, 0x00006610); } else { if (falcon->code.size > falcon->code.limit || falcon->data.size > falcon->data.limit) { @@ -208,39 +197,39 @@ _nvkm_falcon_init(struct nvkm_object *object) } if (falcon->version < 3) { - nv_wo32(falcon, 0xff8, 0x00100000); + nvkm_wr32(device, base + 0xff8, 0x00100000); for (i = 0; i < falcon->code.size / 4; i++) - nv_wo32(falcon, 0xff4, falcon->code.data[i]); + nvkm_wr32(device, base + 0xff4, falcon->code.data[i]); } else { - nv_wo32(falcon, 0x180, 0x01000000); + nvkm_wr32(device, base + 0x180, 0x01000000); for (i = 0; i < falcon->code.size / 4; i++) { if ((i & 0x3f) == 0) - nv_wo32(falcon, 0x188, i >> 6); - nv_wo32(falcon, 0x184, falcon->code.data[i]); + nvkm_wr32(device, base + 0x188, i >> 6); + nvkm_wr32(device, base + 0x184, falcon->code.data[i]); } } } /* upload data segment (if necessary), zeroing the remainder */ if (falcon->version < 3) { - nv_wo32(falcon, 0xff8, 0x00000000); + nvkm_wr32(device, base + 0xff8, 0x00000000); for (i = 0; !falcon->core && i < falcon->data.size / 4; i++) - nv_wo32(falcon, 0xff4, falcon->data.data[i]); + nvkm_wr32(device, base + 0xff4, falcon->data.data[i]); for (; i < falcon->data.limit; i += 4) - nv_wo32(falcon, 0xff4, 0x00000000); + nvkm_wr32(device, base + 0xff4, 0x00000000); } else { - nv_wo32(falcon, 0x1c0, 0x01000000); + nvkm_wr32(device, base + 0x1c0, 0x01000000); for (i = 0; !falcon->core && i < falcon->data.size / 4; i++) - nv_wo32(falcon, 0x1c4, falcon->data.data[i]); + nvkm_wr32(device, base + 0x1c4, falcon->data.data[i]); for (; i < falcon->data.limit / 4; i++) - nv_wo32(falcon, 0x1c4, 0x00000000); + nvkm_wr32(device, base + 0x1c4, 0x00000000); } /* start it running */ - nv_wo32(falcon, 0x10c, 0x00000001); /* BLOCK_ON_FIFO */ - nv_wo32(falcon, 0x104, 0x00000000); /* ENTRY */ - nv_wo32(falcon, 0x100, 0x00000002); /* TRIGGER */ - nv_wo32(falcon, 0x048, 0x00000003); /* FIFO | CHSW */ + nvkm_wr32(device, base + 0x10c, 0x00000001); /* BLOCK_ON_FIFO */ + nvkm_wr32(device, base + 0x104, 0x00000000); /* ENTRY */ + nvkm_wr32(device, base + 0x100, 0x00000002); /* TRIGGER */ + nvkm_wr32(device, base + 0x048, 0x00000003); /* FIFO | CHSW */ return 0; } @@ -248,6 +237,8 @@ int _nvkm_falcon_fini(struct nvkm_object *object, bool suspend) { struct nvkm_falcon *falcon = (void *)object; + struct nvkm_device *device = falcon->engine.subdev.device; + const u32 base = falcon->addr; if (!suspend) { nvkm_gpuobj_ref(NULL, &falcon->core); @@ -258,8 +249,8 @@ _nvkm_falcon_fini(struct nvkm_object *object, bool suspend) } } - nv_mo32(falcon, 0x048, 0x00000003, 0x00000000); - nv_wo32(falcon, 0x014, 0xffffffff); + nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000); + nvkm_wr32(device, base + 0x014, 0xffffffff); return nvkm_engine_fini(&falcon->engine, suspend); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c index f83d020f05de..c8a1a1288af6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c @@ -100,7 +100,5 @@ g98_mspdec_oclass = { .dtor = _nvkm_falcon_dtor, .init = g98_mspdec_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c index 9bbeede03e06..4b759f3e8f51 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c @@ -100,7 +100,5 @@ gf100_mspdec_oclass = { .dtor = _nvkm_falcon_dtor, .init = gf100_mspdec_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c index fb742b442ce9..ab2923634644 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c @@ -100,7 +100,5 @@ gk104_mspdec_oclass = { .dtor = _nvkm_falcon_dtor, .init = gk104_mspdec_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c index d681fe63b1bc..80b12ab09781 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c @@ -100,7 +100,5 @@ g98_msppp_oclass = { .dtor = _nvkm_falcon_dtor, .init = g98_msppp_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c index 7e61f092ef4a..5f5018bf8280 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c @@ -100,7 +100,5 @@ gf100_msppp_oclass = { .dtor = _nvkm_falcon_dtor, .init = gf100_msppp_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c index c7d981cad822..5312cd605dd7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c @@ -101,7 +101,5 @@ g98_msvld_oclass = { .dtor = _nvkm_falcon_dtor, .init = g98_msvld_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index 156ebcf22a27..e5de6db866cf 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -100,7 +100,5 @@ gf100_msvld_oclass = { .dtor = _nvkm_falcon_dtor, .init = gf100_msvld_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c index 870e61465b07..0858765c5201 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c @@ -100,7 +100,5 @@ gk104_msvld_oclass = { .dtor = _nvkm_falcon_dtor, .init = gk104_msvld_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c index b60719092154..431bd5aa6c3d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c @@ -142,7 +142,5 @@ g98_sec_oclass = { .dtor = _nvkm_falcon_dtor, .init = _nvkm_falcon_init, .fini = _nvkm_falcon_fini, - .rd32 = _nvkm_falcon_rd32, - .wr32 = _nvkm_falcon_wr32, }, }; -- cgit v1.2.3 From a83d8872fc8a482e47f7375ab66006e1f8c1fd59 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:18 +1000 Subject: drm/nouveau/falcon: remove dependence on namedb/engctx lookup Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h | 4 +- .../gpu/drm/nouveau/include/nvkm/engine/falcon.h | 20 ++++---- drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c | 15 +++--- drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c | 54 +++++++-------------- drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 27 +++++++++-- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c | 8 +++- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c | 9 ++-- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c | 9 ++-- drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c | 8 +++- drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | 9 ++-- drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c | 8 +++- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 9 ++-- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c | 9 ++-- drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c | 55 ++++++++-------------- 14 files changed, 131 insertions(+), 113 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h index e832f729e1b4..43c18abd4034 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h @@ -1,8 +1,8 @@ #ifndef __NVKM_CE_H__ #define __NVKM_CE_H__ -#include +#include -void gt215_ce_intr(struct nvkm_subdev *); +void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_fifo_chan *); extern struct nvkm_oclass gt215_ce_oclass; extern struct nvkm_oclass gf100_ce0_oclass; diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h index 5e6f1f518ea5..bdadc8b60281 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -1,6 +1,7 @@ #ifndef __NVKM_FALCON_H__ #define __NVKM_FALCON_H__ #include +struct nvkm_fifo_chan; struct nvkm_falcon_chan { struct nvkm_engctx base; @@ -30,6 +31,7 @@ struct nvkm_falcon_data { struct nvkm_falcon { struct nvkm_engine engine; + const struct nvkm_falcon_func *func; u32 addr; u8 version; @@ -51,10 +53,14 @@ struct nvkm_falcon { } data; }; +struct nvkm_falcon_func { + void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); +}; + #define nv_falcon(priv) ((struct nvkm_falcon *)priv) -#define nvkm_falcon_create(p,e,c,b,d,i,f,r) \ - nvkm_falcon_create_((p), (e), (c), (b), (d), (i), (f), \ +#define nvkm_falcon_create(a,p,e,c,b,d,i,f,r) \ + nvkm_falcon_create_((a), (p), (e), (c), (b), (d), (i), (f), \ sizeof(**r),(void **)r) #define nvkm_falcon_destroy(p) \ nvkm_engine_destroy(&(p)->engine) @@ -67,12 +73,10 @@ struct nvkm_falcon { _nvkm_falcon_fini(nv_object(_falcon), (s)); \ }) -int nvkm_falcon_create_(struct nvkm_object *, struct nvkm_object *, - struct nvkm_oclass *, u32, bool, const char *, - const char *, int, void **); - -void nvkm_falcon_intr(struct nvkm_subdev *subdev); - +int nvkm_falcon_create_(const struct nvkm_falcon_func *, + struct nvkm_object *, struct nvkm_object *, + struct nvkm_oclass *, u32, bool, const char *, + const char *, int, void **); #define _nvkm_falcon_dtor _nvkm_engine_dtor int _nvkm_falcon_init(struct nvkm_object *); int _nvkm_falcon_fini(struct nvkm_object *, bool); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c index 1989f659716c..6faf38e3dbbc 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c @@ -88,6 +88,11 @@ gf100_ce_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gf100_ce_func = { + .intr = gt215_ce_intr, +}; + static int gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -96,14 +101,13 @@ gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *ce; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, true, - "PCE0", "ce0", &ce); + ret = nvkm_falcon_create(&gf100_ce_func, parent, engine, oclass, + 0x104000, true, "PCE0", "ce0", &ce); *pobject = nv_object(ce); if (ret) return ret; nv_subdev(ce)->unit = 0x00000040; - nv_subdev(ce)->intr = gt215_ce_intr; nv_engine(ce)->cclass = &gf100_ce0_cclass; nv_engine(ce)->sclass = gf100_ce0_sclass; nv_falcon(ce)->code.data = gf100_ce_code; @@ -121,14 +125,13 @@ gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *ce; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x105000, true, - "PCE1", "ce1", &ce); + ret = nvkm_falcon_create(&gf100_ce_func, parent, engine, oclass, + 0x105000, true, "PCE1", "ce1", &ce); *pobject = nv_object(ce); if (ret) return ret; nv_subdev(ce)->unit = 0x00000080; - nv_subdev(ce)->intr = gt215_ce_intr; nv_engine(ce)->cclass = &gf100_ce1_cclass; nv_engine(ce)->sclass = gf100_ce1_sclass; nv_falcon(ce)->code.data = gf100_ce_code; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c index b52acdcaa81e..a632570f20e1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c @@ -22,7 +22,6 @@ * Authors: Ben Skeggs */ #include -#include #include #include "fuc/gt215.fuc3.h" @@ -70,47 +69,31 @@ gt215_ce_isr_error_name[] = { }; void -gt215_ce_intr(struct nvkm_subdev *subdev) +gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_fifo_chan *chan) { - struct nvkm_falcon *ce = (void *)subdev; - struct nvkm_engine *engine = &ce->engine; - struct nvkm_device *device = engine->subdev.device; - struct nvkm_fifo *fifo = device->fifo; - struct nvkm_object *engctx; - const struct nvkm_enum *en; + struct nvkm_subdev *subdev = &ce->engine.subdev; + struct nvkm_device *device = subdev->device; const u32 base = (nv_subidx(subdev) - NVDEV_ENGINE_CE0) * 0x1000; - u32 dispatch = nvkm_rd32(device, 0x10401c + base); - u32 stat = nvkm_rd32(device, 0x104008 + base) & dispatch & ~(dispatch >> 16); - u64 inst = nvkm_rd32(device, 0x104050 + base) & 0x3fffffff; u32 ssta = nvkm_rd32(device, 0x104040 + base) & 0x0000ffff; u32 addr = nvkm_rd32(device, 0x104040 + base) >> 16; u32 mthd = (addr & 0x07ff) << 2; u32 subc = (addr & 0x3800) >> 11; u32 data = nvkm_rd32(device, 0x104044 + base); - int chid; - - engctx = nvkm_engctx_get(engine, inst); - chid = fifo->chid(fifo, engctx); - - if (stat & 0x00000040) { - en = nvkm_enum_find(gt215_ce_isr_error_name, ssta); - nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] " - "ch %d [%010llx %s] subc %d " - "mthd %04x data %08x\n", - ssta, en ? en->name : "", chid, inst << 12, - nvkm_client_name(engctx), subc, mthd, data); - nvkm_wr32(device, 0x104004 + base, 0x00000040); - stat &= ~0x00000040; - } - - if (stat) { - nvkm_error(subdev, "intr %08x\n", stat); - nvkm_wr32(device, 0x104004 + base, stat); - } - - nvkm_engctx_put(engctx); + const struct nvkm_enum *en = + nvkm_enum_find(gt215_ce_isr_error_name, ssta); + + nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] ch %d [%010llx %s] " + "subc %d mthd %04x data %08x\n", ssta, + en ? en->name : "", chan ? chan->chid : -1, + chan ? chan->inst : 0, nvkm_client_name(chan), + subc, mthd, data); } +static const struct nvkm_falcon_func +gt215_ce_func = { + .intr = gt215_ce_intr, +}; + static int gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -120,14 +103,13 @@ gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *ce; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x104000, enable, - "PCE0", "ce0", &ce); + ret = nvkm_falcon_create(>215_ce_func, parent, engine, oclass, + 0x104000, enable, "PCE0", "ce0", &ce); *pobject = nv_object(ce); if (ret) return ret; nv_subdev(ce)->unit = 0x00802000; - nv_subdev(ce)->intr = gt215_ce_intr; nv_engine(ce)->cclass = >215_ce_cclass; nv_engine(ce)->sclass = gt215_ce_sclass; nv_falcon(ce)->code.data = gt215_ce_code; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c index 27bc50e80a56..b0cbe819497a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c @@ -20,17 +20,31 @@ * OTHER DEALINGS IN THE SOFTWARE. */ #include +#include #include -void +static void nvkm_falcon_intr(struct nvkm_subdev *subdev) { struct nvkm_falcon *falcon = (void *)subdev; struct nvkm_device *device = falcon->engine.subdev.device; const u32 base = falcon->addr; - u32 dispatch = nvkm_rd32(device, base + 0x01c); - u32 intr = nvkm_rd32(device, base + 0x008) & dispatch & ~(dispatch >> 16); + u32 dest = nvkm_rd32(device, base + 0x01c); + u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16); + u32 inst = nvkm_rd32(device, base + 0x050) & 0x3fffffff; + struct nvkm_fifo_chan *chan; + unsigned long flags; + + chan = nvkm_fifo_chan_inst(device->fifo, (u64)inst << 12, &flags); + + if (intr & 0x00000040) { + if (falcon->func->intr) { + falcon->func->intr(falcon, chan); + nvkm_wr32(device, base + 0x004, 0x00000040); + intr &= ~0x00000040; + } + } if (intr & 0x00000010) { nvkm_debug(subdev, "ucode halted\n"); @@ -42,6 +56,8 @@ nvkm_falcon_intr(struct nvkm_subdev *subdev) nvkm_error(subdev, "intr %08x\n", intr); nvkm_wr32(device, base + 0x004, intr); } + + nvkm_fifo_chan_put(device->fifo, flags, &chan); } static void * @@ -260,7 +276,8 @@ _nvkm_falcon_fini(struct nvkm_object *object, bool suspend) } int -nvkm_falcon_create_(struct nvkm_object *parent, struct nvkm_object *engine, +nvkm_falcon_create_(const struct nvkm_falcon_func *func, + struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, u32 addr, bool enable, const char *iname, const char *fname, int length, void **pobject) @@ -274,6 +291,8 @@ nvkm_falcon_create_(struct nvkm_object *parent, struct nvkm_object *engine, if (ret) return ret; + falcon->engine.subdev.intr = nvkm_falcon_intr; + falcon->func = func; falcon->addr = addr; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c index c8a1a1288af6..fbb38450f1e5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c @@ -72,6 +72,10 @@ g98_mspdec_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +g98_mspdec_func = { +}; + static int g98_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -80,8 +84,8 @@ g98_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *mspdec; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &mspdec); + ret = nvkm_falcon_create(&g98_mspdec_func, parent, engine, oclass, + 0x085000, true, "PMSPDEC", "mspdec", &mspdec); *pobject = nv_object(mspdec); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c index 4b759f3e8f51..71b75e9177b4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c @@ -71,6 +71,10 @@ gf100_mspdec_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gf100_mspdec_func = { +}; + static int gf100_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -79,14 +83,13 @@ gf100_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *mspdec; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &mspdec); + ret = nvkm_falcon_create(&gf100_mspdec_func, parent, engine, oclass, + 0x085000, true, "PMSPDEC", "mspdec", &mspdec); *pobject = nv_object(mspdec); if (ret) return ret; nv_subdev(mspdec)->unit = 0x00020000; - nv_subdev(mspdec)->intr = nvkm_falcon_intr; nv_engine(mspdec)->cclass = &gf100_mspdec_cclass; nv_engine(mspdec)->sclass = gf100_mspdec_sclass; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c index ab2923634644..a103789a2611 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c @@ -71,6 +71,10 @@ gk104_mspdec_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gk104_mspdec_func = { +}; + static int gk104_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -79,14 +83,13 @@ gk104_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *falcon; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x085000, true, - "PMSPDEC", "mspdec", &falcon); + ret = nvkm_falcon_create(&gk104_mspdec_func, parent, engine, oclass, + 0x085000, true, "PMSPDEC", "mspdec", &falcon); *pobject = nv_object(falcon); if (ret) return ret; nv_subdev(falcon)->unit = 0x00020000; - nv_subdev(falcon)->intr = nvkm_falcon_intr; nv_engine(falcon)->cclass = &gk104_mspdec_cclass; nv_engine(falcon)->sclass = gk104_mspdec_sclass; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c index 80b12ab09781..9029ff0ea86d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c @@ -72,6 +72,10 @@ g98_msppp_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +g98_msppp_func = { +}; + static int g98_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -80,8 +84,8 @@ g98_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *msppp; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x086000, true, - "PMSPPP", "msppp", &msppp); + ret = nvkm_falcon_create(&g98_msppp_func, parent, engine, oclass, + 0x086000, true, "PMSPPP", "msppp", &msppp); *pobject = nv_object(msppp); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c index 5f5018bf8280..2b21fe5dafda 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c @@ -71,6 +71,10 @@ gf100_msppp_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gf100_msppp_func = { +}; + static int gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -79,14 +83,13 @@ gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *msppp; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x086000, true, - "PMSPPP", "msppp", &msppp); + ret = nvkm_falcon_create(&gf100_msppp_func, parent, engine, oclass, + 0x086000, true, "PMSPPP", "msppp", &msppp); *pobject = nv_object(msppp); if (ret) return ret; nv_subdev(msppp)->unit = 0x00000002; - nv_subdev(msppp)->intr = nvkm_falcon_intr; nv_engine(msppp)->cclass = &gf100_msppp_cclass; nv_engine(msppp)->sclass = gf100_msppp_sclass; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c index 5312cd605dd7..cdb7de5a7305 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c @@ -73,6 +73,10 @@ g98_msvld_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +g98_msvld_func = { +}; + static int g98_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -81,8 +85,8 @@ g98_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *msvld; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x084000, true, - "PMSVLD", "msvld", &msvld); + ret = nvkm_falcon_create(&g98_msvld_func, parent, engine, oclass, + 0x084000, true, "PMSVLD", "msvld", &msvld); *pobject = nv_object(msvld); if (ret) return ret; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index e5de6db866cf..1124373be920 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -71,6 +71,10 @@ gf100_msvld_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gf100_msvld_func = { +}; + static int gf100_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -79,14 +83,13 @@ gf100_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *msvld; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x084000, true, - "PMSVLD", "msvld", &msvld); + ret = nvkm_falcon_create(&gf100_msvld_func, parent, engine, oclass, + 0x084000, true, "PMSVLD", "msvld", &msvld); *pobject = nv_object(msvld); if (ret) return ret; nv_subdev(msvld)->unit = 0x00008000; - nv_subdev(msvld)->intr = nvkm_falcon_intr; nv_engine(msvld)->cclass = &gf100_msvld_cclass; nv_engine(msvld)->sclass = gf100_msvld_sclass; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c index 0858765c5201..addef2bbfe76 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c @@ -71,6 +71,10 @@ gk104_msvld_init(struct nvkm_object *object) return 0; } +static const struct nvkm_falcon_func +gk104_msvld_func = { +}; + static int gk104_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -79,14 +83,13 @@ gk104_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *msvld; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x084000, true, - "PMSVLD", "msvld", &msvld); + ret = nvkm_falcon_create(&gk104_msvld_func, parent, engine, oclass, + 0x084000, true, "PMSVLD", "msvld", &msvld); *pobject = nv_object(msvld); if (ret) return ret; nv_subdev(msvld)->unit = 0x00008000; - nv_subdev(msvld)->intr = nvkm_falcon_intr; nv_engine(msvld)->cclass = &gk104_msvld_cclass; nv_engine(msvld)->sclass = gk104_msvld_sclass; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c index 431bd5aa6c3d..e6544097726c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c @@ -23,11 +23,11 @@ */ #include #include +#include #include "fuc/g98.fuc0s.h" #include #include -#include /******************************************************************************* * Crypt object classes @@ -69,46 +69,30 @@ static const struct nvkm_enum g98_sec_isr_error_name[] = { }; static void -g98_sec_intr(struct nvkm_subdev *subdev) +g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_fifo_chan *chan) { - struct nvkm_falcon *sec = (void *)subdev; - struct nvkm_device *device = sec->engine.subdev.device; - struct nvkm_fifo *fifo = device->fifo; - struct nvkm_engine *engine = nv_engine(subdev); - struct nvkm_object *engctx; - u32 disp = nvkm_rd32(device, 0x08701c); - u32 stat = nvkm_rd32(device, 0x087008) & disp & ~(disp >> 16); - u32 inst = nvkm_rd32(device, 0x087050) & 0x3fffffff; + struct nvkm_subdev *subdev = &sec->engine.subdev; + struct nvkm_device *device = subdev->device; u32 ssta = nvkm_rd32(device, 0x087040) & 0x0000ffff; u32 addr = nvkm_rd32(device, 0x087040) >> 16; u32 mthd = (addr & 0x07ff) << 2; u32 subc = (addr & 0x3800) >> 11; u32 data = nvkm_rd32(device, 0x087044); - const struct nvkm_enum *en; - int chid; - - engctx = nvkm_engctx_get(engine, inst); - chid = fifo->chid(fifo, engctx); - - if (stat & 0x00000040) { - en = nvkm_enum_find(g98_sec_isr_error_name, ssta); - nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] " - "ch %d [%010llx %s] subc %d " - "mthd %04x data %08x\n", ssta, - en ? en->name : "", chid, (u64)inst << 12, - nvkm_client_name(engctx), subc, mthd, data); - nvkm_wr32(device, 0x087004, 0x00000040); - stat &= ~0x00000040; - } - - if (stat) { - nvkm_error(subdev, "intr %08x\n", stat); - nvkm_wr32(device, 0x087004, stat); - } - - nvkm_engctx_put(engctx); + const struct nvkm_enum *en = + nvkm_enum_find(g98_sec_isr_error_name, ssta); + + nvkm_error(subdev, "DISPATCH_ERROR %04x [%s] ch %d [%010llx %s] " + "subc %d mthd %04x data %08x\n", ssta, + en ? en->name : "UNKNOWN", chan ? chan->chid : -1, + chan ? chan->inst : 0, nvkm_client_name(chan), + subc, mthd, data); } +static const struct nvkm_falcon_func +g98_sec_func = { + .intr = g98_sec_intr, +}; + static int g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -117,14 +101,13 @@ g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *sec; int ret; - ret = nvkm_falcon_create(parent, engine, oclass, 0x087000, true, - "PSEC", "sec", &sec); + ret = nvkm_falcon_create(&g98_sec_func, parent, engine, oclass, + 0x087000, true, "PSEC", "sec", &sec); *pobject = nv_object(sec); if (ret) return ret; nv_subdev(sec)->unit = 0x00004000; - nv_subdev(sec)->intr = g98_sec_intr; nv_engine(sec)->cclass = &g98_sec_cclass; nv_engine(sec)->sclass = g98_sec_sclass; nv_falcon(sec)->code.data = g98_sec_code; -- cgit v1.2.3 From 9d498e0f7a5ece8f61c8a174b40668a2621a82e3 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:19 +1000 Subject: drm/nouveau/falcon: convert user classes to new-style nvkm_object Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvif/class.h | 22 +++++++ .../gpu/drm/nouveau/include/nvkm/engine/falcon.h | 26 +------- drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c | 69 ++++++---------------- drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c | 38 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 36 +++++++++++ drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c | 39 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c | 37 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c | 37 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c | 39 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | 37 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c | 41 +++---------- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 37 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c | 37 ++---------- drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c | 37 ++---------- 14 files changed, 132 insertions(+), 400 deletions(-) (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index d8bad60642ac..10b6685cf5e7 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -94,6 +94,28 @@ #define MAXWELL_A 0x0000b097 #define MAXWELL_B 0x0000b197 +#define GT212_MSVLD 0x000085b1 +#define IGT21A_MSVLD 0x000086b1 +#define G98_MSVLD 0x000088b1 +#define GF100_MSVLD 0x000090b1 +#define GK104_MSVLD 0x000095b1 + +#define GT212_MSPDEC 0x000085b2 +#define G98_MSPDEC 0x000088b2 +#define GF100_MSPDEC 0x000090b2 +#define GK104_MSPDEC 0x000095b2 + +#define GT212_MSPPP 0x000085b3 +#define G98_MSPPP 0x000088b3 +#define GF100_MSPPP 0x000090b3 + +#define G98_SEC 0x000088b4 + +#define GT212_DMA 0x000085b5 +#define FERMI_DMA 0x000090b5 + +#define FERMI_DECOMPRESS 0x000090b8 + #define FERMI_COMPUTE_A 0x000090c0 #define FERMI_COMPUTE_B 0x000091c0 diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h index bdadc8b60281..cd113fcbfccb 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -1,34 +1,13 @@ #ifndef __NVKM_FALCON_H__ #define __NVKM_FALCON_H__ -#include +#define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine) +#include struct nvkm_fifo_chan; -struct nvkm_falcon_chan { - struct nvkm_engctx base; -}; - -#define nvkm_falcon_context_create(p,e,c,g,s,a,f,d) \ - nvkm_engctx_create((p), (e), (c), (g), (s), (a), (f), (d)) -#define nvkm_falcon_context_destroy(d) \ - nvkm_engctx_destroy(&(d)->base) -#define nvkm_falcon_context_init(d) \ - nvkm_engctx_init(&(d)->base) -#define nvkm_falcon_context_fini(d,s) \ - nvkm_engctx_fini(&(d)->base, (s)) - -#define _nvkm_falcon_context_ctor _nvkm_engctx_ctor -#define _nvkm_falcon_context_dtor _nvkm_engctx_dtor -#define _nvkm_falcon_context_init _nvkm_engctx_init -#define _nvkm_falcon_context_fini _nvkm_engctx_fini -#define _nvkm_falcon_context_rd32 _nvkm_engctx_rd32 -#define _nvkm_falcon_context_wr32 _nvkm_engctx_wr32 - struct nvkm_falcon_data { bool external; }; -#include - struct nvkm_falcon { struct nvkm_engine engine; const struct nvkm_falcon_func *func; @@ -55,6 +34,7 @@ struct nvkm_falcon { struct nvkm_falcon_func { void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); + struct nvkm_sclass sclass[]; }; #define nv_falcon(priv) ((struct nvkm_falcon *)priv) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c index 6faf38e3dbbc..3abab3992e7c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c @@ -25,51 +25,7 @@ #include #include "fuc/gf100.fuc3.h" -/******************************************************************************* - * Copy object classes - ******************************************************************************/ - -static struct nvkm_oclass -gf100_ce0_sclass[] = { - { 0x90b5, &nvkm_object_ofuncs }, - {}, -}; - -static struct nvkm_oclass -gf100_ce1_sclass[] = { - { 0x90b8, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PCE context - ******************************************************************************/ - -static struct nvkm_ofuncs -gf100_ce_context_ofuncs = { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, -}; - -static struct nvkm_oclass -gf100_ce0_cclass = { - .handle = NV_ENGCTX(CE0, 0xc0), - .ofuncs = &gf100_ce_context_ofuncs, -}; - -static struct nvkm_oclass -gf100_ce1_cclass = { - .handle = NV_ENGCTX(CE1, 0xc0), - .ofuncs = &gf100_ce_context_ofuncs, -}; - -/******************************************************************************* - * PCE engine/subdev functions - ******************************************************************************/ +#include static int gf100_ce_init(struct nvkm_object *object) @@ -89,8 +45,12 @@ gf100_ce_init(struct nvkm_object *object) } static const struct nvkm_falcon_func -gf100_ce_func = { +gf100_ce0_func = { .intr = gt215_ce_intr, + .sclass = { + { -1, -1, FERMI_DMA }, + {} + } }; static int @@ -101,15 +61,13 @@ gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *ce; int ret; - ret = nvkm_falcon_create(&gf100_ce_func, parent, engine, oclass, + ret = nvkm_falcon_create(&gf100_ce0_func, parent, engine, oclass, 0x104000, true, "PCE0", "ce0", &ce); *pobject = nv_object(ce); if (ret) return ret; nv_subdev(ce)->unit = 0x00000040; - nv_engine(ce)->cclass = &gf100_ce0_cclass; - nv_engine(ce)->sclass = gf100_ce0_sclass; nv_falcon(ce)->code.data = gf100_ce_code; nv_falcon(ce)->code.size = sizeof(gf100_ce_code); nv_falcon(ce)->data.data = gf100_ce_data; @@ -117,6 +75,15 @@ gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return 0; } +static const struct nvkm_falcon_func +gf100_ce1_func = { + .intr = gt215_ce_intr, + .sclass = { + { -1, -1, FERMI_DECOMPRESS }, + {} + } +}; + static int gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_oclass *oclass, void *data, u32 size, @@ -125,15 +92,13 @@ gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, struct nvkm_falcon *ce; int ret; - ret = nvkm_falcon_create(&gf100_ce_func, parent, engine, oclass, + ret = nvkm_falcon_create(&gf100_ce1_func, parent, engine, oclass, 0x105000, true, "PCE1", "ce1", &ce); *pobject = nv_object(ce); if (ret) return ret; nv_subdev(ce)->unit = 0x00000080; - nv_engine(ce)->cclass = &gf100_ce1_cclass; - nv_engine(ce)->sclass = gf100_ce1_sclass; nv_falcon(ce)->code.data = gf100_ce_code; nv_falcon(ce)->code.size = sizeof(gf100_ce_code); nv_falcon(ce)->data.data = gf100_ce_data; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c index 1a15b8d6fece..35e4d578b153 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c @@ -28,37 +28,7 @@ #include #include -/******************************************************************************* - * Copy object classes - ******************************************************************************/ - -static struct nvkm_oclass -gt215_ce_sclass[] = { - { 0x85b5, &nvkm_object_ofuncs }, - {} -}; - -/******************************************************************************* - * PCE context - ******************************************************************************/ - -static struct nvkm_oclass -gt215_ce_cclass = { - .handle = NV_ENGCTX(CE0, 0xa3), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - - }, -}; - -/******************************************************************************* - * PCE engine/subdev functions - ******************************************************************************/ +#include static const struct nvkm_enum gt215_ce_isr_error_name[] = { @@ -93,6 +63,10 @@ gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_fifo_chan *chan) static const struct nvkm_falcon_func gt215_ce_func = { .intr = gt215_ce_intr, + .sclass = { + { -1, -1, GT212_DMA }, + {} + } }; static int @@ -111,8 +85,6 @@ gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(ce)->unit = 0x00802000; - nv_engine(ce)->cclass = >215_ce_cclass; - nv_engine(ce)->sclass = gt215_ce_sclass; nv_falcon(ce)->code.data = gt215_ce_code; nv_falcon(ce)->code.size = sizeof(gt215_ce_code); nv_falcon(ce)->data.data = gt215_ce_data; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c index b0cbe819497a..3d3e73cfb6b0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c @@ -24,6 +24,35 @@ #include +static int +nvkm_falcon_oclass_get(struct nvkm_oclass *oclass, int index) +{ + struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine); + int c = 0; + + while (falcon->func->sclass[c].oclass) { + if (c++ == index) { + oclass->base = falcon->func->sclass[index]; + return index; + } + } + + return c; +} + +static int +nvkm_falcon_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent, + int align, struct nvkm_gpuobj **pgpuobj) +{ + return nvkm_gpuobj_new(object->engine->subdev.device, 256, + align, true, parent, pgpuobj); +} + +static const struct nvkm_object_func +nvkm_falcon_cclass = { + .bind = nvkm_falcon_cclass_bind, +}; + static void nvkm_falcon_intr(struct nvkm_subdev *subdev) { @@ -275,6 +304,12 @@ _nvkm_falcon_fini(struct nvkm_object *object, bool suspend) return nvkm_engine_fini_old(&falcon->engine, suspend); } +static const struct nvkm_engine_func +nvkm_falcon = { + .fifo.sclass = nvkm_falcon_oclass_get, + .cclass = &nvkm_falcon_cclass, +}; + int nvkm_falcon_create_(const struct nvkm_falcon_func *func, struct nvkm_object *parent, struct nvkm_object *engine, @@ -292,6 +327,7 @@ nvkm_falcon_create_(const struct nvkm_falcon_func *func, return ret; falcon->engine.subdev.intr = nvkm_falcon_intr; + falcon->engine.func = &nvkm_falcon; falcon->func = func; falcon->addr = addr; return 0; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c index fbb38450f1e5..f14971783270 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c @@ -24,37 +24,7 @@ #include #include -/******************************************************************************* - * MSPDEC object classes - ******************************************************************************/ - -static struct nvkm_oclass -g98_mspdec_sclass[] = { - { 0x88b2, &nvkm_object_ofuncs }, - { 0x85b2, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPDEC context - ******************************************************************************/ - -static struct nvkm_oclass -g98_mspdec_cclass = { - .handle = NV_ENGCTX(MSPDEC, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPDEC engine/subdev functions - ******************************************************************************/ +#include static int g98_mspdec_init(struct nvkm_object *object) @@ -74,6 +44,11 @@ g98_mspdec_init(struct nvkm_object *object) static const struct nvkm_falcon_func g98_mspdec_func = { + .sclass = { + { -1, -1, G98_MSPDEC }, + { -1, -1, GT212_MSPDEC }, + {} + }, }; static int @@ -91,8 +66,6 @@ g98_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(mspdec)->unit = 0x01020000; - nv_engine(mspdec)->cclass = &g98_mspdec_cclass; - nv_engine(mspdec)->sclass = g98_mspdec_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c index 71b75e9177b4..1296f775ea31 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c @@ -24,36 +24,7 @@ #include #include -/******************************************************************************* - * MSPDEC object classes - ******************************************************************************/ - -static struct nvkm_oclass -gf100_mspdec_sclass[] = { - { 0x90b2, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPDEC context - ******************************************************************************/ - -static struct nvkm_oclass -gf100_mspdec_cclass = { - .handle = NV_ENGCTX(MSPDEC, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPDEC engine/subdev functions - ******************************************************************************/ +#include static int gf100_mspdec_init(struct nvkm_object *object) @@ -73,6 +44,10 @@ gf100_mspdec_init(struct nvkm_object *object) static const struct nvkm_falcon_func gf100_mspdec_func = { + .sclass = { + { -1, -1, GF100_MSPDEC }, + {} + } }; static int @@ -90,8 +65,6 @@ gf100_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(mspdec)->unit = 0x00020000; - nv_engine(mspdec)->cclass = &gf100_mspdec_cclass; - nv_engine(mspdec)->sclass = gf100_mspdec_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c index a103789a2611..315da1695c72 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c @@ -24,36 +24,7 @@ #include #include -/******************************************************************************* - * MSPDEC object classes - ******************************************************************************/ - -static struct nvkm_oclass -gk104_mspdec_sclass[] = { - { 0x95b2, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPDEC context - ******************************************************************************/ - -static struct nvkm_oclass -gk104_mspdec_cclass = { - .handle = NV_ENGCTX(MSPDEC, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPDEC engine/subdev functions - ******************************************************************************/ +#include static int gk104_mspdec_init(struct nvkm_object *object) @@ -73,6 +44,10 @@ gk104_mspdec_init(struct nvkm_object *object) static const struct nvkm_falcon_func gk104_mspdec_func = { + .sclass = { + { -1, -1, GK104_MSPDEC }, + {} + } }; static int @@ -90,8 +65,6 @@ gk104_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(falcon)->unit = 0x00020000; - nv_engine(falcon)->cclass = &gk104_mspdec_cclass; - nv_engine(falcon)->sclass = gk104_mspdec_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c index 9029ff0ea86d..314736d6aa5b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c @@ -24,37 +24,7 @@ #include #include -/******************************************************************************* - * MSPPP object classes - ******************************************************************************/ - -static struct nvkm_oclass -g98_msppp_sclass[] = { - { 0x88b3, &nvkm_object_ofuncs }, - { 0x85b3, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPPP context - ******************************************************************************/ - -static struct nvkm_oclass -g98_msppp_cclass = { - .handle = NV_ENGCTX(MSPPP, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPPP engine/subdev functions - ******************************************************************************/ +#include static int g98_msppp_init(struct nvkm_object *object) @@ -74,6 +44,11 @@ g98_msppp_init(struct nvkm_object *object) static const struct nvkm_falcon_func g98_msppp_func = { + .sclass = { + { -1, -1, G98_MSPPP }, + { -1, -1, GT212_MSPPP }, + {} + } }; static int @@ -91,8 +66,6 @@ g98_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(msppp)->unit = 0x00400002; - nv_engine(msppp)->cclass = &g98_msppp_cclass; - nv_engine(msppp)->sclass = g98_msppp_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c index 2b21fe5dafda..f977c2adf9d2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c @@ -24,36 +24,7 @@ #include #include -/******************************************************************************* - * MSPPP object classes - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msppp_sclass[] = { - { 0x90b3, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSPPP context - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msppp_cclass = { - .handle = NV_ENGCTX(MSPPP, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSPPP engine/subdev functions - ******************************************************************************/ +#include static int gf100_msppp_init(struct nvkm_object *object) @@ -73,6 +44,10 @@ gf100_msppp_init(struct nvkm_object *object) static const struct nvkm_falcon_func gf100_msppp_func = { + .sclass = { + { -1, -1, GF100_MSPPP }, + {} + } }; static int @@ -90,8 +65,6 @@ gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(msppp)->unit = 0x00000002; - nv_engine(msppp)->cclass = &gf100_msppp_cclass; - nv_engine(msppp)->sclass = gf100_msppp_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c index cdb7de5a7305..0ee767373f79 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c @@ -24,38 +24,7 @@ #include #include -/******************************************************************************* - * MSVLD object classes - ******************************************************************************/ - -static struct nvkm_oclass -g98_msvld_sclass[] = { - { 0x88b1, &nvkm_object_ofuncs }, - { 0x85b1, &nvkm_object_ofuncs }, - { 0x86b1, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSVLD context - ******************************************************************************/ - -static struct nvkm_oclass -g98_msvld_cclass = { - .handle = NV_ENGCTX(MSVLD, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSVLD engine/subdev functions - ******************************************************************************/ +#include static int g98_msvld_init(struct nvkm_object *object) @@ -75,6 +44,12 @@ g98_msvld_init(struct nvkm_object *object) static const struct nvkm_falcon_func g98_msvld_func = { + .sclass = { + { -1, -1, G98_MSVLD }, + { -1, -1, GT212_MSVLD }, + { -1, -1, IGT21A_MSVLD }, + {} + } }; static int @@ -92,8 +67,6 @@ g98_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(msvld)->unit = 0x04008000; - nv_engine(msvld)->cclass = &g98_msvld_cclass; - nv_engine(msvld)->sclass = g98_msvld_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index 1124373be920..839d648dcfdf 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -24,36 +24,7 @@ #include #include -/******************************************************************************* - * MSVLD object classes - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msvld_sclass[] = { - { 0x90b1, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSVLD context - ******************************************************************************/ - -static struct nvkm_oclass -gf100_msvld_cclass = { - .handle = NV_ENGCTX(MSVLD, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSVLD engine/subdev functions - ******************************************************************************/ +#include static int gf100_msvld_init(struct nvkm_object *object) @@ -73,6 +44,10 @@ gf100_msvld_init(struct nvkm_object *object) static const struct nvkm_falcon_func gf100_msvld_func = { + .sclass = { + { -1, -1, GF100_MSVLD }, + {} + } }; static int @@ -90,8 +65,6 @@ gf100_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(msvld)->unit = 0x00008000; - nv_engine(msvld)->cclass = &gf100_msvld_cclass; - nv_engine(msvld)->sclass = gf100_msvld_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c index addef2bbfe76..74bdca359d4a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c @@ -24,36 +24,7 @@ #include #include -/******************************************************************************* - * MSVLD object classes - ******************************************************************************/ - -static struct nvkm_oclass -gk104_msvld_sclass[] = { - { 0x95b1, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PMSVLD context - ******************************************************************************/ - -static struct nvkm_oclass -gk104_msvld_cclass = { - .handle = NV_ENGCTX(MSVLD, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PMSVLD engine/subdev functions - ******************************************************************************/ +#include static int gk104_msvld_init(struct nvkm_object *object) @@ -73,6 +44,10 @@ gk104_msvld_init(struct nvkm_object *object) static const struct nvkm_falcon_func gk104_msvld_func = { + .sclass = { + { -1, -1, GK104_MSVLD }, + {} + } }; static int @@ -90,8 +65,6 @@ gk104_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(msvld)->unit = 0x00008000; - nv_engine(msvld)->cclass = &gk104_msvld_cclass; - nv_engine(msvld)->sclass = gk104_msvld_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c index c15934d7ff63..aae0e85b1075 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c @@ -29,36 +29,7 @@ #include #include -/******************************************************************************* - * Crypt object classes - ******************************************************************************/ - -static struct nvkm_oclass -g98_sec_sclass[] = { - { 0x88b4, &nvkm_object_ofuncs }, - {}, -}; - -/******************************************************************************* - * PSEC context - ******************************************************************************/ - -static struct nvkm_oclass -g98_sec_cclass = { - .handle = NV_ENGCTX(SEC, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = _nvkm_falcon_context_ctor, - .dtor = _nvkm_falcon_context_dtor, - .init = _nvkm_falcon_context_init, - .fini = _nvkm_falcon_context_fini, - .rd32 = _nvkm_falcon_context_rd32, - .wr32 = _nvkm_falcon_context_wr32, - }, -}; - -/******************************************************************************* - * PSEC engine/subdev functions - ******************************************************************************/ +#include static const struct nvkm_enum g98_sec_isr_error_name[] = { { 0x0000, "ILLEGAL_MTHD" }, @@ -92,6 +63,10 @@ g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_fifo_chan *chan) static const struct nvkm_falcon_func g98_sec_func = { .intr = g98_sec_intr, + .sclass = { + { -1, -1, G98_SEC }, + {} + } }; static int @@ -109,8 +84,6 @@ g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, return ret; nv_subdev(sec)->unit = 0x00004000; - nv_engine(sec)->cclass = &g98_sec_cclass; - nv_engine(sec)->sclass = g98_sec_sclass; nv_falcon(sec)->code.data = g98_sec_code; nv_falcon(sec)->code.size = sizeof(g98_sec_code); nv_falcon(sec)->data.data = g98_sec_data; -- cgit v1.2.3 From 53e60da43aee440d3f75000cdd269bd1324a8ad4 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 20 Aug 2015 14:54:21 +1000 Subject: drm/nouveau/falcon: convert to new-style nvkm_engine Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h | 5 +- .../gpu/drm/nouveau/include/nvkm/engine/falcon.h | 43 ++-- .../gpu/drm/nouveau/include/nvkm/engine/mspdec.h | 9 +- .../gpu/drm/nouveau/include/nvkm/engine/msppp.h | 7 +- .../gpu/drm/nouveau/include/nvkm/engine/msvld.h | 10 +- drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h | 4 +- drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c | 109 +++-------- drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c | 43 ++-- drivers/gpu/drm/nouveau/nvkm/engine/device/base.c | 216 ++++++++++----------- drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c | 40 ---- drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c | 21 -- drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c | 9 - drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c | 28 --- drivers/gpu/drm/nouveau/nvkm/engine/falcon.c | 114 ++++++----- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild | 2 + drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c | 32 +++ drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c | 52 ++--- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c | 49 +---- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c | 53 +---- drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c | 43 ++++ drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h | 11 ++ drivers/gpu/drm/nouveau/nvkm/engine/msppp/Kbuild | 2 + drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.c | 31 +++ drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c | 50 +---- drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c | 49 +---- drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.c | 43 ++++ drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h | 9 + drivers/gpu/drm/nouveau/nvkm/engine/msvld/Kbuild | 3 + drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.c | 31 +++ drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c | 51 +---- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c | 49 +---- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c | 53 +---- drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.c | 43 ++++ drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.c | 43 ++++ drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h | 11 ++ drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c | 43 ++-- 36 files changed, 640 insertions(+), 771 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.c create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c') diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h index 43c18abd4034..d0ce89b5be3a 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h @@ -4,9 +4,8 @@ void gt215_ce_intr(struct nvkm_falcon *, struct nvkm_fifo_chan *); -extern struct nvkm_oclass gt215_ce_oclass; -extern struct nvkm_oclass gf100_ce0_oclass; -extern struct nvkm_oclass gf100_ce1_oclass; +int gt215_ce_new(struct nvkm_device *, int, struct nvkm_engine **); +int gf100_ce_new(struct nvkm_device *, int, struct nvkm_engine **); extern struct nvkm_oclass gk104_ce0_oclass; extern struct nvkm_oclass gk104_ce1_oclass; extern struct nvkm_oclass gk104_ce2_oclass; diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h index cd113fcbfccb..81c0bc66a9f8 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -4,13 +4,9 @@ #include struct nvkm_fifo_chan; -struct nvkm_falcon_data { - bool external; -}; - struct nvkm_falcon { - struct nvkm_engine engine; const struct nvkm_falcon_func *func; + struct nvkm_engine engine; u32 addr; u8 version; @@ -32,32 +28,21 @@ struct nvkm_falcon { } data; }; +int nvkm_falcon_new_(const struct nvkm_falcon_func *, struct nvkm_device *, + int index, bool enable, u32 addr, struct nvkm_engine **); + struct nvkm_falcon_func { + struct { + u32 *data; + u32 size; + } code; + struct { + u32 *data; + u32 size; + } data; + u32 pmc_enable; + void (*init)(struct nvkm_falcon *); void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *); struct nvkm_sclass sclass[]; }; - -#define nv_falcon(priv) ((struct nvkm_falcon *)priv) - -#define nvkm_falcon_create(a,p,e,c,b,d,i,f,r) \ - nvkm_falcon_create_((a), (p), (e), (c), (b), (d), (i), (f), \ - sizeof(**r),(void **)r) -#define nvkm_falcon_destroy(p) \ - nvkm_engine_destroy(&(p)->engine) -#define nvkm_falcon_init(p) ({ \ - struct nvkm_falcon *_falcon = (p); \ - _nvkm_falcon_init(nv_object(_falcon)); \ -}) -#define nvkm_falcon_fini(p,s) ({ \ - struct nvkm_falcon *_falcon = (p); \ - _nvkm_falcon_fini(nv_object(_falcon), (s)); \ -}) - -int nvkm_falcon_create_(const struct nvkm_falcon_func *, - struct nvkm_object *, struct nvkm_object *, - struct nvkm_oclass *, u32, bool, const char *, - const char *, int, void **); -#define _nvkm_falcon_dtor _nvkm_engine_dtor -int _nvkm_falcon_init(struct nvkm_object *); -int _nvkm_falcon_fini(struct nvkm_object *, bool); #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h index 54b7672eed9c..08516ca82e04 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/mspdec.h @@ -1,7 +1,8 @@ #ifndef __NVKM_MSPDEC_H__ #define __NVKM_MSPDEC_H__ -#include -extern struct nvkm_oclass g98_mspdec_oclass; -extern struct nvkm_oclass gf100_mspdec_oclass; -extern struct nvkm_oclass gk104_mspdec_oclass; +#include +int g98_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **); +int gt215_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **); +int gf100_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **); +int gk104_mspdec_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h index c6c69d0a8d01..85fd306021ac 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/msppp.h @@ -1,6 +1,7 @@ #ifndef __NVKM_MSPPP_H__ #define __NVKM_MSPPP_H__ -#include -extern struct nvkm_oclass g98_msppp_oclass; -extern struct nvkm_oclass gf100_msppp_oclass; +#include +int g98_msppp_new(struct nvkm_device *, int, struct nvkm_engine **); +int gt215_msppp_new(struct nvkm_device *, int, struct nvkm_engine **); +int gf100_msppp_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h index 1f193b7bd6c5..99757ed96f76 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/msvld.h @@ -1,7 +1,9 @@ #ifndef __NVKM_MSVLD_H__ #define __NVKM_MSVLD_H__ -#include -extern struct nvkm_oclass g98_msvld_oclass; -extern struct nvkm_oclass gf100_msvld_oclass; -extern struct nvkm_oclass gk104_msvld_oclass; +#include +int g98_msvld_new(struct nvkm_device *, int, struct nvkm_engine **); +int gt215_msvld_new(struct nvkm_device *, int, struct nvkm_engine **); +int mcp89_msvld_new(struct nvkm_device *, int, struct nvkm_engine **); +int gf100_msvld_new(struct nvkm_device *, int, struct nvkm_engine **); +int gk104_msvld_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h index 44590a2a479d..7317ef4c0207 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/sec.h @@ -1,5 +1,5 @@ #ifndef __NVKM_SEC_H__ #define __NVKM_SEC_H__ -#include -extern struct nvkm_oclass g98_sec_oclass; +#include +int g98_sec_new(struct nvkm_device *, int, struct nvkm_engine **); #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c index 3abab3992e7c..e45c6d703c00 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gf100.c @@ -22,30 +22,26 @@ * Authors: Ben Skeggs */ #include -#include #include "fuc/gf100.fuc3.h" #include -static int -gf100_ce_init(struct nvkm_object *object) +static void +gf100_ce_init(struct nvkm_falcon *ce) { - struct nvkm_falcon *ce = (void *)object; struct nvkm_device *device = ce->engine.subdev.device; - const int idx = nv_engidx(&ce->engine) - NVDEV_ENGINE_CE0; - u32 base = idx * 0x1000; - int ret; - - ret = nvkm_falcon_init(ce); - if (ret) - return ret; - - nvkm_wr32(device, 0x104084 + base, idx); - return 0; + const int index = ce->engine.subdev.index - NVDEV_ENGINE_CE0; + nvkm_wr32(device, ce->addr + 0x084, index); } static const struct nvkm_falcon_func -gf100_ce0_func = { +gf100_ce0 = { + .code.data = gf100_ce_code, + .code.size = sizeof(gf100_ce_code), + .data.data = gf100_ce_data, + .data.size = sizeof(gf100_ce_data), + .pmc_enable = 0x00000040, + .init = gf100_ce_init, .intr = gt215_ce_intr, .sclass = { { -1, -1, FERMI_DMA }, @@ -53,30 +49,14 @@ gf100_ce0_func = { } }; -static int -gf100_ce0_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) -{ - struct nvkm_falcon *ce; - int ret; - - ret = nvkm_falcon_create(&gf100_ce0_func, parent, engine, oclass, - 0x104000, true, "PCE0", "ce0", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - nv_subdev(ce)->unit = 0x00000040; - nv_falcon(ce)->code.data = gf100_ce_code; - nv_falcon(ce)->code.size = sizeof(gf100_ce_code); - nv_falcon(ce)->data.data = gf100_ce_data; - nv_falcon(ce)->data.size = sizeof(gf100_ce_data); - return 0; -} - static const struct nvkm_falcon_func -gf100_ce1_func = { +gf100_ce1 = { + .code.data = gf100_ce_code, + .code.size = sizeof(gf100_ce_code), + .data.data = gf100_ce_data, + .data.size = sizeof(gf100_ce_data), + .pmc_enable = 0x00000080, + .init = gf100_ce_init, .intr = gt215_ce_intr, .sclass = { { -1, -1, FERMI_DECOMPRESS }, @@ -84,46 +64,17 @@ gf100_ce1_func = { } }; -static int -gf100_ce1_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gf100_ce_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *ce; - int ret; - - ret = nvkm_falcon_create(&gf100_ce1_func, parent, engine, oclass, - 0x105000, true, "PCE1", "ce1", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - nv_subdev(ce)->unit = 0x00000080; - nv_falcon(ce)->code.data = gf100_ce_code; - nv_falcon(ce)->code.size = sizeof(gf100_ce_code); - nv_falcon(ce)->data.data = gf100_ce_data; - nv_falcon(ce)->data.size = sizeof(gf100_ce_data); - return 0; + if (index == NVDEV_ENGINE_CE0) { + return nvkm_falcon_new_(&gf100_ce0, device, index, true, + 0x104000, pengine); + } else + if (index == NVDEV_ENGINE_CE1) { + return nvkm_falcon_new_(&gf100_ce1, device, index, true, + 0x105000, pengine); + } + return -ENODEV; } - -struct nvkm_oclass -gf100_ce0_oclass = { - .handle = NV_ENGINE(CE0, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_ce0_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_ce_init, - .fini = _nvkm_falcon_fini, - }, -}; - -struct nvkm_oclass -gf100_ce1_oclass = { - .handle = NV_ENGINE(CE1, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_ce1_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_ce_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c index 35e4d578b153..f8223d696598 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gt215.c @@ -61,7 +61,12 @@ gt215_ce_intr(struct nvkm_falcon *ce, struct nvkm_fifo_chan *chan) } static const struct nvkm_falcon_func -gt215_ce_func = { +gt215_ce = { + .code.data = gt215_ce_code, + .code.size = sizeof(gt215_ce_code), + .data.data = gt215_ce_data, + .data.size = sizeof(gt215_ce_data), + .pmc_enable = 0x00802000, .intr = gt215_ce_intr, .sclass = { { -1, -1, GT212_DMA }, @@ -69,36 +74,10 @@ gt215_ce_func = { } }; -static int -gt215_ce_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gt215_ce_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - bool enable = (nv_device(parent)->chipset != 0xaf); - struct nvkm_falcon *ce; - int ret; - - ret = nvkm_falcon_create(>215_ce_func, parent, engine, oclass, - 0x104000, enable, "PCE0", "ce0", &ce); - *pobject = nv_object(ce); - if (ret) - return ret; - - nv_subdev(ce)->unit = 0x00802000; - nv_falcon(ce)->code.data = gt215_ce_code; - nv_falcon(ce)->code.size = sizeof(gt215_ce_code); - nv_falcon(ce)->data.data = gt215_ce_data; - nv_falcon(ce)->data.size = sizeof(gt215_ce_data); - return 0; + return nvkm_falcon_new_(>215_ce, device, index, + (device->chipset != 0xaf), 0x104000, pengine); } - -struct nvkm_oclass -gt215_ce_oclass = { - .handle = NV_ENGINE(CE0, 0xa3), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gt215_ce_ctor, - .dtor = _nvkm_falcon_dtor, - .init = _nvkm_falcon_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c index 7f858efb2c44..0556316e27c8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -1056,10 +1056,10 @@ nv98_chipset = { // .fifo = g84_fifo_new, // .sw = nv50_sw_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .sec = g98_sec_new, -// .msvld = g98_msvld_new, -// .msppp = g98_msppp_new, + .mspdec = g98_mspdec_new, + .sec = g98_sec_new, + .msvld = g98_msvld_new, + .msppp = g98_msppp_new, // .disp = g94_disp_new, // .pm = g84_pm_new, }; @@ -1115,15 +1115,15 @@ nva3_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gt215_ce_new, + .ce[0] = gt215_ce_new, // .disp = gt215_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, // .mpeg = g84_mpeg_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = gt215_mspdec_new, + .msppp = gt215_msppp_new, + .msvld = gt215_msvld_new, // .pm = gt215_pm_new, // .sw = nv50_sw_new, }; @@ -1148,14 +1148,14 @@ nva5_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gt215_ce_new, + .ce[0] = gt215_ce_new, // .disp = gt215_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = gt215_mspdec_new, + .msppp = gt215_msppp_new, + .msvld = gt215_msvld_new, // .pm = gt215_pm_new, // .sw = nv50_sw_new, }; @@ -1180,14 +1180,14 @@ nva8_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gt215_ce_new, + .ce[0] = gt215_ce_new, // .disp = gt215_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = gt215_mspdec_new, + .msppp = gt215_msppp_new, + .msvld = gt215_msvld_new, // .pm = gt215_pm_new, // .sw = nv50_sw_new, }; @@ -1215,11 +1215,11 @@ nvaa_chipset = { // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = g98_mspdec_new, + .msppp = g98_msppp_new, + .msvld = g98_msvld_new, // .pm = g84_pm_new, -// .sec = g98_sec_new, + .sec = g98_sec_new, // .sw = nv50_sw_new, }; @@ -1246,11 +1246,11 @@ nvac_chipset = { // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = g98_mspdec_new, + .msppp = g98_msppp_new, + .msvld = g98_msvld_new, // .pm = g84_pm_new, -// .sec = g98_sec_new, + .sec = g98_sec_new, // .sw = nv50_sw_new, }; @@ -1274,14 +1274,14 @@ nvaf_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gt215_ce_new, + .ce[0] = gt215_ce_new, // .disp = gt215_disp_new, // .dma = nv50_dma_new, // .fifo = g84_fifo_new, // .gr = nv50_gr_new, -// .mspdec = g98_mspdec_new, -// .msppp = g98_msppp_new, -// .msvld = g98_msvld_new, + .mspdec = gt215_mspdec_new, + .msppp = gt215_msppp_new, + .msvld = mcp89_msvld_new, // .pm = gt215_pm_new, // .sw = nv50_sw_new, }; @@ -1308,15 +1308,15 @@ nvc0_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, -// .ce[1] = gf100_ce1_new, + .ce[0] = gf100_ce_new, + .ce[1] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf100_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1343,14 +1343,14 @@ nvc1_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, + .ce[0] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf108_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf108_pm_new, // .sw = gf100_sw_new, }; @@ -1377,14 +1377,14 @@ nvc3_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, + .ce[0] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf104_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1411,15 +1411,15 @@ nvc4_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, -// .ce[1] = gf100_ce1_new, + .ce[0] = gf100_ce_new, + .ce[1] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf104_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1446,15 +1446,15 @@ nvc8_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, -// .ce[1] = gf100_ce1_new, + .ce[0] = gf100_ce_new, + .ce[1] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf110_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1481,15 +1481,15 @@ nvce_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, -// .ce[1] = gf100_ce1_new, + .ce[0] = gf100_ce_new, + .ce[1] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf104_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1516,14 +1516,14 @@ nvcf_chipset = { .therm = gt215_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, + .ce[0] = gf100_ce_new, // .disp = gt215_disp_new, // .dma = gf100_dma_new, // .fifo = gf100_fifo_new, // .gr = gf104_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf100_pm_new, // .sw = gf100_sw_new, }; @@ -1548,14 +1548,14 @@ nvd7_chipset = { .mxm = nv50_mxm_new, .therm = gf119_therm_new, .timer = nv41_timer_new, -// .ce[0] = gf100_ce0_new, + .ce[0] = gf100_ce_new, // .disp = gf119_disp_new, // .dma = gf119_dma_new, // .fifo = gf100_fifo_new, // .gr = gf117_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf117_pm_new, // .sw = gf100_sw_new, }; @@ -1582,14 +1582,14 @@ nvd9_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gf100_ce0_new, + .ce[0] = gf100_ce_new, // .disp = gf119_disp_new, // .dma = gf119_dma_new, // .fifo = gf100_fifo_new, // .gr = gf119_gr_new, -// .mspdec = gf100_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gf100_msvld_new, + .mspdec = gf100_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gf100_msvld_new, // .pm = gf117_pm_new, // .sw = gf100_sw_new, }; @@ -1616,16 +1616,16 @@ nve4_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, // .gr = gk104_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .pm = gk104_pm_new, // .sw = gf100_sw_new, }; @@ -1652,16 +1652,16 @@ nve6_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, // .gr = gk104_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .pm = gk104_pm_new, // .sw = gf100_sw_new, }; @@ -1688,16 +1688,16 @@ nve7_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk104_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, // .gr = gk104_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .pm = gk104_pm_new, // .sw = gf100_sw_new, }; @@ -1748,16 +1748,16 @@ nvf0_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, // .gr = gk110_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .pm = gk110_pm_new, // .sw = gf100_sw_new, }; @@ -1784,16 +1784,16 @@ nvf1_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk104_fifo_new, // .gr = gk110b_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .pm = gk110_pm_new, // .sw = gf100_sw_new, }; @@ -1820,16 +1820,16 @@ nv106_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk208_fifo_new, // .gr = gk208_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .sw = gf100_sw_new, }; @@ -1855,16 +1855,16 @@ nv108_chipset = { .therm = gf119_therm_new, .timer = nv41_timer_new, .volt = nv40_volt_new, -// .ce[0] = gk104_ce0_new, -// .ce[1] = gk104_ce1_new, +// .ce[0] = gk104_ce_new, +// .ce[1] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gk110_disp_new, // .dma = gf119_dma_new, // .fifo = gk208_fifo_new, // .gr = gk208_gr_new, -// .mspdec = gk104_mspdec_new, -// .msppp = gf100_msppp_new, -// .msvld = gk104_msvld_new, + .mspdec = gk104_mspdec_new, + .msppp = gf100_msppp_new, + .msvld = gk104_msvld_new, // .sw = gf100_sw_new, }; @@ -1889,7 +1889,7 @@ nv117_chipset = { .pmu = gm107_pmu_new, .therm = gm107_therm_new, .timer = gk20a_timer_new, -// .ce[0] = gk104_ce0_new, +// .ce[0] = gk104_ce_new, // .ce[2] = gk104_ce2_new, // .disp = gm107_disp_new, // .dma = gf119_dma_new, @@ -1917,8 +1917,8 @@ nv124_chipset = { .mxm = nv50_mxm_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, -// .ce[0] = gm204_ce0_new, -// .ce[1] = gm204_ce1_new, +// .ce[0] = gm204_ce_new, +// .ce[1] = gm204_ce_new, // .ce[2] = gm204_ce2_new, // .disp = gm204_disp_new, // .dma = gf119_dma_new, @@ -1946,8 +1946,8 @@ nv126_chipset = { .mxm = nv50_mxm_new, .pmu = gm107_pmu_new, .timer = gk20a_timer_new, -// .ce[0] = gm204_ce0_new, -// .ce[1] = gm204_ce1_new, +// .ce[0] = gm204_ce_new, +// .ce[1] = gm204_ce_new, // .ce[2] = gm204_ce2_new, // .disp = gm204_disp_new, // .dma = gf119_dma_new, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c index 1f273e108618..336964a0cd92 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c @@ -32,11 +32,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf100_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -45,11 +40,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -58,10 +48,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -70,11 +56,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -83,10 +64,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf104_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -95,10 +72,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf108_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass; break; @@ -107,11 +80,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf110_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; - device->oclass[NVDEV_ENGINE_CE1 ] = &gf100_ce1_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass; break; @@ -120,10 +88,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf119_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass; break; @@ -132,10 +96,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = gf117_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gf100_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gf100_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = &gf100_ce0_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gf110_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass; break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c index 414ff61873b9..1162c030f4a2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c @@ -36,9 +36,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xe7: @@ -50,9 +47,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xe6: @@ -64,9 +58,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass; break; case 0xea: @@ -86,9 +77,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass; break; case 0xf1: @@ -100,9 +88,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass; break; case 0x106: @@ -114,9 +99,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; break; case 0x108: device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; @@ -127,9 +109,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass; device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; break; default: return -EINVAL; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index c16d9586708b..b7b10ca427b8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c @@ -42,9 +42,6 @@ gm100_identify(struct nvkm_device *device) #endif device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass; #if 0 - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; #endif break; case 0x124: @@ -63,9 +60,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; #if 0 - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; #endif break; case 0x126: @@ -84,9 +78,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass; device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass; #if 0 - device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; #endif break; case 0x12b: diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index 7e2a4a93b2a7..bcbf2d8f692a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -101,10 +101,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -125,10 +121,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -137,10 +129,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_SEC ] = &g98_sec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = g94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass; break; @@ -150,10 +138,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; device->oclass[NVDEV_ENGINE_MPEG ] = &g84_mpeg_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; break; @@ -162,10 +146,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; break; @@ -174,10 +154,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; break; @@ -186,10 +162,6 @@ nv50_identify(struct nvkm_device *device) device->oclass[NVDEV_ENGINE_FIFO ] = g84_fifo_oclass; device->oclass[NVDEV_ENGINE_SW ] = nv50_sw_oclass; device->oclass[NVDEV_ENGINE_GR ] = &nv50_gr_oclass; - device->oclass[NVDEV_ENGINE_MSPDEC ] = &g98_mspdec_oclass; - device->oclass[NVDEV_ENGINE_MSVLD ] = &g98_msvld_oclass; - device->oclass[NVDEV_ENGINE_MSPPP ] = &g98_msppp_oclass; - device->oclass[NVDEV_ENGINE_CE0 ] = >215_ce_oclass; device->oclass[NVDEV_ENGINE_DISP ] = gt215_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass; break; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c index 3d3e73cfb6b0..e51372bdbf54 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/falcon.c @@ -54,10 +54,11 @@ nvkm_falcon_cclass = { }; static void -nvkm_falcon_intr(struct nvkm_subdev *subdev) +nvkm_falcon_intr(struct nvkm_engine *engine) { - struct nvkm_falcon *falcon = (void *)subdev; - struct nvkm_device *device = falcon->engine.subdev.device; + struct nvkm_falcon *falcon = nvkm_falcon(engine); + struct nvkm_subdev *subdev = &falcon->engine.subdev; + struct nvkm_device *device = subdev->device; const u32 base = falcon->addr; u32 dest = nvkm_rd32(device, base + 0x01c); u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16); @@ -89,6 +90,27 @@ nvkm_falcon_intr(struct nvkm_subdev *subdev) nvkm_fifo_chan_put(device->fifo, flags, &chan); } +static int +nvkm_falcon_fini(struct nvkm_engine *engine, bool suspend) +{ + struct nvkm_falcon *falcon = nvkm_falcon(engine); + struct nvkm_device *device = falcon->engine.subdev.device; + const u32 base = falcon->addr; + + if (!suspend) { + nvkm_memory_del(&falcon->core); + if (falcon->external) { + vfree(falcon->data.data); + vfree(falcon->code.data); + falcon->code.data = NULL; + } + } + + nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000); + nvkm_wr32(device, base + 0x014, 0xffffffff); + return 0; +} + static void * vmemdup(const void *src, size_t len) { @@ -99,23 +121,16 @@ vmemdup(const void *src, size_t len) return p; } -int -_nvkm_falcon_init(struct nvkm_object *object) +static int +nvkm_falcon_oneinit(struct nvkm_engine *engine) { - struct nvkm_falcon *falcon = (void *)object; + struct nvkm_falcon *falcon = nvkm_falcon(engine); struct nvkm_subdev *subdev = &falcon->engine.subdev; struct nvkm_device *device = subdev->device; - const struct firmware *fw; - char name[32] = "internal"; const u32 base = falcon->addr; - int ret, i; u32 caps; - /* enable engine, and determine its capabilities */ - ret = nvkm_engine_init_old(&falcon->engine); - if (ret) - return ret; - + /* determine falcon capabilities */ if (device->chipset < 0xa3 || device->chipset == 0xaa || device->chipset == 0xac) { falcon->version = 0; @@ -134,6 +149,19 @@ _nvkm_falcon_init(struct nvkm_object *object) nvkm_debug(subdev, "secret level: %d\n", falcon->secret); nvkm_debug(subdev, "code limit: %d\n", falcon->code.limit); nvkm_debug(subdev, "data limit: %d\n", falcon->data.limit); + return 0; +} + +static int +nvkm_falcon_init(struct nvkm_engine *engine) +{ + struct nvkm_falcon *falcon = nvkm_falcon(engine); + struct nvkm_subdev *subdev = &falcon->engine.subdev; + struct nvkm_device *device = subdev->device; + const struct firmware *fw; + char name[32] = "internal"; + const u32 base = falcon->addr; + int ret, i; /* wait for 'uc halted' to be signalled before continuing */ if (falcon->secret && falcon->version < 4) { @@ -279,56 +307,46 @@ _nvkm_falcon_init(struct nvkm_object *object) nvkm_wr32(device, base + 0x104, 0x00000000); /* ENTRY */ nvkm_wr32(device, base + 0x100, 0x00000002); /* TRIGGER */ nvkm_wr32(device, base + 0x048, 0x00000003); /* FIFO | CHSW */ + + if (falcon->func->init) + falcon->func->init(falcon); return 0; } -int -_nvkm_falcon_fini(struct nvkm_object *object, bool suspend) +static void * +nvkm_falcon_dtor(struct nvkm_engine *engine) { - struct nvkm_falcon *falcon = (void *)object; - struct nvkm_device *device = falcon->engine.subdev.device; - const u32 base = falcon->addr; - - if (!suspend) { - nvkm_memory_del(&falcon->core); - if (falcon->external) { - vfree(falcon->data.data); - vfree(falcon->code.data); - falcon->code.data = NULL; - } - } - - nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000); - nvkm_wr32(device, base + 0x014, 0xffffffff); - - return nvkm_engine_fini_old(&falcon->engine, suspend); + return nvkm_falcon(engine); } static const struct nvkm_engine_func nvkm_falcon = { + .dtor = nvkm_falcon_dtor, + .oneinit = nvkm_falcon_oneinit, + .init = nvkm_falcon_init, + .fini = nvkm_falcon_fini, + .intr = nvkm_falcon_intr, .fifo.sclass = nvkm_falcon_oclass_get, .cclass = &nvkm_falcon_cclass, }; int -nvkm_falcon_create_(const struct nvkm_falcon_func *func, - struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, u32 addr, bool enable, - const char *iname, const char *fname, - int length, void **pobject) +nvkm_falcon_new_(const struct nvkm_falcon_func *func, + struct nvkm_device *device, int index, bool enable, + u32 addr, struct nvkm_engine **pengine) { struct nvkm_falcon *falcon; - int ret; - - ret = nvkm_engine_create_(parent, engine, oclass, enable, iname, - fname, length, pobject); - falcon = *pobject; - if (ret) - return ret; - falcon->engine.subdev.intr = nvkm_falcon_intr; - falcon->engine.func = &nvkm_falcon; + if (!(falcon = kzalloc(sizeof(*falcon), GFP_KERNEL))) + return -ENOMEM; falcon->func = func; falcon->addr = addr; - return 0; + falcon->code.data = func->code.data; + falcon->code.size = func->code.size; + falcon->data.data = func->data.data; + falcon->data.size = func->data.size; + *pengine = &falcon->engine; + + return nvkm_engine_ctor(&nvkm_falcon, device, index, func->pmc_enable, + enable, &falcon->engine); } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild index c59c83a67315..1a7151146e9d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/Kbuild @@ -1,3 +1,5 @@ +nvkm-y += nvkm/engine/mspdec/base.o nvkm-y += nvkm/engine/mspdec/g98.o +nvkm-y += nvkm/engine/mspdec/gt215.o nvkm-y += nvkm/engine/mspdec/gf100.o nvkm-y += nvkm/engine/mspdec/gk104.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c new file mode 100644 index 000000000000..80211f76093b --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/base.c @@ -0,0 +1,32 @@ +/* + * Copyright 2015 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" + +int +nvkm_mspdec_new_(const struct nvkm_falcon_func *func, + struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_falcon_new_(func, device, index, true, 0x085000, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c index f14971783270..1f1a99e927b2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/g98.c @@ -21,61 +21,31 @@ * * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin */ -#include -#include +#include "priv.h" #include -static int -g98_mspdec_init(struct nvkm_object *object) +void +g98_mspdec_init(struct nvkm_falcon *mspdec) { - struct nvkm_falcon *mspdec = (void *)object; struct nvkm_device *device = mspdec->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(mspdec); - if (ret) - return ret; - nvkm_wr32(device, 0x085010, 0x0000ffd2); nvkm_wr32(device, 0x08501c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -g98_mspdec_func = { +g98_mspdec = { + .pmc_enable = 0x01020000, + .init = g98_mspdec_init, .sclass = { { -1, -1, G98_MSPDEC }, - { -1, -1, GT212_MSPDEC }, {} - }, + } }; -static int -g98_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +g98_mspdec_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *mspdec; - int ret; - - ret = nvkm_falcon_create(&g98_mspdec_func, parent, engine, oclass, - 0x085000, true, "PMSPDEC", "mspdec", &mspdec); - *pobject = nv_object(mspdec); - if (ret) - return ret; - - nv_subdev(mspdec)->unit = 0x01020000; - return 0; + return nvkm_mspdec_new_(&g98_mspdec, device, index, pengine); } - -struct nvkm_oclass -g98_mspdec_oclass = { - .handle = NV_ENGINE(MSPDEC, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = g98_mspdec_ctor, - .dtor = _nvkm_falcon_dtor, - .init = g98_mspdec_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c index 1296f775ea31..371fd6c3c663 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gf100.c @@ -21,60 +21,31 @@ * * Authors: Maarten Lankhorst */ -#include -#include +#include "priv.h" #include -static int -gf100_mspdec_init(struct nvkm_object *object) +void +gf100_mspdec_init(struct nvkm_falcon *mspdec) { - struct nvkm_falcon *mspdec = (void *)object; struct nvkm_device *device = mspdec->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(mspdec); - if (ret) - return ret; - nvkm_wr32(device, 0x085010, 0x0000fff2); nvkm_wr32(device, 0x08501c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -gf100_mspdec_func = { +gf100_mspdec = { + .pmc_enable = 0x00020000, + .init = gf100_mspdec_init, .sclass = { { -1, -1, GF100_MSPDEC }, {} } }; -static int -gf100_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gf100_mspdec_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *mspdec; - int ret; - - ret = nvkm_falcon_create(&gf100_mspdec_func, parent, engine, oclass, - 0x085000, true, "PMSPDEC", "mspdec", &mspdec); - *pobject = nv_object(mspdec); - if (ret) - return ret; - - nv_subdev(mspdec)->unit = 0x00020000; - return 0; + return nvkm_mspdec_new_(&gf100_mspdec, device, index, pengine); } - -struct nvkm_oclass -gf100_mspdec_oclass = { - .handle = NV_ENGINE(MSPDEC, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_mspdec_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_mspdec_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c index 315da1695c72..de804a15bfd4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gk104.c @@ -21,60 +21,23 @@ * * Authors: Ben Skeggs */ -#include -#include +#include "priv.h" #include -static int -gk104_mspdec_init(struct nvkm_object *object) -{ - struct nvkm_falcon *mspdec = (void *)object; - struct nvkm_device *device = mspdec->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(mspdec); - if (ret) - return ret; - - nvkm_wr32(device, 0x085010, 0x0000fff2); - nvkm_wr32(device, 0x08501c, 0x0000fff2); - return 0; -} - static const struct nvkm_falcon_func -gk104_mspdec_func = { +gk104_mspdec = { + .pmc_enable = 0x00020000, + .init = gf100_mspdec_init, .sclass = { { -1, -1, GK104_MSPDEC }, {} } }; -static int -gk104_mspdec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gk104_mspdec_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *falcon; - int ret; - - ret = nvkm_falcon_create(&gk104_mspdec_func, parent, engine, oclass, - 0x085000, true, "PMSPDEC", "mspdec", &falcon); - *pobject = nv_object(falcon); - if (ret) - return ret; - - nv_subdev(falcon)->unit = 0x00020000; - return 0; + return nvkm_mspdec_new_(&gk104_mspdec, device, index, pengine); } - -struct nvkm_oclass -gk104_mspdec_oclass = { - .handle = NV_ENGINE(MSPDEC, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gk104_mspdec_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gk104_mspdec_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c new file mode 100644 index 000000000000..835631713c95 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/gt215.c @@ -0,0 +1,43 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin + */ +#include "priv.h" + +#include + +static const struct nvkm_falcon_func +gt215_mspdec = { + .pmc_enable = 0x01020000, + .init = g98_mspdec_init, + .sclass = { + { -1, -1, GT212_MSPDEC }, + {} + } +}; + +int +gt215_mspdec_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_mspdec_new_(>215_mspdec, device, index, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h new file mode 100644 index 000000000000..d518af4bc9de --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/mspdec/priv.h @@ -0,0 +1,11 @@ +#ifndef __NVKM_MSPDEC_PRIV_H__ +#define __NVKM_MSPDEC_PRIV_H__ +#include + +int nvkm_mspdec_new_(const struct nvkm_falcon_func *, struct nvkm_device *, + int index, struct nvkm_engine **); + +void g98_mspdec_init(struct nvkm_falcon *); + +void gf100_mspdec_init(struct nvkm_falcon *); +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/Kbuild index 4576a9eee39d..3ea7eafb408f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/Kbuild @@ -1,2 +1,4 @@ +nvkm-y += nvkm/engine/msppp/base.o nvkm-y += nvkm/engine/msppp/g98.o +nvkm-y += nvkm/engine/msppp/gt215.o nvkm-y += nvkm/engine/msppp/gf100.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.c new file mode 100644 index 000000000000..bfae5e60e925 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/base.c @@ -0,0 +1,31 @@ +/* + * Copyright 2015 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" + +int +nvkm_msppp_new_(const struct nvkm_falcon_func *func, struct nvkm_device *device, + int index, struct nvkm_engine **pengine) +{ + return nvkm_falcon_new_(func, device, index, true, 0x086000, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c index 314736d6aa5b..73f633ae2ee7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/g98.c @@ -21,61 +21,31 @@ * * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin */ -#include -#include +#include "priv.h" #include -static int -g98_msppp_init(struct nvkm_object *object) +void +g98_msppp_init(struct nvkm_falcon *msppp) { - struct nvkm_falcon *msppp = (void *)object; struct nvkm_device *device = msppp->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(msppp); - if (ret) - return ret; - nvkm_wr32(device, 0x086010, 0x0000ffd2); nvkm_wr32(device, 0x08601c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -g98_msppp_func = { +g98_msppp = { + .pmc_enable = 0x00400002, + .init = g98_msppp_init, .sclass = { { -1, -1, G98_MSPPP }, - { -1, -1, GT212_MSPPP }, {} } }; -static int -g98_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +g98_msppp_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *msppp; - int ret; - - ret = nvkm_falcon_create(&g98_msppp_func, parent, engine, oclass, - 0x086000, true, "PMSPPP", "msppp", &msppp); - *pobject = nv_object(msppp); - if (ret) - return ret; - - nv_subdev(msppp)->unit = 0x00400002; - return 0; + return nvkm_msppp_new_(&g98_msppp, device, index, pengine); } - -struct nvkm_oclass -g98_msppp_oclass = { - .handle = NV_ENGINE(MSPPP, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = g98_msppp_ctor, - .dtor = _nvkm_falcon_dtor, - .init = g98_msppp_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c index f977c2adf9d2..c42c0c07e2db 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c @@ -21,60 +21,31 @@ * * Authors: Maarten Lankhorst */ -#include -#include +#include "priv.h" #include -static int -gf100_msppp_init(struct nvkm_object *object) +static void +gf100_msppp_init(struct nvkm_falcon *msppp) { - struct nvkm_falcon *msppp = (void *)object; struct nvkm_device *device = msppp->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(msppp); - if (ret) - return ret; - nvkm_wr32(device, 0x086010, 0x0000fff2); nvkm_wr32(device, 0x08601c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -gf100_msppp_func = { +gf100_msppp = { + .pmc_enable = 0x00000002, + .init = gf100_msppp_init, .sclass = { { -1, -1, GF100_MSPPP }, {} } }; -static int -gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gf100_msppp_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *msppp; - int ret; - - ret = nvkm_falcon_create(&gf100_msppp_func, parent, engine, oclass, - 0x086000, true, "PMSPPP", "msppp", &msppp); - *pobject = nv_object(msppp); - if (ret) - return ret; - - nv_subdev(msppp)->unit = 0x00000002; - return 0; + return nvkm_msppp_new_(&gf100_msppp, device, index, pengine); } - -struct nvkm_oclass -gf100_msppp_oclass = { - .handle = NV_ENGINE(MSPPP, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_msppp_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_msppp_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.c new file mode 100644 index 000000000000..00e7795f1d51 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gt215.c @@ -0,0 +1,43 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin + */ +#include "priv.h" + +#include + +static const struct nvkm_falcon_func +gt215_msppp = { + .pmc_enable = 0x00400002, + .init = g98_msppp_init, + .sclass = { + { -1, -1, GT212_MSPPP }, + {} + } +}; + +int +gt215_msppp_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_msppp_new_(>215_msppp, device, index, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h new file mode 100644 index 000000000000..37a91f9d9181 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msppp/priv.h @@ -0,0 +1,9 @@ +#ifndef __NVKM_MSPPP_PRIV_H__ +#define __NVKM_MSPPP_PRIV_H__ +#include + +int nvkm_msppp_new_(const struct nvkm_falcon_func *, struct nvkm_device *, + int index, struct nvkm_engine **); + +void g98_msppp_init(struct nvkm_falcon *); +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/Kbuild index 0c9811009e28..28c8ecd27b6d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/Kbuild @@ -1,3 +1,6 @@ +nvkm-y += nvkm/engine/msvld/base.o nvkm-y += nvkm/engine/msvld/g98.o +nvkm-y += nvkm/engine/msvld/gt215.o +nvkm-y += nvkm/engine/msvld/mcp89.o nvkm-y += nvkm/engine/msvld/gf100.o nvkm-y += nvkm/engine/msvld/gk104.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.c new file mode 100644 index 000000000000..745bbb653dc0 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/base.c @@ -0,0 +1,31 @@ +/* + * Copyright 2015 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ +#include "priv.h" + +int +nvkm_msvld_new_(const struct nvkm_falcon_func *func, struct nvkm_device *device, + int index, struct nvkm_engine **pengine) +{ + return nvkm_falcon_new_(func, device, index, true, 0x084000, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c index 0ee767373f79..47e2929bfaf0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/g98.c @@ -21,62 +21,31 @@ * * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin */ -#include -#include +#include "priv.h" #include -static int -g98_msvld_init(struct nvkm_object *object) +void +g98_msvld_init(struct nvkm_falcon *msvld) { - struct nvkm_falcon *msvld = (void *)object; struct nvkm_device *device = msvld->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(msvld); - if (ret) - return ret; - nvkm_wr32(device, 0x084010, 0x0000ffd2); nvkm_wr32(device, 0x08401c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -g98_msvld_func = { +g98_msvld = { + .pmc_enable = 0x04008000, + .init = g98_msvld_init, .sclass = { { -1, -1, G98_MSVLD }, - { -1, -1, GT212_MSVLD }, - { -1, -1, IGT21A_MSVLD }, {} } }; -static int -g98_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +g98_msvld_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *msvld; - int ret; - - ret = nvkm_falcon_create(&g98_msvld_func, parent, engine, oclass, - 0x084000, true, "PMSVLD", "msvld", &msvld); - *pobject = nv_object(msvld); - if (ret) - return ret; - - nv_subdev(msvld)->unit = 0x04008000; - return 0; + return nvkm_msvld_new_(&g98_msvld, device, index, pengine); } - -struct nvkm_oclass -g98_msvld_oclass = { - .handle = NV_ENGINE(MSVLD, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = g98_msvld_ctor, - .dtor = _nvkm_falcon_dtor, - .init = g98_msvld_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c index 839d648dcfdf..1ac581ba9f96 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gf100.c @@ -21,60 +21,31 @@ * * Authors: Maarten Lankhorst */ -#include -#include +#include "priv.h" #include -static int -gf100_msvld_init(struct nvkm_object *object) +void +gf100_msvld_init(struct nvkm_falcon *msvld) { - struct nvkm_falcon *msvld = (void *)object; struct nvkm_device *device = msvld->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(msvld); - if (ret) - return ret; - nvkm_wr32(device, 0x084010, 0x0000fff2); nvkm_wr32(device, 0x08401c, 0x0000fff2); - return 0; } static const struct nvkm_falcon_func -gf100_msvld_func = { +gf100_msvld = { + .pmc_enable = 0x00008000, + .init = gf100_msvld_init, .sclass = { { -1, -1, GF100_MSVLD }, {} } }; -static int -gf100_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gf100_msvld_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *msvld; - int ret; - - ret = nvkm_falcon_create(&gf100_msvld_func, parent, engine, oclass, - 0x084000, true, "PMSVLD", "msvld", &msvld); - *pobject = nv_object(msvld); - if (ret) - return ret; - - nv_subdev(msvld)->unit = 0x00008000; - return 0; + return nvkm_msvld_new_(&gf100_msvld, device, index, pengine); } - -struct nvkm_oclass -gf100_msvld_oclass = { - .handle = NV_ENGINE(MSVLD, 0xc0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gf100_msvld_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gf100_msvld_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c index 74bdca359d4a..4bba16e0f560 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gk104.c @@ -21,60 +21,23 @@ * * Authors: Ben Skeggs */ -#include -#include +#include "priv.h" #include -static int -gk104_msvld_init(struct nvkm_object *object) -{ - struct nvkm_falcon *msvld = (void *)object; - struct nvkm_device *device = msvld->engine.subdev.device; - int ret; - - ret = nvkm_falcon_init(msvld); - if (ret) - return ret; - - nvkm_wr32(device, 0x084010, 0x0000fff2); - nvkm_wr32(device, 0x08401c, 0x0000fff2); - return 0; -} - static const struct nvkm_falcon_func -gk104_msvld_func = { +gk104_msvld = { + .pmc_enable = 0x00008000, + .init = gf100_msvld_init, .sclass = { { -1, -1, GK104_MSVLD }, {} } }; -static int -gk104_msvld_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +gk104_msvld_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *msvld; - int ret; - - ret = nvkm_falcon_create(&gk104_msvld_func, parent, engine, oclass, - 0x084000, true, "PMSVLD", "msvld", &msvld); - *pobject = nv_object(msvld); - if (ret) - return ret; - - nv_subdev(msvld)->unit = 0x00008000; - return 0; + return nvkm_msvld_new_(&gk104_msvld, device, index, pengine); } - -struct nvkm_oclass -gk104_msvld_oclass = { - .handle = NV_ENGINE(MSVLD, 0xe0), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = gk104_msvld_ctor, - .dtor = _nvkm_falcon_dtor, - .init = gk104_msvld_init, - .fini = _nvkm_falcon_fini, - }, -}; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.c new file mode 100644 index 000000000000..e17cb5605b2d --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/gt215.c @@ -0,0 +1,43 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin + */ +#include "priv.h" + +#include + +static const struct nvkm_falcon_func +gt215_msvld = { + .pmc_enable = 0x04008000, + .init = g98_msvld_init, + .sclass = { + { -1, -1, GT212_MSVLD }, + {} + } +}; + +int +gt215_msvld_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_msvld_new_(>215_msvld, device, index, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.c new file mode 100644 index 000000000000..511800f6a43b --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/mcp89.c @@ -0,0 +1,43 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs, Maarten Lankhorst, Ilia Mirkin + */ +#include "priv.h" + +#include + +static const struct nvkm_falcon_func +mcp89_msvld = { + .pmc_enable = 0x04008000, + .init = g98_msvld_init, + .sclass = { + { -1, -1, IGT21A_MSVLD }, + {} + } +}; + +int +mcp89_msvld_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) +{ + return nvkm_msvld_new_(&mcp89_msvld, device, index, pengine); +} diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h new file mode 100644 index 000000000000..9dc1da67d929 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/msvld/priv.h @@ -0,0 +1,11 @@ +#ifndef __NVKM_MSVLD_PRIV_H__ +#define __NVKM_MSVLD_PRIV_H__ +#include + +int nvkm_msvld_new_(const struct nvkm_falcon_func *, struct nvkm_device *, + int index, struct nvkm_engine **); + +void g98_msvld_init(struct nvkm_falcon *); + +void gf100_msvld_init(struct nvkm_falcon *); +#endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c index aae0e85b1075..1ec4f4fde1c2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/sec/g98.c @@ -22,7 +22,6 @@ * Authors: Ben Skeggs */ #include -#include #include #include "fuc/g98.fuc0s.h" @@ -61,7 +60,12 @@ g98_sec_intr(struct nvkm_falcon *sec, struct nvkm_fifo_chan *chan) } static const struct nvkm_falcon_func -g98_sec_func = { +g98_sec = { + .code.data = g98_sec_code, + .code.size = sizeof(g98_sec_code), + .data.data = g98_sec_data, + .data.size = sizeof(g98_sec_data), + .pmc_enable = 0x00004000, .intr = g98_sec_intr, .sclass = { { -1, -1, G98_SEC }, @@ -69,35 +73,10 @@ g98_sec_func = { } }; -static int -g98_sec_ctor(struct nvkm_object *parent, struct nvkm_object *engine, - struct nvkm_oclass *oclass, void *data, u32 size, - struct nvkm_object **pobject) +int +g98_sec_new(struct nvkm_device *device, int index, + struct nvkm_engine **pengine) { - struct nvkm_falcon *sec; - int ret; - - ret = nvkm_falcon_create(&g98_sec_func, parent, engine, oclass, - 0x087000, true, "PSEC", "sec", &sec); - *pobject = nv_object(sec); - if (ret) - return ret; - - nv_subdev(sec)->unit = 0x00004000; - nv_falcon(sec)->code.data = g98_sec_code; - nv_falcon(sec)->code.size = sizeof(g98_sec_code); - nv_falcon(sec)->data.data = g98_sec_data; - nv_falcon(sec)->data.size = sizeof(g98_sec_data); - return 0; + return nvkm_falcon_new_(&g98_sec, device, index, + true, 0x087000, pengine); } - -struct nvkm_oclass -g98_sec_oclass = { - .handle = NV_ENGINE(SEC, 0x98), - .ofuncs = &(struct nvkm_ofuncs) { - .ctor = g98_sec_ctor, - .dtor = _nvkm_falcon_dtor, - .init = _nvkm_falcon_init, - .fini = _nvkm_falcon_fini, - }, -}; -- cgit v1.2.3