From f169660ed4e57a03e6f6ed07fe192dbcb7687a0d Mon Sep 17 00:00:00 2001 From: Jim Bride Date: Wed, 7 Sep 2016 15:47:34 -0700 Subject: drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT Add the PLL selection code for HSW/BDW/BXT/SKL into a stand-alone function in order to allow for the implementation of a platform neutral upfront link training function. v4: * Removed dereferencing NULL pointer in case of failure (Dhinakaran Pandiyan) v3: * Add Hooks for all DDI platforms into this standalone function v2: * Change the macro to use dev_priv instead of dev (David Weinehall) Reviewed-by: Durgadoss R Signed-off-by: Manasi Navare Signed-off-by: Jim Bride Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h') diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h index aed74084f759..f4385353bc11 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h @@ -168,6 +168,8 @@ bool bxt_ddi_dp_set_dpll_hw_state(int clock, /* SKL dpll related functions */ bool skl_ddi_dp_set_dpll_hw_state(int clock, struct intel_dpll_hw_state *dpll_hw_state); +struct intel_shared_dpll *skl_find_link_pll(struct drm_i915_private *dev_priv, + int clock); /* HSW dpll related functions */ -- cgit v1.2.3