From 3f488d99858d22f584e1734f317bfcff9dbdf4fd Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 13 Jun 2017 12:23:01 +0100 Subject: drm/i915/perf: rework mux configurations queries Gen8+ might have mux configurations per slices/subslices. Depending on whether slices/subslices have been fused off, only part of the configuration needs to be applied. This change reworks the mux configurations query mechanism to allow more than one set of registers to be programmed. v2: s/n_mux_regs/n_mux_configs/ (Matthew) Signed-off-by: Lionel Landwerlin Reviewed-by: Matthew Auld Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_oa_hsw.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/i915/i915_oa_hsw.h') diff --git a/drivers/gpu/drm/i915/i915_oa_hsw.h b/drivers/gpu/drm/i915/i915_oa_hsw.h index 429a229b5158..6fe7e0690ef3 100644 --- a/drivers/gpu/drm/i915/i915_oa_hsw.h +++ b/drivers/gpu/drm/i915/i915_oa_hsw.h @@ -1,5 +1,7 @@ /* - * Autogenerated file, DO NOT EDIT manually! + * Autogenerated file by GPU Top : https://github.com/rib/gputop + * DO NOT EDIT manually! + * * * Copyright (c) 2015 Intel Corporation * -- cgit v1.2.3