From 6376931babd833dbd6f51e22a3de449ce6c60d61 Mon Sep 17 00:00:00 2001 From: Moritz Fischer Date: Mon, 19 Oct 2015 13:35:33 -0700 Subject: fpga: zynq-fpga: Fix unbalanced clock handling This commit fixes the unbalanced clock handling, where a failed probe would leave the clock with an enable count of -1. Reported-by: Josh Cartwright Signed-off-by: Moritz Fischer Signed-off-by: Greg Kroah-Hartman --- drivers/fpga/zynq-fpga.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/fpga/zynq-fpga.c') diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c index 103303c88937..617d38281f49 100644 --- a/drivers/fpga/zynq-fpga.c +++ b/drivers/fpga/zynq-fpga.c @@ -487,7 +487,7 @@ static int zynq_fpga_probe(struct platform_device *pdev) &zynq_fpga_ops, priv); if (err) { dev_err(dev, "unable to register FPGA manager"); - clk_disable_unprepare(priv->clk); + clk_unprepare(priv->clk); return err; } @@ -502,7 +502,7 @@ static int zynq_fpga_remove(struct platform_device *pdev) priv = platform_get_drvdata(pdev); - clk_disable_unprepare(priv->clk); + clk_unprepare(priv->clk); return 0; } -- cgit v1.2.3