From 2b083d65ff11e02b967d9f6e68aea7722eba9ea4 Mon Sep 17 00:00:00 2001 From: Thor Thayer Date: Wed, 22 Jun 2016 08:58:53 -0500 Subject: EDAC, altera: Add panic flag check to A10 IRQ In preparation for additional memory module ECCs, the IRQ function will check a panic flag before doing a kernel panic on double bit errors. OCRAM uncorrectable errors cause a panic because sleep/resume functions and FPGA contents during sleep are stored in OCRAM. ECCs on peripheral FIFO buffers will not cause a kernel panic on DBERRs because the packet can be retried and therefore recovered. Signed-off-by: Thor Thayer Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac Link: http://lkml.kernel.org/r/1466603939-7526-3-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov --- drivers/edac/altera_edac.h | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/edac/altera_edac.h') diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 62b0fa010f95..cf4e8cb1d120 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -298,6 +298,7 @@ struct edac_device_prv_data { irqreturn_t (*ecc_irq_handler)(int irq, void *dev_id); int trig_alloc_sz; const struct file_operations *inject_fops; + bool panic; }; struct altr_edac_device_dev { -- cgit v1.2.3