From a95791efa72a08d3824713a75235d0407c0715dc Mon Sep 17 00:00:00 2001 From: "Suzuki K. Poulose" Date: Tue, 26 May 2015 10:53:15 +0100 Subject: arm-cci: Add CCI-500 PMU support CCI-500 provides 8 event counters which can count any of the supported events independently. The PMU event id is a 9-bit value made of two parts. bits [8:5] - Source port 0x0-0x6 Slave Ports 0x8-0xD Master Ports 0xf Global Events to CCI 0x7,0xe Reserved bits [0:4] - Event code (specific to each type of port) The generic CCI-500 controlling interface remains the same with CCI-400. However there are some differences in the PMU event counters. - No cycle counter - Upto 8 counters(4 in CCI-400) - Each counter area is 64K(4K in CCI400) - The counter0 starts at offset 0x10000 from the base of CCI Cc: Punit Agrawal Cc: Mark Rutland Cc: Will Deacon Cc: devicetree@vger.kernel.org Signed-off-by: Suzuki K. Poulose Acked-by: Punit Agrawal Signed-off-by: Arnd Bergmann --- drivers/bus/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/bus/Kconfig') diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index a857936beac8..1a82f3a17681 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -34,6 +34,20 @@ config ARM_CCI400_PORT_CTRL Low level power management driver for CCI400 cache coherent interconnect for ARM platforms. +config ARM_CCI500_PMU + bool "ARM CCI500 PMU support" + default y + depends on (ARM && CPU_V7) || ARM64 + depends on PERF_EVENTS + select ARM_CCI_PMU + help + Support for PMU events monitoring on the ARM CCI-500 cache coherent + interconnect. CCI-500 provides 8 independent event counters, which + can count events pertaining to the slave/master interfaces as well + as the internal events to the CCI. + + If unsure, say Y + config ARM_CCN bool "ARM CCN driver support" depends on ARM || ARM64 -- cgit v1.2.3