From 5f61ffb5cfd516c62bae69535e28b0085210b3ae Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:24:59 +0100 Subject: ARM: shmobile: genmai dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r7s72100-genmai.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r7s72100-genmai.dts b/arch/arm/boot/dts/r7s72100-genmai.dts index 1518c5bcca33..a9da7a89fc4b 100644 --- a/arch/arm/boot/dts/r7s72100-genmai.dts +++ b/arch/arm/boot/dts/r7s72100-genmai.dts @@ -45,7 +45,7 @@ }; &mtu2 { - status = "ok"; + status = "okay"; }; &i2c2 { -- cgit v1.2.3 From 16d3b8845ef3934a0586df5662254d54785d7741 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:00 +0100 Subject: ARM: shmobile: armadillo800eva dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts index d4af4d86c6b0..9bd0cb439f44 100644 --- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts +++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts @@ -172,7 +172,7 @@ pinctrl-names = "default"; phy-handle = <&phy0>; - status = "ok"; + status = "okay"; phy0: ethernet-phy@0 { reg = <0>; @@ -193,7 +193,7 @@ }; &cmt1 { - status = "ok"; + status = "okay"; }; &i2c0 { -- cgit v1.2.3 From fd7a8cbf0eec4a4f4191a22c879e2f8258257ca6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:01 +0100 Subject: ARM: shmobile: lager dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 636d53bb87a2..56e66bb53657 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -355,7 +355,7 @@ phy-handle = <&phy1>; renesas,ether-link-active-low; - status = "ok"; + status = "okay"; phy1: ethernet-phy@1 { reg = <1>; @@ -366,7 +366,7 @@ }; &cmt0 { - status = "ok"; + status = "okay"; }; &mmcif1 { @@ -470,17 +470,17 @@ }; &iic0 { - status = "ok"; + status = "okay"; }; &iic1 { - status = "ok"; + status = "okay"; pinctrl-0 = <&iic1_pins>; pinctrl-names = "default"; }; &iic2 { - status = "ok"; + status = "okay"; pinctrl-0 = <&iic2_pins>; pinctrl-names = "default"; @@ -562,7 +562,7 @@ pinctrl-0 = <&vin1_pins>; pinctrl-names = "default"; - status = "ok"; + status = "okay"; port { #address-cells = <1>; -- cgit v1.2.3 From deb9eb3ea1e5fa685b53744f1ff291ee18118029 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:02 +0100 Subject: ARM: shmobile: henninger dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-henninger.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-henninger.dts b/arch/arm/boot/dts/r8a7791-henninger.dts index 740e38678032..d2ebf11f9881 100644 --- a/arch/arm/boot/dts/r8a7791-henninger.dts +++ b/arch/arm/boot/dts/r8a7791-henninger.dts @@ -156,7 +156,7 @@ phy-handle = <&phy1>; renesas,ether-link-active-low; - status = "ok"; + status = "okay"; phy1: ethernet-phy@1 { reg = <1>; @@ -293,7 +293,7 @@ /* composite video input */ &vin0 { - status = "ok"; + status = "okay"; pinctrl-0 = <&vin0_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 815446d624f692b197ec5dde00cf341196513e03 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:03 +0100 Subject: ARM: shmobile: koelsch dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 990af167c551..e2faa6261058 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -366,7 +366,7 @@ phy-handle = <&phy1>; renesas,ether-link-active-low; - status = "ok"; + status = "okay"; phy1: ethernet-phy@1 { reg = <1>; @@ -377,7 +377,7 @@ }; &cmt0 { - status = "ok"; + status = "okay"; }; &sata0 { @@ -563,7 +563,7 @@ /* composite video input */ &vin1 { - status = "ok"; + status = "okay"; pinctrl-0 = <&vin1_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 38e02908f3a4bf261c618893649e88bc92197566 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:04 +0100 Subject: ARM: shmobile: alt dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index f2cf7576bf3f..0d848e605071 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -40,9 +40,9 @@ }; &cmt0 { - status = "ok"; + status = "okay"; }; &scif2 { - status = "ok"; + status = "okay"; }; -- cgit v1.2.3 From 338d1f0b5e877eae51c885da81d86b0efd6373e7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 9 Dec 2014 12:25:05 +0100 Subject: ARM: shmobile: kzm9g-reference dts: Replace status value "ok" by "okay" While the DT parsing code recognizes "ok" as a valid value for the "status" property, ePAPR v1.1 doesn't mention it in the list of valid values. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index 939be1299ca6..863dc4c7d7f6 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -179,7 +179,7 @@ }; &cmt1 { - status = "ok"; + status = "okay"; }; &i2c0 { -- cgit v1.2.3 From b5c107f03b65e14a70d86654cf2427bdc7e4afe6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 2 Dec 2014 18:35:55 +0100 Subject: ARM: shmobile: ape6evm-reference: Correct BSC bus range The address space for the r8a73a4 Bus State Controller covers the first 512 MiB, not the first 2 GiB. Correct the size in the "ranges" property to reflect this, and to no longer overlap with PCI Express Memory. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts index 84e05f713c54..b3d8f844b57a 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts @@ -67,7 +67,7 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0 0 0x80000000>; + ranges = <0 0 0 0x20000000>; }; }; -- cgit v1.2.3 From 9f04e56749bf6da4cb36a6bc703e584b496c26f4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 10 Nov 2014 19:49:35 +0100 Subject: ARM: shmobile: r8a7740 dtsi: Change to using clock-indices With the addition of clock-indices in commit 8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using clock-indices"), we can change the DTSes to use the generic property instead of the deprecated vendor-specific property. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Acked-by: Laurent Pinchart Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index a8a674bafa67..60ca62254536 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -453,7 +453,7 @@ reg = <0xe6150080 4>; clocks = <&sub_clk>, <&sub_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7740_CLK_SUBCK R8A7740_CLK_SUBCK2 >; clock-output-names = @@ -468,7 +468,7 @@ <&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>, <&cpg_clocks R8A7740_CLK_B>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7740_CLK_CEU21 R8A7740_CLK_CEU20 R8A7740_CLK_TMU0 R8A7740_CLK_LCDC1 R8A7740_CLK_IIC0 R8A7740_CLK_TMU1 R8A7740_CLK_LCDC0 @@ -489,7 +489,7 @@ <&sub_clk>, <&sub_clk>, <&sub_clk>, <&sub_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA R8A7740_CLK_SCIFA7 R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2 @@ -518,7 +518,7 @@ <&cpg_clocks R8A7740_CLK_HP>, <&cpg_clocks R8A7740_CLK_HP>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7740_CLK_CMT1 R8A7740_CLK_FSI R8A7740_CLK_IIC1 R8A7740_CLK_USBF R8A7740_CLK_SDHI0 R8A7740_CLK_SDHI1 R8A7740_CLK_MMC R8A7740_CLK_GETHER R8A7740_CLK_TPU0 @@ -535,7 +535,7 @@ <&cpg_clocks R8A7740_CLK_HP>, <&cpg_clocks R8A7740_CLK_HP>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7740_CLK_USBH R8A7740_CLK_SDHI2 R8A7740_CLK_USBFUNC R8A7740_CLK_USBPHY >; -- cgit v1.2.3 From 64530fc2ce234e2ba227e24a149c73ef91dbfae5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 10 Nov 2014 19:49:36 +0100 Subject: ARM: shmobile: r8a7779 dtsi: Change to using clock-indices With the addition of clock-indices in commit 8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using clock-indices"), we can change the DTSes to use the generic property instead of the deprecated vendor-specific property. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Acked-by: Laurent Pinchart Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index ede9a29e4bc6..e3846af833e1 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -475,7 +475,7 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_HSPI R8A7779_CLK_TMU2 R8A7779_CLK_TMU1 R8A7779_CLK_TMU0 R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0 @@ -506,7 +506,7 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_USB01 R8A7779_CLK_USB2 R8A7779_CLK_DU R8A7779_CLK_VIN2 R8A7779_CLK_VIN1 R8A7779_CLK_VIN0 @@ -527,7 +527,7 @@ clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2 R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0 R8A7779_CLK_MMC1 R8A7779_CLK_MMC0 -- cgit v1.2.3 From b54010af0f248e238bb628ad40d0766bb9474ec6 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 10 Nov 2014 19:49:37 +0100 Subject: ARM: shmobile: r8a7790 dtsi: Change to using clock-indices With the addition of clock-indices in commit 8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using clock-indices"), we can change the DTSes to use the generic property instead of the deprecated vendor-specific property. Signed-off-by: Ben Dooks [geert: Extracted r8a7790-specific part, rebased, reworded] Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Acked-by: Laurent Pinchart Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index af7e255f629e..ffeff98fa16e 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1054,7 +1054,7 @@ reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; clocks = <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = ; + clock-indices = ; clock-output-names = "msiof0"; }; mstp1_clks: mstp1_clks@e6150134 { @@ -1065,7 +1065,7 @@ <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_VCP1 R8A7790_CLK_VCP0 R8A7790_CLK_VPC1 R8A7790_CLK_VPC0 R8A7790_CLK_JPU R8A7790_CLK_SSP1 R8A7790_CLK_TMU1 R8A7790_CLK_3DG R8A7790_CLK_2DDMAC @@ -1087,7 +1087,7 @@ <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0 R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1 R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2 @@ -1106,7 +1106,7 @@ <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0 R8A7790_CLK_IIC0 R8A7790_CLK_PCIEC R8A7790_CLK_IIC1 R8A7790_CLK_SSUSB R8A7790_CLK_CMT1 @@ -1123,8 +1123,10 @@ reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = ; + clock-indices = < + R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1 + R8A7790_CLK_THERMAL R8A7790_CLK_PWM + >; clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { @@ -1134,7 +1136,7 @@ <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_EHCI R8A7790_CLK_HSUSB R8A7790_CLK_HSCIF1 R8A7790_CLK_HSCIF0 R8A7790_CLK_SCIF1 R8A7790_CLK_SCIF0 R8A7790_CLK_DU2 R8A7790_CLK_DU1 R8A7790_CLK_DU0 @@ -1150,7 +1152,7 @@ clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 @@ -1166,7 +1168,7 @@ <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7790_CLK_GPIO5 R8A7790_CLK_GPIO4 R8A7790_CLK_GPIO3 R8A7790_CLK_GPIO2 R8A7790_CLK_GPIO1 R8A7790_CLK_GPIO0 R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS -- cgit v1.2.3 From cb0bf8512353aef2105e0ddfcc6da5bb4c91cf25 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 10 Nov 2014 19:49:38 +0100 Subject: ARM: shmobile: r8a7791 dtsi: Change to using clock-indices With the addition of clock-indices in commit 8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using clock-indices"), we can change the DTSes to use the generic property instead of the deprecated vendor-specific property. Signed-off-by: Ben Dooks [geert: Extracted r8a7791-specific part, rebased, reworded] Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Acked-by: Laurent Pinchart Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 77c0beeb8d7c..7fabea23dd6c 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1062,7 +1062,7 @@ reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; clocks = <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = ; + clock-indices = ; clock-output-names = "msiof0"; }; mstp1_clks: mstp1_clks@e6150134 { @@ -1073,7 +1073,7 @@ <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_VCP0 R8A7791_CLK_VPC0 R8A7791_CLK_JPU R8A7791_CLK_SSP1 R8A7791_CLK_TMU1 R8A7791_CLK_3DG R8A7791_CLK_2DDMAC R8A7791_CLK_FDP1_1 R8A7791_CLK_FDP1_0 @@ -1093,7 +1093,7 @@ <&mp_clk>, <&mp_clk>, <&mp_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_SCIFA2 R8A7791_CLK_SCIFA1 R8A7791_CLK_SCIFA0 R8A7791_CLK_MSIOF2 R8A7791_CLK_SCIFB0 R8A7791_CLK_SCIFB1 R8A7791_CLK_MSIOF1 R8A7791_CLK_SCIFB2 @@ -1111,7 +1111,7 @@ <&mmc0_clk>, <&hp_clk>, <&mp_clk>, <&hp_clk>, <&mp_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_PCIEC R8A7791_CLK_IIC1 R8A7791_CLK_SSUSB R8A7791_CLK_CMT1 @@ -1127,8 +1127,10 @@ reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = ; + clock-indices = < + R8A7791_CLK_AUDIO_DMAC0 R8A7791_CLK_AUDIO_DMAC1 + R8A7791_CLK_THERMAL R8A7791_CLK_PWM + >; clock-output-names = "audmac0", "audmac1", "thermal", "pwm"; }; mstp7_clks: mstp7_clks@e615014c { @@ -1138,7 +1140,7 @@ <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&zx_clk>, <&zx_clk>, <&zx_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5 R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0 R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1 @@ -1155,7 +1157,7 @@ clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; @@ -1171,7 +1173,7 @@ <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_GPIO7 R8A7791_CLK_GPIO6 R8A7791_CLK_GPIO5 R8A7791_CLK_GPIO4 R8A7791_CLK_GPIO3 R8A7791_CLK_GPIO2 R8A7791_CLK_GPIO1 R8A7791_CLK_GPIO0 R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5 @@ -1221,7 +1223,7 @@ reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7791_CLK_SCIFA3 R8A7791_CLK_SCIFA4 R8A7791_CLK_SCIFA5 >; clock-output-names = "scifa3", "scifa4", "scifa5"; -- cgit v1.2.3 From 1045d0655704a16a736e001d3ae052829d5532b0 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 10 Nov 2014 19:49:39 +0100 Subject: ARM: shmobile: r8a7794 dtsi: Change to using clock-indices With the addition of clock-indices in commit 8e33f91a0b84ae19 ("clk: shmobile: clk-mstp: change to using clock-indices"), we can change the DTSes to use the generic property instead of the deprecated vendor-specific property. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Acked-by: Laurent Pinchart Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 19c9de3f2a5a..1801bb417cf9 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -455,7 +455,7 @@ reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>; clocks = <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = ; + clock-indices = ; clock-output-names = "msiof0"; }; mstp1_clks: mstp1_clks@e6150134 { @@ -465,7 +465,7 @@ <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_VCP0 R8A7794_CLK_VPC0 R8A7794_CLK_TMU1 R8A7794_CLK_3DG R8A7794_CLK_2DDMAC R8A7794_CLK_FDP1_0 R8A7794_CLK_TMU3 R8A7794_CLK_TMU2 R8A7794_CLK_CMT0 @@ -481,7 +481,7 @@ clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0 R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1 R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2 @@ -495,7 +495,7 @@ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; clocks = <&rclk_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_CMT1 >; clock-output-names = @@ -507,7 +507,7 @@ clocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 @@ -522,7 +522,7 @@ reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; clocks = <&zg_clk>, <&zg_clk>, <&p_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER >; clock-output-names = @@ -533,7 +533,7 @@ reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>; #clock-cells = <1>; - renesas,clock-indices = < + clock-indices = < R8A7794_CLK_SCIFA3 R8A7794_CLK_SCIFA4 R8A7794_CLK_SCIFA5 >; clock-output-names = "scifa3", "scifa4", "scifa5"; -- cgit v1.2.3 From c7bab9f929e5176169de2cee529ec203ca7f1584 Mon Sep 17 00:00:00 2001 From: Shinobu Uehara Date: Fri, 5 Dec 2014 12:01:12 +0900 Subject: ARM: shmobile: r8a7794: Add USB clocks to device tree Signed-off-by: Shinobu Uehara [horms: resolved conflicts] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 5 ++++- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 1801bb417cf9..7fd40f374207 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -504,16 +504,19 @@ mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>; - clocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, + clocks = <&mp_clk>, <&mp_clk>, + <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>; #clock-cells = <1>; clock-indices = < + R8A7794_CLK_EHCI R8A7794_CLK_HSUSB R8A7794_CLK_HSCIF2 R8A7794_CLK_SCIF5 R8A7794_CLK_SCIF4 R8A7794_CLK_HSCIF1 R8A7794_CLK_HSCIF0 R8A7794_CLK_SCIF3 R8A7794_CLK_SCIF2 R8A7794_CLK_SCIF1 R8A7794_CLK_SCIF0 >; clock-output-names = + "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0", "scif3", "scif2", "scif1", "scif0"; }; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index aa9c286e60c0..94e2bbf7ddc1 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -57,6 +57,8 @@ #define R8A7794_CLK_PWM 23 /* MSTP7 */ +#define R8A7794_CLK_EHCI 3 +#define R8A7794_CLK_HSUSB 4 #define R8A7794_CLK_HSCIF2 13 #define R8A7794_CLK_SCIF5 14 #define R8A7794_CLK_SCIF4 15 -- cgit v1.2.3 From 5f950e62b476c62fd8a6549f3889e08e478252f3 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 5 Dec 2014 11:28:28 +0900 Subject: ARM: shmobile: dts: koelsch: Fix flash partition label and size Update the size and names of flash partitions to match the expectations of the loader which are as follows: "loader"---0x0000_0000-0x0008_0000 [loader program (readonly)] "user" ---0x0008_0000-0x0060_0000 [U-Boot + bootargs + dt + uImage (readonly)] "flash" ---0x0060_0000-0x0400_0000 [filesystem and free (read/write)] ["user"'s assumed breakdown] U-boot (0x0008_0000-0x000c_0000) 256KiB bootargs (0x000c_0000-0x0010_0000) 256KiB Device tree (0x0010_0000-0x0014_0000) 256KiB zImage (0x0014_0000-0x0060_0000) 4.75MiB Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791-koelsch.dts | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 990af167c551..1e5f8d2b74b9 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -452,13 +452,13 @@ read-only; }; partition@80000 { - label = "bootenv"; - reg = <0x00080000 0x00080000>; + label = "user"; + reg = <0x00080000 0x00580000>; read-only; }; - partition@100000 { - label = "data"; - reg = <0x00100000 0x03f00000>; + partition@600000 { + label = "flash"; + reg = <0x00600000 0x03a00000>; }; }; }; -- cgit v1.2.3 From aa5404fc74c31491c8087a9ed546a94dee60aac1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 27 Nov 2014 11:57:16 +0100 Subject: ARM: shmobile: r8a7791: Correct mask for GIC PPI interrupts R-Car M2-W (r8a7791) contains two Cortex-A15 cores, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(2)". Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 7fabea23dd6c..958a69b24ff4 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -78,7 +78,7 @@ <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; }; gpio0: gpio@e6050000 { @@ -186,10 +186,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; cmt0: timer@ffca0000 { -- cgit v1.2.3 From 00add867b802b3023b49433b9002fba79f042acc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 27 Nov 2014 11:57:17 +0100 Subject: ARM: shmobile: r8a7794: Correct mask for GIC PPI interrupts R-Car E2 (r8a7794) contains two Cortex-A7 cores, hence the second interrupt specifier cell for Private Peripheral Interrupts should use "GIC_CPU_MASK_SIMPLE(2)". Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 7fd40f374207..e53765493346 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -47,7 +47,7 @@ <0 0xf1002000 0 0x1000>, <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; - interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; + interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; }; cmt0: timer@ffca0000 { @@ -84,10 +84,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <1 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; }; irqc0: interrupt-controller@e61c0000 { -- cgit v1.2.3 From 22a9b44fc17e83417fa890123a33164ea37fc10c Mon Sep 17 00:00:00 2001 From: Kazuya Mizuguchi Date: Mon, 8 Dec 2014 09:54:36 +0900 Subject: ARM: shmobile: r8a7794: Add USBDMAC[01] clocks to device tree Signed-off-by: Kazuya Mizuguchi [horms: merged per-clock patches] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 7 ++++--- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index e53765493346..13e4a8d73029 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -493,13 +493,14 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&rclk_clk>; + clocks = <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < - R8A7794_CLK_CMT1 + R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 + R8A7794_CLK_USBDMAC1 >; clock-output-names = - "cmt1"; + "cmt1", "usbdmac0", "usbdmac1"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 94e2bbf7ddc1..52492d85fea1 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -51,6 +51,8 @@ /* MSTP3 */ #define R8A7794_CLK_CMT1 29 +#define R8A7794_CLK_USBDMAC0 30 +#define R8A7794_CLK_USBDMAC1 31 /* MSTP5 */ #define R8A7794_CLK_THERMAL 22 -- cgit v1.2.3 From 9c5becce21af35e59c7313d3603af1d620fffd05 Mon Sep 17 00:00:00 2001 From: Hisashi Nakamura Date: Tue, 9 Dec 2014 09:37:12 +0900 Subject: ARM: shmobile: koelsch: Fix QSPI mode of SPI-Flash into mode3 In order to change into mode3, CPOL and CPHA bit of SPCMD register of QSPI is changed. Mode3 can avoid intermediate voltage. Signed-off-by: Hisashi Nakamura [horms: Updated changelog and re-ordered properties] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7791-koelsch.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 1e5f8d2b74b9..691e4c635564 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -444,6 +444,8 @@ spi-max-frequency = <30000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; + spi-cpha; + spi-cpol; m25p,fast-read; partition@0 { -- cgit v1.2.3 From ce85ad47882fe375dcb3f7cce6c10ae800ac2d9c Mon Sep 17 00:00:00 2001 From: Ryo Kataoka Date: Tue, 9 Dec 2014 13:21:22 +0900 Subject: ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree Signed-off-by: Ryo Kataoka [horms: resolved conflicts] Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 8 +++++--- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 6 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 958a69b24ff4..78d637135e77 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1154,15 +1154,17 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, - <&zs_clk>; + clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, + <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < + R8A7791_CLK_IPMMU_SGX R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; clock-output-names = - "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; + "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", + "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index 3ea2bbc0da3f..ee9bb94423f3 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -91,6 +91,7 @@ #define R8A7791_CLK_LVDS0 26 /* MSTP8 */ +#define R8A7791_CLK_IPMMU_SGX 0 #define R8A7791_CLK_VIN2 9 #define R8A7791_CLK_VIN1 10 #define R8A7791_CLK_VIN0 11 -- cgit v1.2.3 From be16cd385c08dce7efa406704b5aa420ef6d1992 Mon Sep 17 00:00:00 2001 From: Hiroyuki Yokoyama Date: Wed, 10 Dec 2014 10:21:12 +0900 Subject: ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree Signed-off-by: Hiroyuki Yokoyama [horms: resolved conflicts] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 7 +++++-- include/dt-bindings/clock/r8a7794-clock.h | 2 ++ 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 13e4a8d73029..6d95638987e7 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -479,16 +479,19 @@ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>; clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, - <&mp_clk>, <&mp_clk>, <&mp_clk>; + <&mp_clk>, <&mp_clk>, <&mp_clk>, + <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_SCIFA2 R8A7794_CLK_SCIFA1 R8A7794_CLK_SCIFA0 R8A7794_CLK_MSIOF2 R8A7794_CLK_SCIFB0 R8A7794_CLK_SCIFB1 R8A7794_CLK_MSIOF1 R8A7794_CLK_SCIFB2 + R8A7794_CLK_SYS_DMAC1 R8A7794_CLK_SYS_DMAC0 >; clock-output-names = "scifa2", "scifa1", "scifa0", "msiof2", "scifb0", - "scifb1", "msiof1", "scifb2"; + "scifb1", "msiof1", "scifb2", + "sys-dmac1", "sys-dmac0"; }; mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 52492d85fea1..c0bd14a5c6f3 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -48,6 +48,8 @@ #define R8A7794_CLK_SCIFB1 7 #define R8A7794_CLK_MSIOF1 8 #define R8A7794_CLK_SCIFB2 16 +#define R8A7794_CLK_SYS_DMAC1 18 +#define R8A7794_CLK_SYS_DMAC0 19 /* MSTP3 */ #define R8A7794_CLK_CMT1 29 -- cgit v1.2.3 From cbf41168339adcb48de6a3537f88d4e85285db99 Mon Sep 17 00:00:00 2001 From: Hisashi Nakamura Date: Wed, 10 Dec 2014 11:30:27 +0900 Subject: ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3 In order to change into mode3, CPOL and CPHA bit of SPCMD register of QSPI is changed. Mode3 can avoid intermediate voltage. Signed-off-by: Hisashi Nakamura [horms: Updated changelog and re-ordered properties] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7790-lager.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 636d53bb87a2..bc257e8b1bf2 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -397,6 +397,8 @@ spi-max-frequency = <30000000>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; + spi-cpha; + spi-cpol; m25p,fast-read; partition@0 { -- cgit v1.2.3 From 3281480b70ceb9889b71f7b8a7bf54db3c05d40e Mon Sep 17 00:00:00 2001 From: Hisashi Nakamura Date: Thu, 11 Dec 2014 12:21:14 +0900 Subject: ARM: shmobile: r8a7794: Add QSPI clock to device tree Signed-off-by: Hisashi Nakamura [horms: omitted device node and alias; only add clock] [horms: use clock-indicies instead of renesas,clock-indicies] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 8 ++++++++ include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 6d95638987e7..068ca0981ac9 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -535,6 +535,14 @@ clock-output-names = "vin1", "vin0", "ether"; }; + mstp9_clks: mstp9_clks@e6150994 { + compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; + clocks = <&cpg_clocks R8A7794_CLK_QSPI>; + #clock-cells = <1>; + clock-indices = ; + clock-output-names = "qspi_mod"; + }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index c0bd14a5c6f3..fba89a49e815 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -86,6 +86,7 @@ #define R8A7794_CLK_GPIO2 10 #define R8A7794_CLK_GPIO1 11 #define R8A7794_CLK_GPIO0 12 +#define R8A7794_CLK_QSPI_MOD 17 /* MSTP11 */ #define R8A7794_CLK_SCIFA3 6 -- cgit v1.2.3 From c6ce3cdfce6c0214f178fbad73d138dd1f1b04f6 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 15 Dec 2014 14:00:34 +0900 Subject: ARM: shmobile: r8a7779: Use R8A7779_CLK_P as SCIF parent clock Use R8A7779_CLK_P as parent clock for SCIF devices on r8a7779. With this change in place the SCIF CCF handling matches the legacy clock code. Also, this matches the data sheet. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index e3846af833e1..ee3bb3e9cbf1 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -464,12 +464,12 @@ <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_S>, <&cpg_clocks R8A7779_CLK_S>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, - <&cpg_clocks R8A7779_CLK_S1>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, + <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, <&cpg_clocks R8A7779_CLK_P>, -- cgit v1.2.3 From 631324cf83a04cbfcc81a21801f321679493a072 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 15 Dec 2014 13:56:08 +0900 Subject: ARM: shmobile: r8a7779: Use MSTP for SCIF clocks Hook up MSTP clocks to SCIF devices on r8a7779 to allow clock gating to work as expected. Signed-off-by: Magnus Damm Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index ee3bb3e9cbf1..d9e1abf9debe 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -200,7 +200,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe40000 0x100>; interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF0>; clock-names = "sci_ick"; status = "disabled"; }; @@ -209,7 +209,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe41000 0x100>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF1>; clock-names = "sci_ick"; status = "disabled"; }; @@ -218,7 +218,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe42000 0x100>; interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF2>; clock-names = "sci_ick"; status = "disabled"; }; @@ -227,7 +227,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe43000 0x100>; interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF3>; clock-names = "sci_ick"; status = "disabled"; }; @@ -236,7 +236,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe44000 0x100>; interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF4>; clock-names = "sci_ick"; status = "disabled"; }; @@ -245,7 +245,7 @@ compatible = "renesas,scif-r8a7779", "renesas,scif"; reg = <0xffe45000 0x100>; interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg_clocks R8A7779_CLK_P>; + clocks = <&mstp0_clks R8A7779_CLK_SCIF5>; clock-names = "sci_ick"; status = "disabled"; }; -- cgit v1.2.3 From cea806542f6d7ec40eea1c5f9db2065996f56627 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 16 Dec 2014 18:39:41 +0900 Subject: ARM: shmobile: r8a7779: Add TWD device to DTS Now when r8a7779 CCF is in place we can hook up the ARM Cortex-A9 TWD timer via DTS. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index d9e1abf9debe..5c2219b9f3eb 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -12,6 +12,7 @@ /include/ "skeleton.dtsi" #include +#include #include / { @@ -62,6 +63,14 @@ <0xf0000100 0x100>; }; + timer@f0000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf0000600 0x20>; + interrupts = ; + clocks = <&cpg_clocks R8A7779_CLK_ZS>; + }; + gpio0: gpio@ffc40000 { compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar"; reg = <0xffc40000 0x2c>; -- cgit v1.2.3 From c5d82c9996f68491375de47c208a41bcb150dfad Mon Sep 17 00:00:00 2001 From: Koji Matsuoka Date: Fri, 23 May 2014 18:37:04 +0900 Subject: ARM: shmobile: r8a7794: Add I2C clocks to device tree Signed-off-by: Koji Matsuoka [horms: omitted device nodes and aliases; only add clocks] Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- arch/arm/boot/dts/r8a7794.dtsi | 12 +++++++++--- include/dt-bindings/clock/r8a7794-clock.h | 6 ++++++ 2 files changed, 15 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 068ca0981ac9..728d719957b8 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -538,10 +538,16 @@ mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; - clocks = <&cpg_clocks R8A7794_CLK_QSPI>; + clocks = <&cpg_clocks R8A7794_CLK_QSPI>, <&hp_clk>, <&hp_clk>, + <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; - clock-indices = ; - clock-output-names = "qspi_mod"; + clock-indices = < + R8A7794_CLK_QSPI_MOD R8A7794_CLK_I2C5 R8A7794_CLK_I2C4 + R8A7794_CLK_I2C3 R8A7794_CLK_I2C2 R8A7794_CLK_I2C1 + R8A7794_CLK_I2C0 + >; + clock-output-names = + "qspi_mod", "i2c5", "i2c4", "i2c3", "i2c2", "i2c1", "i2c0"; }; mstp11_clks: mstp11_clks@e615099c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index fba89a49e815..94d96186ff06 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -87,6 +87,12 @@ #define R8A7794_CLK_GPIO1 11 #define R8A7794_CLK_GPIO0 12 #define R8A7794_CLK_QSPI_MOD 17 +#define R8A7794_CLK_I2C5 25 +#define R8A7794_CLK_I2C4 27 +#define R8A7794_CLK_I2C3 28 +#define R8A7794_CLK_I2C2 29 +#define R8A7794_CLK_I2C1 30 +#define R8A7794_CLK_I2C0 31 /* MSTP11 */ #define R8A7794_CLK_SCIFA3 6 -- cgit v1.2.3 From 8e181633e6ca960491ac502ccd4a4aac482c3ff9 Mon Sep 17 00:00:00 2001 From: Shinobu Uehara Date: Fri, 23 May 2014 11:37:45 +0900 Subject: ARM: shmobile: r8a7794: Add SDHI clocks to device tree Signed-off-by: Shinobu Uehara [horms: omitted device nodes; only add clock] Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 20 +++++++++++++++++++- include/dt-bindings/clock/r8a7794-clock.h | 3 +++ 2 files changed, 22 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index 728d719957b8..c37667633e54 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -293,6 +293,21 @@ clock-output-names = "main", "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "z"; }; + /* Variable factor clocks */ + sd1_clk: sd2_clk@e6150078 { + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150078 0 4>; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-output-names = "sd1"; + }; + sd2_clk: sd3_clk@e615007c { + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe615007c 0 4>; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-output-names = "sd2"; + }; /* Fixed factor clocks */ pll1_div2_clk: pll1_div2_clk { @@ -496,13 +511,16 @@ mstp3_clks: mstp3_clks@e615013c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; - clocks = <&rclk_clk>, <&hp_clk>, <&hp_clk>; + clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, + <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < + R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 >; clock-output-names = + "sdhi2", "sdhi1", "sdhi0", "cmt1", "usbdmac0", "usbdmac1"; }; mstp7_clks: mstp7_clks@e615014c { diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index 94d96186ff06..ccd566773cee 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -52,6 +52,9 @@ #define R8A7794_CLK_SYS_DMAC0 19 /* MSTP3 */ +#define R8A7794_CLK_SDHI2 11 +#define R8A7794_CLK_SDHI1 12 +#define R8A7794_CLK_SDHI0 14 #define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC1 31 -- cgit v1.2.3 From deac150c2d141c16c4814972c25c2a3aacae8d57 Mon Sep 17 00:00:00 2001 From: Shinobu Uehara Date: Tue, 27 May 2014 10:39:26 +0900 Subject: ARM: shmobile: r8a7794: Add MMCIF clock to device tree Signed-off-by: Shinobu Uehara [horms: omitted device node; only add clock] Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794.dtsi | 15 +++++++++++---- include/dt-bindings/clock/r8a7794-clock.h | 1 + 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi index c37667633e54..8f78da5ef10b 100644 --- a/arch/arm/boot/dts/r8a7794.dtsi +++ b/arch/arm/boot/dts/r8a7794.dtsi @@ -308,6 +308,13 @@ #clock-cells = <0>; clock-output-names = "sd2"; }; + mmc0_clk: mmc0_clk@e6150240 { + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; + reg = <0 0xe6150240 0 4>; + clocks = <&pll1_div2_clk>; + #clock-cells = <0>; + clock-output-names = "mmc0"; + }; /* Fixed factor clocks */ pll1_div2_clk: pll1_div2_clk { @@ -512,16 +519,16 @@ compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, - <&rclk_clk>, <&hp_clk>, <&hp_clk>; + <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>; #clock-cells = <1>; clock-indices = < R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 - R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 - R8A7794_CLK_USBDMAC1 + R8A7794_CLK_MMCIF0 R8A7794_CLK_CMT1 + R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1 >; clock-output-names = "sdhi2", "sdhi1", "sdhi0", - "cmt1", "usbdmac0", "usbdmac1"; + "mmcif0", "cmt1", "usbdmac0", "usbdmac1"; }; mstp7_clks: mstp7_clks@e615014c { compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h index ccd566773cee..d63323032d6e 100644 --- a/include/dt-bindings/clock/r8a7794-clock.h +++ b/include/dt-bindings/clock/r8a7794-clock.h @@ -55,6 +55,7 @@ #define R8A7794_CLK_SDHI2 11 #define R8A7794_CLK_SDHI1 12 #define R8A7794_CLK_SDHI0 14 +#define R8A7794_CLK_MMCIF0 15 #define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC1 31 -- cgit v1.2.3 From 6cdaa63f9e2b3ea0ac57a71a43f96cf626500d35 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 17 Dec 2014 17:18:13 +0100 Subject: ARM: shmobile: ape6evm: fix compatible string for Ethernet controller It's a 9220, not a 9118. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index ce085fa444a1..baca8f8c4a5c 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -43,7 +43,7 @@ #size-cells = <1>; ethernet@8000000 { - compatible = "smsc,lan9118", "smsc,lan9115"; + compatible = "smsc,lan9220", "smsc,lan9115"; reg = <0x08000000 0x1000>; interrupt-parent = <&irqc1>; interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; -- cgit v1.2.3 From 326baa8029706ba6fbba9dd40f2310f718bfab4b Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 17 Dec 2014 17:18:14 +0100 Subject: ARM: shmobile: ape6evm: synchronize dts with reference platform This moves everything to the legacy dts that is missing there in preparation for the switch to multiplatform. Signed-off-by: Ulrich Hecht Acked-by: Laurent Pinchart Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 92 ++++++++++++++++++++++++++++++++++- 1 file changed, 90 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index baca8f8c4a5c..c98cd1442d7c 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -10,14 +10,19 @@ /dts-v1/; #include "r8a73a4.dtsi" -#include +#include / { model = "APE6EVM"; compatible = "renesas,ape6evm", "renesas,r8a73a4"; + aliases { + serial0 = &scifa0; + }; + chosen { bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw"; + stdout-path = &scifa0; }; memory@40000000 { @@ -30,7 +35,27 @@ reg = <2 0x00000000 0 0x40000000>; }; - ape6evm_fixed_3v3: fixedregulator@0 { + vcc_mmc0: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "MMC0 Vcc"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + vcc_sdhi0: regulator@1 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&pfc 76 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + /* Common 3.3V rail, used by several devices on APE6EVM */ + ape6evm_fixed_3v3: regulator@2 { compatible = "regulator-fixed"; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; @@ -39,8 +64,10 @@ }; lbsc { + compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0 0 0x20000000>; ethernet@8000000 { compatible = "smsc,lan9220", "smsc,lan9115"; @@ -79,3 +106,64 @@ >; voltage-tolerance = <1>; /* 1% */ }; + +&cmt1 { + status = "okay"; +}; + +&pfc { + scifa0_pins: serial0 { + renesas,groups = "scifa0_data"; + renesas,function = "scifa0"; + }; + + mmc0_pins: mmc { + renesas,groups = "mmc0_data8", "mmc0_ctrl"; + renesas,function = "mmc0"; + }; + + sdhi0_pins: sd0 { + renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd"; + renesas,function = "sdhi0"; + }; + + sdhi1_pins: sd1 { + renesas,groups = "sdhi1_data4", "sdhi1_ctrl"; + renesas,function = "sdhi1"; + }; +}; + +&mmcif0 { + vmmc-supply = <&vcc_mmc0>; + bus-width = <8>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "okay"; +}; + +&scifa0 { + pinctrl-0 = <&scifa0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&sdhi0 { + vmmc-supply = <&vcc_sdhi0>; + bus-width = <4>; + toshiba,mmc-wrprotect-disable; + pinctrl-names = "default"; + pinctrl-0 = <&sdhi0_pins>; + status = "okay"; +}; + +&sdhi1 { + vmmc-supply = <&ape6evm_fixed_3v3>; + bus-width = <4>; + broken-cd; + toshiba,mmc-wrprotect-disable; + pinctrl-names = "default"; + pinctrl-0 = <&sdhi1_pins>; + status = "okay"; +}; -- cgit v1.2.3 From b742257dd5ec574a35950ebcf4a3d77a0f01355f Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 17 Dec 2014 17:18:15 +0100 Subject: ARM: shmobile: ape6evm: Add LEDs to the device tree Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index c98cd1442d7c..b939a372d408 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -82,6 +82,34 @@ vddvario-supply = <&ape6evm_fixed_3v3>; }; }; + + leds { + compatible = "gpio-leds"; + led1 { + gpios = <&pfc 28 GPIO_ACTIVE_LOW>; + label = "GNSS_EN"; + }; + led2 { + gpios = <&pfc 126 GPIO_ACTIVE_LOW>; + label = "NFC_NRST"; + }; + led3 { + gpios = <&pfc 132 GPIO_ACTIVE_LOW>; + label = "GNSS_NRST"; + }; + led4 { + gpios = <&pfc 232 GPIO_ACTIVE_LOW>; + label = "BT_WAKEUP"; + }; + led5 { + gpios = <&pfc 250 GPIO_ACTIVE_LOW>; + label = "STROBE"; + }; + led6 { + gpios = <&pfc 288 GPIO_ACTIVE_LOW>; + label = "BBRESETOUT"; + }; + }; }; &i2c5 { -- cgit v1.2.3 From 2670ee894f477c9dfe9da7cf774c167b2ba06594 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 17 Dec 2014 17:18:16 +0100 Subject: ARM: shmobile: ape6evm: Add keypad to the device tree Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 41 +++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index b939a372d408..6b7bc1fb842e 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "r8a73a4.dtsi" #include +#include / { model = "APE6EVM"; @@ -110,6 +111,46 @@ label = "BBRESETOUT"; }; }; + + keyboard { + compatible = "gpio-keys"; + + zero-key { + gpios = <&pfc 324 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S16"; + }; + + menu-key { + gpios = <&pfc 325 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S17"; + }; + + home-key { + gpios = <&pfc 326 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S18"; + }; + + back-key { + gpios = <&pfc 327 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S19"; + }; + + volup-key { + gpios = <&pfc 328 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S20"; + }; + + voldown-key { + gpios = <&pfc 329 GPIO_ACTIVE_LOW>; + linux,code = ; + label = "S21"; + }; + }; }; &i2c5 { -- cgit v1.2.3 From 088b1691f560afa4e5e7990fd8081546236b39cf Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Wed, 17 Dec 2014 17:18:18 +0100 Subject: ARM: shmobile: r8a73a4: Add r8a73a4-ape6evm.dtb to ARCH_SHMOBILE_MULTI Makes sure the dtb is built for multiplatform builds. Signed-off-by: Ulrich Hecht Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..fabc56983d24 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -416,6 +416,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ sh73a0-kzm9g-reference.dtb dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ r7s72100-genmai.dtb \ + r8a73a4-ape6evm.dtb \ r8a7740-armadillo800eva.dtb \ r8a7779-marzen.dtb \ r8a7790-lager.dtb \ -- cgit v1.2.3 From 09ee81da85b10e0ca876977d333c8761441ecc78 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 17 Dec 2014 01:17:25 +0200 Subject: ARM: shmobile: ape6evm: Fix LAN9220 VDDVARIO voltage The LAN9220 VDDVARIO supply is powered by a 1.8V source, not 3.3V. Fix it in the device tree. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4-ape6evm.dts | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm.dts b/arch/arm/boot/dts/r8a73a4-ape6evm.dts index 6b7bc1fb842e..0d50bef01234 100644 --- a/arch/arm/boot/dts/r8a73a4-ape6evm.dts +++ b/arch/arm/boot/dts/r8a73a4-ape6evm.dts @@ -55,8 +55,16 @@ enable-active-high; }; - /* Common 3.3V rail, used by several devices on APE6EVM */ - ape6evm_fixed_3v3: regulator@2 { + /* Common 1.8V and 3.3V rails, used by several devices on APE6EVM */ + ape6evm_fixed_1v8: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ape6evm_fixed_3v3: regulator@3 { compatible = "regulator-fixed"; regulator-name = "3V3"; regulator-min-microvolt = <3300000>; @@ -80,7 +88,7 @@ smsc,irq-active-high; smsc,irq-push-pull; vdd33a-supply = <&ape6evm_fixed_3v3>; - vddvario-supply = <&ape6evm_fixed_3v3>; + vddvario-supply = <&ape6evm_fixed_1v8>; }; }; -- cgit v1.2.3 From 8b00601547ca28c5c55124dceba203b5f5e2c214 Mon Sep 17 00:00:00 2001 From: Richard Kunze Date: Sun, 14 Dec 2014 20:53:39 +0100 Subject: ARM: dts: use all remaining MTD space foor rootfs of Iomega ix2-200 The original MTD partition layout for the Iomega ix2-200 leaves most of the available space unused. This patch changes the layout to use all remaining MTD space after the partitions for u-boot/u-boot-env and the kernel uimage as a "rootfs" partition. Signed-off-by: Richard Kunze Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 05291f3990d0..2a5c5a33db0c 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts @@ -192,8 +192,8 @@ }; partition@400000 { - label = "uInitrd"; - reg = <0x540000 0x1000000>; + label = "rootfs"; + reg = <0x400000 0x1C00000>; }; }; -- cgit v1.2.3 From 1701308a6e2407e144cb5af729e5b51731a3957d Mon Sep 17 00:00:00 2001 From: Richard Kunze Date: Wed, 10 Dec 2014 19:40:41 +0100 Subject: ARM: dts: add gpio_poweroff support for Iomega ix2-200 Iomega ix2-200 can be powered off via GPIO 0 pin 17, this patch wires up the gpio-poweroff driver to do it. Signed-off-by: Richard Kunze Acked-by: Andrew Lunn Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 2a5c5a33db0c..8474bffec0ca 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts @@ -169,6 +169,10 @@ gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; }; + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + }; }; &nand { -- cgit v1.2.3 From 9c569b390923f10d5551aa56c9e68f132459e0cc Mon Sep 17 00:00:00 2001 From: Evgeni Dobrev Date: Tue, 16 Dec 2014 19:22:18 +0100 Subject: ARM: dts: kirkwood: enable phy driver for SATA controller on 88f6192 This patch enables the phy drivers for the SATA controller on Marvell's 88f6192. Without them it is not possible to use SATA drives attached to this processor. Signed-off-by: Evgeni Dobrev Acked-by: Andrew Lunn Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/kirkwood-6192.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi index dd81508b919b..9e6e9e2691d5 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -66,6 +66,8 @@ interrupts = <21>; clocks = <&gate_clk 14>, <&gate_clk 15>; clock-names = "0", "1"; + phys = <&sata_phy0>, <&sata_phy1>; + phy-names = "port0", "port1"; status = "disabled"; }; -- cgit v1.2.3 From f74ba117dab86b35e15f8b5a8d913145f3e72ca1 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Thu, 4 Dec 2014 10:49:35 +0800 Subject: ARM: dts: rockchip: set dw_mmc max-freq 150Mhz All of mmc controllers include SDMMC, SDIO0, SDIO1, and EMMC on RK3288 are limited to 150Mhz. It was mainly caused by two reasons: - RK3288's IO pad(except DDR IO pad) is generic, which can only support the max of 150Mhz. - Mmc controller was designed at 150Mhz, and the pressure test by IC team was based on this freequency point. Signed-off-by: Addy Ke Reviewed-by: Doug Anderson Tested-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index fd19f00784bd..3aad41d873d3 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -151,6 +151,7 @@ sdmmc: dwmmc@ff0c0000 { compatible = "rockchip,rk3288-dw-mshc"; + clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; clock-names = "biu", "ciu"; fifo-depth = <0x100>; @@ -161,6 +162,7 @@ sdio0: dwmmc@ff0d0000 { compatible = "rockchip,rk3288-dw-mshc"; + clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>; clock-names = "biu", "ciu"; fifo-depth = <0x100>; @@ -171,6 +173,7 @@ sdio1: dwmmc@ff0e0000 { compatible = "rockchip,rk3288-dw-mshc"; + clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_SDIO1>, <&cru SCLK_SDIO1>; clock-names = "biu", "ciu"; fifo-depth = <0x100>; @@ -181,6 +184,7 @@ emmc: dwmmc@ff0f0000 { compatible = "rockchip,rk3288-dw-mshc"; + clock-freq-min-max = <400000 150000000>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>; clock-names = "biu", "ciu"; fifo-depth = <0x100>; -- cgit v1.2.3 From f6b5dd4088d082b53eb135e1d6b4b213bf5ce127 Mon Sep 17 00:00:00 2001 From: Andrey Gusakov Date: Thu, 18 Dec 2014 23:41:52 +0300 Subject: ARM: shmobile: r8a7790: add MLB+ clock Add MLB+ clock to R8A7790 device tree. Signed-off-by: Andrey Gusakov [Sergei: rebased, renamed, added changelog] Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 13 +++++++------ include/dt-bindings/clock/r8a7790-clock.h | 1 + 2 files changed, 8 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index ffeff98fa16e..af30c2470f85 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1149,16 +1149,17 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, - <&zs_clk>, <&zs_clk>; + clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, + <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < - R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1 - R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1 - R8A7790_CLK_SATA0 + R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 + R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER + R8A7790_CLK_SATA1 R8A7790_CLK_SATA0 >; clock-output-names = - "vin3", "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; + "mlb", "vin3", "vin2", "vin1", "vin0", "ether", + "sata1", "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h index c27b3b5133b9..91940271cf83 100644 --- a/include/dt-bindings/clock/r8a7790-clock.h +++ b/include/dt-bindings/clock/r8a7790-clock.h @@ -97,6 +97,7 @@ #define R8A7790_CLK_LVDS0 26 /* MSTP8 */ +#define R8A7790_CLK_MLB 2 #define R8A7790_CLK_VIN3 8 #define R8A7790_CLK_VIN2 9 #define R8A7790_CLK_VIN1 10 -- cgit v1.2.3 From 7408d3061d2f04181820902fae6e92e4a73d5cc0 Mon Sep 17 00:00:00 2001 From: Andrey Gusakov Date: Thu, 18 Dec 2014 23:43:03 +0300 Subject: ARM: shmobile: r8a7791: add MLB+ clock Add MLB+ clock to R8A7791 device tree. Signed-off-by: Andrey Gusakov [Sergei: rebased, renamed, added changelog] Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 10 +++++----- include/dt-bindings/clock/r8a7791-clock.h | 1 + 2 files changed, 6 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 78d637135e77..28102265cc71 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1154,17 +1154,17 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, - <&zs_clk>, <&zs_clk>; + clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, + <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < - R8A7791_CLK_IPMMU_SGX + R8A7791_CLK_IPMMU_SGX R8A7791_CLK_MLB R8A7791_CLK_VIN2 R8A7791_CLK_VIN1 R8A7791_CLK_VIN0 R8A7791_CLK_ETHER R8A7791_CLK_SATA1 R8A7791_CLK_SATA0 >; clock-output-names = - "ipmmu_sgx", "vin2", "vin1", "vin0", "ether", "sata1", - "sata0"; + "ipmmu_sgx", "mlb", "vin2", "vin1", "vin0", "ether", + "sata1", "sata0"; }; mstp9_clks: mstp9_clks@e6150994 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h index ee9bb94423f3..f096f3f6c16a 100644 --- a/include/dt-bindings/clock/r8a7791-clock.h +++ b/include/dt-bindings/clock/r8a7791-clock.h @@ -92,6 +92,7 @@ /* MSTP8 */ #define R8A7791_CLK_IPMMU_SGX 0 +#define R8A7791_CLK_MLB 2 #define R8A7791_CLK_VIN2 9 #define R8A7791_CLK_VIN1 10 #define R8A7791_CLK_VIN0 11 -- cgit v1.2.3 From eecfe981cecd82791a72668a416727cb50935bdb Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Mon, 1 Dec 2014 16:52:19 +0800 Subject: ARM: dts: rockchip: add RK3288 suspend support add pmu sram node for suspend, add global_pwroff pinctrl. The pmu sram is used to store the resume code. global_pwroff is held low level at work, it would be pull to high when entering suspend. reference this in the board DTS file since some boards need it. Signed-off-by: Tony Xie Signed-off-by: Chris Zhong Reviewed-by: Doug Anderson Tested-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 3aad41d873d3..2a878a35facc 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -506,6 +506,11 @@ }; }; + sram@ff720000 { + compatible = "rockchip,rk3288-pmu-sram", "mmio-sram"; + reg = <0xff720000 0x1000>; + }; + pmu: power-management@ff730000 { compatible = "rockchip,rk3288-pmu", "syscon"; reg = <0xff730000 0x100>; @@ -729,6 +734,24 @@ bias-disable; }; + sleep { + global_pwroff: global-pwroff { + rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>; + }; + + ddrio_pwroff: ddrio-pwroff { + rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>; + }; + + ddr0_retention: ddr0-retention { + rockchip,pins = <0 2 RK_FUNC_1 &pcfg_pull_up>; + }; + + ddr1_retention: ddr1-retention { + rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_up>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins = <0 15 RK_FUNC_1 &pcfg_pull_none>, -- cgit v1.2.3 From 5963e106df7b601a8f23cbbaac1420e4c740ada6 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Mon, 1 Dec 2014 16:52:20 +0800 Subject: ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808 Add suspend-voltages and necessary pin-states for suspend on rk3288-evb-rk808 boards. global_pwroff would be pulled high when RK3288 entering suspend, this pin is a sleep signal for RK808, so RK808 could goto sleep mode, and some regulators would be disable. Signed-off-by: Chris Zhong Reviewed-by: Doug Anderson Tested-by: Doug Anderson Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb-rk808.dts | 53 +++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts index d8c775e6d5fe..d453ddd4b476 100644 --- a/arch/arm/boot/dts/rk3288-evb-rk808.dts +++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts @@ -31,7 +31,7 @@ interrupt-parent = <&gpio0>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; + pinctrl-0 = <&pmic_int &global_pwroff>; rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; @@ -50,6 +50,9 @@ regulator-min-microvolt = <750000>; regulator-max-microvolt = <1350000>; regulator-name = "vdd_arm"; + regulator-state-mem { + regulator-off-in-suspend; + }; }; vdd_gpu: DCDC_REG2 { @@ -58,12 +61,19 @@ regulator-min-microvolt = <850000>; regulator-max-microvolt = <1250000>; regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; }; vcc_ddr: DCDC_REG3 { regulator-always-on; regulator-boot-on; regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; }; vcc_io: DCDC_REG4 { @@ -72,6 +82,10 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc_io"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; }; vccio_pmu: LDO_REG1 { @@ -80,6 +94,10 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vccio_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; }; vcc_tp: LDO_REG2 { @@ -88,6 +106,9 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcc_tp"; + regulator-state-mem { + regulator-off-in-suspend; + }; }; vdd_10: LDO_REG3 { @@ -96,6 +117,10 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-name = "vdd_10"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; }; vcc18_lcd: LDO_REG4 { @@ -104,6 +129,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc18_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; }; vccio_sd: LDO_REG5 { @@ -112,6 +141,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; }; vdd10_lcd: LDO_REG6 { @@ -120,6 +153,10 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-name = "vdd10_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; }; vcc_18: LDO_REG7 { @@ -128,6 +165,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-name = "vcc_18"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; }; vcca_codec: LDO_REG8 { @@ -136,18 +177,28 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-name = "vcca_codec"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; }; vcc_wl: SWITCH_REG1 { regulator-always-on; regulator-boot-on; regulator-name = "vcc_wl"; + regulator-state-mem { + regulator-on-in-suspend; + }; }; vcc_lcd: SWITCH_REG2 { regulator-always-on; regulator-boot-on; regulator-name = "vcc_lcd"; + regulator-state-mem { + regulator-on-in-suspend; + }; }; }; }; -- cgit v1.2.3 From e0bed0774538bdb2e82d6999c8ed9556116e8559 Mon Sep 17 00:00:00 2001 From: Yingjoe Chen Date: Tue, 25 Nov 2014 09:04:00 +0100 Subject: ARM: mediatek: Add sysirq in mt6589/mt8135/mt8127 dtsi Add sysirq settings for mt6589/mt8135/mt8127 This also correct timer interrupt flag. The old setting works because boot loader already set polarity for timer interrupt. Without intpol support, the setting was not changed so gic can get the irq correctly. Signed-off-by: Yingjoe Chen Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6589.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/mt8127.dtsi | 14 ++++++++++++-- arch/arm/boot/dts/mt8135.dtsi | 14 ++++++++++++-- 3 files changed, 36 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi index e3c7600ddb38..c91b2a9ebdc3 100644 --- a/arch/arm/boot/dts/mt6589.dtsi +++ b/arch/arm/boot/dts/mt6589.dtsi @@ -19,7 +19,7 @@ / { compatible = "mediatek,mt6589"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -76,15 +76,25 @@ timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt6589-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200100 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0x10211000 0x1000>, <0x10212000 0x1000>, <0x10214000 0x2000>, diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index b24c0a2f3c44..a325404c714c 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt8127"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -76,15 +76,25 @@ compatible = "mediatek,mt8127-timer", "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200100 { + compatible = "mediatek,mt8127-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200100 0 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0 0x10211000 0 0x1000>, <0 0x10212000 0 0x1000>, <0 0x10214000 0 0x2000>, diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 7d56a986358e..2762fd57f739 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt8135"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpu-map { cluster0 { @@ -98,15 +98,25 @@ compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200030 { + compatible = "mediatek,mt8135-sysirq", + "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10200030 0 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0 0x10211000 0 0x1000>, <0 0x10212000 0 0x1000>, <0 0x10214000 0 0x2000>, -- cgit v1.2.3 From 0714947369cdb2b9b8cc24aa07264d4b61ea4fd9 Mon Sep 17 00:00:00 2001 From: Eddie Huang Date: Wed, 22 Oct 2014 15:12:00 +0200 Subject: ARM: mediatek: add UART dts for mt8127 and mt8135 This add dts support for mt8127 and mt8135 SOC UART Signed-off-by: Eddie Huang Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt8127.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index a325404c714c..aaa786233d93 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -64,6 +64,12 @@ clock-frequency = <32000>; #clock-cells = <0>; }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; }; soc { @@ -100,5 +106,37 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + uart0: serial@11006000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11002000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart1: serial@11007000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11003000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart2: serial@11008000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11004000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart3: serial@11009000 { + compatible = "mediatek,mt8127-uart","mediatek,mt6577-uart"; + reg = <0 0x11005000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 2762fd57f739..a161e99ffcc4 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -86,6 +86,13 @@ clock-frequency = <32000>; #clock-cells = <0>; }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; + }; soc { @@ -122,5 +129,38 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + uart0: serial@11006000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11006000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart1: serial@11007000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11007000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart2: serial@11008000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11008000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart3: serial@11009000 { + compatible = "mediatek,mt8135-uart","mediatek,mt6577-uart"; + reg = <0 0x11009000 0 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + }; }; -- cgit v1.2.3 From 985782d1241718c632839a284d07e84be3bb344c Mon Sep 17 00:00:00 2001 From: Philippe Reynes Date: Thu, 27 Nov 2014 21:33:59 +0100 Subject: apf27dev: add max5821 to the dts Signed-off-by: Philippe Reynes Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27-apf27dev.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts index da306c5dd678..bba3f41b89ef 100644 --- a/arch/arm/boot/dts/imx27-apf27dev.dts +++ b/arch/arm/boot/dts/imx27-apf27dev.dts @@ -59,6 +59,21 @@ linux,default-trigger = "heartbeat"; }; }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_max5821: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "max5821-reg"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + }; }; &cspi1 { @@ -107,6 +122,12 @@ compatible = "dallas,ds1374"; reg = <0x68>; }; + + max5821@38 { + compatible = "maxim,max5821"; + reg = <0x38>; + vref-supply = <®_max5821>; + }; }; &i2c2 { -- cgit v1.2.3 From c134e09fc59381ffd445922019b72aed998bdc8f Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 28 Nov 2014 00:35:36 +0100 Subject: ARM: dts: vf610: enable watchdog for Cortex-A5 dt's During restructuring of the device tree files the watchdog was changed to be disabled by default. However, since the watchdog instance is dedicated to the Cortex-A5, enable the peripheral by default in the base device tree vf500.dtsi. Signed-off-by: Stefan Agner Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf500.dtsi | 5 +++++ arch/arm/boot/dts/vfxxx.dtsi | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index de6700542714..ea0f74f6eeb3 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -169,3 +169,8 @@ &usbphy1 { interrupts = ; }; + +&wdoga5 { + interrupts = ; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 505969ae8093..712646814cc6 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -184,7 +184,7 @@ status = "disabled"; }; - wdog@4003e000 { + wdoga5: wdog@4003e000 { compatible = "fsl,vf610-wdt", "fsl,imx21-wdt"; reg = <0x4003e000 0x1000>; clocks = <&clks VF610_CLK_WDT>; -- cgit v1.2.3 From eddb00fa125bb77452dd875e7d8170c8d3c4d546 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 28 Nov 2014 00:40:06 +0100 Subject: ARM: dts: vf-colibri: add CLKOUT pin to pinctrl of FEC1 On the Colibri module, the RMII clock for the Ethernet PHY is generated by the SoC. This patch adds that missing pin to the pinctrl of FEC1. Because the boot loader initializes this pin, ethernet worked even without this pin so far. Signed-off-by: Stefan Agner Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf-colibri.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi index 82f5728be5c9..95b6ff222eee 100644 --- a/arch/arm/boot/dts/vf-colibri.dtsi +++ b/arch/arm/boot/dts/vf-colibri.dtsi @@ -121,6 +121,7 @@ pinctrl_fec1: fec1grp { fsl,pins = < + VF610_PAD_PTA6__RMII_CLKOUT 0x30d2 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 -- cgit v1.2.3 From 7194661924531d02935bc752238202299bb0dcb1 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 27 Nov 2014 10:18:19 -0200 Subject: ARM: dts: imx: Update VPU compatible strings Update the VPU compatible strings to also use "cnm,coda". Signed-off-by: Fabio Estevam Acked-by: Philipp Zabel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx27.dtsi | 2 +- arch/arm/boot/dts/imx53.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi index 107d713e1cbe..4b063b68db44 100644 --- a/arch/arm/boot/dts/imx27.dtsi +++ b/arch/arm/boot/dts/imx27.dtsi @@ -464,7 +464,7 @@ }; coda: coda@10023000 { - compatible = "fsl,imx27-vpu"; + compatible = "fsl,imx27-vpu", "cnm,codadx6"; reg = <0x10023000 0x0200>; interrupts = <53>; clocks = <&clks IMX27_CLK_VPU_BAUD_GATE>, diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index a30bddfdbdb6..b96213ba0671 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -756,7 +756,7 @@ }; vpu: vpu@63ff4000 { - compatible = "fsl,imx53-vpu"; + compatible = "fsl,imx53-vpu", "cnm,coda7541"; reg = <0x63ff4000 0x1000>; interrupts = <9>; clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, -- cgit v1.2.3 From 0d018d7387bd3c2d25ca7ed1a6b3631c071cd918 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Tue, 2 Dec 2014 18:11:59 +0100 Subject: ARM: dts: vf610: add system reset controller and syscon-reboot Add the system reset controller (SRC) module and use syscon-reboot to register a restart handler which restarts the SoC using the SRC SW_RST bit. Signed-off-by: Stefan Agner Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf500.dtsi | 4 ++++ arch/arm/boot/dts/vfxxx.dtsi | 12 ++++++++++++ 2 files changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index ea0f74f6eeb3..29016090d060 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -130,6 +130,10 @@ interrupts = ; }; +&src { + interrupts = ; +}; + &uart0 { interrupts = ; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index 712646814cc6..a55e1f9a414d 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -43,6 +43,13 @@ clock-frequency = <32768>; }; + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&src>; + offset = <0x0>; + mask = <0x1000>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -318,6 +325,11 @@ clocks = <&clks VF610_CLK_USBC0>; status = "disabled"; }; + + src: src@4006e000 { + compatible = "fsl,vf610-src", "syscon"; + reg = <0x4006e000 0x1000>; + }; }; aips1: aips-bus@40080000 { -- cgit v1.2.3 From d951534606661349a95b707111fdd04cecda62c8 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Tue, 2 Dec 2014 15:37:16 -0700 Subject: ARM: dts: sabrelite: add i2c2 Signed-off-by: Eric Nelson Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 0a36129152e0..37f53f3ddcb8 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -188,6 +188,13 @@ }; }; +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -265,6 +272,13 @@ >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 -- cgit v1.2.3 From 8eedffe54e92a8e3345fad7a4463d81364d6c452 Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Tue, 2 Dec 2014 15:37:17 -0700 Subject: ARM: dts: sabrelite: add hdmi Signed-off-by: Eric Nelson Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 37f53f3ddcb8..3bddc8fe8144 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -173,6 +173,11 @@ status = "okay"; }; +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; -- cgit v1.2.3 From 0a3e41ff90a53360bb4c39e1e45f4b4ac5949fef Mon Sep 17 00:00:00 2001 From: Eric Nelson Date: Tue, 2 Dec 2014 15:37:18 -0700 Subject: ARM: dts: sabrelite: add i2c3 Signed-off-by: Eric Nelson Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index 3bddc8fe8144..0b28a9d5241e 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -200,6 +200,13 @@ status = "okay"; }; +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -284,6 +291,13 @@ >; }; + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 -- cgit v1.2.3 From eabb3227d912f554237bf2a0920108cb6e372eb0 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 5 Dec 2014 16:23:48 +0800 Subject: ARM: dts: imx6q: update cpufreq volt/freq table According to latest i.MX6Q datasheet Rev. 3, 02/2014, the latest cpufreq volt/freq table is as below: LDO enabled/bypassed(min value): 996MHz: VDDARM: 1.225V, VDDSOC: 1.150V; 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V; 396MHz: VDDARM: 0.925V, VDDSOC: 1.150V; the 792MHz setpoint's VDDARM min voltage is updated from 1.125V to 1.150V, adding 25mV to cover board IR drop, 1.175V is the right voltage we should use. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 85f72e6b5bad..37ee4e588910 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -31,7 +31,7 @@ 1200000 1275000 996000 1250000 852000 1250000 - 792000 1150000 + 792000 1175000 396000 975000 >; fsl,soc-operating-points = < -- cgit v1.2.3 From 4c61a1e75cd9247c624de8481efe85208b97ac85 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 5 Dec 2014 16:23:49 +0800 Subject: ARM: dts: imx6dl: correct cpufreq volt/freq table Currently the cpufreq volt/freq table we used is for LDO enable mode, according to latest datasheet Rev. 3, 03/2014, the volt/freq table is as below: LDO enabled(min value): 996MHz: VDDARM: 1.225V, VDDSOC: 1.150V; 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V; 396MHz: VDDARM: 1.050V, VDDSOC: 1.150V; LDO bypassed(min value): 996MHz: VDDARM: 1.250V, VDDSOC: 1.150V; 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V; 396MHz: VDDARM: 1.050V, VDDSOC: 1.150V; Adding 25mV to cover board IR drop, for LDO enabled mode of 996MHz, VDDARM should be 1.250V, so this patch updates it. Signed-off-by: Anson Huang Reviewed-by: Philipp Zabel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6dl.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 1ac2fe732867..f94bf72832af 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -28,7 +28,7 @@ next-level-cache = <&L2>; operating-points = < /* kHz uV */ - 996000 1275000 + 996000 1250000 792000 1175000 396000 1075000 >; -- cgit v1.2.3 From 60811cc24e6101717928ef3e27fe7bcd8f342a9f Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Tue, 9 Dec 2014 09:56:52 +0100 Subject: ARM: i.MX53: dts: add sahara module The i.MX53 has a SAHARA v4 core. Add it to the dtsi. Signed-off-by: Steffen Trumtrar Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index b96213ba0671..ff4fa7ecacd8 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -765,6 +765,15 @@ resets = <&src 1>; iram = <&ocram>; }; + + sahara: crypto@63ff8000 { + compatible = "fsl,imx53-sahara"; + reg = <0x63ff8000 0x4000>; + interrupts = <19 20>; + clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, + <&clks IMX5_CLK_SAHARA_IPG_GATE>; + clock-names = "ipg", "ahb"; + }; }; ocram: sram@f8000000 { -- cgit v1.2.3 From f76129d0ed2945b470adc96478d6347c58d22721 Mon Sep 17 00:00:00 2001 From: Gwenhael Goavec-Merou Date: Tue, 16 Dec 2014 12:20:57 +0100 Subject: ARM: imx: apf51dev: add gpio-backlight support Signed-off-by: Gwenhael Goavec-Merou Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx51-apf51dev.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts index c5a9a24c280a..93d3ea12328c 100644 --- a/arch/arm/boot/dts/imx51-apf51dev.dts +++ b/arch/arm/boot/dts/imx51-apf51dev.dts @@ -16,6 +16,14 @@ model = "Armadeus Systems APF51Dev docking/development board"; compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; + backlight@bl1{ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_backlight>; + compatible = "gpio-backlight"; + gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; + default-on; + }; + display@di1 { compatible = "fsl,imx-parallel-display"; interface-pix-fmt = "bgr666"; @@ -114,6 +122,12 @@ pinctrl-0 = <&pinctrl_hog>; imx51-apf51dev { + pinctrl_backlight: bl1grp { + fsl,pins = < + MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5 + >; + }; + pinctrl_hog: hoggrp { fsl,pins = < MX51_PAD_EIM_EB2__GPIO2_22 0x0C5 -- cgit v1.2.3 From c9997ba2aa6803eec44dd498d58b18e1b0784231 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Dec 2014 11:02:41 -0200 Subject: ARM: dts: imx6qdl: Remove OCRAM clock from VPU node According to Documentation/devicetree/bindings/media/coda.txt: - clock-names : Should be "ahb", "per" The OCRAM clock is already provided inside the ocram node, so remove the OCRAM clock from the VPU node. Signed-off-by: Fabio Estevam Acked-by: Philipp Zabel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qdl.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 4fc03b7f1cee..f6c6a6e1cf3d 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -339,9 +339,8 @@ <0 12 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "bit", "jpeg"; clocks = <&clks IMX6QDL_CLK_VPU_AXI>, - <&clks IMX6QDL_CLK_MMDC_CH0_AXI>, - <&clks IMX6QDL_CLK_OCRAM>; - clock-names = "per", "ahb", "ocram"; + <&clks IMX6QDL_CLK_MMDC_CH0_AXI>; + clock-names = "per", "ahb"; resets = <&src 1>; iram = <&ocram>; }; -- cgit v1.2.3 From c565e146e6152f09177f214f3667f45522a90325 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 16 Dec 2014 17:30:29 -0200 Subject: ARM: dts: imx6sx-sdb: Add QSPI support imx6sx-sdb has two s25fl128s quad spi flash. Add support for them. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6sx-sdb.dts | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts index 1e6e5cc1c14c..cdffe8465c46 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dts +++ b/arch/arm/boot/dts/imx6sx-sdb.dts @@ -340,6 +340,28 @@ status = "okay"; }; +&qspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi2>; + status = "okay"; + + flash0: s25fl128s@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl128s"; + spi-max-frequency = <66000000>; + }; + + flash1: s25fl128s@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl128s"; + spi-max-frequency = <66000000>; + }; +}; + &ssi2 { status = "okay"; }; @@ -524,6 +546,23 @@ >; }; + pinctrl_qspi2: qspi2grp { + fsl,pins = < + MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1 + MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1 + MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1 + MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1 + MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1 + MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1 + MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1 + MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1 + MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1 + MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1 + MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1 + MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1 + >; + }; + pinctrl_vcc_sd3: vccsd3grp { fsl,pins = < MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 -- cgit v1.2.3 From 99fc5ba0bfb6df59ac22faa48406108e7203ceae Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 17 Dec 2014 12:22:09 +0800 Subject: ARM: dts: imx6sx: add i.mx6sx sabreauto board support Add basic i.MX6SoloX Sabre Auto board support, currently only debug UART and uSDHC are supported on this board. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6sx-sabreauto.dts | 146 +++++++++++++++++++++++++++++++++ 2 files changed, 147 insertions(+) create mode 100644 arch/arm/boot/dts/imx6sx-sabreauto.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..c0d5c6619c91 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -266,6 +266,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-tx6q-1020-comtft.dtb \ imx6q-tx6q-1110.dtb \ imx6sl-evk.dtb \ + imx6sx-sabreauto.dtb \ imx6sx-sdb.dtb \ ls1021a-qds.dtb \ ls1021a-twr.dtb \ diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts new file mode 100644 index 000000000000..e3c0b63c2205 --- /dev/null +++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts @@ -0,0 +1,146 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "imx6sx.dtsi" + +/ { + model = "Freescale i.MX6 SoloX Sabre Auto Board"; + compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx"; + + memory { + reg = <0x80000000 0x80000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vcc_sd3: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_vcc_sd3>; + regulator-name = "VCC_SD3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; + keep-power-in-suspend; + enable-sdio-wakeup; + vmmc-supply = <&vcc_sd3>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; + no-1-8-v; + keep-power-in-suspend; + enable-sdio-wakup; + status = "okay"; +}; + +&iomuxc { + imx6x-sabreauto { + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1 + MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059 + MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059 + MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059 + MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059 + MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059 + MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059 + MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059 + MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059 + MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059 + MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059 + MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */ + MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */ + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { + fsl,pins = < + MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9 + MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9 + MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9 + MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9 + MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9 + MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9 + MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9 + MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9 + MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9 + MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { + fsl,pins = < + MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9 + MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9 + MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9 + MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9 + MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9 + MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9 + MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9 + MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9 + MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9 + MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059 + MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059 + MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059 + MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059 + MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059 + MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059 + MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */ + MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */ + >; + }; + + pinctrl_vcc_sd3: vccsd3grp { + fsl,pins = < + MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059 + >; + }; + }; +}; -- cgit v1.2.3 From dd7d2be1d2b8abb3754b19e4ebe72a4293253e4e Mon Sep 17 00:00:00 2001 From: Evgeni Dobrev Date: Sun, 28 Dec 2014 11:46:54 +0100 Subject: Kirkwood: add support for Seagate BlackArmor NAS220 This patch adds support for Seagate BlackArmor NAS220. The Seagate BlackArmor NAS 220 is a NAS system based on Marvell 88f6192. It has 32MB NAND and 128MB DRAM. It has two SATA slots, one Gigabit Ethernet port, two USB 2.0 ports, two buttons and three LEDs. There is a serial port available on the CN5 connector on the board (1 - TX, 4 - RX, 6 - GND). The only functionality still not implemented is the bi-color led on the front panel (status). Pins mpp22 and mpp23 control this led. Setting mpp22 to high and mpp23 to low results in orange color. Setting mpp22 to low and mpp23 to high results in blue color. The third led is wired to show the SATA activity on the two drives. Signed-off-by: Evgeni Dobrev Acked-by: Sebastian Hesselbarth Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts | 173 +++++++++++++++++++++++ 2 files changed, 174 insertions(+) create mode 100644 arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..6dc9c17f9ff5 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -112,6 +112,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ k2l-evm.dtb \ k2e-evm.dtb dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ + kirkwood-blackarmor-nas220.dtb \ kirkwood-cloudbox.dtb \ kirkwood-d2net.dtb \ kirkwood-db-88f6281.dtb \ diff --git a/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts b/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts new file mode 100644 index 000000000000..fa02a9aff05e --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-blackarmor-nas220.dts @@ -0,0 +1,173 @@ +/* + * Device Tree file for Seagate Blackarmor NAS220 + * + * Copyright (C) 2014 Evgeni Dobrev + * + * Licensed under GPLv2 or later. + */ + +/dts-v1/; + +#include +#include +#include "kirkwood.dtsi" +#include "kirkwood-6192.dtsi" + +/ { + model = "Seagate Blackarmor NAS220"; + compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192", + "marvell,kirkwood"; + + memory { /* 128 MB */ + device_type = "memory"; + reg = <0x00000000 0x8000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + button@1{ + label = "Reset"; + linux,code = ; + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + + button@2{ + label = "Power"; + linux,code = ; + gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + blue-power { + label = "nas220:blue:power"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>; + pinctrl-names = "default"; + + sata0_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "SATA0 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 24 GPIO_ACTIVE_LOW>; + }; + + sata1_power: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "SATA1 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 28 GPIO_ACTIVE_LOW>; + }; + }; +}; + +/* + * Serial port routed to connector CN5 + * + * pin 1 - TX (CPU's TX) + * pin 4 - RX (CPU's RX) + * pin 6 - GND + */ +&uart0 { + status = "okay"; +}; + +&pinctrl { + pinctrl-0 = <&pmx_button_reset &pmx_button_power>; + pinctrl-names = "default"; + + pmx_act_sata0: pmx-act-sata0 { + marvell,pins = "mpp15"; + marvell,function = "sata0"; + }; + + pmx_act_sata1: pmx-act-sata1 { + marvell,pins = "mpp16"; + marvell,function = "sata1"; + }; + + pmx_power_sata0: pmx-power-sata0 { + marvell,pins = "mpp24"; + marvell,function = "gpio"; + }; + + pmx_power_sata1: pmx-power-sata1 { + marvell,pins = "mpp28"; + marvell,function = "gpio"; + }; + + pmx_button_reset: pmx-button-reset { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_button_power: pmx-button-power { + marvell,pins = "mpp26"; + marvell,function = "gpio"; + }; +}; + +&sata { + status = "okay"; + nr-ports = <2>; +}; + +&i2c0 { + status = "okay"; + + adt7476: thermal@2e { + compatible = "adi,adt7476"; + reg = <0x2e>; + }; +}; + +&nand { + status = "okay"; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@8 { + reg = <8>; + }; +}; + +ð0 { + status = "okay"; + + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; -- cgit v1.2.3 From 8325aa30f8ada22731276b19a72310150f30b3ec Mon Sep 17 00:00:00 2001 From: Dylan Reid Date: Thu, 2 Oct 2014 09:43:32 -0700 Subject: ARM: tegra: Enable the mic-detect gpio on Acer Chromebook 13 Enables the gpio-base mic detection on the Acer Chromebook 13. This gpio is set by the jack-detection chip when it notices either of the TRRS type headsets with a microphone. Signed-off-by: Dylan Reid Acked-by: Stephen Warren Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra124-nyan-big.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra124-nyan-big.dts b/arch/arm/boot/dts/tegra124-nyan-big.dts index 53181d310247..004e8e4e1c04 100644 --- a/arch/arm/boot/dts/tegra124-nyan-big.dts +++ b/arch/arm/boot/dts/tegra124-nyan-big.dts @@ -1131,6 +1131,8 @@ clock-names = "pll_a", "pll_a_out0", "mclk"; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; + nvidia,mic-det-gpios = + <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; }; }; -- cgit v1.2.3 From cbd54fe0b2bc39cf64ee2f50a22249ae1ddd37c9 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Mon, 22 Dec 2014 11:29:21 -0600 Subject: ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo For more information about the Udoo boards: http://www.udoo.org/ Signed-off-by: Robert Nelson Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-udoo.dts | 18 +++++ arch/arm/boot/dts/imx6q-udoo.dts | 124 +-------------------------------- arch/arm/boot/dts/imx6qdl-udoo.dtsi | 134 ++++++++++++++++++++++++++++++++++++ 4 files changed, 154 insertions(+), 123 deletions(-) create mode 100644 arch/arm/boot/dts/imx6dl-udoo.dts create mode 100644 arch/arm/boot/dts/imx6qdl-udoo.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index c0d5c6619c91..1236b8c0eb60 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -234,6 +234,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6dl-tx6dl-comtft.dtb \ imx6dl-tx6u-801x.dtb \ imx6dl-tx6u-811x.dtb \ + imx6dl-udoo.dtb \ imx6dl-wandboard.dtb \ imx6dl-wandboard-revb1.dtb \ imx6q-arm2.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-udoo.dts b/arch/arm/boot/dts/imx6dl-udoo.dts new file mode 100644 index 000000000000..e3713f00e819 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-udoo.dts @@ -0,0 +1,18 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +/dts-v1/; +#include "imx6dl.dtsi" +#include "imx6qdl-udoo.dtsi" + +/ { + model = "Udoo i.MX6 Dual-lite Board"; + compatible = "udoo,imx6dl-udoo", "fsl,imx6dl"; +}; diff --git a/arch/arm/boot/dts/imx6q-udoo.dts b/arch/arm/boot/dts/imx6q-udoo.dts index e3bff2ac00db..c3e64ff3d544 100644 --- a/arch/arm/boot/dts/imx6q-udoo.dts +++ b/arch/arm/boot/dts/imx6q-udoo.dts @@ -8,137 +8,15 @@ * published by the Free Software Foundation. * */ - /dts-v1/; #include "imx6q.dtsi" +#include "imx6qdl-udoo.dtsi" / { model = "Udoo i.MX6 Quad Board"; compatible = "udoo,imx6q-udoo", "fsl,imx6q"; - - chosen { - stdout-path = &uart2; - }; - - memory { - reg = <0x10000000 0x40000000>; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_h1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */ - gpio = <&gpio7 12 0>; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; - status = "okay"; -}; - -&hdmi { - ddc-i2c-bus = <&i2c2>; - status = "okay"; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; -}; - -&iomuxc { - imx6q-udoo { - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbh: usbhgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 - MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - >; - }; - }; }; &sata { status = "okay"; }; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&usbh1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh>; - vbus-supply = <®_usb_h1_vbus>; - clocks = <&clks 201>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - non-removable; - status = "okay"; -}; diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi new file mode 100644 index 000000000000..1211da894ee9 --- /dev/null +++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi @@ -0,0 +1,134 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * Author: Fabio Estevam + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/ { + chosen { + stdout-path = &uart2; + }; + + memory { + reg = <0x10000000 0x40000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_usb_h1_vbus: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */ + gpio = <&gpio7 12 0>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&iomuxc { + imx6q-udoo { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbh: usbhgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + >; + }; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh>; + vbus-supply = <®_usb_h1_vbus>; + clocks = <&clks 201>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + non-removable; + status = "okay"; +}; -- cgit v1.2.3 From d4ce8042bf736aee0f60e5165adacd0f6bfafbb4 Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Fri, 26 Dec 2014 16:57:59 +0800 Subject: ARM: dts: berlin: add pmu node for BG2Q and BG2CD This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and BG2CD SoCs. Signed-off-by: Jisheng Zhang Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/berlin2cd.dtsi | 5 +++++ arch/arm/boot/dts/berlin2q.dtsi | 8 ++++++++ 2 files changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index 230df3b1770e..a318bc32dc17 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -45,6 +45,11 @@ ranges = <0 0xf7000000 0x1000000>; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = ; + }; + sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 35253c947a7c..933dcbbcfc5d 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -63,6 +63,14 @@ ranges = <0 0xf7000000 0x1000000>; interrupt-parent = <&gic>; + pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = , + , + , + ; + }; + sdhci0: sdhci@ab0000 { compatible = "mrvl,pxav3-mmc"; reg = <0xab0000 0x200>; -- cgit v1.2.3 From 2356d2f3d1b742dacdeb1b0a038ec17f7cc2947f Mon Sep 17 00:00:00 2001 From: Jisheng Zhang Date: Fri, 26 Dec 2014 16:58:00 +0800 Subject: ARM: dts: berlin: add PPI cpu mask to twd timer interrupts According to the gic binding document, "bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of the 8 possible cpus attached to the GIC. A bit set to '1' indicated the interrupt is wired to that CPU." This patch wants to add the PPI cpu mask for completeness. Signed-off-by: Jisheng Zhang Signed-off-by: Sebastian Hesselbarth --- arch/arm/boot/dts/berlin2.dtsi | 2 +- arch/arm/boot/dts/berlin2cd.dtsi | 2 +- arch/arm/boot/dts/berlin2q.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/berlin2.dtsi b/arch/arm/boot/dts/berlin2.dtsi index 015a06c67c91..63d00a63cfa6 100644 --- a/arch/arm/boot/dts/berlin2.dtsi +++ b/arch/arm/boot/dts/berlin2.dtsi @@ -104,7 +104,7 @@ local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; - interrupts = ; + interrupts = ; clocks = <&chip CLKID_TWD>; }; diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi index a318bc32dc17..81b670ac494a 100644 --- a/arch/arm/boot/dts/berlin2cd.dtsi +++ b/arch/arm/boot/dts/berlin2cd.dtsi @@ -76,7 +76,7 @@ local-timer@ad0600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; - interrupts = ; + interrupts = ; clocks = <&chip CLKID_TWD>; }; diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 933dcbbcfc5d..41a683fd079c 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -112,7 +112,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; clocks = <&chip CLKID_TWD>; - interrupts = ; + interrupts = ; }; gic: interrupt-controller@ad1000 { -- cgit v1.2.3 From de47699d005996b41cea590c6098078ac12058be Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Fri, 12 Dec 2014 18:19:19 +0300 Subject: ARM: dts: tegra20: fix GR3D, DSI unit and reg base addresses Commit 58ecb23f64ee ("ARM: tegra: add missing unit addresses to DT") added unit address and changed reg base for GR3D and DSI host1x modules, but these addresses belongs to GR2D and TVO modules respectively. Fix it by changing modules unit and reg base addresses to proper ones. Signed-off-by: Dmitry Osipenko Fixes: 58ecb23f64ee (ARM: tegra: add missing unit addresses to DT) Cc: # v3.13+ Reviewed-by: Alexandre Courbot Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 8acf5d85c99d..f76fe94267d6 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -68,9 +68,9 @@ reset-names = "2d"; }; - gr3d@54140000 { + gr3d@54180000 { compatible = "nvidia,tegra20-gr3d"; - reg = <0x54140000 0x00040000>; + reg = <0x54180000 0x00040000>; clocks = <&tegra_car TEGRA20_CLK_GR3D>; resets = <&tegra_car 24>; reset-names = "3d"; @@ -130,9 +130,9 @@ status = "disabled"; }; - dsi@542c0000 { + dsi@54300000 { compatible = "nvidia,tegra20-dsi"; - reg = <0x542c0000 0x00040000>; + reg = <0x54300000 0x00040000>; clocks = <&tegra_car TEGRA20_CLK_DSI>; resets = <&tegra_car 48>; reset-names = "dsi"; -- cgit v1.2.3 From 3e1fe45125f35a866ac0e5780815c34ad55ce46c Mon Sep 17 00:00:00 2001 From: Dave Gerlach Date: Thu, 4 Dec 2014 09:24:39 -0600 Subject: ARM: dts: am437x-sk-evm: Hook dcdc2 as the cpu0-supply Hook dcdc2 as the cpu0-supply. Signed-off-by: Dave Gerlach Tested-by: Felipe Balbi Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 53bbfc90b26a..ab357b6d9c1e 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -610,3 +610,7 @@ &wdt { status = "okay"; }; + +&cpu { + cpu0-supply = <&dcdc2>; +}; -- cgit v1.2.3 From fad7ca8bcbda10e9fef5bcd0f5be5d7dc2f86142 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:54 -0600 Subject: ARM: dts: am437x-sk: remove internal pulls from QSPI QSPI doesn't need any pullups of any sort, let's remove them. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index ab357b6d9c1e..59226e7f70b2 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -300,12 +300,12 @@ qspi_pins: qspi_pins { pinctrl-single,pins = < - 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ - 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ - 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ - 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ - 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ - 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ + 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ + 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ + 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ + 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ + 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ + 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ >; }; -- cgit v1.2.3 From f76452fdfe3fdd930b83d108158d4f0507a32f5f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 21:01:51 +0100 Subject: ARM: shmobile: sh73a0 dtsi: Add SoC-specific FSI2 compatible property The FSI2 sound node used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index d8def5a529da..d4cfb0662643 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -317,7 +317,7 @@ sh_fsi2: sound@ec230000 { #sound-dai-cells = <1>; - compatible = "renesas,sh_fsi2"; + compatible = "renesas,fsi2-sh73a0", "renesas,sh_fsi2"; reg = <0xec230000 0x400>; interrupts = <0 146 0x4>; status = "disabled"; -- cgit v1.2.3 From fb135053436554afd29cd2b7e74a6101ce51f19c Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:55 -0600 Subject: ARM: dts: am437x-sk: add explicit MMC0 pinmux By don't relying on implicit MMC0 pulldown we make sure that pins are marked busy and even if we have a broken bootloader, MMC0 will remain functional. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 59226e7f70b2..dd1ea0bd3e58 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -167,6 +167,12 @@ mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < + 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ >; }; -- cgit v1.2.3 From a2db983a9436a7038f300dd79030a6d62154d5a5 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:56 -0600 Subject: ARM: dts: am437x-sk: remove ethernet pulls AM437x Starter Kit already has discrete pulls where they are necessary. It's safe (and actually better) to remove internal pulls. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 52 ++++++++++++++++++------------------- 1 file changed, 26 insertions(+), 26 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index dd1ea0bd3e58..9e86cedab466 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -193,32 +193,32 @@ cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ - 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ - 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ - 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ - 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ - 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ - 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ - 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ - 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ - 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ - 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ - 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ - 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ + 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ + 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ + 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ + 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ + 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ + 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ /* Slave 2 */ - 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ - 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ - 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ - 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ - 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ - 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ - 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ - 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ - 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ - 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ - 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ - 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ + 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ + 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ + 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ + 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ + 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ + 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ + 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ + 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ + 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ + 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ + 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ >; }; @@ -257,8 +257,8 @@ davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ - 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ - 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; -- cgit v1.2.3 From 221fed3cb527ab73ec645557ec6e0493b6869114 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:57 -0600 Subject: ARM: dts: am437x-sk: add explicit pinmux for both USB instances This patch just makes USB[01]_DRVVBUS signal explicitly muxed. Note that board already has a discrete pulldown, so we're not adding any pulls here. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 9e86cedab466..f7775c79ee96 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -329,6 +329,18 @@ 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ >; }; + + usb1_pins: usb1_pins { + pinctrl-single,pins = < + 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ + >; + }; + + usb2_pins: usb2_pins { + pinctrl-single,pins = < + 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ + >; + }; }; &i2c0 { @@ -485,6 +497,8 @@ &usb1 { dr_mode = "peripheral"; status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&usb1_pins>; }; &usb2_phy2 { @@ -494,6 +508,8 @@ &usb2 { dr_mode = "host"; status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&usb2_pins>; }; &qspi { -- cgit v1.2.3 From 3cca412ef6f15b557c6df66647e50a3ce4d7b8ce Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:58 -0600 Subject: ARM: dts: am437x-sk: remove internal i2c pullups AM437x Starter Kit already has discrete pullups for all I2C buses, so we can (and should) remove internal pulls. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index f7775c79ee96..5fab43798b2c 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -153,15 +153,15 @@ i2c0_pins: i2c0_pins { pinctrl-single,pins = < - 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ - 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c1_pins: i2c1_pins { pinctrl-single,pins = < - 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ - 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ + 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ + 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ >; }; -- cgit v1.2.3 From 2d8a28c27db6f6138a70d271c24797471bb31002 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 11:01:59 -0600 Subject: ARM: dts: am437x-sk: remove DSS pulls The DSS data lines don't need pulls, it's best to remove them to guarantee signal integrity. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 56 ++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 28 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 5fab43798b2c..3a7979e2db1a 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -272,34 +272,34 @@ dss_pins: dss_pins { pinctrl-single,pins = < - 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ - 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1) - 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ - 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ - 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0) - 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ - 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ - 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ - 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ - 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ + 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ + 0x024 (PIN_OUTPUT | MUX_MODE1) + 0x028 (PIN_OUTPUT | MUX_MODE1) + 0x02c (PIN_OUTPUT | MUX_MODE1) + 0x030 (PIN_OUTPUT | MUX_MODE1) + 0x034 (PIN_OUTPUT | MUX_MODE1) + 0x038 (PIN_OUTPUT | MUX_MODE1) + 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ + 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ + 0x0a4 (PIN_OUTPUT | MUX_MODE0) + 0x0a8 (PIN_OUTPUT | MUX_MODE0) + 0x0ac (PIN_OUTPUT | MUX_MODE0) + 0x0b0 (PIN_OUTPUT | MUX_MODE0) + 0x0b4 (PIN_OUTPUT | MUX_MODE0) + 0x0b8 (PIN_OUTPUT | MUX_MODE0) + 0x0bc (PIN_OUTPUT | MUX_MODE0) + 0x0c0 (PIN_OUTPUT | MUX_MODE0) + 0x0c4 (PIN_OUTPUT | MUX_MODE0) + 0x0c8 (PIN_OUTPUT | MUX_MODE0) + 0x0cc (PIN_OUTPUT | MUX_MODE0) + 0x0d0 (PIN_OUTPUT | MUX_MODE0) + 0x0d4 (PIN_OUTPUT | MUX_MODE0) + 0x0d8 (PIN_OUTPUT | MUX_MODE0) + 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ + 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ + 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ + 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ + 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ >; }; -- cgit v1.2.3 From a75dacf8204a8ace6d42a28a157af3cc65ed3ddc Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 15:02:57 -0600 Subject: ARM: dts: am57xx-beagle-x15: Add dual ethernet Add CPSW DT binding to beagle X15 DTS in order to get ethernet working with this board. Note that we're also adding sleep state which will place all pins in mux mode 15 - which means "driver off" - thus conserving power. Signed-off-by: Nishanth Menon Signed-off-by: Sekhar Nori Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 106 ++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 49edbda68cd5..6c2e8e41b1e9 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -140,6 +140,86 @@ >; }; + cpsw_pins_default: cpsw_pins_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */ + 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */ + 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */ + 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */ + 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */ + 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */ + 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */ + 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */ + 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */ + 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */ + 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */ + 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */ + + /* Slave 2 */ + 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */ + 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */ + 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */ + 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */ + 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */ + 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */ + 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */ + 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */ + 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */ + 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */ + 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */ + 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */ + >; + + }; + + cpsw_pins_sleep: cpsw_pins_sleep { + pinctrl-single,pins = < + /* Slave 1 */ + 0x250 (PIN_INPUT | MUX_MODE15) + 0x254 (PIN_INPUT | MUX_MODE15) + 0x258 (PIN_INPUT | MUX_MODE15) + 0x25c (PIN_INPUT | MUX_MODE15) + 0x260 (PIN_INPUT | MUX_MODE15) + 0x264 (PIN_INPUT | MUX_MODE15) + 0x268 (PIN_INPUT | MUX_MODE15) + 0x26c (PIN_INPUT | MUX_MODE15) + 0x270 (PIN_INPUT | MUX_MODE15) + 0x274 (PIN_INPUT | MUX_MODE15) + 0x278 (PIN_INPUT | MUX_MODE15) + 0x27c (PIN_INPUT | MUX_MODE15) + + /* Slave 2 */ + 0x198 (PIN_INPUT | MUX_MODE15) + 0x19c (PIN_INPUT | MUX_MODE15) + 0x1a0 (PIN_INPUT | MUX_MODE15) + 0x1a4 (PIN_INPUT | MUX_MODE15) + 0x1a8 (PIN_INPUT | MUX_MODE15) + 0x1ac (PIN_INPUT | MUX_MODE15) + 0x1b0 (PIN_INPUT | MUX_MODE15) + 0x1b4 (PIN_INPUT | MUX_MODE15) + 0x1b8 (PIN_INPUT | MUX_MODE15) + 0x1bc (PIN_INPUT | MUX_MODE15) + 0x1c0 (PIN_INPUT | MUX_MODE15) + 0x1c4 (PIN_INPUT | MUX_MODE15) + >; + }; + + davinci_mdio_pins_default: davinci_mdio_pins_default { + pinctrl-single,pins = < + /* MDIO */ + 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */ + 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */ + >; + }; + + davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { + pinctrl-single,pins = < + 0x23c (PIN_INPUT | MUX_MODE15) + 0x240 (PIN_INPUT | MUX_MODE15) + >; + }; + tps659038_pins_default: tps659038_pins_default { pinctrl-single,pins = < 0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ @@ -365,6 +445,32 @@ pinctrl-0 = <&uart3_pins_default>; }; +&mac { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_pins_default>; + pinctrl-1 = <&cpsw_pins_sleep>; + dual_emac; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <1>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <1>; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <2>; + phy-mode = "rgmii"; + dual_emac_res_vlan = <2>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_pins_default>; + pinctrl-1 = <&davinci_mdio_pins_sleep>; +}; + &mmc1 { status = "okay"; -- cgit v1.2.3 From 14fd7330db5f497f563f99367ebb19f2b50c83bd Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Sun, 7 Dec 2014 17:11:47 +0100 Subject: ARM: dts: omap3-n900: cleanup english This fixes english in comments and removes extra empty newline. Signed-off-by: Pavel Machek Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-n900.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index 53f3ca064140..abf1daf84926 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -307,7 +307,7 @@ regulator-name = "V28"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-always-on; /* due battery cover sensor */ + regulator-always-on; /* due to battery cover sensor */ }; &vaux2 { @@ -365,7 +365,6 @@ regulator-name = "VIO"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - }; &vintana1 { -- cgit v1.2.3 From 4d5837d14cbb3d6a7d8c15b66c21f5bce17703a0 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Tue, 16 Dec 2014 14:52:51 +0530 Subject: ARM: dts: DRA7X: drop id property in pcie_phy Since phyid is no longer used by pcie driver, this field can be dropped from the DT. Signed-off-by: Vignesh R Acked-by: Kishon Vijay Abraham I Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 22771bc1643a..fffe768477da 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1111,7 +1111,6 @@ "wkupclk", "refclk", "div-clk", "phy-div"; #phy-cells = <0>; - id = <1>; ti,hwmods = "pcie1-phy"; }; @@ -1132,7 +1131,6 @@ "div-clk", "phy-div"; #phy-cells = <0>; ti,hwmods = "pcie2-phy"; - id = <2>; status = "disabled"; }; }; -- cgit v1.2.3 From 9d0df0a65509b0a815ba02de9b3c5d4ea1b0a7de Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Thu, 18 Dec 2014 21:54:11 +0530 Subject: ARM: dts: am4372: add VPFE DT node entries Add Video Processing Front End (VPFE) device tree nodes for AM34xx family of devices. Signed-off-by: Benoit Parrot Signed-off-by: Darren Etheridge Signed-off-by: Felipe Balbi Signed-off-by: Lad, Prabhakar Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am4372.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index b62a1cd776cd..1943fc333e7c 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -948,6 +948,22 @@ interrupts = ; status = "disabled"; }; + + vpfe0: vpfe@48326000 { + compatible = "ti,am437x-vpfe"; + reg = <0x48326000 0x2000>; + interrupts = ; + ti,hwmods = "vpfe0"; + status = "disabled"; + }; + + vpfe1: vpfe@48328000 { + compatible = "ti,am437x-vpfe"; + reg = <0x48328000 0x2000>; + interrupts = ; + ti,hwmods = "vpfe1"; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From d890edcd3f9d0d7176490ecd5330ebad2166192f Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Thu, 18 Dec 2014 21:54:12 +0530 Subject: ARM: dts: am43x-epos-evm: add VPFE device tree data Add device tree nodes and pinmux entries for Video Processing Front End (VPFE) on am43x epos evm. Signed-off-by: Benoit Parrot Signed-off-by: Darren Etheridge Signed-off-by: Felipe Balbi Signed-off-by: Lad, Prabhakar Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am43x-epos-evm.dts | 53 ++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index 662261d6b2ca..257c099c347e 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -243,6 +243,42 @@ 0x08C (PIN_OUTPUT_PULLUP | MUX_MODE7) >; }; + + vpfe1_pins_default: vpfe1_pins_default { + pinctrl-single,pins = < + 0x1cc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */ + 0x1d0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */ + 0x1d4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */ + 0x1d8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */ + 0x1dc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */ + 0x1e8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */ + 0x1ec (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */ + 0x1f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */ + 0x1f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */ + 0x1f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */ + 0x1fc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */ + 0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */ + 0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */ + >; + }; + + vpfe1_pins_sleep: vpfe1_pins_sleep { + pinctrl-single,pins = < + 0x1cc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1d0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1d4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1d8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + >; + }; }; matrix_keypad: matrix_keypad@0 { @@ -634,3 +670,20 @@ }; }; }; + +&vpfe1 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&vpfe1_pins_default>; + pinctrl-1 = <&vpfe1_pins_sleep>; + + port { + vpfe1_ep: endpoint { + /* remote-endpoint = <&sensor>; add once we have it */ + ti,am437x-vpfe-interface = <0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; +}; -- cgit v1.2.3 From 5ccaa6ec0d466301857e3ae12b6c92071c0592a5 Mon Sep 17 00:00:00 2001 From: Darren Etheridge Date: Thu, 18 Dec 2014 21:54:13 +0530 Subject: ARM: dts: am437x-sk-evm: add VPFE device tree data Add device tree nodes and pinmux entries for Video Processing Front End (VPFE) on am437x sk evm. Signed-off-by: Darren Etheridge Signed-off-by: Felipe Balbi Signed-off-by: Lad, Prabhakar Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 58 +++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 3a7979e2db1a..e12199ed161b 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -190,6 +190,46 @@ >; }; + vpfe0_pins_default: vpfe0_pins_default { + pinctrl-single,pins = < + 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ + 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ + 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ + 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ + 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ + 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ + 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ + 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ + 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ + 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ + 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ + 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ + 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ + 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ + 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ + >; + }; + + vpfe0_pins_sleep: vpfe0_pins_sleep { + pinctrl-single,pins = < + 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) + >; + }; + cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ @@ -636,3 +676,21 @@ &cpu { cpu0-supply = <&dcdc2>; }; + +&vpfe0 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&vpfe0_pins_default>; + pinctrl-1 = <&vpfe0_pins_sleep>; + + /* Camera port */ + port { + vpfe0_ep: endpoint { + /* remote-endpoint = <&sensor>; add once we have it */ + ti,am437x-vpfe-interface = <0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; +}; -- cgit v1.2.3 From c788a7f4ed0b196a77a8be24f4eabdcc8b5cf3f8 Mon Sep 17 00:00:00 2001 From: Benoit Parrot Date: Thu, 18 Dec 2014 21:54:14 +0530 Subject: ARM: dts: am437x-gp-evm: add VPFE device tree data Add device tree nodes and pinmux entries for Video Processing Front End (VPFE) on am437x gp evm. Signed-off-by: Benoit Parrot Signed-off-by: Lad, Prabhakar Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-gp-evm.dts | 106 ++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index 7eaae4cf9f89..f84d9715a4a9 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -268,6 +268,78 @@ 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */ >; }; + + vpfe0_pins_default: vpfe0_pins_default { + pinctrl-single,pins = < + 0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ + 0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ + 0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ + 0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ + 0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ + 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ + 0x20C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ + 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ + 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ + 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ + 0x21C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ + 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ + 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ + >; + }; + + vpfe0_pins_sleep: vpfe0_pins_sleep { + pinctrl-single,pins = < + 0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/ + 0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/ + 0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/ + 0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/ + 0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/ + 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/ + 0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/ + 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/ + 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/ + 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/ + 0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/ + 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/ + 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/ + >; + }; + + vpfe1_pins_default: vpfe1_pins_default { + pinctrl-single,pins = < + 0x1CC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/ + 0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/ + 0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/ + 0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/ + 0x1DC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/ + 0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/ + 0x1EC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/ + 0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/ + 0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/ + 0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/ + 0x1FC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/ + 0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/ + 0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/ + >; + }; + + vpfe1_pins_sleep: vpfe1_pins_sleep { + pinctrl-single,pins = < + 0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/ + 0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/ + 0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/ + 0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/ + 0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/ + 0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/ + 0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/ + 0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/ + 0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/ + 0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/ + 0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/ + 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/ + 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/ + >; + }; }; &i2c0 { @@ -545,3 +617,37 @@ pinctrl-0 = <&dcan1_default>; status = "okay"; }; + +&vpfe0 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&vpfe0_pins_default>; + pinctrl-1 = <&vpfe0_pins_sleep>; + + port { + vpfe0_ep: endpoint { + /* remote-endpoint = <&sensor>; add once we have it */ + ti,am437x-vpfe-interface = <0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; +}; + +&vpfe1 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&vpfe1_pins_default>; + pinctrl-1 = <&vpfe1_pins_sleep>; + + port { + vpfe1_ep: endpoint { + /* remote-endpoint = <&sensor>; add once we have it */ + ti,am437x-vpfe-interface = <0>; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; +}; -- cgit v1.2.3 From 47e0920cca5354acf7185b7a28e630f84b72bd16 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Mon, 22 Dec 2014 16:30:14 -0600 Subject: ARM: dts: add support for AM437x IDK The AM437x Industrial Development Kit (IDK) is an application development platform targeted at industrial communication and control applications. It comes with a 3-phase motor driver, PROFINET, PROFIBUS and a few other industrial communication interfaces. The board has 1GiB of DDR3 RAM, QSPI NOR flash, a 100% discrete power design (no PMIC) and an on-board 2MP camera (not supported with Linux as of this writing). Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/am437x-idk-evm.dts | 381 +++++++++++++++++++++++++++++++++++ 2 files changed, 382 insertions(+) create mode 100644 arch/arm/boot/dts/am437x-idk-evm.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..1b2c7de17cf3 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -366,6 +366,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \ omap4-var-stk-om44.dtb dtb-$(CONFIG_SOC_AM43XX) += am43x-epos-evm.dtb \ am437x-sk-evm.dtb \ + am437x-idk-evm.dtb \ am437x-gp-evm.dtb dtb-$(CONFIG_SOC_OMAP5) += omap5-cm-t54.dtb \ omap5-sbc-t54.dtb \ diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts new file mode 100644 index 000000000000..b52dd0a72d61 --- /dev/null +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -0,0 +1,381 @@ +/* + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "am4372.dtsi" +#include +#include +#include +#include + +/ { + model = "TI AM437x Industrial Development Kit"; + compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; + + v24_0d: fixed-regulator-v24_0d { + compatible = "regulator-fixed"; + regulator-name = "V24_0D"; + regulator-min-microvolt = <24000000>; + regulator-max-microvolt = <24000000>; + regulator-always-on; + regulator-boot-on; + }; + + v3_3d: fixed-regulator-v3_3d { + compatible = "regulator-fixed"; + regulator-name = "V3_3D"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v24_0d>; + }; + + vdd_corereg: fixed-regulator-vdd_corereg { + compatible = "regulator-fixed"; + regulator-name = "VDD_COREREG"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v24_0d>; + }; + + vdd_core: fixed-regulator-vdd_core { + compatible = "regulator-fixed"; + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vdd_corereg>; + }; + + v1_8dreg: fixed-regulator-v1_8dreg{ + compatible = "regulator-fixed"; + regulator-name = "V1_8DREG"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v24_0d>; + }; + + v1_8d: fixed-regulator-v1_8d{ + compatible = "regulator-fixed"; + regulator-name = "V1_8D"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v1_8dreg>; + }; + + v1_5dreg: fixed-regulator-v1_5dreg{ + compatible = "regulator-fixed"; + regulator-name = "V1_5DREG"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v24_0d>; + }; + + v1_5d: fixed-regulator-v1_5d{ + compatible = "regulator-fixed"; + regulator-name = "V1_5D"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&v1_5dreg>; + }; +}; + +&am43xx_pinmux { + i2c0_pins_default: i2c0_pins_default { + pinctrl-single,pins = < + 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + i2c0_pins_sleep: i2c0_pins_sleep { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + i2c1_pins_default: i2c1_pins_default { + pinctrl-single,pins = < + 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ + 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ + >; + }; + + i2c1_pins_sleep: i2c1_pins_sleep { + pinctrl-single,pins = < + 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */ + 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */ + >; + }; + + mmc1_pins_default: pinmux_mmc1_pins_default { + pinctrl-single,pins = < + 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ + 0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + 0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + 0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + 0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ + >; + }; + + mmc1_pins_sleep: pinmux_mmc1_pins_sleep { + pinctrl-single,pins = < + 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + ecap0_pins_default: backlight_pins_default { + pinctrl-single,pins = < + 0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + qspi_pins_default: qspi_pins_default { + pinctrl-single,pins = < + 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */ + 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ + 0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ + 0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ + 0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */ + 0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ + >; + }; + + qspi_pins_sleep: qspi_pins_sleep{ + pinctrl-single,pins = < + 0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c0_pins_default>; + pinctrl-1 = <&i2c0_pins_default>; + clock-frequency = <400000>; + + at24@50 { + compatible = "at24,24c256"; + pagesize = <64>; + reg = <0x50>; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&i2c1_pins_default>; + pinctrl-1 = <&i2c1_pins_default>; + clock-frequency = <400000>; + + tps: tps62362@60 { + compatible = "ti,tps62362"; + regulator-name = "VDD_MPU"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1330000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-high; + ti,vsel1-state-high; + vin-supply = <&v3_3d>; + }; +}; + +&epwmss0 { + status = "okay"; +}; + +&ecap0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pins_default>; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&mmc1 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_sleep>; + vmmc-supply = <&v3_3d>; + bus-width = <4>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; +}; + +&qspi { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&qspi_pins_default>; + pinctrl-1 = <&qspi_pins_sleep>; + + spi-max-frequency = <48000000>; + m25p80@0 { + compatible = "mx66l51235l"; + spi-max-frequency = <48000000>; + reg = <0>; + spi-cpol; + spi-cpha; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + + /* + * MTD partition table. The ROM checks the first 512KiB for a + * valid file to boot(XIP). + */ + partition@0 { + label = "QSPI.U_BOOT"; + reg = <0x00000000 0x000080000>; + }; + partition@1 { + label = "QSPI.U_BOOT.backup"; + reg = <0x00080000 0x00080000>; + }; + partition@2 { + label = "QSPI.U-BOOT-SPL_OS"; + reg = <0x00100000 0x00010000>; + }; + partition@3 { + label = "QSPI.U_BOOT_ENV"; + reg = <0x00110000 0x00010000>; + }; + partition@4 { + label = "QSPI.U-BOOT-ENV.backup"; + reg = <0x00120000 0x00010000>; + }; + partition@5 { + label = "QSPI.KERNEL"; + reg = <0x00130000 0x0800000>; + }; + partition@6 { + label = "QSPI.FILESYSTEM"; + reg = <0x00930000 0x36D0000>; + }; + }; +}; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + status = "okay"; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; + phy-mode = "rgmii"; +}; + +&rtc { + status = "okay"; +}; + +&wdt { + status = "okay"; +}; + +&cpu { + cpu0-supply = <&tps>; +}; -- cgit v1.2.3 From bb1c5fe1263d762ff0db45b6e97682e5047e54b4 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Fri, 26 Dec 2014 13:28:23 -0600 Subject: ARM: dts: am437x-sk: add power button binding Let this board report KEY_POWER so upper layers can decide what to do when power button is pressed. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index e12199ed161b..832d24318f62 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -444,6 +444,11 @@ regulator-always-on; }; + power-button { + compatible = "ti,tps65218-pwrbutton"; + status = "okay"; + interrupts = <3 IRQ_TYPE_EDGE_BOTH>; + }; }; at24@50 { -- cgit v1.2.3 From f4b36909353ada35374dc51676f73362443bf206 Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Fri, 26 Dec 2014 22:09:49 +0200 Subject: ARM: dts: N950/N9: add twl_power Add twl_power for N950/N9. Start with the simplest configuration to just enable power off. Signed-off-by: Aaro Koskinen Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-n950-n9.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-n950-n9.dtsi b/arch/arm/boot/dts/omap3-n950-n9.dtsi index 1e49dfe7e212..c41db94ee9c2 100644 --- a/arch/arm/boot/dts/omap3-n950-n9.dtsi +++ b/arch/arm/boot/dts/omap3-n950-n9.dtsi @@ -60,6 +60,11 @@ &twl { compatible = "ti,twl5031"; + + twl_power: power { + compatible = "ti,twl4030-power"; + ti,use_poweroff; + }; }; &twl_gpio { -- cgit v1.2.3 From cd5bca6f627442b63012ac0cafc6452bc929832e Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Fri, 26 Dec 2014 14:53:13 -0600 Subject: ARM: dts: am437x-idk: add gpio-based power key AM437x IDK board has a User Switch which we can program to whatever we want. Because this board doesn't have a PMIC which can give us power button presses, let's use this user switch as a gpio-keys power button. Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-idk-evm.dts | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts index b52dd0a72d61..f9a17e2ca8cb 100644 --- a/arch/arm/boot/dts/am437x-idk-evm.dts +++ b/arch/arm/boot/dts/am437x-idk-evm.dts @@ -96,9 +96,29 @@ regulator-boot-on; vin-supply = <&v1_5dreg>; }; + + gpio_keys: gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + label = "power-button"; + linux,code = ; + gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + }; + }; }; &am43xx_pinmux { + gpio_keys_pins_default: gpio_keys_pins_default { + pinctrl-single,pins = < + 0x1b8 (PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ + >; + }; + i2c0_pins_default: i2c0_pins_default { pinctrl-single,pins = < 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ @@ -282,6 +302,10 @@ status = "okay"; }; +&gpio4 { + status = "okay"; +}; + &gpio5 { status = "okay"; }; -- cgit v1.2.3 From 7a03f2c08d62371a6459331036e214bd7288ed10 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 5 Jan 2015 10:32:29 -0600 Subject: ARM: dts: am57xx-beagle-x15: Add GPIO controlled fan node TPS gpio now controls a 5v 500mA TL5209 regulator which may be supply a fan (such as AFB02505HHB) over J1 connector for various purposes. Provide device tree node to enable the same. Signed-off-by: Nishanth Menon Reviewed-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 6c2e8e41b1e9..c5d4ceabdd80 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -80,6 +80,14 @@ default-state = "off"; }; }; + + gpio_fan: gpio_fan { + /* Based on 5v 500mA AFB02505HHB */ + compatible = "gpio-fan"; + gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = <0 0>, + <13000 1>; + }; }; &dra7_pmx_core { @@ -394,6 +402,12 @@ wakeup-source; ti,palmas-long-press-seconds = <12>; }; + + tps659038_gpio: tps659038_gpio { + compatible = "ti,palmas-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; }; tmp102: tmp102@48 { -- cgit v1.2.3 From 1643b31658c44767a85469733c6bff4f6d0371c7 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Tue, 2 Dec 2014 08:07:11 -0800 Subject: ARM: zynq: DT: Add USB to device tree Add USB nodes to zc702, zc706 and zed device trees. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/zynq-zc702.dts | 11 +++++++++++ arch/arm/boot/dts/zynq-zc706.dts | 10 ++++++++++ arch/arm/boot/dts/zynq-zed.dts | 10 ++++++++++ 4 files changed, 51 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index ee3e5d675b05..f1dd2a7020ae 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -314,6 +314,26 @@ clocks = <&clkc 4>; }; + usb0: usb@e0002000 { + compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; + status = "disabled"; + clocks = <&clkc 28>; + interrupt-parent = <&intc>; + interrupts = <0 21 4>; + reg = <0xe0002000 0x1000>; + phy_type = "ulpi"; + }; + + usb1: usb@e0003000 { + compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2"; + status = "disabled"; + clocks = <&clkc 29>; + interrupt-parent = <&intc>; + interrupts = <0 44 4>; + reg = <0xe0003000 0x1000>; + phy_type = "ulpi"; + }; + watchdog0: watchdog@f8005000 { clocks = <&clkc 45>; compatible = "xlnx,zynq-wdt-r1p2"; diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 280f02dd4ddc..399fed4d9c19 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -36,6 +36,11 @@ linux,default-trigger = "heartbeat"; }; }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; }; &can0 { @@ -139,3 +144,9 @@ &uart1 { status = "okay"; }; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 34f7812d2ee8..89cc9adc569d 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -27,6 +27,10 @@ bootargs = "console=ttyPS0,115200 earlyprintk"; }; + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; }; &clkc { @@ -118,3 +122,9 @@ &uart1 { status = "okay"; }; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts index 1c7cc990b47a..e20956e5e720 100644 --- a/arch/arm/boot/dts/zynq-zed.dts +++ b/arch/arm/boot/dts/zynq-zed.dts @@ -27,6 +27,10 @@ bootargs = "console=ttyPS0,115200 earlyprintk"; }; + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; }; &clkc { @@ -50,3 +54,9 @@ &uart1 { status = "okay"; }; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; +}; -- cgit v1.2.3 From ac00aa4dcd085e4cf01761095ec1e2a141f86f38 Mon Sep 17 00:00:00 2001 From: Eddie Huang Date: Fri, 1 May 2015 13:28:00 +0200 Subject: ARM: mediatek: dts: Add UART dts for MT8127 and MT8135 boards This patch enable UART for MT8127 moose board and MT8135 evalution board. Adding the dts, these two boards can show log and shell prompts. Signed-off-by: Eddie Huang Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt8127-moose.dts | 4 ++++ arch/arm/boot/dts/mt8135-evbp1.dts | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt8127-moose.dts b/arch/arm/boot/dts/mt8127-moose.dts index 13cba0e77e08..073e295a1cb4 100644 --- a/arch/arm/boot/dts/mt8127-moose.dts +++ b/arch/arm/boot/dts/mt8127-moose.dts @@ -23,3 +23,7 @@ reg = <0 0x80000000 0 0x40000000>; }; }; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts b/arch/arm/boot/dts/mt8135-evbp1.dts index a5adf9742308..36677382bdd8 100644 --- a/arch/arm/boot/dts/mt8135-evbp1.dts +++ b/arch/arm/boot/dts/mt8135-evbp1.dts @@ -23,3 +23,7 @@ reg = <0 0x80000000 0 0x40000000>; }; }; + +&uart3 { + status = "okay"; +}; -- cgit v1.2.3 From c6b3a64f7040520c0f0d6d15a6dbe2f41789e21b Mon Sep 17 00:00:00 2001 From: Howard Chen Date: Thu, 8 Jan 2015 14:23:10 +0800 Subject: ARM: mediatek: Add sysirq device node to mt6592 dtsi Add sysirq node to mt6592.dtsi and also correct timer interrupt flag. The old setting works because boot loader already set it. With a sysirq device node, the timer interrupt can use a correct value. Signed-off-by: Howard Chen Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6592.dtsi | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi index 31e5a0979d78..67c817418392 100644 --- a/arch/arm/boot/dts/mt6592.dtsi +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt6592"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -81,18 +81,25 @@ timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200220 { + compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200220 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0x10211000 0x1000>, <0x10212000 0x1000>; }; - }; - -- cgit v1.2.3 From 2cda1880f8c6b6a081ab78824d3742a229887b69 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 8 Jan 2015 13:24:33 +0100 Subject: ARM: tegra: Fix unit address for Cortex-A9 TWD timer The Cortex-A9 TWD timer has registers at address 0x50040600, but the unit address was 50004600, most likely a typo. Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra20.dtsi | 2 +- arch/arm/boot/dts/tegra30.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index f76fe94267d6..e5527f742696 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -140,7 +140,7 @@ }; }; - timer@50004600 { + timer@50040600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x50040600 0x20>; interrupts = ; interrupts = Date: Tue, 16 Dec 2014 22:21:16 +0100 Subject: ARM: tegra: Update isl29028 compatible string to use isil vendor prefix "isil" and "isl" prefixes are used at various locations inside the kernel to reference Intersil corporation. This patch is part of a series fixing those locations were "isl" is used in compatible strings to use the now expected "isil" prefix instead (NASDAQ symbol for Intersil and most used version). Note: isl29028 is an I2C device so the patch does not in fact currently depend on the introduction of "isil"-based compatible string in isl29028 driver because I2C core does not check the prefix yet. Signed-off-by: Arnaud Ebalard Signed-off-by: Thierry Reding --- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index cbf5a1ae0ca7..a1b682ea01bd 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -189,7 +189,7 @@ /* ALS and Proximity sensor */ isl29028@44 { - compatible = "isl,isl29028"; + compatible = "isil,isl29028"; reg = <0x44>; interrupt-parent = <&gpio>; interrupts = ; -- cgit v1.2.3 From 8facce138f0105727f3f6d4c4e1ce5570a54a556 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Wed, 7 Jan 2015 16:04:00 +0100 Subject: ARM: STi: DT: STiH407: Add usb2 picophy dt nodes This patch adds the dt nodes for the usb2 picophy found on the stih407 device family. It is used on stih407 by the dwc3 usb3 controller when controlling usb2/1.1 devices. Signed-off-by: Peter Griffin Reviewed-by: Arnd Bergmann Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih407-family.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 3e31d32133b8..d4a8f843cdc8 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -274,5 +274,14 @@ status = "disabled"; }; + + usb2_picophy0: phy1 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0x100 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + }; }; }; -- cgit v1.2.3 From 9d9f65fcf5455fa2737486466498c7321372d966 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Wed, 7 Jan 2015 16:04:00 +0100 Subject: ARM: STi: DT: STiH410: Add usb2 picophy dt nodes This patch adds the dt nodes for the extra usb2 picophys found on the stih410. These two picophys are used in conjunction with the extra ehci/ohci usb controllers also found on the stih410 SoC. Signed-off-by: Peter Griffin Reviewed-by: Arnd Bergmann Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih410.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index c05627eb717d..2e5e9ed8b615 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -10,5 +10,23 @@ #include "stih407-family.dtsi" #include "stih410-pinctrl.dtsi" / { + soc { + usb2_picophy1: phy2 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xf8 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + }; + usb2_picophy2: phy3 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xfc 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY1_RESET>; + reset-names = "global", "port"; + }; + }; }; -- cgit v1.2.3 From a59a4d969a7a74532cc0d4b3b44a962c3a199036 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Wed, 7 Jan 2015 16:04:00 +0100 Subject: ARM: STi: DT: STiH410: Add DT nodes for the ehci and ohci usb controllers. This patch adds the DT nodes for the extra ehci and ohci usb controllers on the stih410 SoC. Signed-off-by: Peter Griffin Reviewed-by: Arnd Bergmann Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih410.dtsi | 52 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index 2e5e9ed8b615..37995f4739d2 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -28,5 +28,57 @@ <&picophyreset STIH407_PICOPHY1_RESET>; reset-names = "global", "port"; }; + + ohci0: usb@9a03c00 { + compatible = "st,st-ohci-300x"; + reg = <0x9a03c00 0x100>; + interrupts = ; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, + <&softreset STIH407_USB2_PORT0_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy1>; + phy-names = "usb"; + }; + + ehci0: usb@9a03e00 { + compatible = "st,st-ehci-300x"; + reg = <0x9a03e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, + <&softreset STIH407_USB2_PORT0_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy1>; + phy-names = "usb"; + }; + + ohci1: usb@9a83c00 { + compatible = "st,st-ohci-300x"; + reg = <0x9a83c00 0x100>; + interrupts = ; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, + <&softreset STIH407_USB2_PORT1_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy2>; + phy-names = "usb"; + }; + + ehci1: usb@9a83e00 { + compatible = "st,st-ehci-300x"; + reg = <0x9a83e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, + <&softreset STIH407_USB2_PORT1_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy2>; + phy-names = "usb"; + }; }; }; -- cgit v1.2.3 From 4a25432b13090b57d257fa0ffb6712d8acf94523 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Jan 2015 18:38:05 +0100 Subject: ARM: mvebu: a38x: Fix node names Some nodes in the DTs have a reg property but no unit name in their node name. This contradicts the way the ePAPR defines the node names. Fix this. Signed-off-by: Maxime Ripard Acked-by: Gregory CLEMENT Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-380.dtsi | 2 +- arch/arm/boot/dts/armada-385-db.dts | 2 +- arch/arm/boot/dts/armada-385-rd.dts | 2 +- arch/arm/boot/dts/armada-385.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index 4173a8ab34e7..13400ce88c54 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -32,7 +32,7 @@ soc { internal-regs { - pinctrl { + pinctrl@18000 { compatible = "marvell,mv88f6810-pinctrl"; reg = <0x18000 0x20>; }; diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts index 2aaa9d2ac284..212605ccc7b6 100644 --- a/arch/arm/boot/dts/armada-385-db.dts +++ b/arch/arm/boot/dts/armada-385-db.dts @@ -74,7 +74,7 @@ phy-mode = "rgmii-id"; }; - mdio { + mdio@72004 { phy0: ethernet-phy@0 { reg = <0>; }; diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts index aaca2861dc87..74a3bfe6efd7 100644 --- a/arch/arm/boot/dts/armada-385-rd.dts +++ b/arch/arm/boot/dts/armada-385-rd.dts @@ -67,7 +67,7 @@ }; - mdio { + mdio@72004 { phy0: ethernet-phy@0 { reg = <0>; }; diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index 6283d7912f71..5249a4d3c207 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -37,7 +37,7 @@ soc { internal-regs { - pinctrl { + pinctrl@18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; }; diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 74391dace9e7..ada1f206028b 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -193,7 +193,7 @@ status = "disabled"; }; - pinctrl { + pinctrl@18000 { compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; }; @@ -373,7 +373,7 @@ status = "disabled"; }; - mdio { + mdio@72004 { #address-cells = <1>; #size-cells = <0>; compatible = "marvell,orion-mdio"; -- cgit v1.2.3 From 684f216f9eee5b38432c398cbd045ee2f3f11ece Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Jan 2015 18:38:07 +0100 Subject: ARM: mvebu: A38x: Remove redundant pinctrl informations The compatible set in the armada-38x DTSI is always overridden, and the reg defined in there is duplicated in the armada-380 and armada-385 DTSIs. Remove these useless items. Signed-off-by: Maxime Ripard Acked-by: Gregory CLEMENT Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-380.dtsi | 1 - arch/arm/boot/dts/armada-385.dtsi | 1 - arch/arm/boot/dts/armada-38x.dtsi | 1 - 3 files changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index 13400ce88c54..7e509d2d74d0 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -34,7 +34,6 @@ internal-regs { pinctrl@18000 { compatible = "marvell,mv88f6810-pinctrl"; - reg = <0x18000 0x20>; }; }; diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index 5249a4d3c207..a54a252ddb4c 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -39,7 +39,6 @@ internal-regs { pinctrl@18000 { compatible = "marvell,mv88f6820-pinctrl"; - reg = <0x18000 0x20>; }; }; diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index ada1f206028b..40200084c6c8 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -194,7 +194,6 @@ }; pinctrl@18000 { - compatible = "marvell,mv88f6820-pinctrl"; reg = <0x18000 0x20>; }; -- cgit v1.2.3 From 91b4c91f919abffa72cbf7545a944252f8e4f775 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Jan 2015 18:38:08 +0100 Subject: ARM: mvebu: Add a number of pinctrl functions Some pinctrl functions can be shared with all DTS out there, since they are generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid duplication. Signed-off-by: Maxime Ripard Acked-by: Gregory CLEMENT Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-38x.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 40200084c6c8..98885c58be29 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -195,6 +195,45 @@ pinctrl@18000 { reg = <0x18000 0x20>; + + ge0_rgmii_pins: ge-rgmii-pins-0 { + marvell,pins = "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11", + "mpp12", "mpp13", "mpp14", + "mpp15", "mpp16", "mpp17"; + marvell,function = "ge0"; + }; + + i2c0_pins: i2c-pins-0 { + marvell,pins = "mpp2", "mpp3"; + marvell,function = "i2c0"; + }; + + mdio_pins: mdio-pins { + marvell,pins = "mpp4", "mpp5"; + marvell,function = "ge"; + }; + + ref_clk0_pins: ref-clk-pins-0 { + marvell,pins = "mpp45"; + marvell,function = "ref"; + }; + + spi1_pins: spi-pins-1 { + marvell,pins = "mpp56", "mpp57", "mpp58", + "mpp59"; + marvell,function = "spi1"; + }; + + uart0_pins: uart-pins-0 { + marvell,pins = "mpp0", "mpp1"; + marvell,function = "ua0"; + }; + + uart1_pins: uart-pins-1 { + marvell,pins = "mpp19", "mpp20"; + marvell,function = "ua1"; + }; }; gpio0: gpio@18100 { -- cgit v1.2.3 From e5ee12817e9eac891c6b2a340f64d94d9abd355f Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 8 Jan 2015 18:38:09 +0100 Subject: ARM: mvebu: Add Armada 385 Access Point Development Board support The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage. [gregory.clement@free-electrons.com: switch the license to the dual X11/GPL with the agreement of the author] Signed-off-by: Maxime Ripard Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-385-db-ap.dts | 178 +++++++++++++++++++++++++++++++++ 2 files changed, 179 insertions(+) create mode 100644 arch/arm/boot/dts/armada-385-db-ap.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6dc9c17f9ff5..d34837104949 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -536,6 +536,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-385-db.dtb \ + armada-385-db-ap.dtb \ armada-385-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \ diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts new file mode 100644 index 000000000000..57b9119fb3e0 --- /dev/null +++ b/arch/arm/boot/dts/armada-385-db-ap.dts @@ -0,0 +1,178 @@ +/* + * Device Tree file for Marvell Armada 385 Access Point Development board + * (DB-88F6820-AP) + * + * Copyright (C) 2014 Marvell + * + * Nadav Haklai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "armada-385.dtsi" + +#include + +/ { + model = "Marvell Armada 385 Access Point Development Board"; + compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada38x"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart1; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2GB */ + }; + + soc { + ranges = ; + + internal-regs { + spi1: spi@10680 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <54000000>; + }; + }; + + i2c0: i2c@11000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + /* + * This bus is wired to two EEPROM + * sockets, one of which holding the + * board ID used by the bootloader. + * Erasing this EEPROM's content will + * brick the board. + * Use this bus with caution. + */ + }; + + mdio@72004 { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@4 { + reg = <4>; + }; + + phy2: ethernet-phy@6 { + reg = <6>; + }; + }; + + /* UART0 is exposed through the JP8 connector */ + uart0: serial@12000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + }; + + /* + * UART1 is exposed through a FTDI chip + * wired to the mini-USB connector + */ + uart1: serial@12100 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "sgmii"; + }; + + ethernet@34000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; + }; + + ethernet@70000 { + pinctrl-names = "default"; + + /* + * The Reference Clock 0 is used to + * provide a clock to the PHY + */ + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + }; + + pcie-controller { + status = "okay"; + + /* + * The three PCIe units are accessible through + * standard mini-PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + + pcie@3,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + }; + }; +}; -- cgit v1.2.3 From 34598503049688741edc45e800627d945293e5f2 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 8 Jan 2015 18:38:10 +0100 Subject: ARM: mvebu: a38x: Add more pinctrl functions With the Armada 385 GP board more pinctrl functions depending of the SoC are needed. Add them to the DTSI to avoid duplication. Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-38x.dtsi | 47 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 98885c58be29..63fe15174fee 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -204,6 +204,14 @@ marvell,function = "ge0"; }; + ge1_rgmii_pins: ge-rgmii-pins-1 { + marvell,pins = "mpp21", "mpp27", "mpp28", + "mpp29", "mpp30", "mpp31", + "mpp32", "mpp37", "mpp38", + "mpp39", "mpp40", "mpp41"; + marvell,function = "ge1"; + }; + i2c0_pins: i2c-pins-0 { marvell,pins = "mpp2", "mpp3"; marvell,function = "i2c0"; @@ -219,6 +227,17 @@ marvell,function = "ref"; }; + ref_clk1_pins: ref-clk-pins-1 { + marvell,pins = "mpp46"; + marvell,function = "ref"; + }; + + spi0_pins: spi-pins-0 { + marvell,pins = "mpp22", "mpp23", "mpp24", + "mpp25"; + marvell,function = "spi0"; + }; + spi1_pins: spi-pins-1 { marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59"; @@ -234,6 +253,34 @@ marvell,pins = "mpp19", "mpp20"; marvell,function = "ua1"; }; + + sdhci_pins: sdhci-pins { + marvell,pins = "mpp48", "mpp49", "mpp50", + "mpp52", "mpp53", "mpp54", + "mpp55", "mpp57", "mpp58", + "mpp59"; + marvell,function = "sd0"; + }; + + sata0_pins: sata-pins-0 { + marvell,pins = "mpp20"; + marvell,function = "sata0"; + }; + + sata1_pins: sata-pins-1 { + marvell,pins = "mpp19"; + marvell,function = "sata1"; + }; + + sata2_pins: sata-pins-2 { + marvell,pins = "mpp47"; + marvell,function = "sata2"; + }; + + sata3_pins: sata-pins-3 { + marvell,pins = "mpp44"; + marvell,function = "sata3"; + }; }; gpio0: gpio@18100 { -- cgit v1.2.3 From 10c5c472703714a933ac3761653dd3f248d35011 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 8 Jan 2015 18:38:11 +0100 Subject: ARM: mvebu: a38x: Add missing labels The pintcrl label was missing. Adding it allowed referring it from the root of the device tree. Also add the uart0 label used by the bootloader. Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-38x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 63fe15174fee..04fe80d101f8 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -173,7 +173,7 @@ status = "disabled"; }; - serial@12000 { + uart0: serial@12000 { compatible = "snps,dw-apb-uart"; reg = <0x12000 0x100>; reg-shift = <2>; @@ -193,7 +193,7 @@ status = "disabled"; }; - pinctrl@18000 { + pinctrl: pinctrl@18000 { reg = <0x18000 0x20>; ge0_rgmii_pins: ge-rgmii-pins-0 { -- cgit v1.2.3 From 881a50e47f231fb0185396125234f3188e14c2f3 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 8 Jan 2015 18:38:13 +0100 Subject: ARM: mvebu: Add Device Tree description of the Armada 388 SoC This SoC belongs to the Armada 38x family. The main difference with the Armada 385 is that the 388 can handle two more SATA ports. Currently the consequence is the use of a different compatible string for the pinctrl node, in order to be able to use the pins associated to this 2 new SATA ports. The second SATA controller has also been moved from the armada38x.dtsi as it it specific to the Armada388 version. In the same time the Armada385 DB and Armada 385 RD board have been renamed in the 388 one and now include the armada-388.dtsi file. AS both of them have 4 SATA ports the SoC used on them were wrongly described. Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/armada-385-db.dts | 151 ----------------------------------- arch/arm/boot/dts/armada-385-rd.dts | 97 ----------------------- arch/arm/boot/dts/armada-388-db.dts | 152 ++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/armada-388-rd.dts | 98 +++++++++++++++++++++++ arch/arm/boot/dts/armada-388.dtsi | 70 +++++++++++++++++ 6 files changed, 322 insertions(+), 250 deletions(-) delete mode 100644 arch/arm/boot/dts/armada-385-db.dts delete mode 100644 arch/arm/boot/dts/armada-385-rd.dts create mode 100644 arch/arm/boot/dts/armada-388-db.dts create mode 100644 arch/arm/boot/dts/armada-388-rd.dts create mode 100644 arch/arm/boot/dts/armada-388.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index d34837104949..3ed928e364de 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -535,9 +535,9 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \ dtb-$(CONFIG_MACH_ARMADA_375) += \ armada-375-db.dtb dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-db.dtb \ armada-385-db-ap.dtb \ - armada-385-rd.dtb + armada-388-db.dtb \ + armada-388-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \ armada-xp-db.dtb \ diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts deleted file mode 100644 index 212605ccc7b6..000000000000 --- a/arch/arm/boot/dts/armada-385-db.dts +++ /dev/null @@ -1,151 +0,0 @@ -/* - * Device Tree file for Marvell Armada 385 evaluation board - * (DB-88F6820) - * - * Copyright (C) 2014 Marvell - * - * Thomas Petazzoni - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; -#include "armada-385.dtsi" - -/ { - model = "Marvell Armada 385 Development Board"; - compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380"; - - chosen { - bootargs = "console=ttyS0,115200 earlyprintk"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* 256 MB */ - }; - - soc { - ranges = ; - - internal-regs { - spi@10600 { - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "w25q32"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; - }; - }; - - i2c@11000 { - status = "okay"; - clock-frequency = <100000>; - }; - - i2c@11100 { - status = "okay"; - clock-frequency = <100000>; - }; - - serial@12000 { - status = "okay"; - }; - - ethernet@30000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - - usb@50000 { - status = "ok"; - }; - - ethernet@70000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - - mdio@72004 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; - }; - - sata@a8000 { - status = "okay"; - }; - - sata@e0000 { - status = "okay"; - }; - - flash@d0000 { - status = "okay"; - num-cs = <1>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - - partition@0 { - label = "U-Boot"; - reg = <0 0x800000>; - }; - partition@800000 { - label = "Linux"; - reg = <0x800000 0x800000>; - }; - partition@1000000 { - label = "Filesystem"; - reg = <0x1000000 0x3f000000>; - }; - }; - - sdhci@d8000 { - broken-cd; - wp-inverted; - bus-width = <8>; - status = "okay"; - no-1-8-v; - }; - - usb3@f0000 { - status = "okay"; - }; - - usb3@f8000 { - status = "okay"; - }; - }; - - pcie-controller { - status = "okay"; - /* - * The two PCIe units are accessible through - * standard PCIe slots on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - pcie@2,0 { - /* Port 1, Lane 0 */ - status = "okay"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts deleted file mode 100644 index 74a3bfe6efd7..000000000000 --- a/arch/arm/boot/dts/armada-385-rd.dts +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Device Tree file for Marvell Armada 385 Reference Design board - * (RD-88F6820-AP) - * - * Copyright (C) 2014 Marvell - * - * Gregory CLEMENT - * Thomas Petazzoni - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/dts-v1/; -#include "armada-385.dtsi" - -/ { - model = "Marvell Armada 385 Reference Design"; - compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; - - chosen { - bootargs = "console=ttyS0,115200 earlyprintk"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x10000000>; /* 256 MB */ - }; - - soc { - ranges = ; - - internal-regs { - spi@10600 { - status = "okay"; - - spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "st,m25p128"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; - }; - }; - - i2c@11000 { - status = "okay"; - clock-frequency = <100000>; - }; - - serial@12000 { - status = "okay"; - }; - - ethernet@30000 { - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; - }; - - ethernet@70000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; - }; - - - mdio@72004 { - phy0: ethernet-phy@0 { - reg = <0>; - }; - - phy1: ethernet-phy@1 { - reg = <1>; - }; - }; - - usb3@f0000 { - status = "okay"; - }; - }; - - pcie-controller { - status = "okay"; - /* - * One PCIe units is accessible through - * standard PCIe slot on the board. - */ - pcie@1,0 { - /* Port 0, Lane 0 */ - status = "okay"; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts new file mode 100644 index 000000000000..e200836c30be --- /dev/null +++ b/arch/arm/boot/dts/armada-388-db.dts @@ -0,0 +1,152 @@ +/* + * Device Tree file for Marvell Armada 388 evaluation board + * (DB-88F6820) + * + * Copyright (C) 2014 Marvell + * + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "armada-388.dtsi" + +/ { + model = "Marvell Armada 385 Development Board"; + compatible = "marvell,a385-db", "marvell,armada388", + "marvell,armada385", "marvell,armada380"; + + chosen { + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256 MB */ + }; + + soc { + ranges = ; + + internal-regs { + spi@10600 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25q32"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + }; + }; + + i2c@11000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@11100 { + status = "okay"; + clock-frequency = <100000>; + }; + + serial@12000 { + status = "okay"; + }; + + ethernet@30000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + usb@50000 { + status = "ok"; + }; + + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + mdio@72004 { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + sata@a8000 { + status = "okay"; + }; + + sata@e0000 { + status = "okay"; + }; + + flash@d0000 { + status = "okay"; + num-cs = <1>; + marvell,nand-keep-config; + marvell,nand-enable-arbiter; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partition@0 { + label = "U-Boot"; + reg = <0 0x800000>; + }; + partition@800000 { + label = "Linux"; + reg = <0x800000 0x800000>; + }; + partition@1000000 { + label = "Filesystem"; + reg = <0x1000000 0x3f000000>; + }; + }; + + sdhci@d8000 { + broken-cd; + wp-inverted; + bus-width = <8>; + status = "okay"; + no-1-8-v; + }; + + usb3@f0000 { + status = "okay"; + }; + + usb3@f8000 { + status = "okay"; + }; + }; + + pcie-controller { + status = "okay"; + /* + * The two PCIe units are accessible through + * standard PCIe slots on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts new file mode 100644 index 000000000000..c98a8f8d01a9 --- /dev/null +++ b/arch/arm/boot/dts/armada-388-rd.dts @@ -0,0 +1,98 @@ +/* + * Device Tree file for Marvell Armada 388 Reference Design board + * (RD-88F6820-AP) + * + * Copyright (C) 2014 Marvell + * + * Gregory CLEMENT + * Thomas Petazzoni + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; +#include "armada-388.dtsi" + +/ { + model = "Marvell Armada 385 Reference Design"; + compatible = "marvell,a385-rd", "marvell,armada388", + "marvell,armada385","marvell,armada380"; + + chosen { + bootargs = "console=ttyS0,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* 256 MB */ + }; + + soc { + ranges = ; + + internal-regs { + spi@10600 { + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <108000000>; + }; + }; + + i2c@11000 { + status = "okay"; + clock-frequency = <100000>; + }; + + serial@12000 { + status = "okay"; + }; + + ethernet@30000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + ethernet@70000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + + mdio@72004 { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + }; + + usb3@f0000 { + status = "okay"; + }; + }; + + pcie-controller { + status = "okay"; + /* + * One PCIe units is accessible through + * standard PCIe slot on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/armada-388.dtsi b/arch/arm/boot/dts/armada-388.dtsi new file mode 100644 index 000000000000..564fa5937e25 --- /dev/null +++ b/arch/arm/boot/dts/armada-388.dtsi @@ -0,0 +1,70 @@ +/* + * Device Tree Include file for Marvell Armada 388 SoC. + * + * Copyright (C) 2015 Marvell + * + * Gregory CLEMENT + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * + * The main difference with the Armada 385 is that the 388 can handle two more + * SATA ports. So we can reuse the dtsi of the Armada 385, override the pinctrl + * property and the name of the SoC, and add the second SATA host which control + * the 2 other ports. + */ + +#include "armada-385.dtsi" + +/ { + model = "Marvell Armada 388 family SoC"; + compatible = "marvell,armada388", "marvell,armada385", + "marvell,armada380"; + + soc { + internal-regs { + pinctrl@18000 { + compatible = "marvell,mv88f6828-pinctrl"; + }; + + sata@e0000 { + compatible = "marvell,armada-380-ahci"; + reg = <0xe0000 0x2000>; + interrupts = ; + clocks = <&gateclk 30>; + status = "disabled"; + }; + + }; + }; +}; -- cgit v1.2.3 From 928413bd859c0936f03f6a3504c4721e83a3d1d7 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 8 Jan 2015 19:11:33 +0100 Subject: ARM: mvebu: Add Armada 388 General Purpose Development Board support The A388-GP is a board produced by Marvell that holds - 1 PCIe slot - 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, muxing is selected through the GPIO expander) - 1 16MB SPI-NOR - 2 Gigabit Ethernet ports - 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, muxing is selected through the GPIO expander) - 1 SDIO slot - 1 USB3 port - 2 USB2 port - 2 GPIO/interrupts expander on I2C Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/armada-388-gp.dts | 288 ++++++++++++++++++++++++++++++++++++ 2 files changed, 289 insertions(+) create mode 100644 arch/arm/boot/dts/armada-388-gp.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3ed928e364de..17ee1d6a0ac0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -537,6 +537,7 @@ dtb-$(CONFIG_MACH_ARMADA_375) += \ dtb-$(CONFIG_MACH_ARMADA_38X) += \ armada-385-db-ap.dtb \ armada-388-db.dtb \ + armada-388-gp.dtb \ armada-388-rd.dtb dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-axpwifiap.dtb \ diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts new file mode 100644 index 000000000000..4df22bf91683 --- /dev/null +++ b/arch/arm/boot/dts/armada-388-gp.dts @@ -0,0 +1,288 @@ +/* + * Device Tree file for Marvell Armada 385 development board + * (RD-88F6820-GP) + * + * Copyright (C) 2014 Marvell + * + * Gregory CLEMENT + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "armada-388.dtsi" +#include + +/ { + model = "Marvell Armada 385 GP"; + compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380"; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x80000000>; /* 2 GB */ + }; + + soc { + ranges = ; + + internal-regs { + spi@10600 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p128"; + reg = <0>; /* Chip select 0 */ + spi-max-frequency = <50000000>; + m25p,fast-read; + }; + }; + + i2c@11000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + /* + * The EEPROM located at adresse 54 is needed + * for the boot - DO NOT ERASE IT - + */ + + expander0: pca9555@20 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + pinctrl-0 = <&pca0_pins>; + interrupt-parent = <&gpio0>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x20>; + }; + + expander1: pca9555@21 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + interrupt-parent = <&gpio0>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x21>; + }; + + }; + + serial@12000 { + /* + * Exported on the micro USB connector CON16 + * through an FTDI + */ + + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; + }; + + /* GE1 CON15 */ + ethernet@30000 { + pinctrl-names = "default"; + pinctrl-0 = <&ge1_rgmii_pins>; + status = "okay"; + phy = <&phy1>; + phy-mode = "rgmii-id"; + }; + + /* CON4 */ + usb@50000 { + vcc-supply = <®_usb2_0_vbus>; + status = "okay"; + }; + + /* GE0 CON1 */ + ethernet@70000 { + pinctrl-names = "default"; + /* + * The Reference Clock 0 is used to provide a + * clock to the PHY + */ + pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>; + status = "okay"; + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; + + + mdio@72004 { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + phy0: ethernet-phy@1 { + reg = <1>; + }; + + phy1: ethernet-phy@0 { + reg = <0>; + }; + }; + + sata@a8000 { + pinctrl-names = "default"; + pinctrl-0 = <&sata0_pins>, <&sata1_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sata@e0000 { + pinctrl-names = "default"; + pinctrl-0 = <&sata2_pins>, <&sata3_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + }; + + sdhci@d8000 { + pinctrl-names = "default"; + pinctrl-0 = <&sdhci_pins>; + cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>; + no-1-8-v; + wp-inverted; + bus-width = <8>; + status = "okay"; + }; + + /* CON5 */ + usb3@f0000 { + vcc-supply = <®_usb2_1_vbus>; + status = "okay"; + }; + + /* CON7 */ + usb3@f8000 { + vcc-supply = <®_usb3_vbus>; + status = "okay"; + }; + }; + + pcie-controller { + status = "okay"; + /* + * One PCIe units is accessible through + * standard PCIe slot on the board. + */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; + + /* + * The two other PCIe units are accessible + * through mini PCIe slot on the board. + */ + pcie@2,0 { + /* Port 1, Lane 0 */ + status = "okay"; + }; + pcie@3,0 { + /* Port 2, Lane 0 */ + status = "okay"; + }; + }; + + gpio-fan { + compatible = "gpio-fan"; + gpios = <&expander1 3 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 3000 1>; + }; + }; + + reg_usb3_vbus: usb3-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb3-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander1 15 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_0_vbus: v5-vbus0 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander1 14 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_1_vbus: v5-vbus1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; + }; + + reg_usb2_1_vbus: v5-vbus1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-vbus1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; + }; +}; + +&pinctrl { + pca0_pins: pca0_pins { + marvell,pins = "mpp18"; + marvell,function = "gpio"; + }; +}; -- cgit v1.2.3 From a9e274c42da9213c94e308fae9aa488d3698f86a Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Tue, 30 Dec 2014 13:43:44 +0100 Subject: ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x Due to the special handling of window 13 on Armada 375 and Armada 38x (similar to Armada XP), the MBus hardware block is *not* compatible with the one used on Armada 370. Using the Armada 370 compatible string on Armada 375 and 38x will lead to a non-working device if window 13 ends up being used. Signed-off-by: Thomas Petazzoni Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-375.dtsi | 2 +- arch/arm/boot/dts/armada-38x.dtsi | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 50096d3427eb..126bf7e9e6b4 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -63,7 +63,7 @@ }; soc { - compatible = "marvell,armada375-mbus", "marvell,armada370-mbus", "simple-bus"; + compatible = "marvell,armada375-mbus", "simple-bus"; #address-cells = <2>; #size-cells = <1>; controller = <&mbusc>; diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 04fe80d101f8..33cad7f7a224 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -31,8 +31,7 @@ }; soc { - compatible = "marvell,armada380-mbus", "marvell,armada370-mbus", - "simple-bus"; + compatible = "marvell,armada380-mbus", "simple-bus"; #address-cells = <2>; #size-cells = <1>; controller = <&mbusc>; -- cgit v1.2.3 From d19b4fa012f45efccef1d57fb4491df1bd559291 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Sun, 4 Jan 2015 14:37:27 +0800 Subject: ARM: dts: drop MARCO platform DT stuff MARCO will not be supported any more. it has been replaced by CSR atlas7. Signed-off-by: Barry Song Acked-by: Arnd Bergmann --- Documentation/devicetree/bindings/arm/sirf.txt | 2 - arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/marco-evb.dts | 54 -- arch/arm/boot/dts/marco.dtsi | 757 ------------------------- 4 files changed, 814 deletions(-) delete mode 100644 arch/arm/boot/dts/marco-evb.dts delete mode 100644 arch/arm/boot/dts/marco.dtsi (limited to 'arch') diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt index c6ba6d3c747f..9daa1c1490a3 100644 --- a/Documentation/devicetree/bindings/arm/sirf.txt +++ b/Documentation/devicetree/bindings/arm/sirf.txt @@ -4,6 +4,4 @@ CSR SiRFprimaII and SiRFmarco device tree bindings. Required root node properties: - compatible: - "sirf,prima2-cb" : prima2 "cb" evaluation board - - "sirf,marco-cb" : marco "cb" evaluation board - "sirf,prima2" : prima2 device based board - - "sirf,marco" : marco device based board diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..68feb8f8b5bc 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -175,7 +175,6 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-ts419-6281.dtb \ kirkwood-ts419-6282.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb -dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \ pxa910-dkb.dtb \ diff --git a/arch/arm/boot/dts/marco-evb.dts b/arch/arm/boot/dts/marco-evb.dts deleted file mode 100644 index 5130aeacfca5..000000000000 --- a/arch/arm/boot/dts/marco-evb.dts +++ /dev/null @@ -1,54 +0,0 @@ -/* - * DTS file for CSR SiRFmarco Evaluation Board - * - * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -/dts-v1/; - -/include/ "marco.dtsi" - -/ { - model = "CSR SiRFmarco Evaluation Board"; - compatible = "sirf,marco-cb", "sirf,marco"; - - memory { - reg = <0x40000000 0x60000000>; - }; - - axi { - peri-iobg { - uart1: uart@cc060000 { - status = "okay"; - }; - uart2: uart@cc070000 { - status = "okay"; - }; - i2c0: i2c@cc0e0000 { - status = "okay"; - fpga-cpld@4d { - compatible = "sirf,fpga-cpld"; - reg = <0x4d>; - }; - }; - spi1: spi@cc170000 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&spi1_pins_a>; - spi@0 { - compatible = "spidev"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - pci-iobg { - sd0: sdhci@cd000000 { - bus-width = <8>; - status = "okay"; - }; - }; - }; - }; -}; diff --git a/arch/arm/boot/dts/marco.dtsi b/arch/arm/boot/dts/marco.dtsi deleted file mode 100644 index fb354225740a..000000000000 --- a/arch/arm/boot/dts/marco.dtsi +++ /dev/null @@ -1,757 +0,0 @@ -/* - * DTS file for CSR SiRFmarco SoC - * - * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -/include/ "skeleton.dtsi" -/ { - compatible = "sirf,marco"; - #address-cells = <1>; - #size-cells = <1>; - interrupt-parent = <&gic>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - }; - }; - - axi { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x40000000 0x40000000 0xa0000000>; - - l2-cache-controller@c0030000 { - compatible = "arm,pl310-cache"; - reg = <0xc0030000 0x1000>; - interrupts = <0 59 0>; - arm,tag-latency = <1 1 1>; - arm,data-latency = <1 1 1>; - arm,filter-ranges = <0x40000000 0x80000000>; - }; - - gic: interrupt-controller@c0011000 { - compatible = "arm,cortex-a9-gic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0xc0011000 0x1000>, - <0xc0010100 0x0100>; - }; - - rstc-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc2000000 0xc2000000 0x1000000>; - - rstc: reset-controller@c2000000 { - compatible = "sirf,marco-rstc"; - reg = <0xc2000000 0x10000>; - #reset-cells = <1>; - }; - }; - - sys-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc3000000 0xc3000000 0x1000000>; - - clock-controller@c3000000 { - compatible = "sirf,marco-clkc"; - reg = <0xc3000000 0x1000>; - interrupts = <0 3 0>; - }; - - rsc-controller@c3010000 { - compatible = "sirf,marco-rsc"; - reg = <0xc3010000 0x1000>; - }; - }; - - mem-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc4000000 0xc4000000 0x1000000>; - - memory-controller@c4000000 { - compatible = "sirf,marco-memc"; - reg = <0xc4000000 0x10000>; - interrupts = <0 27 0>; - }; - }; - - disp-iobg0 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc5000000 0xc5000000 0x1000000>; - - display0@c5000000 { - compatible = "sirf,marco-lcd"; - reg = <0xc5000000 0x10000>; - interrupts = <0 30 0>; - }; - - vpp0@c5010000 { - compatible = "sirf,marco-vpp"; - reg = <0xc5010000 0x10000>; - interrupts = <0 31 0>; - }; - }; - - disp-iobg1 { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc6000000 0xc6000000 0x1000000>; - - display1@c6000000 { - compatible = "sirf,marco-lcd"; - reg = <0xc6000000 0x10000>; - interrupts = <0 62 0>; - }; - - vpp1@c6010000 { - compatible = "sirf,marco-vpp"; - reg = <0xc6010000 0x10000>; - interrupts = <0 63 0>; - }; - }; - - graphics-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc8000000 0xc8000000 0x1000000>; - - graphics@c8000000 { - compatible = "powervr,sgx540"; - reg = <0xc8000000 0x1000000>; - interrupts = <0 6 0>; - }; - }; - - multimedia-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xc9000000 0xc9000000 0x1000000>; - - multimedia@a0000000 { - compatible = "sirf,marco-video-codec"; - reg = <0xc9000000 0x1000000>; - interrupts = <0 5 0>; - }; - }; - - dsp-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xca000000 0xca000000 0x2000000>; - - dspif@ca000000 { - compatible = "sirf,marco-dspif"; - reg = <0xca000000 0x10000>; - interrupts = <0 9 0>; - }; - - gps@ca010000 { - compatible = "sirf,marco-gps"; - reg = <0xca010000 0x10000>; - interrupts = <0 7 0>; - }; - - dsp@cb000000 { - compatible = "sirf,marco-dsp"; - reg = <0xcb000000 0x1000000>; - interrupts = <0 8 0>; - }; - }; - - peri-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xcc000000 0xcc000000 0x2000000>; - - timer@cc020000 { - compatible = "sirf,marco-tick"; - reg = <0xcc020000 0x1000>; - interrupts = <0 0 0>, - <0 1 0>, - <0 2 0>, - <0 49 0>, - <0 50 0>, - <0 51 0>; - }; - - nand@cc030000 { - compatible = "sirf,marco-nand"; - reg = <0xcc030000 0x10000>; - interrupts = <0 41 0>; - }; - - audio@cc040000 { - compatible = "sirf,marco-audio"; - reg = <0xcc040000 0x10000>; - interrupts = <0 35 0>; - }; - - uart0: uart@cc050000 { - cell-index = <0>; - compatible = "sirf,marco-uart"; - reg = <0xcc050000 0x1000>; - interrupts = <0 17 0>; - fifosize = <128>; - status = "disabled"; - }; - - uart1: uart@cc060000 { - cell-index = <1>; - compatible = "sirf,marco-uart"; - reg = <0xcc060000 0x1000>; - interrupts = <0 18 0>; - fifosize = <32>; - status = "disabled"; - }; - - uart2: uart@cc070000 { - cell-index = <2>; - compatible = "sirf,marco-uart"; - reg = <0xcc070000 0x1000>; - interrupts = <0 19 0>; - fifosize = <128>; - status = "disabled"; - }; - - uart3: uart@cc190000 { - cell-index = <3>; - compatible = "sirf,marco-uart"; - reg = <0xcc190000 0x1000>; - interrupts = <0 66 0>; - fifosize = <128>; - status = "disabled"; - }; - - uart4: uart@cc1a0000 { - cell-index = <4>; - compatible = "sirf,marco-uart"; - reg = <0xcc1a0000 0x1000>; - interrupts = <0 69 0>; - fifosize = <128>; - status = "disabled"; - }; - - usp0: usp@cc080000 { - cell-index = <0>; - compatible = "sirf,marco-usp"; - reg = <0xcc080000 0x10000>; - interrupts = <0 20 0>; - status = "disabled"; - }; - - usp1: usp@cc090000 { - cell-index = <1>; - compatible = "sirf,marco-usp"; - reg = <0xcc090000 0x10000>; - interrupts = <0 21 0>; - status = "disabled"; - }; - - usp2: usp@cc0a0000 { - cell-index = <2>; - compatible = "sirf,marco-usp"; - reg = <0xcc0a0000 0x10000>; - interrupts = <0 22 0>; - status = "disabled"; - }; - - dmac0: dma-controller@cc0b0000 { - cell-index = <0>; - compatible = "sirf,marco-dmac"; - reg = <0xcc0b0000 0x10000>; - interrupts = <0 12 0>; - }; - - dmac1: dma-controller@cc160000 { - cell-index = <1>; - compatible = "sirf,marco-dmac"; - reg = <0xcc160000 0x10000>; - interrupts = <0 13 0>; - }; - - vip@cc0c0000 { - compatible = "sirf,marco-vip"; - reg = <0xcc0c0000 0x10000>; - }; - - spi0: spi@cc0d0000 { - cell-index = <0>; - compatible = "sirf,marco-spi"; - reg = <0xcc0d0000 0x10000>; - interrupts = <0 15 0>; - sirf,spi-num-chipselects = <1>; - cs-gpios = <&gpio 0 0>; - sirf,spi-dma-rx-channel = <25>; - sirf,spi-dma-tx-channel = <20>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi1: spi@cc170000 { - cell-index = <1>; - compatible = "sirf,marco-spi"; - reg = <0xcc170000 0x10000>; - interrupts = <0 16 0>; - sirf,spi-num-chipselects = <1>; - cs-gpios = <&gpio 0 0>; - sirf,spi-dma-rx-channel = <12>; - sirf,spi-dma-tx-channel = <13>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c0: i2c@cc0e0000 { - cell-index = <0>; - compatible = "sirf,marco-i2c"; - reg = <0xcc0e0000 0x10000>; - interrupts = <0 24 0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@cc0f0000 { - cell-index = <1>; - compatible = "sirf,marco-i2c"; - reg = <0xcc0f0000 0x10000>; - interrupts = <0 25 0>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - tsc@cc110000 { - compatible = "sirf,marco-tsc"; - reg = <0xcc110000 0x10000>; - interrupts = <0 33 0>; - }; - - gpio: pinctrl@cc120000 { - #gpio-cells = <2>; - #interrupt-cells = <2>; - compatible = "sirf,marco-pinctrl"; - reg = <0xcc120000 0x10000>; - interrupts = <0 43 0>, - <0 44 0>, - <0 45 0>, - <0 46 0>, - <0 47 0>; - gpio-controller; - interrupt-controller; - - lcd_16pins_a: lcd0_0 { - lcd { - sirf,pins = "lcd_16bitsgrp"; - sirf,function = "lcd_16bits"; - }; - }; - lcd_18pins_a: lcd0_1 { - lcd { - sirf,pins = "lcd_18bitsgrp"; - sirf,function = "lcd_18bits"; - }; - }; - lcd_24pins_a: lcd0_2 { - lcd { - sirf,pins = "lcd_24bitsgrp"; - sirf,function = "lcd_24bits"; - }; - }; - lcdrom_pins_a: lcdrom0_0 { - lcd { - sirf,pins = "lcdromgrp"; - sirf,function = "lcdrom"; - }; - }; - uart0_pins_a: uart0_0 { - uart { - sirf,pins = "uart0grp"; - sirf,function = "uart0"; - }; - }; - uart1_pins_a: uart1_0 { - uart { - sirf,pins = "uart1grp"; - sirf,function = "uart1"; - }; - }; - uart2_pins_a: uart2_0 { - uart { - sirf,pins = "uart2grp"; - sirf,function = "uart2"; - }; - }; - uart2_noflow_pins_a: uart2_1 { - uart { - sirf,pins = "uart2_nostreamctrlgrp"; - sirf,function = "uart2_nostreamctrl"; - }; - }; - spi0_pins_a: spi0_0 { - spi { - sirf,pins = "spi0grp"; - sirf,function = "spi0"; - }; - }; - spi1_pins_a: spi1_0 { - spi { - sirf,pins = "spi1grp"; - sirf,function = "spi1"; - }; - }; - i2c0_pins_a: i2c0_0 { - i2c { - sirf,pins = "i2c0grp"; - sirf,function = "i2c0"; - }; - }; - i2c1_pins_a: i2c1_0 { - i2c { - sirf,pins = "i2c1grp"; - sirf,function = "i2c1"; - }; - }; - pwm0_pins_a: pwm0_0 { - pwm { - sirf,pins = "pwm0grp"; - sirf,function = "pwm0"; - }; - }; - pwm1_pins_a: pwm1_0 { - pwm { - sirf,pins = "pwm1grp"; - sirf,function = "pwm1"; - }; - }; - pwm2_pins_a: pwm2_0 { - pwm { - sirf,pins = "pwm2grp"; - sirf,function = "pwm2"; - }; - }; - pwm3_pins_a: pwm3_0 { - pwm { - sirf,pins = "pwm3grp"; - sirf,function = "pwm3"; - }; - }; - gps_pins_a: gps_0 { - gps { - sirf,pins = "gpsgrp"; - sirf,function = "gps"; - }; - }; - vip_pins_a: vip_0 { - vip { - sirf,pins = "vipgrp"; - sirf,function = "vip"; - }; - }; - sdmmc0_pins_a: sdmmc0_0 { - sdmmc0 { - sirf,pins = "sdmmc0grp"; - sirf,function = "sdmmc0"; - }; - }; - sdmmc1_pins_a: sdmmc1_0 { - sdmmc1 { - sirf,pins = "sdmmc1grp"; - sirf,function = "sdmmc1"; - }; - }; - sdmmc2_pins_a: sdmmc2_0 { - sdmmc2 { - sirf,pins = "sdmmc2grp"; - sirf,function = "sdmmc2"; - }; - }; - sdmmc3_pins_a: sdmmc3_0 { - sdmmc3 { - sirf,pins = "sdmmc3grp"; - sirf,function = "sdmmc3"; - }; - }; - sdmmc4_pins_a: sdmmc4_0 { - sdmmc4 { - sirf,pins = "sdmmc4grp"; - sirf,function = "sdmmc4"; - }; - }; - sdmmc5_pins_a: sdmmc5_0 { - sdmmc5 { - sirf,pins = "sdmmc5grp"; - sirf,function = "sdmmc5"; - }; - }; - i2s_pins_a: i2s_0 { - i2s { - sirf,pins = "i2sgrp"; - sirf,function = "i2s"; - }; - }; - ac97_pins_a: ac97_0 { - ac97 { - sirf,pins = "ac97grp"; - sirf,function = "ac97"; - }; - }; - nand_pins_a: nand_0 { - nand { - sirf,pins = "nandgrp"; - sirf,function = "nand"; - }; - }; - usp0_pins_a: usp0_0 { - usp0 { - sirf,pins = "usp0grp"; - sirf,function = "usp0"; - }; - }; - usp1_pins_a: usp1_0 { - usp1 { - sirf,pins = "usp1grp"; - sirf,function = "usp1"; - }; - }; - usp2_pins_a: usp2_0 { - usp2 { - sirf,pins = "usp2grp"; - sirf,function = "usp2"; - }; - }; - usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus_0 { - usb0_utmi_drvbus { - sirf,pins = "usb0_utmi_drvbusgrp"; - sirf,function = "usb0_utmi_drvbus"; - }; - }; - usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus_0 { - usb1_utmi_drvbus { - sirf,pins = "usb1_utmi_drvbusgrp"; - sirf,function = "usb1_utmi_drvbus"; - }; - }; - warm_rst_pins_a: warm_rst_0 { - warm_rst { - sirf,pins = "warm_rstgrp"; - sirf,function = "warm_rst"; - }; - }; - pulse_count_pins_a: pulse_count_0 { - pulse_count { - sirf,pins = "pulse_countgrp"; - sirf,function = "pulse_count"; - }; - }; - cko0_rst_pins_a: cko0_rst_0 { - cko0_rst { - sirf,pins = "cko0_rstgrp"; - sirf,function = "cko0_rst"; - }; - }; - cko1_rst_pins_a: cko1_rst_0 { - cko1_rst { - sirf,pins = "cko1_rstgrp"; - sirf,function = "cko1_rst"; - }; - }; - }; - - pwm@cc130000 { - compatible = "sirf,marco-pwm"; - reg = <0xcc130000 0x10000>; - }; - - efusesys@cc140000 { - compatible = "sirf,marco-efuse"; - reg = <0xcc140000 0x10000>; - }; - - pulsec@cc150000 { - compatible = "sirf,marco-pulsec"; - reg = <0xcc150000 0x10000>; - interrupts = <0 48 0>; - }; - - pci-iobg { - compatible = "sirf,marco-pciiobg", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xcd000000 0xcd000000 0x1000000>; - - sd0: sdhci@cd000000 { - cell-index = <0>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd000000 0x100000>; - interrupts = <0 38 0>; - status = "disabled"; - }; - - sd1: sdhci@cd100000 { - cell-index = <1>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd100000 0x100000>; - interrupts = <0 38 0>; - status = "disabled"; - }; - - sd2: sdhci@cd200000 { - cell-index = <2>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd200000 0x100000>; - interrupts = <0 23 0>; - status = "disabled"; - }; - - sd3: sdhci@cd300000 { - cell-index = <3>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd300000 0x100000>; - interrupts = <0 23 0>; - status = "disabled"; - }; - - sd4: sdhci@cd400000 { - cell-index = <4>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd400000 0x100000>; - interrupts = <0 39 0>; - status = "disabled"; - }; - - sd5: sdhci@cd500000 { - cell-index = <5>; - compatible = "sirf,marco-sdhc"; - reg = <0xcd500000 0x100000>; - interrupts = <0 39 0>; - status = "disabled"; - }; - - pci-copy@cd900000 { - compatible = "sirf,marco-pcicp"; - reg = <0xcd900000 0x100000>; - interrupts = <0 40 0>; - }; - - rom-interface@cda00000 { - compatible = "sirf,marco-romif"; - reg = <0xcda00000 0x100000>; - }; - }; - }; - - rtc-iobg { - compatible = "sirf,marco-rtciobg", "sirf-marco-rtciobg-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0xc1000000 0x10000>; - - gpsrtc@1000 { - compatible = "sirf,marco-gpsrtc"; - reg = <0x1000 0x1000>; - interrupts = <0 55 0>, - <0 56 0>, - <0 57 0>; - }; - - sysrtc@2000 { - compatible = "sirf,marco-sysrtc"; - reg = <0x2000 0x1000>; - interrupts = <0 52 0>, - <0 53 0>, - <0 54 0>; - }; - - pwrc@3000 { - compatible = "sirf,marco-pwrc"; - reg = <0x3000 0x1000>; - interrupts = <0 32 0>; - }; - }; - - uus-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xce000000 0xce000000 0x1000000>; - - usb0: usb@ce000000 { - compatible = "chipidea,ci13611a-marco"; - reg = <0xce000000 0x10000>; - interrupts = <0 10 0>; - }; - - usb1: usb@ce010000 { - compatible = "chipidea,ci13611a-marco"; - reg = <0xce010000 0x10000>; - interrupts = <0 11 0>; - }; - - security@ce020000 { - compatible = "sirf,marco-security"; - reg = <0xce020000 0x10000>; - interrupts = <0 42 0>; - }; - }; - - can-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xd0000000 0xd0000000 0x1000000>; - - can0: can@d0000000 { - compatible = "sirf,marco-can"; - reg = <0xd0000000 0x10000>; - }; - - can1: can@d0010000 { - compatible = "sirf,marco-can"; - reg = <0xd0010000 0x10000>; - }; - }; - - lvds-iobg { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0xd1000000 0xd1000000 0x1000000>; - - lvds@d1000000 { - compatible = "sirf,marco-lvds"; - reg = <0xd1000000 0x10000>; - interrupts = <0 64 0>; - }; - }; - }; -}; -- cgit v1.2.3 From 2f5ff012f84d61c141294077c340a8a951a01eba Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Sat, 1 Aug 2015 12:03:00 +0200 Subject: ARM: mediatek: dts: Add uart to mt6589 This patch adds the uart ports to the device tree of Mediatek mt6589 SoC. Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6589.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi index c91b2a9ebdc3..106b61b10030 100644 --- a/arch/arm/boot/dts/mt6589.dtsi +++ b/arch/arm/boot/dts/mt6589.dtsi @@ -65,6 +65,12 @@ clock-frequency = <32000>; #clock-cells = <0>; }; + + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; }; soc { @@ -100,5 +106,37 @@ <0x10214000 0x2000>, <0x10216000 0x2000>; }; + + uart0: serial@11006000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11006000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart1: serial@11007000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11007000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart2: serial@11008000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11008000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart3: serial@11009000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11009000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From 3aa2e2811ab58e0299bb9a6457a15b405be86ff0 Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Sat, 1 Aug 2015 12:03:00 +0200 Subject: ARM: mediatek: dts: Add uart to Aquaris5 This patch enables uart port for the Aquaris5 mobile phone. Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6589-aquaris5.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt6589-aquaris5.dts b/arch/arm/boot/dts/mt6589-aquaris5.dts index 0da047013120..594a6f3bebda 100644 --- a/arch/arm/boot/dts/mt6589-aquaris5.dts +++ b/arch/arm/boot/dts/mt6589-aquaris5.dts @@ -21,10 +21,20 @@ compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589"; chosen { - bootargs = "earlyprintk"; + bootargs = "console=ttyS0,921600n8 earlyprintk"; + stdout-path = &uart0; }; memory { reg = <0x80000000 0x40000000>; }; + +}; + +&uart0 { + status = "okay"; +}; + +&uart3 { + status = "okay"; }; -- cgit v1.2.3 From f52948ea12b61573224334ac0b637369ac56dc2f Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Fri, 9 Jan 2015 07:43:50 -0800 Subject: ARM: zynq: DT: Add pinctrl information MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add pinctrl descriptions to the zc702 and zc706 device trees. Signed-off-by: Soren Brinkmann Tested-by: Andreas Färber Reviewed-by: Linus Walleij Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 8 +- arch/arm/boot/dts/zynq-zc702.dts | 181 +++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/zynq-zc706.dts | 152 ++++++++++++++++++++++++++++++++ 3 files changed, 340 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index f1dd2a7020ae..c9b9722c0c59 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -237,7 +237,7 @@ slcr: slcr@f8000000 { #address-cells = <1>; #size-cells = <1>; - compatible = "xlnx,zynq-slcr", "syscon"; + compatible = "xlnx,zynq-slcr", "syscon", "simple-bus"; reg = <0xF8000000 0x1000>; ranges; clkc: clkc@100 { @@ -257,6 +257,12 @@ "dbg_trc", "dbg_apb"; reg = <0x100 0x100>; }; + + pinctrl0: pinctrl@700 { + compatible = "xlnx,pinctrl-zynq"; + reg = <0x700 0x200>; + syscon = <&slcr>; + }; }; dmac_s: dmac@f8003000 { diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 399fed4d9c19..365bdd407eb4 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -45,6 +45,8 @@ &can0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; }; &clkc { @@ -55,15 +57,24 @@ status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_phy>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem0_default>; ethernet_phy: ethernet-phy@7 { reg = <7>; }; }; +&gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; i2cswitch@74 { compatible = "nxp,pca9548"; @@ -137,12 +148,182 @@ }; }; +&pinctrl0 { + pinctrl_can0_default: can0-default { + mux { + function = "can0"; + groups = "can0_9_grp"; + }; + + conf { + groups = "can0_9_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO46"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO47"; + bias-disable; + }; + }; + + pinctrl_gem0_default: gem0-default { + mux { + function = "ethernet0"; + groups = "ethernet0_0_grp"; + }; + + conf { + groups = "ethernet0_0_grp"; + slew-rate = <0>; + io-standard = <4>; + }; + + conf-rx { + pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21"; + bias-disable; + low-power-enable; + }; + + mux-mdio { + function = "mdio0"; + groups = "mdio0_0_grp"; + }; + + conf-mdio { + groups = "mdio0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + bias-disable; + }; + }; + + pinctrl_gpio0_default: gpio0-default { + mux { + function = "gpio0"; + groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp", + "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp", + "gpio0_13_grp", "gpio0_14_grp"; + }; + + conf { + groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp", + "gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp", + "gpio0_13_grp", "gpio0_14_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-pull-up { + pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO7", "MIO8"; + bias-disable; + }; + }; + + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_10_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_10_grp"; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + }; + + pinctrl_sdhci0_default: sdhci0-default { + mux { + groups = "sdio0_2_grp"; + function = "sdio0"; + }; + + conf { + groups = "sdio0_2_grp"; + slew-rate = <0>; + io-standard = <1>; + bias-disable; + }; + + mux-cd { + groups = "gpio0_0_grp"; + function = "sdio0_cd"; + }; + + conf-cd { + groups = "gpio0_0_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + + mux-wp { + groups = "gpio0_15_grp"; + function = "sdio0_wp"; + }; + + conf-wp { + groups = "gpio0_15_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_10_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_10_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO49"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO48"; + bias-disable = <0>; + }; + }; +}; + &sdhci0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; &usb0 { diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 89cc9adc569d..6979ce23175f 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -41,15 +41,24 @@ status = "okay"; phy-mode = "rgmii-id"; phy-handle = <ðernet_phy>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gem0_default>; ethernet_phy: ethernet-phy@7 { reg = <7>; }; }; +&gpio0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio0_default>; +}; + &i2c0 { status = "okay"; clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; i2cswitch@74 { compatible = "nxp,pca9548"; @@ -115,12 +124,155 @@ }; }; +&pinctrl0 { + pinctrl_gem0_default: gem0-default { + mux { + function = "ethernet0"; + groups = "ethernet0_0_grp"; + }; + + conf { + groups = "ethernet0_0_grp"; + slew-rate = <0>; + io-standard = <4>; + }; + + conf-rx { + pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27"; + bias-high-impedance; + low-power-disable; + }; + + conf-tx { + pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21"; + low-power-enable; + bias-disable; + }; + + mux-mdio { + function = "mdio0"; + groups = "mdio0_0_grp"; + }; + + conf-mdio { + groups = "mdio0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + bias-disable; + }; + }; + + pinctrl_gpio0_default: gpio0-default { + mux { + function = "gpio0"; + groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp"; + }; + + conf { + groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-pull-up { + pins = "MIO46", "MIO47"; + bias-pull-up; + }; + + conf-pull-none { + pins = "MIO7"; + bias-disable; + }; + }; + + pinctrl_i2c0_default: i2c0-default { + mux { + groups = "i2c0_10_grp"; + function = "i2c0"; + }; + + conf { + groups = "i2c0_10_grp"; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + }; + + pinctrl_sdhci0_default: sdhci0-default { + mux { + groups = "sdio0_2_grp"; + function = "sdio0"; + }; + + conf { + groups = "sdio0_2_grp"; + slew-rate = <0>; + io-standard = <1>; + bias-disable; + }; + + mux-cd { + groups = "gpio0_14_grp"; + function = "sdio0_cd"; + }; + + conf-cd { + groups = "gpio0_14_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + + mux-wp { + groups = "gpio0_15_grp"; + function = "sdio0_wp"; + }; + + conf-wp { + groups = "gpio0_15_grp"; + bias-high-impedance; + bias-pull-up; + slew-rate = <0>; + io-standard = <1>; + }; + }; + + pinctrl_uart1_default: uart1-default { + mux { + groups = "uart1_10_grp"; + function = "uart1"; + }; + + conf { + groups = "uart1_10_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO49"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO48"; + bias-disable; + }; + }; +}; + &sdhci0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; }; &uart1 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; }; &usb0 { -- cgit v1.2.3 From 86a2d2ac5e5d452ddbad3d9522a68d77c4cb4329 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Mon, 12 Jan 2015 17:35:49 +0900 Subject: ARM: dts: Add dts file for Odroid XU3 board Add DTS for the Hardkernel Odroid XU3. The name of the DTS file is kept the same as the vendors naming, which means it's prefixed with exynos5422 instead of exynos5800 as the SoC name even though it includes the exyno5800 dtsi. Signed-off-by: Sjoerd Simons Tested-by: Kevin Hilman Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/exynos5422-odroidxu3.dts | 332 +++++++++++++++++++++++++++++ 2 files changed, 333 insertions(+) create mode 100644 arch/arm/boot/dts/exynos5422-odroidxu3.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..df397c22073c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -98,6 +98,7 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \ exynos5420-arndale-octa.dtb \ exynos5420-peach-pit.dtb \ exynos5420-smdk5420.dtb \ + exynos5422-odroidxu3.dtb \ exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb \ exynos5800-peach-pi.dtb diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts new file mode 100644 index 000000000000..c29123c0734d --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -0,0 +1,332 @@ +/* + * Hardkernel Odroid XU3 board device tree source + * + * Copyright (c) 2014 Collabora Ltd. + * Copyright (c) 2013 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "exynos5800.dtsi" + +/ { + model = "Hardkernel Odroid XU3"; + compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5"; + + memory { + reg = <0x40000000 0x80000000>; + }; + + chosen { + linux,stdout-path = &serial_2; + }; + + fimd@14400000 { + status = "okay"; + }; + + firmware@02073000 { + compatible = "samsung,secure-firmware"; + reg = <0x02073000 0x1000>; + }; + + fixed-rate-clocks { + oscclk { + compatible = "samsung,exynos5420-oscclk"; + clock-frequency = <24000000>; + }; + }; + + hsi2c_4: i2c@12CA0000 { + status = "okay"; + + s2mps11_pmic@66 { + compatible = "samsung,s2mps11-pmic"; + reg = <0x66>; + s2mps11,buck2-ramp-delay = <12>; + s2mps11,buck34-ramp-delay = <12>; + s2mps11,buck16-ramp-delay = <12>; + s2mps11,buck6-ramp-enable = <1>; + s2mps11,buck2-ramp-enable = <1>; + s2mps11,buck3-ramp-enable = <1>; + s2mps11,buck4-ramp-enable = <1>; + + s2mps11_osc: clocks { + #clock-cells = <1>; + clock-output-names = "s2mps11_ap", + "s2mps11_cp", "s2mps11_bt"; + }; + + regulators { + ldo1_reg: LDO1 { + regulator-name = "vdd_ldo1"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo3_reg: LDO3 { + regulator-name = "vdd_ldo3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5_reg: LDO5 { + regulator-name = "vdd_ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo6_reg: LDO6 { + regulator-name = "vdd_ldo6"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo7_reg: LDO7 { + regulator-name = "vdd_ldo7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo8_reg: LDO8 { + regulator-name = "vdd_ldo8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo9_reg: LDO9 { + regulator-name = "vdd_ldo9"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + ldo10_reg: LDO10 { + regulator-name = "vdd_ldo10"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo11_reg: LDO11 { + regulator-name = "vdd_ldo11"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + ldo12_reg: LDO12 { + regulator-name = "vdd_ldo12"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo13_reg: LDO13 { + regulator-name = "vdd_ldo13"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo15_reg: LDO15 { + regulator-name = "vdd_ldo15"; + regulator-min-microvolt = <3100000>; + regulator-max-microvolt = <3100000>; + regulator-always-on; + }; + + ldo16_reg: LDO16 { + regulator-name = "vdd_ldo16"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + }; + + ldo17_reg: LDO17 { + regulator-name = "tsp_avdd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo19_reg: LDO19 { + regulator-name = "vdd_sd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo24_reg: LDO24 { + regulator-name = "tsp_io"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + buck1_reg: BUCK1 { + regulator-name = "vdd_mif"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1300000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2_reg: BUCK2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3_reg: BUCK3 { + regulator-name = "vdd_int"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4_reg: BUCK4 { + regulator-name = "vdd_g3d"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck5_reg: BUCK5 { + regulator-name = "vdd_mem"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + }; + + buck6_reg: BUCK6 { + regulator-name = "vdd_kfc"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck7_reg: BUCK7 { + regulator-name = "vdd_1.0v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck8_reg: BUCK8 { + regulator-name = "vdd_1.8v_ldo"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck9_reg: BUCK9 { + regulator-name = "vdd_2.8v_ldo"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3750000>; + regulator-always-on; + regulator-boot-on; + }; + + buck10_reg: BUCK10 { + regulator-name = "vdd_vmem"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + + i2c_2: i2c@12C80000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-max-bus-freq = <66000>; + status = "okay"; + + hdmiddc@50 { + compatible = "samsung,exynos4210-hdmiddc"; + reg = <0x50>; + }; + }; + + rtc@101E0000 { + status = "okay"; + }; +}; + +&hdmi { + status = "okay"; + hpd-gpio = <&gpx3 7 0>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_hpd_irq>; + + vdd_osc-supply = <&ldo7_reg>; + vdd_pll-supply = <&ldo6_reg>; + vdd-supply = <&ldo6_reg>; +}; + +&mfc { + samsung,mfc-r = <0x43000000 0x800000>; + samsung,mfc-l = <0x51000000 0x800000>; +}; + +&mmc_0 { + status = "okay"; + broken-cd; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>; + bus-width = <8>; + cap-mmc-highspeed; +}; + +&mmc_2 { + status = "okay"; + card-detect-delay = <200>; + samsung,dw-mshc-ciu-div = <3>; + samsung,dw-mshc-sdr-timing = <0 4>; + samsung,dw-mshc-ddr-timing = <0 2>; + pinctrl-names = "default"; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>; + bus-width = <4>; + cap-sd-highspeed; +}; + +&pinctrl_0 { + hdmi_hpd_irq: hdmi-hpd-irq { + samsung,pins = "gpx3-7"; + samsung,pin-function = <0>; + samsung,pin-pud = <1>; + samsung,pin-drv = <0>; + }; +}; + +&usbdrd_dwc3_0 { + dr_mode = "host"; +}; + +&usbdrd_dwc3_1 { + dr_mode = "otg"; +}; -- cgit v1.2.3 From 11ab02b883a929a2b7f0936f0dc20d9789843ee4 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Mon, 12 Jan 2015 17:54:54 +0900 Subject: ARM: dts: Add exynos_usbphy node for exynos3250 This patch adds device tree node for exynos_usbphy to use USB 2.0 Device. Signed-off-by: Jaewon Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 22465494b796..27d385feca85 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -279,6 +279,16 @@ status = "disabled"; }; + exynos_usbphy: exynos-usbphy@125B0000 { + compatible = "samsung,exynos3250-usb2-phy"; + reg = <0x125B0000 0x100>; + samsung,pmureg-phandle = <&pmu_system_controller>; + clocks = <&cmu CLK_USBOTG>, <&cmu CLK_SCLK_UPLL>; + clock-names = "phy", "ref"; + #phy-cells = <1>; + status = "disabled"; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <1>; -- cgit v1.2.3 From e0c6e929b3dd5abcb8b198bff51cd0e57f64bfc0 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Mon, 12 Jan 2015 17:54:54 +0900 Subject: ARM: dts: Add hsotg node for exynos3250 This patch adds device tree node for hsotg to control USB 2.0 Device. Signed-off-by: Jaewon Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 27d385feca85..204a84be5b87 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -255,6 +255,17 @@ status = "disabled"; }; + hsotg: hsotg@12480000 { + compatible = "snps,dwc2"; + reg = <0x12480000 0x20000>; + interrupts = <0 141 0>; + clocks = <&cmu CLK_USBOTG>; + clock-names = "otg"; + phys = <&exynos_usbphy 0>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + mshc_0: mshc@12510000 { compatible = "samsung,exynos5250-dw-mshc"; reg = <0x12510000 0x1000>; -- cgit v1.2.3 From cdc386681df4d4f26dbaa749cd98a26bbb648eed Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Mon, 12 Jan 2015 17:54:54 +0900 Subject: ARM: dts: Enable USB node for exynos3250-rinato This patch enables hsotg and usbphy node to use USB 2.0 Device. Signed-off-by: Jaewon Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-rinato.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 80aa8b4c4a3d..bf4c17bf8d27 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -125,6 +125,16 @@ }; }; +&exynos_usbphy { + status = "okay"; +}; + +&hsotg { + vusb_d-supply = <&ldo15_reg>; + vusb_a-supply = <&ldo12_reg>; + status = "okay"; +}; + &i2c_0 { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 3fc5f3a57240efec45333ab917a17626de0bd8bc Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Mon, 12 Jan 2015 17:54:54 +0900 Subject: ARM: dts: Enable USB node for exynos3250-monk This patch adds device tree node for hsotg to control USB 2.0 Device. Signed-off-by: Jaewon Kim Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 24822aa98057..0c1d85d0b6cf 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -134,6 +134,16 @@ }; }; +&exynos_usbphy { + status = "okay"; +}; + +&hsotg { + vusb_d-supply = <&ldo15_reg>; + vusb_a-supply = <&ldo12_reg>; + status = "okay"; +}; + &i2c_0 { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 19f0d87bc26e6579b981ce293adf3520c7e3ce38 Mon Sep 17 00:00:00 2001 From: Beomho Seo Date: Mon, 12 Jan 2015 18:00:09 +0900 Subject: ARM: dts: remove unnecessary gpio-key nodes for exynos3250 boards This patch removes unnecessary property of gpio-keys node. The gpio-keys driver doesn't use interrupts and interrupt-parent. Cc: Youngjun Cho Cc: Chanwoo Choi Reviewed-by: Chanwoo Choi Signed-off-by: Beomho Seo Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 2 -- arch/arm/boot/dts/exynos3250-rinato.dts | 2 -- 2 files changed, 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 0c1d85d0b6cf..2431b811df87 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -37,8 +37,6 @@ compatible = "gpio-keys"; power_key { - interrupt-parent = <&gpx2>; - interrupts = <7 0>; gpios = <&gpx2 7 1>; linux,code = ; label = "power key"; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index bf4c17bf8d27..a2cbc6d95bbc 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -37,8 +37,6 @@ compatible = "gpio-keys"; power_key { - interrupt-parent = <&gpx2>; - interrupts = <7 0>; gpios = <&gpx2 7 1>; linux,code = ; label = "power key"; -- cgit v1.2.3 From 13b9b64e307db08fce12350ce2caed63dec59ddc Mon Sep 17 00:00:00 2001 From: Beomho Seo Date: Mon, 12 Jan 2015 18:00:15 +0900 Subject: ARM: dts: use macro in gpio keys for exynos3250 boards This patch replaces number by macro in gpio keys for exynos3250 boards. Cc: Youngjun Cho Cc: Chanwoo Choi Reviewed-by: Chanwoo Choi Signed-off-by: Beomho Seo Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 3 ++- arch/arm/boot/dts/exynos3250-rinato.dts | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 2431b811df87..5e4a471faee1 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -15,6 +15,7 @@ /dts-v1/; #include "exynos3250.dtsi" #include +#include / { model = "Samsung Monk board"; @@ -37,7 +38,7 @@ compatible = "gpio-keys"; power_key { - gpios = <&gpx2 7 1>; + gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; linux,code = ; label = "power key"; debounce-interval = <10>; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index a2cbc6d95bbc..0c65155ff59e 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -15,6 +15,7 @@ /dts-v1/; #include "exynos3250.dtsi" #include +#include / { model = "Samsung Rinato board"; @@ -37,7 +38,7 @@ compatible = "gpio-keys"; power_key { - gpios = <&gpx2 7 1>; + gpios = <&gpx2 7 GPIO_ACTIVE_LOW>; linux,code = ; label = "power key"; debounce-interval = <10>; -- cgit v1.2.3 From b59b3afb94d42a8c29abdc9a6da799c60f0487b6 Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Mon, 12 Jan 2015 18:08:37 +0900 Subject: ARM: dts: add fimd device support for exynos3250-rinato This patch adds fimd device node which is a display controller for Exynos3250 Rinato board. Signed-off-by: Inki Dae Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-rinato.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 0c65155ff59e..09333a966059 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -134,6 +134,17 @@ status = "okay"; }; +&fimd { + status = "okay"; + + i80-if-timings { + cs-setup = <0>; + wr-setup = <0>; + wr-act = <1>; + wr-hold = <0>; + }; +}; + &i2c_0 { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 2ea2473d7ae2c36f8087285f8c1461fb523a1af5 Mon Sep 17 00:00:00 2001 From: Inki Dae Date: Mon, 12 Jan 2015 18:10:27 +0900 Subject: ARM: dts: add Panel device support for exynos3250-rinato This patch adds MIPI-DSI and MIPI-DSI based S6E63J0X03 AMOLED panel device nodes for Exynos3250 Rinato board. Signed-off-by: Inki Dae Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-rinato.dts | 59 +++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 09333a966059..c7f4fab6dfd9 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -134,6 +134,65 @@ status = "okay"; }; +&dsi_0 { + vddcore-supply = <&ldo6_reg>; + vddio-supply = <&ldo6_reg>; + samsung,pll-clock-frequency = <24000000>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_out: endpoint { + remote-endpoint = <&dsi_in>; + samsung,burst-clock-frequency = <250000000>; + samsung,esc-clock-frequency = <20000000>; + }; + }; + }; + + panel@0 { + compatible = "samsung,s6e63j0x03"; + reg = <0>; + vdd3-supply = <&ldo16_reg>; + vci-supply = <&ldo20_reg>; + reset-gpios = <&gpe0 1 0>; + te-gpios = <&gpx0 6 0>; + power-on-delay= <30>; + power-off-delay= <120>; + reset-delay = <5>; + init-delay = <100>; + flip-horizontal; + flip-vertical; + panel-width-mm = <29>; + panel-height-mm = <29>; + + display-timings { + timing-0 { + clock-frequency = <0>; + hactive = <320>; + vactive = <320>; + hfront-porch = <1>; + hback-porch = <1>; + hsync-len = <1>; + vfront-porch = <150>; + vback-porch = <1>; + vsync-len = <2>; + }; + }; + + port { + dsi_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; +}; + &fimd { status = "okay"; -- cgit v1.2.3 From cb612390e5469186301a7856116fcdbfd9fb3c90 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Tue, 30 Dec 2014 06:20:27 +0000 Subject: ARM: dts: Only build dtb if associated Arch and/or SoC is enabled A number of arches (EXYNOS/IMX/TEGRA) are separated out into finer grained definitions whether it be sub ARCH or SOC definitions. The device tree blobs should only be built if the specific option is enabled that supports that device or it might be that there's an expectation that the device is supported when in actual fact it's not. This ensures only the relevant bits are built. Also standardised the line break between the arch/soc definitions and the dtbs to be on separate lines for better consistency as per feedback. Signed-off-by: Peter Robinson Reviewed-by: Lucas Stach Acked-by: Thierry Reding Acked-by: Stephen Warren Acked-by: Shawn Guo [olof: Fixed stray \ in one of the IMX rules] Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 215 ++++++++++++++++++++++++++++++--------------- 1 file changed, 142 insertions(+), 73 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index fabc56983d24..1e626f6d45c9 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -51,33 +51,43 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb # sama5d4 dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb -dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb -dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb -dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb -dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb +dtb-$(CONFIG_ARCH_ATLAS6) += \ + atlas6-evb.dtb +dtb-$(CONFIG_ARCH_AXXIA) += \ + axm5516-amarillo.dtb +dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2835-rpi-b.dtb \ + bcm2835-rpi-b-plus.dtb dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-buffalo-wzr-1750dhp.dtb \ bcm4708-netgear-r6250.dtb \ bcm4708-netgear-r6300-v2.dtb \ bcm47081-asus-rt-n18u.dtb \ bcm47081-buffalo-wzr-600dhp2.dtb -dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb -dtb-$(CONFIG_ARCH_BCM_CYGNUS) += bcm911360_entphn.dtb \ +dtb-$(CONFIG_ARCH_BCM_63XX) += \ + bcm963138dvt.dtb +dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \ + bcm911360_entphn.dtb \ bcm911360k.dtb \ bcm958300k.dtb -dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb \ +dtb-$(CONFIG_ARCH_BCM_MOBILE) += \ + bcm28155-ap.dtb \ bcm21664-garnet.dtb dtb-$(CONFIG_ARCH_BERLIN) += \ - berlin2-sony-nsz-gs7.dtb \ - berlin2cd-google-chromecast.dtb \ + berlin2-sony-nsz-gs7.dtb \ + berlin2cd-google-chromecast.dtb \ berlin2q-marvell-dmp.dtb dtb-$(CONFIG_ARCH_BRCMSTB) += \ bcm7445-bcm97445svmb.dtb -dtb-$(CONFIG_ARCH_DAVINCI) += da850-enbw-cmc.dtb \ +dtb-$(CONFIG_ARCH_DAVINCI) += \ + da850-enbw-cmc.dtb \ da850-evm.dtb -dtb-$(CONFIG_ARCH_EFM32) += efm32gg-dk3750.dtb -dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \ - exynos3250-rinato.dtb \ +dtb-$(CONFIG_ARCH_EFM32) += \ + efm32gg-dk3750.dtb +dtb-$(CONFIG_ARCH_EXYNOS3) += \ + exynos3250-monk.dtb \ + exynos3250-rinato.dtb +dtb-$(CONFIG_ARCH_EXYNOS4) += \ exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-trats.dtb \ @@ -88,7 +98,8 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \ exynos4412-origen.dtb \ exynos4412-smdk4412.dtb \ exynos4412-tiny4412.dtb \ - exynos4412-trats2.dtb \ + exynos4412-trats2.dtb +dtb-$(CONFIG_ARCH_EXYNOS5) += \ exynos5250-arndale.dtb \ exynos5250-smdk5250.dtb \ exynos5250-snow.dtb \ @@ -101,17 +112,24 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos3250-monk.dtb \ exynos5440-sd5v1.dtb \ exynos5440-ssdk5440.dtb \ exynos5800-peach-pi.dtb -dtb-$(CONFIG_ARCH_HI3xxx) += hi3620-hi4511.dtb -dtb-$(CONFIG_ARCH_HIX5HD2) += hisi-x5hd2-dkb.dtb -dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \ +dtb-$(CONFIG_ARCH_HI3xxx) += \ + hi3620-hi4511.dtb +dtb-$(CONFIG_ARCH_HIX5HD2) += \ + hisi-x5hd2-dkb.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += \ + highbank.dtb \ ecx-2000.dtb -dtb-$(CONFIG_ARCH_HIP04) += hip04-d01.dtb -dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ +dtb-$(CONFIG_ARCH_HIP04) += \ + hip04-d01.dtb +dtb-$(CONFIG_ARCH_INTEGRATOR) += \ + integratorap.dtb \ integratorcp.dtb -dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \ +dtb-$(CONFIG_ARCH_KEYSTONE) += \ + k2hk-evm.dtb \ k2l-evm.dtb \ k2e-evm.dtb -dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ +dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-b3.dtb \ kirkwood-cloudbox.dtb \ kirkwood-d2net.dtb \ kirkwood-db-88f6281.dtb \ @@ -174,37 +192,49 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-ts219-6282.dtb \ kirkwood-ts419-6281.dtb \ kirkwood-ts419-6282.dtb -dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb -dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb -dtb-$(CONFIG_MACH_MESON6) += meson6-atv1200.dtb -dtb-$(CONFIG_ARCH_MMP) += pxa168-aspenite.dtb \ +dtb-$(CONFIG_ARCH_LPC32XX) += \ + ea3250.dtb phy3250.dtb +dtb-$(CONFIG_ARCH_MARCO) += \ + marco-evb.dtb +dtb-$(CONFIG_MACH_MESON6) += \ + meson6-atv1200.dtb +dtb-$(CONFIG_ARCH_MMP) += \ + pxa168-aspenite.dtb \ pxa910-dkb.dtb \ mmp2-brownstone.dtb -dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb -dtb-$(CONFIG_ARCH_MXC) += \ +dtb-$(CONFIG_ARCH_MOXART) += \ + moxart-uc7112lx.dtb +dtb-$(CONFIG_SOC_IMX1) += \ imx1-ads.dtb \ - imx1-apf9328.dtb \ + imx1-apf9328.dtb +dtb-$(CONFIG_SOC_IMX25) += \ imx25-eukrea-mbimxsd25-baseboard.dtb \ imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dtb \ imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dtb \ imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb \ imx25-karo-tx25.dtb \ - imx25-pdk.dtb \ + imx25-pdk.dtb +dtb-$(CONFIG_SOC_IMX31) += \ imx27-apf27.dtb \ imx27-apf27dev.dtb \ imx27-eukrea-mbimxsd27-baseboard.dtb \ imx27-pdk.dtb \ imx27-phytec-phycore-rdk.dtb \ - imx27-phytec-phycard-s-rdk.dtb \ - imx31-bug.dtb \ + imx27-phytec-phycard-s-rdk.dtb +dtb-$(CONFIG_SOC_IMX31) += \ + imx31-bug.dtb +dtb-$(CONFIG_SOC_IMX35) += \ imx35-eukrea-mbimxsd35-baseboard.dtb \ - imx35-pdk.dtb \ - imx50-evk.dtb \ + imx35-pdk.dtb +dtb-$(CONFIG_SOC_IMX50) += \ + imx50-evk.dtb +dtb-$(CONFIG_SOC_IMX51) += \ imx51-apf51.dtb \ imx51-apf51dev.dtb \ imx51-babbage.dtb \ imx51-digi-connectcore-jsk.dtb \ - imx51-eukrea-mbimxsd51-baseboard.dtb \ + imx51-eukrea-mbimxsd51-baseboard.dtb +dtb-$(CONFIG_SOC_IMX53) += \ imx53-ard.dtb \ imx53-m53evk.dtb \ imx53-mba53.dtb \ @@ -213,7 +243,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx53-smd.dtb \ imx53-tx53-x03x.dtb \ imx53-tx53-x13x.dtb \ - imx53-voipac-bsb.dtb \ + imx53-voipac-bsb.dtb +dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-aristainetos_4.dtb \ imx6dl-aristainetos_7.dtb \ imx6dl-cubox-i.dtb \ @@ -264,16 +295,21 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-tx6q-1010-comtft.dtb \ imx6q-tx6q-1020.dtb \ imx6q-tx6q-1020-comtft.dtb \ - imx6q-tx6q-1110.dtb \ - imx6sl-evk.dtb \ - imx6sx-sdb.dtb \ + imx6q-tx6q-1110.dtb +dtb-$(CONFIG_SOC_IMX6SL) += \ + imx6sl-evk.dtb +dtb-$(CONFIG_SOC_IMX6SX) += \ + imx6sx-sdb.dtb +dtb-$(CONFIG_SOC_LS1021A) += \ ls1021a-qds.dtb \ - ls1021a-twr.dtb \ + ls1021a-twr.dtb +dtb-$(CONFIG_SOC_VF610) += \ vf500-colibri-eval-v3.dtb \ vf610-colibri-eval-v3.dtb \ vf610-cosmic.dtb \ vf610-twr.dtb -dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ +dtb-$(CONFIG_ARCH_MXS) += \ + imx23-evk.dtb \ imx23-olinuxino.dtb \ imx23-stmp378x_devb.dtb \ imx28-apf28.dtb \ @@ -294,17 +330,21 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-m28evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb -dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb \ +dtb-$(CONFIG_ARCH_NOMADIK) += \ + ste-nomadik-s8815.dtb \ ste-nomadik-nhk15.dtb -dtb-$(CONFIG_ARCH_NSPIRE) += nspire-cx.dtb \ +dtb-$(CONFIG_ARCH_NSPIRE) += \ + nspire-cx.dtb \ nspire-tp.dtb \ nspire-clp.dtb -dtb-$(CONFIG_ARCH_OMAP2) += omap2420-h4.dtb \ +dtb-$(CONFIG_ARCH_OMAP2) += \ + omap2420-h4.dtb \ omap2420-n800.dtb \ omap2420-n810.dtb \ omap2420-n810-wimax.dtb \ omap2430-sdp.dtb -dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \ +dtb-$(CONFIG_ARCH_OMAP3) += \ + am3517-craneboard.dtb \ am3517-evm.dtb \ am3517_mt_ventoux.dtb \ omap3430-sdp.dtb \ @@ -348,7 +388,8 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \ omap3-sbc-t3730.dtb \ omap3-thunder.dtb \ omap3-zoom3.dtb -dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \ +dtb-$(CONFIG_SOC_AM33XX) += \ + am335x-base0033.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ am335x-evm.dtb \ @@ -356,7 +397,8 @@ dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \ am335x-nano.dtb \ am335x-pepper.dtb \ am335x-lxm.dtb -dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \ +dtb-$(CONFIG_ARCH_OMAP4) += \ + omap4-duovero-parlor.dtb \ omap4-panda.dtb \ omap4-panda-a4.dtb \ omap4-panda-es.dtb \ @@ -364,20 +406,25 @@ dtb-$(CONFIG_ARCH_OMAP4) += omap4-duovero-parlor.dtb \ omap4-sdp-es23plus.dtb \ omap4-var-dvk-om44.dtb \ omap4-var-stk-om44.dtb -dtb-$(CONFIG_SOC_AM43XX) += am43x-epos-evm.dtb \ +dtb-$(CONFIG_SOC_AM43XX) += \ + am43x-epos-evm.dtb \ am437x-sk-evm.dtb \ am437x-gp-evm.dtb -dtb-$(CONFIG_SOC_OMAP5) += omap5-cm-t54.dtb \ +dtb-$(CONFIG_SOC_OMAP5) += \ + omap5-cm-t54.dtb \ omap5-sbc-t54.dtb \ omap5-uevm.dtb -dtb-$(CONFIG_SOC_DRA7XX) += dra7-evm.dtb \ +dtb-$(CONFIG_SOC_DRA7XX) += \ + dra7-evm.dtb \ am57xx-beagle-x15.dtb \ dra72-evm.dtb -dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-d2-network.dtb \ +dtb-$(CONFIG_ARCH_ORION5X) += \ + orion5x-lacie-d2-network.dtb \ orion5x-lacie-ethernet-disk-mini-v2.dtb \ orion5x-maxtor-shared-storage-2.dtb \ orion5x-rd88f5182-nas.dtb -dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb +dtb-$(CONFIG_ARCH_PRIMA2) += \ + prima2-evb.dtb dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8064-cm-qs600.dtb \ qcom-apq8064-ifc6410.dtb \ @@ -388,17 +435,21 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-msm8660-surf.dtb \ qcom-msm8960-cdp.dtb \ qcom-msm8974-sony-xperia-honami.dtb -dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb +dtb-$(CONFIG_ARCH_REALVIEW) += \ + arm-realview-pb1176.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3066a-bqcurie2.dtb \ rk3066a-marsboard.dtb \ rk3188-radxarock.dtb \ rk3288-evb-act8846.dtb \ rk3288-evb-rk808.dtb -dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb -dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ +dtb-$(CONFIG_ARCH_S3C24XX) += \ + s3c2416-smdk2416.dtb +dtb-$(CONFIG_ARCH_S3C64XX) += \ + s3c6410-mini6410.dtb \ s3c6410-smdk6410.dtb -dtb-$(CONFIG_ARCH_S5PV210) += s5pv210-aquila.dtb \ +dtb-$(CONFIG_ARCH_S5PV210) += \ + s5pv210-aquila.dtb \ s5pv210-goni.dtb \ s5pv210-smdkc110.dtb \ s5pv210-smdkv210.dtb \ @@ -414,7 +465,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ sh7372-mackerel.dtb \ sh73a0-kzm9g.dtb \ sh73a0-kzm9g-reference.dtb -dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ +dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ + emev2-kzm9d.dtb \ r7s72100-genmai.dtb \ r8a73a4-ape6evm.dtb \ r8a7740-armadillo800eva.dtb \ @@ -423,20 +475,25 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \ r8a7791-henninger.dtb \ r8a7791-koelsch.dtb \ r8a7794-alt.dtb -dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ +dtb-$(CONFIG_ARCH_SOCFPGA) += \ + socfpga_arria5_socdk.dtb \ socfpga_arria10_socdk.dtb \ socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_socrates.dtb \ socfpga_vt.dtb -dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ +dtb-$(CONFIG_ARCH_SPEAR13XX) += \ + spear1310-evb.dtb \ spear1340-evb.dtb -dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ +dtb-$(CONFIG_ARCH_SPEAR3XX) += \ + spear300-evb.dtb \ spear310-evb.dtb \ spear320-evb.dtb \ spear320-hmi.dtb -dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb -dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ +dtb-$(CONFIG_ARCH_SPEAR6XX) += \ + spear600-evb.dtb +dtb-$(CONFIG_ARCH_STI) += \ + stih407-b2120.dtb \ stih410-b2120.dtb \ stih415-b2000.dtb \ stih415-b2020.dtb \ @@ -478,7 +535,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a23-ippo-q8h-v5.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb -dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ + tegra20-harmony.dtb \ tegra20-iris-512.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ @@ -487,34 +545,43 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra20-tec.dtb \ tegra20-trimslice.dtb \ tegra20-ventana.dtb \ - tegra20-whistler.dtb \ + tegra20-whistler.dtb +dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \ tegra30-apalis-eval.dtb \ tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ - tegra30-colibri-eval-v3.dtb \ + tegra30-colibri-eval-v3.dtb +dtb-$(CONFIG_ARCH_TEGRA_114_SOC) += \ tegra114-dalmore.dtb \ tegra114-roth.dtb \ - tegra114-tn7.dtb \ + tegra114-tn7.dtb +dtb-$(CONFIG_ARCH_TEGRA_124_SOC) += \ tegra124-jetson-tk1.dtb \ tegra124-nyan-big.dtb \ tegra124-venice2.dtb -dtb-$(CONFIG_ARCH_U300) += ste-u300.dtb -dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \ +dtb-$(CONFIG_ARCH_U300) += \ + ste-u300.dtb +dtb-$(CONFIG_ARCH_U8500) += \ + ste-snowball.dtb \ ste-hrefprev60-stuib.dtb \ ste-hrefprev60-tvk.dtb \ ste-hrefv60plus-stuib.dtb \ ste-hrefv60plus-tvk.dtb \ ste-ccu8540.dtb \ ste-ccu9540.dtb -dtb-$(CONFIG_ARCH_VERSATILE) += versatile-ab.dtb \ +dtb-$(CONFIG_ARCH_VERSATILE) += \ + versatile-ab.dtb \ versatile-pb.dtb -dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ +dtb-$(CONFIG_ARCH_VEXPRESS) += \ + vexpress-v2p-ca5s.dtb \ vexpress-v2p-ca9.dtb \ vexpress-v2p-ca15-tc1.dtb \ vexpress-v2p-ca15_a7.dtb -dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb -dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \ +dtb-$(CONFIG_ARCH_VIRT) += \ + xenvm-4.2.dtb +dtb-$(CONFIG_ARCH_VT8500) += \ + vt8500-bv07.dtb \ wm8505-ref.dtb \ wm8650-mid.dtb \ wm8750-apc8750.dtb \ @@ -546,13 +613,15 @@ dtb-$(CONFIG_MACH_ARMADA_XP) += \ armada-xp-netgear-rn2120.dtb \ armada-xp-openblocks-ax3-4.dtb \ armada-xp-synology-ds414.dtb -dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ +dtb-$(CONFIG_MACH_DOVE) += \ + dove-cm-a510.dtb \ dove-cubox.dtb \ dove-cubox-es.dtb \ dove-d2plug.dtb \ dove-d3plug.dtb \ dove-dove-db.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \ +dtb-$(CONFIG_ARCH_MEDIATEK) += \ + mt6589-aquaris5.dtb \ mt6592-evb.dtb \ mt8127-moose.dtb \ mt8135-evbp1.dtb -- cgit v1.2.3 From 31078ecdc7b374efb3f4b2e60c620b2abc1ed307 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 21:01:52 +0100 Subject: ARM: shmobile: r8a7790 dtsi: Drop "renesas,rcar_sound" compatible value The "renesas,rcar_sound" compatible property value was never processed nor documented. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index af7e255f629e..7cef4d9f0377 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1398,7 +1398,7 @@ rcar_sound: rcar_sound@ec500000 { #sound-dai-cells = <1>; - compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2", "renesas,rcar_sound"; + compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ -- cgit v1.2.3 From f49cd2b3d2caf075d78fa1948fda1d7ed246d1eb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 6 Jan 2015 21:01:53 +0100 Subject: ARM: shmobile: r8a7791 dtsi: Drop "renesas,rcar_sound" compatible value The "renesas,rcar_sound" compatible property value was never processed nor documented. Signed-off-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 77c0beeb8d7c..7fdd1a66eac3 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1382,7 +1382,7 @@ rcar_sound: rcar_sound@ec500000 { #sound-dai-cells = <1>; - compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2", "renesas,rcar_sound"; + compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ <0 0xec540000 0 0x1000>, /* SSIU */ -- cgit v1.2.3 From ad63241cdc328edbb0f879416ea7707bf0997f08 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 17 Dec 2014 06:11:52 +0000 Subject: ARM: shmobile: r8a7790: tidyup #sound-dai-cells settings Renesas sound driver needs #sound-dai-cells settings, but, this usage is a little bit confusable. It came from ALSA SoC historical reasons. The sound DAI naming method is different between Single/Multi DAI in the ALSA framework, and it is used for sound card matching. And this #sound-dai-cells has relationship to it. Current SoC dtsi has #sound-dai-cells = <1> as default settings (= it is assuming that board/platform has multi DAI), and board/platform side needs to overwrite it if board/platform was single DAI. This style is more confusable for users. This patch removes SoC side default settings, and force to set it by board/platform side. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 1 + arch/arm/boot/dts/r8a7790.dtsi | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 636d53bb87a2..2bc20e44fff9 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -579,6 +579,7 @@ pinctrl-0 = <&sound_pins &sound_clk_pins>; pinctrl-names = "default"; + /* Single DAI */ #sound-dai-cells = <0>; status = "okay"; diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index 7cef4d9f0377..1543fa5f21d5 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1397,7 +1397,12 @@ }; rcar_sound: rcar_sound@ec500000 { - #sound-dai-cells = <1>; + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ -- cgit v1.2.3 From d2b541c98f5402ebb49ee1c636ef5bc31462b4ca Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Wed, 17 Dec 2014 06:12:02 +0000 Subject: ARM: shmobile: r8a7791: tidyup #sound-dai-cells settings Renesas sound driver needs #sound-dai-cells settings, but, this usage is a little bit confusable. It came from ALSA SoC historical reasons. The sound DAI naming method is different between Single/Multi DAI in the ALSA framework, and it is used for sound card matching. And this #sound-dai-cells has relationship to it. Current SoC dtsi has #sound-dai-cells = <1> as default settings (= it is assuming that board/platform has multi DAI), and board/platform side needs to overwrite it if board/platform was single DAI. This style is more confusable for users. This patch removes SoC side default settings, and force to set it by board/platform side. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791-koelsch.dts | 1 + arch/arm/boot/dts/r8a7791.dtsi | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 990af167c551..9c651c0b685a 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -582,6 +582,7 @@ pinctrl-0 = <&sound_pins &sound_clk_pins>; pinctrl-names = "default"; + /* Single DAI */ #sound-dai-cells = <0>; status = "okay"; diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 7fdd1a66eac3..002dbc536bd8 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1381,7 +1381,12 @@ }; rcar_sound: rcar_sound@ec500000 { - #sound-dai-cells = <1>; + /* + * #sound-dai-cells is required + * + * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; + * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; + */ compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2"; reg = <0 0xec500000 0 0x1000>, /* SCU */ <0 0xec5a0000 0 0x100>, /* ADG */ -- cgit v1.2.3 From aba07789d811b6cf645cffc83ac821393027819a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 3 Dec 2014 14:41:46 +0100 Subject: ARM: shmobile: r8a7740 dtsi: Add PM domain support Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up all devices to their respective PM domains. Add a minimal device node for the Coresight-ETM hardware block, and hook it up to the D4 PM domain, so the R-Mobile System Controller driver can keep the domain powered, until the new Coresight code handles runtime PM. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 99 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 60ca62254536..52f2cf4b84d3 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -25,6 +25,7 @@ device_type = "cpu"; reg = <0x0>; clock-frequency = <800000000>; + power-domains = <&pd_a3sm>; }; }; @@ -41,12 +42,18 @@ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; }; + ptm { + compatible = "arm,coresight-etm3x"; + power-domains = <&pd_d4>; + }; + cmt1: timer@e6138000 { compatible = "renesas,cmt-48-r8a7740", "renesas,cmt-48"; reg = <0xe6138000 0x170>; interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_CMT1>; clock-names = "fck"; + power-domains = <&pd_c5>; renesas,channels-mask = <0x3f>; @@ -72,6 +79,7 @@ 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; + power-domains = <&pd_a4s>; }; /* irqpin1: IRQ8 - IRQ15 */ @@ -93,6 +101,7 @@ 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; + power-domains = <&pd_a4s>; }; /* irqpin2: IRQ16 - IRQ23 */ @@ -114,6 +123,7 @@ 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; + power-domains = <&pd_a4s>; }; /* irqpin3: IRQ24 - IRQ31 */ @@ -135,6 +145,7 @@ 0 149 IRQ_TYPE_LEVEL_HIGH 0 149 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_INTCA>; + power-domains = <&pd_a4s>; }; ether: ethernet@e9a00000 { @@ -143,6 +154,7 @@ <0xe9a01800 0x800>; interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_GETHER>; + power-domains = <&pd_a4s>; phy-mode = "mii"; #address-cells = <1>; #size-cells = <0>; @@ -159,6 +171,7 @@ 0 203 IRQ_TYPE_LEVEL_HIGH 0 204 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7740_CLK_IIC0>; + power-domains = <&pd_a4r>; status = "disabled"; }; @@ -172,6 +185,7 @@ 0 72 IRQ_TYPE_LEVEL_HIGH 0 73 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_IIC1>; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -181,6 +195,7 @@ interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -190,6 +205,7 @@ interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -199,6 +215,7 @@ interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -208,6 +225,7 @@ interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -217,6 +235,7 @@ interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -226,6 +245,7 @@ interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -235,6 +255,7 @@ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -244,6 +265,7 @@ interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -253,6 +275,7 @@ interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; clock-names = "sci_ick"; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -271,12 +294,14 @@ <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; + power-domains = <&pd_c5>; }; tpu: pwm@e6600000 { compatible = "renesas,tpu-r8a7740", "renesas,tpu"; reg = <0xe6600000 0x100>; clocks = <&mstp3_clks R8A7740_CLK_TPU0>; + power-domains = <&pd_a3sp>; status = "disabled"; #pwm-cells = <3>; }; @@ -287,6 +312,7 @@ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH 0 57 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_MMC>; + power-domains = <&pd_a3sp>; status = "disabled"; }; @@ -297,6 +323,7 @@ 0 118 IRQ_TYPE_LEVEL_HIGH 0 119 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_SDHI0>; + power-domains = <&pd_a3sp>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -309,6 +336,7 @@ 0 122 IRQ_TYPE_LEVEL_HIGH 0 123 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks R8A7740_CLK_SDHI1>; + power-domains = <&pd_a3sp>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -321,6 +349,7 @@ 0 126 IRQ_TYPE_LEVEL_HIGH 0 127 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks R8A7740_CLK_SDHI2>; + power-domains = <&pd_a3sp>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -332,6 +361,7 @@ reg = <0xfe1f0000 0x400>; interrupts = <0 9 0x4>; clocks = <&mstp3_clks R8A7740_CLK_FSI>; + power-domains = <&pd_a4mp>; status = "disabled"; }; @@ -343,6 +373,7 @@ <0 200 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7740_CLK_TMU0>; clock-names = "fck"; + power-domains = <&pd_a4r>; #renesas,channels = <3>; @@ -357,6 +388,7 @@ <0 172 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7740_CLK_TMU1>; clock-names = "fck"; + power-domains = <&pd_a4r>; #renesas,channels = <3>; @@ -543,4 +575,71 @@ "usbhost", "sdhi2", "usbfunc", "usphy"; }; }; + + sysc: system-controller@e6180000 { + compatible = "renesas,sysc-r8a7740", "renesas,sysc-rmobile"; + reg = <0xe6180000 0x8000>, <0xe6188000 0x8000>; + + pm-domains { + pd_c5: c5 { + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_a4lc: a4lc@1 { + reg = <1>; + #power-domain-cells = <0>; + }; + + pd_a4mp: a4mp@2 { + reg = <2>; + #power-domain-cells = <0>; + }; + + pd_d4: d4@3 { + reg = <3>; + #power-domain-cells = <0>; + }; + + pd_a4r: a4r@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_a3rv: a3rv@6 { + reg = <6>; + #power-domain-cells = <0>; + }; + }; + + pd_a4s: a4s@10 { + reg = <10>; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_a3sp: a3sp@11 { + reg = <11>; + #power-domain-cells = <0>; + }; + + pd_a3sm: a3sm@12 { + reg = <12>; + #power-domain-cells = <0>; + }; + + pd_a3sg: a3sg@13 { + reg = <13>; + #power-domain-cells = <0>; + }; + }; + + pd_a4su: a4su@20 { + reg = <20>; + #power-domain-cells = <0>; + }; + }; + }; + }; }; -- cgit v1.2.3 From 2fd4e094bbe6de0dc98355c4c387c433f6de525c Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Tue, 13 Jan 2015 01:31:14 +0300 Subject: ARM: shmobile: r8a7791: fix MSTP8 input clocks I made a mistake when rebasing Andrey Gusakov's patch adding MLB+ clock to the R8A7791 device tree, inserting <&hp_clk> into the "clocks" property of the MSTP8 node at a wrong position, so that the input clocks for MLB+ and IPMMU-SGX got swapped... Fixes: 7408d3061d2f ("ARM: shmobile: r8a7791: add MLB+ clock") Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 28102265cc71..946cd3a4836e 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1154,7 +1154,7 @@ mstp8_clks: mstp8_clks@e6150990 { compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; - clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, + clocks = <&zg_clk>, <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>; #clock-cells = <1>; clock-indices = < -- cgit v1.2.3 From d86a31101f7952870d50df96abb786bb983efa69 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 8 Jan 2015 01:55:15 +0000 Subject: ARM: shmobile: r8a7790: add SRC interrupt number on DTSI Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi index af30c2470f85..637e4ee10d6a 100644 --- a/arch/arm/boot/dts/r8a7790.dtsi +++ b/arch/arm/boot/dts/r8a7790.dtsi @@ -1435,16 +1435,16 @@ }; rcar_sound,src { - src0: src@0 { }; - src1: src@1 { }; - src2: src@2 { }; - src3: src@3 { }; - src4: src@4 { }; - src5: src@5 { }; - src6: src@6 { }; - src7: src@7 { }; - src8: src@8 { }; - src9: src@9 { }; + src0: src@0 { interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; }; + src1: src@1 { interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; }; + src2: src@2 { interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; }; + src3: src@3 { interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; }; + src4: src@4 { interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; }; + src5: src@5 { interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; }; + src6: src@6 { interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; }; + src7: src@7 { interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; }; + src8: src@8 { interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; }; + src9: src@9 { interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; }; }; rcar_sound,ssi { -- cgit v1.2.3 From 8856102dd30897e608331521f4286163700c4d59 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 8 Jan 2015 01:55:27 +0000 Subject: ARM: shmobile: r8a7791: add SRC interrupt number on DTSI Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 946cd3a4836e..e3a60a22d34a 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1420,16 +1420,16 @@ }; rcar_sound,src { - src0: src@0 { }; - src1: src@1 { }; - src2: src@2 { }; - src3: src@3 { }; - src4: src@4 { }; - src5: src@5 { }; - src6: src@6 { }; - src7: src@7 { }; - src8: src@8 { }; - src9: src@9 { }; + src0: src@0 { interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; }; + src1: src@1 { interrupts = <0 353 IRQ_TYPE_LEVEL_HIGH>; }; + src2: src@2 { interrupts = <0 354 IRQ_TYPE_LEVEL_HIGH>; }; + src3: src@3 { interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>; }; + src4: src@4 { interrupts = <0 356 IRQ_TYPE_LEVEL_HIGH>; }; + src5: src@5 { interrupts = <0 357 IRQ_TYPE_LEVEL_HIGH>; }; + src6: src@6 { interrupts = <0 358 IRQ_TYPE_LEVEL_HIGH>; }; + src7: src@7 { interrupts = <0 359 IRQ_TYPE_LEVEL_HIGH>; }; + src8: src@8 { interrupts = <0 360 IRQ_TYPE_LEVEL_HIGH>; }; + src9: src@9 { interrupts = <0 361 IRQ_TYPE_LEVEL_HIGH>; }; }; rcar_sound,ssi { -- cgit v1.2.3 From 8455dd0d4f4621a41df0779bce23113656598a76 Mon Sep 17 00:00:00 2001 From: Sanchayan Maity Date: Wed, 7 Jan 2015 12:39:30 +0530 Subject: ARM: dts: vfxxx: Add SNVS node Add device tree node for the Secure Non-Volatile Storage (SNVS) on the VF610 platform. The SNVS block also has a Real Time Counter (RTC). Signed-off-by: Sanchayan Maity Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf500.dtsi | 4 ++++ arch/arm/boot/dts/vfxxx.dtsi | 14 ++++++++++++++ 2 files changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index 29016090d060..0d0de864643f 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -130,6 +130,10 @@ interrupts = ; }; +&snvsrtc { + interrupts = ; +}; + &src { interrupts = ; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index a55e1f9a414d..ae5c35879a53 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -351,6 +351,20 @@ status = "disabled"; }; + snvs0: snvs@400a7000 { + compatible = "fsl,sec-v4.0-mon", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x400a7000 0x2000>; + + snvsrtc: snvs-rtc-lp@34 { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + reg = <0x34 0x58>; + clocks = <&clks VF610_CLK_SNVS>; + clock-names = "snvs-rtc"; + }; + }; + uart4: serial@400a9000 { compatible = "fsl,vf610-lpuart"; reg = <0x400a9000 0x1000>; -- cgit v1.2.3 From 7d76d03b9be8ea8977df45176336cc4fec6ac603 Mon Sep 17 00:00:00 2001 From: Zhiwu Song Date: Thu, 25 Dec 2014 16:34:19 +0800 Subject: ARM: dts: add init dts file for CSR atlas7 SoC CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens of MARCOs, in each MARCO, there are dozens of hardware modules. Signed-off-by: Zhiwu Song Signed-off-by: Hao Liu Signed-off-by: Barry Song Acked-by: Arnd Bergmann --- Documentation/devicetree/bindings/arm/sirf.txt | 4 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/atlas7-evb.dts | 110 ++++ arch/arm/boot/dts/atlas7.dtsi | 813 +++++++++++++++++++++++++ 4 files changed, 928 insertions(+) create mode 100644 arch/arm/boot/dts/atlas7-evb.dts create mode 100644 arch/arm/boot/dts/atlas7.dtsi (limited to 'arch') diff --git a/Documentation/devicetree/bindings/arm/sirf.txt b/Documentation/devicetree/bindings/arm/sirf.txt index 9daa1c1490a3..7b28ee6fee91 100644 --- a/Documentation/devicetree/bindings/arm/sirf.txt +++ b/Documentation/devicetree/bindings/arm/sirf.txt @@ -3,5 +3,9 @@ CSR SiRFprimaII and SiRFmarco device tree bindings. Required root node properties: - compatible: + - "sirf,atlas6-cb" : atlas6 "cb" evaluation board + - "sirf,atlas6" : atlas6 device based board + - "sirf,atlas7-cb" : atlas7 "cb" evaluation board + - "sirf,atlas7" : atlas7 device based board - "sirf,prima2-cb" : prima2 "cb" evaluation board - "sirf,prima2" : prima2 device based board diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 68feb8f8b5bc..0048cb16370f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -52,6 +52,7 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb +dtb-$(CONFIG_ARCH_ATLAS7) += atlas7-evb.dtb dtb-$(CONFIG_ARCH_AXXIA) += axm5516-amarillo.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb diff --git a/arch/arm/boot/dts/atlas7-evb.dts b/arch/arm/boot/dts/atlas7-evb.dts new file mode 100644 index 000000000000..49cf59a95572 --- /dev/null +++ b/arch/arm/boot/dts/atlas7-evb.dts @@ -0,0 +1,110 @@ +/* + * DTS file for CSR SiRFatlas7 Evaluation Board + * + * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +/dts-v1/; + +/include/ "atlas7.dtsi" + +/ { + model = "CSR SiRFatlas7 Evaluation Board"; + compatible = "sirf,atlas7-cb", "sirf,atlas7"; + + chosen { + bootargs = "console=ttySiRF1,115200 earlyprintk"; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vpp_reserved: vpp_mem@5e800000 { + compatible = "sirf,reserved-memory"; + reg = <0x5e800000 0x800000>; + }; + + nanddisk_reserved: nanddisk@46000000 { + reg = <0x46000000 0x200000>; + no-map; + }; + }; + + + noc { + mediam { + nand@17050000 { + memory-region = <&nanddisk_reserved>; + }; + }; + + gnssm { + spi1: spi@18200000 { + status = "okay"; + spiflash: macronix@0{ + status = "okay"; + compatible = "macronix,mx25l6405d"; + reg = <0>; + spi-max-frequency = <37500000>; + spi-cpha; + spi-cpol; + #address-cells = <1>; + #size-cells = <1>; + partitions@0 { + label = "myspiboot"; + reg = <0x0 0x800000>; + }; + }; + }; + }; + + btm { + uart6: uart@11000000 { + status = "okay"; + sirf,uart-has-rtscts; + }; + }; + + disp-iobg { + vpp@13110000 { + memory-region = <&vpp_reserved>; + }; + }; + + display0: display@0 { + compatible = "lvds-panel"; + source = "lvds.0"; + + bl-gpios = <&gpio_1 63 0>; + data-lines = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <60000000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <220>; + hback-porch = <100>; + hsync-len = <1>; + vback-porch = <10>; + vfront-porch = <25>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/atlas7.dtsi b/arch/arm/boot/dts/atlas7.dtsi new file mode 100644 index 000000000000..a753178abc85 --- /dev/null +++ b/arch/arm/boot/dts/atlas7.dtsi @@ -0,0 +1,813 @@ +/* + * DTS file for CSR SiRFatlas7 SoC + * + * Copyright (c) 2014 Cambridge Silicon Radio Limited, a CSR plc group company. + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" +/ { + compatible = "sirf,atlas7"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&gic>; + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + serial6 = &uart6; + serial9 = &usp2; + }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <1>; + }; + }; + + noc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10000000 0x10000000 0xc0000000>; + + gic: interrupt-controller@10301000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10301000 0x1000>, + <0x10302000 0x0100>; + }; + + pmu_regulator: pmu_regulator@10E30020 { + compatible = "sirf,atlas7-pmu-ldo"; + reg = <0x10E30020 0x4>; + ldo: ldo { + regulator-name = "ldo"; + }; + }; + + atlas7_codec: atlas7_codec@10E30000 { + #sound-dai-cells = <0>; + compatible = "sirf,atlas7-codec"; + reg = <0x10E30000 0x400>; + clocks = <&car 62>; + ldo-supply = <&ldo>; + }; + + atlas7_iacc: atlas7_iacc@10D01000 { + #sound-dai-cells = <0>; + compatible = "sirf,atlas7-iacc"; + reg = <0x10D01000 0x100>; + dmas = <&dmac3 0>, <&dmac3 7>, <&dmac3 8>, + <&dmac3 3>, <&dmac3 9>; + dma-names = "rx", "tx0", "tx1", "tx2", "tx3"; + clocks = <&car 62>; + }; + + ipc@13240000 { + compatible = "sirf,atlas7-ipc"; + ranges = <0x13240000 0x13240000 0x00010000>; + #address-cells = <1>; + #size-cells = <1>; + + hwspinlock { + compatible = "sirf,hwspinlock"; + reg = <0x13240000 0x00010000>; + + num-spinlocks = <30>; + }; + + ns_m3_rproc@0 { + compatible = "sirf,ns2m30-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 123 0>; + }; + + ns_m3_rproc@1 { + compatible = "sirf,ns2m31-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 126 0>; + }; + + ns_kal_rproc@0 { + compatible = "sirf,ns2kal0-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 124 0>; + }; + + ns_kal_rproc@1 { + compatible = "sirf,ns2kal1-rproc"; + reg = <0x13240000 0x00010000>; + interrupts = <0 127 0>; + }; + }; + + pinctrl: ioc@18880000 { + compatible = "sirf,atlas7-ioc"; + reg = <0x18880000 0x1000>, + <0x10E40000 0x1000>; + }; + + pmipc { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13240000 0x13240000 0x00010000>; + pmipc@0x13240000 { + compatible = "sirf,atlas7-pmipc"; + reg = <0x13240000 0x00010000>; + }; + }; + + dramfw { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10830000 0x10830000 0x18000>; + dramfw@10820000 { + compatible = "sirf,nocfw-dramfw"; + reg = <0x10830000 0x18000>; + }; + }; + + spramfw { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10250000 0x10250000 0x3000>; + spramfw@10820000 { + compatible = "sirf,nocfw-spramfw"; + reg = <0x10250000 0x3000>; + }; + }; + + cpum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10200000 0x10200000 0x3000>; + cpum@10200000 { + compatible = "sirf,nocfw-cpum"; + reg = <0x10200000 0x3000>; + }; + }; + + cgum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18641000 0x18641000 0x3000>, + <0x18620000 0x18620000 0x1000>; + + cgum@18641000 { + compatible = "sirf,nocfw-cgum"; + reg = <0x18641000 0x3000>; + }; + + car: clock-controller@18620000 { + compatible = "sirf,atlas7-car"; + reg = <0x18620000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + + gnssm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18000000 0x18000000 0x0000ffff>, + <0x18010000 0x18010000 0x1000>, + <0x18020000 0x18020000 0x1000>, + <0x18030000 0x18030000 0x1000>, + <0x18040000 0x18040000 0x1000>, + <0x18050000 0x18050000 0x1000>, + <0x18060000 0x18060000 0x1000>, + <0x18100000 0x18100000 0x3000>, + <0x18250000 0x18250000 0x10000>, + <0x18200000 0x18200000 0x1000>; + + dmac0: dma-controller@18000000 { + cell-index = <0>; + compatible = "sirf,atlas7-dmac"; + reg = <0x18000000 0x1000>; + interrupts = <0 12 0>; + clocks = <&car 89>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + gnssmfw@0x18100000 { + compatible = "sirf,nocfw-gnssm"; + reg = <0x18100000 0x3000>; + }; + + uart0: uart@18010000 { + cell-index = <0>; + compatible = "sirf,atlas7-uart"; + reg = <0x18010000 0x1000>; + interrupts = <0 17 0>; + clocks = <&car 90>; + fifosize = <128>; + dmas = <&dmac0 3>, <&dmac0 2>; + dma-names = "rx", "tx"; + }; + + uart1: uart@18020000 { + cell-index = <1>; + compatible = "sirf,atlas7-uart"; + reg = <0x18020000 0x1000>; + interrupts = <0 18 0>; + clocks = <&car 88>; + fifosize = <32>; + }; + + uart2: uart@18030000 { + cell-index = <2>; + compatible = "sirf,atlas7-uart"; + reg = <0x18030000 0x1000>; + interrupts = <0 19 0>; + clocks = <&car 91>; + fifosize = <128>; + dmas = <&dmac0 6>, <&dmac0 7>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart3: uart@18040000 { + cell-index = <3>; + compatible = "sirf,atlas7-uart"; + reg = <0x18040000 0x1000>; + interrupts = <0 66 0>; + clocks = <&car 92>; + fifosize = <128>; + dmas = <&dmac0 4>, <&dmac0 5>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart4: uart@18050000 { + cell-index = <4>; + compatible = "sirf,atlas7-uart"; + reg = <0x18050000 0x1000>; + interrupts = <0 69 0>; + clocks = <&car 93>; + fifosize = <128>; + dmas = <&dmac0 0>, <&dmac0 1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart5: uart@18060000 { + cell-index = <5>; + compatible = "sirf,atlas7-uart"; + reg = <0x18060000 0x1000>; + interrupts = <0 71 0>; + clocks = <&car 94>; + fifosize = <128>; + dmas = <&dmac0 8>, <&dmac0 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + dspub@18250000 { + compatible = "dx,cc44p"; + reg = <0x18250000 0x10000>; + interrupts = <0 27 0>; + }; + + spi1: spi@18200000 { + compatible = "sirf,prima2-spi"; + reg = <0x18200000 0x1000>; + interrupts = <0 16 0>; + clocks = <&car 95>; + #address-cells = <1>; + #size-cells = <0>; + dmas = <&dmac0 12>, <&dmac0 13>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + }; + + + gpum { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13000000 0x13000000 0x3000>; + gpum@0x13000000 { + compatible = "sirf,nocfw-gpum"; + reg = <0x13000000 0x3000>; + }; + }; + + mediam { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x16000000 0x16000000 0x00200000>, + <0x17020000 0x17020000 0x1000>, + <0x17030000 0x17030000 0x1000>, + <0x17040000 0x17040000 0x1000>, + <0x17050000 0x17050000 0x10000>, + <0x17060000 0x17060000 0x200>, + <0x17060200 0x17060200 0x100>, + <0x17070000 0x17070000 0x200>, + <0x17070200 0x17070200 0x100>, + <0x170A0000 0x170A0000 0x3000>; + + mediam@170A0000 { + compatible = "sirf,nocfw-mediam"; + reg = <0x170A0000 0x3000>; + }; + + gpio_0: gpio_mediam@17040000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x17040000 0x1000>; + interrupts = <0 13 0>, <0 14 0>; + clocks = <&car 107>; + clock-names = "gpio0_io"; + gpio-controller; + interrupt-controller; + }; + + nand@17050000 { + compatible = "sirf,atlas7-nand"; + reg = <0x17050000 0x10000>; + interrupts = <0 41 0>; + clocks = <&car 108>, <&car 112>; + clock-names = "nand_io", "nand_nand"; + }; + + sd0: sdhci@16000000 { + cell-index = <0>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x16000000 0x100000>; + interrupts = <0 38 0>; + clocks = <&car 109>, <&car 111>; + clock-names = "core", "iface"; + wp-inverted; + non-removable; + status = "disabled"; + bus-width = <8>; + }; + + sd1: sdhci@16100000 { + cell-index = <1>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x16100000 0x100000>; + interrupts = <0 38 0>; + clocks = <&car 109>, <&car 111>; + clock-names = "core", "iface"; + non-removable; + status = "disabled"; + bus-width = <8>; + }; + + usb0: usb@17060000 { + cell-index = <0>; + compatible = "sirf,atlas7-usb"; + reg = <0x17060000 0x200>; + interrupts = <0 10 0>; + clocks = <&car 113>; + sirf,usbphy = <&usbphy0>; + phy_type = "utmi"; + dr_mode = "otg"; + maximum-speed = "high-speed"; + status = "okay"; + }; + + usb1: usb@17070000 { + cell-index = <1>; + compatible = "sirf,atlas7-usb"; + reg = <0x17070000 0x200>; + interrupts = <0 11 0>; + clocks = <&car 114>; + sirf,usbphy = <&usbphy1>; + phy_type = "utmi"; + dr_mode = "host"; + maximum-speed = "high-speed"; + status = "okay"; + }; + + usbphy0: usbphy@0 { + compatible = "sirf,atlas7-usbphy"; + reg = <0x17060200 0x100>; + clocks = <&car 115>; + status = "okay"; + }; + + usbphy1: usbphy@1 { + compatible = "sirf,atlas7-usbphy"; + reg = <0x17070200 0x100>; + clocks = <&car 116>; + status = "okay"; + }; + + i2c0: i2c@17020000 { + cell-index = <0>; + compatible = "sirf,prima2-i2c"; + reg = <0x17020000 0x1000>; + interrupts = <0 24 0>; + clocks = <&car 105>; + #address-cells = <1>; + #size-cells = <0>; + }; + + }; + + vdifm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13290000 0x13290000 0x3000>, + <0x13300000 0x13300000 0x1000>, + <0x14200000 0x14200000 0x600000>; + + vdifm@13290000 { + compatible = "sirf,nocfw-vdifm"; + reg = <0x13290000 0x3000>; + }; + + gpio_1: gpio_vdifm@13300000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x13300000 0x1000>; + interrupts = <0 43 0>, <0 44 0>, <0 45 0>; + clocks = <&car 84>; + clock-names = "gpio1_io"; + gpio-controller; + interrupt-controller; + }; + + sd2: sdhci@14200000 { + cell-index = <2>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14200000 0x100000>; + interrupts = <0 23 0>; + clocks = <&car 70>, <&car 75>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + sd-uhs-sdr50; + vqmmc-supply = <&vqmmc>; + vqmmc: vqmmc@2 { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <1950000>; + regulator-name = "vqmmc-ldo"; + regulator-type = "voltage"; + regulator-boot-on; + regulator-allow-bypass; + }; + }; + + sd3: sdhci@14300000 { + cell-index = <3>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14300000 0x100000>; + interrupts = <0 23 0>; + clocks = <&car 76>, <&car 81>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + + sd5: sdhci@14500000 { + cell-index = <5>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14500000 0x100000>; + interrupts = <0 39 0>; + clocks = <&car 71>, <&car 76>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + loop-dma; + }; + + sd6: sdhci@14600000 { + cell-index = <6>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14600000 0x100000>; + interrupts = <0 98 0>; + clocks = <&car 72>, <&car 77>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + + sd7: sdhci@14700000 { + cell-index = <7>; + compatible = "sirf,atlas7-sdhc"; + reg = <0x14700000 0x100000>; + interrupts = <0 98 0>; + clocks = <&car 72>, <&car 77>; + clock-names = "core", "iface"; + status = "disabled"; + bus-width = <4>; + }; + }; + + audiom { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10d50000 0x10d50000 0x0000ffff>, + <0x10d60000 0x10d60000 0x0000ffff>, + <0x10d80000 0x10d80000 0x0000ffff>, + <0x10d90000 0x10d90000 0x0000ffff>, + <0x10ED0000 0x10ED0000 0x3000>, + <0x10dc8000 0x10dc8000 0x1000>, + <0x10dc0000 0x10dc0000 0x1000>, + <0x10db0000 0x10db0000 0x4000>, + <0x10d40000 0x10d40000 0x1000>, + <0x10d30000 0x10d30000 0x1000>; + + timer@10dc0000 { + compatible = "sirf,atlas7-tick"; + reg = <0x10dc0000 0x1000>; + interrupts = <0 0 0>, + <0 1 0>, + <0 2 0>, + <0 49 0>, + <0 50 0>, + <0 51 0>; + clocks = <&car 47>; + }; + + timerb@10dc8000 { + compatible = "sirf,atlas7-tick"; + reg = <0x10dc8000 0x1000>; + interrupts = <0 74 0>, + <0 75 0>, + <0 76 0>, + <0 77 0>, + <0 78 0>, + <0 79 0>; + clocks = <&car 47>; + }; + + vip0@10db0000 { + compatible = "sirf,atlas7-vip0"; + reg = <0x10db0000 0x2000>; + interrupts = <0 85 0>; + sirf,vip_cma_size = <0xC00000>; + }; + + cvd@10db2000 { + compatible = "sirf,cvd"; + reg = <0x10db2000 0x2000>; + clocks = <&car 46>; + }; + + dmac2: dma-controller@10d50000 { + cell-index = <2>; + compatible = "sirf,atlas7-dmac"; + reg = <0x10d50000 0xffff>; + interrupts = <0 55 0>; + clocks = <&car 60>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + dmac3: dma-controller@10d60000 { + cell-index = <3>; + compatible = "sirf,atlas7-dmac"; + reg = <0x10d60000 0xffff>; + interrupts = <0 56 0>; + clocks = <&car 61>; + dma-channels = <16>; + #dma-cells = <1>; + }; + + adc: adc@10d80000 { + compatible = "sirf,atlas7-adc"; + reg = <0x10d80000 0xffff>; + interrupts = <0 34 0>; + clocks = <&car 49>; + #io-channel-cells = <1>; + }; + + pulsec@10d90000 { + compatible = "sirf,prima2-pulsec"; + reg = <0x10d90000 0xffff>; + interrupts = <0 42 0>; + clocks = <&car 54>; + }; + + audiom@10ED0000 { + compatible = "sirf,nocfw-audiom"; + reg = <0x10ED0000 0x3000>; + interrupts = <0 102 0>; + }; + + usp1: usp@10d30000 { + cell-index = <1>; + reg = <0x10d30000 0x1000>; + fifosize = <512>; + clocks = <&car 58>; + dmas = <&dmac2 6>, <&dmac2 7>; + dma-names = "rx", "tx"; + }; + + usp2: usp@10d40000 { + cell-index = <2>; + reg = <0x10d40000 0x1000>; + interrupts = <0 22 0>; + clocks = <&car 59>; + dmas = <&dmac2 12>, <&dmac2 13>; + dma-names = "rx", "tx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + + ddrm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x10820000 0x10820000 0x3000>, + <0x10800000 0x10800000 0x2000>; + ddrm@10820000 { + compatible = "sirf,nocfw-ddrm"; + reg = <0x10820000 0x3000>; + interrupts = <0 105 0>; + }; + + memory-controller@0x10800000 { + compatible = "sirf,atlas7-memc"; + reg = <0x10800000 0x2000>; + }; + + }; + + btm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x11002000 0x11002000 0x0000ffff>, + <0x11010000 0x11010000 0x3000>, + <0x11000000 0x11000000 0x1000>, + <0x11001000 0x11001000 0x1000>; + + dmac4: dma-controller@11002000 { + cell-index = <4>; + compatible = "sirf,atlas7-dmac"; + reg = <0x11002000 0x1000>; + interrupts = <0 99 0>; + clocks = <&car 130>; + dma-channels = <16>; + #dma-cells = <1>; + }; + uart6: uart@11000000 { + cell-index = <6>; + compatible = "sirf,atlas7-bt-uart", + "sirf,atlas7-uart"; + reg = <0x11000000 0x1000>; + interrupts = <0 100 0>; + clocks = <&car 131>, <&car 133>, <&car 134>; + clock-names = "uart", "general", "noc"; + fifosize = <128>; + dmas = <&dmac4 12>, <&dmac4 13>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + usp3: usp@11001000 { + compatible = "sirf,atlas7-bt-usp", + "sirf,prima2-usp-pcm"; + cell-index = <3>; + reg = <0x11001000 0x1000>; + fifosize = <512>; + clocks = <&car 132>, <&car 129>, <&car 133>, + <&car 134>, <&car 135>; + clock-names = "usp3_io", "a7ca_btss", "a7ca_io", + "noc_btm_io", "thbtm_io"; + dmas = <&dmac4 0>, <&dmac4 1>; + dma-names = "rx", "tx"; + }; + + btm@11010000 { + compatible = "sirf,nocfw-btm"; + reg = <0x11010000 0x3000>; + }; + }; + + rtcm { + compatible = "arteris, flexnoc", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x18810000 0x18810000 0x3000>, + <0x18840000 0x18840000 0x1000>, + <0x18890000 0x18890000 0x1000>, + <0x188B0000 0x188B0000 0x10000>, + <0x188D0000 0x188D0000 0x1000>; + rtcm@18810000 { + compatible = "sirf,nocfw-rtcm"; + reg = <0x18810000 0x3000>; + interrupts = <0 109 0>; + }; + + gpio_2: gpio_rtcm@18890000 { + #gpio-cells = <2>; + #interrupt-cells = <2>; + compatible = "sirf,atlas7-gpio"; + reg = <0x18890000 0x1000>; + interrupts = <0 47 0>; + gpio-controller; + interrupt-controller; + }; + + rtc-iobg@18840000 { + compatible = "sirf,prima2-rtciobg", + "sirf-prima2-rtciobg-bus", + "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x18840000 0x1000>; + + sysrtc@2000 { + compatible = "sirf,prima2-sysrtc"; + reg = <0x2000 0x100>; + interrupts = <0 52 0>; + }; + pwrc@3000 { + compatible = "sirf,atlas7-pwrc"; + reg = <0x3000 0x100>; + }; + }; + + qspi: flash@188B0000 { + cell-index = <0>; + compatible = "sirf,atlas7-qspi-nor"; + reg = <0x188B0000 0x10000>; + interrupts = <0 15 0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + retain@0x188D0000 { + compatible = "sirf,atlas7-retain"; + reg = <0x188D0000 0x1000>; + }; + + }; + disp-iobg { + /* lcdc0 */ + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x13100000 0x13100000 0x20000>, + <0x10e10000 0x10e10000 0x10000>; + + lcd@13100000 { + compatible = "sirf,atlas7-lcdc"; + reg = <0x13100000 0x10000>; + interrupts = <0 30 0>; + clocks = <&car 79>; + }; + vpp@13110000 { + compatible = "sirf,atlas7-vpp"; + reg = <0x13110000 0x10000>; + interrupts = <0 31 0>; + clocks = <&car 78>; + resets = <&car 29>; + }; + lvds@10e10000 { + compatible = "sirf,atlas7-lvdsc"; + reg = <0x10e10000 0x10000>; + interrupts = <0 64 0>; + clocks = <&car 54>; + resets = <&car 29>; + }; + + }; + + graphics-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x12000000 0x12000000 0x1000000>; + + graphics@12000000 { + compatible = "powervr,sgx531"; + reg = <0x12000000 0x1000000>; + interrupts = <0 6 0>; + clocks = <&car 126>; + }; + }; + }; +}; -- cgit v1.2.3 From df73b7f84227fa821699477c7234c1abc39fc512 Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Sun, 28 Dec 2014 16:30:49 +0200 Subject: ARM: dts: cm-t3x: add NAND support CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to GPMC bus. Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for all three modules. NAND timings are calculated to be safe for CM-T3x devices as it works now in non DT boot (in this case the timings are updated by U-Boot). Update GPMC ranges in boards DT files to include all connected devices. Signed-off-by: Dmitry Lifshitz Acked-by: Igor Grinberg Acked-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-cm-t3x.dtsi | 58 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/omap3-cm-t3x30.dtsi | 3 +- arch/arm/boot/dts/omap3-sbc-t3517.dts | 4 +++ arch/arm/boot/dts/omap3-sbc-t3530.dts | 10 ++---- arch/arm/boot/dts/omap3-sbc-t3730.dts | 5 +-- 5 files changed, 70 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-cm-t3x.dtsi b/arch/arm/boot/dts/omap3-cm-t3x.dtsi index 6ea6d460db30..4d091ca43e25 100644 --- a/arch/arm/boot/dts/omap3-cm-t3x.dtsi +++ b/arch/arm/boot/dts/omap3-cm-t3x.dtsi @@ -259,3 +259,61 @@ pinctrl-names = "default"; pinctrl-0 = <&mcbsp2_pins>; }; + +&gpmc { + ranges = <0 0 0x00000000 0x01000000>; + + nand@0,0 { + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + nand-bus-width = <8>; + gpmc,device-width = <1>; + ti,nand-ecc-opt = "sw"; + + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <120>; + gpmc,cs-wr-off-ns = <120>; + + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <120>; + gpmc,adv-wr-off-ns = <120>; + + gpmc,we-on-ns = <6>; + gpmc,we-off-ns = <90>; + + gpmc,oe-on-ns = <6>; + gpmc,oe-off-ns = <90>; + + gpmc,page-burst-access-ns = <6>; + gpmc,access-ns = <72>; + gpmc,cycle2cycle-delay-ns = <60>; + + gpmc,rd-cycle-ns = <120>; + gpmc,wr-cycle-ns = <120>; + gpmc,wr-access-ns = <186>; + gpmc,wr-data-mux-bus-ns = <90>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "xloader"; + reg = <0 0x80000>; + }; + partition@0x80000 { + label = "uboot"; + reg = <0x80000 0x1e0000>; + }; + partition@0x260000 { + label = "uboot environment"; + reg = <0x260000 0x40000>; + }; + partition@0x2a0000 { + label = "linux"; + reg = <0x2a0000 0x400000>; + }; + partition@0x6a0000 { + label = "rootfs"; + reg = <0x6a0000 0x1f880000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi index 9a4a3ab9af78..d9e92b654f85 100644 --- a/arch/arm/boot/dts/omap3-cm-t3x30.dtsi +++ b/arch/arm/boot/dts/omap3-cm-t3x30.dtsi @@ -50,7 +50,8 @@ #include "omap-gpmc-smsc911x.dtsi" &gpmc { - ranges = <5 0 0x2c000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ smsc1: ethernet@gpmc { compatible = "smsc,lan9221", "smsc,lan9115"; diff --git a/arch/arm/boot/dts/omap3-sbc-t3517.dts b/arch/arm/boot/dts/omap3-sbc-t3517.dts index 17986536c61f..c2d5c28a1a70 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3517.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3517.dts @@ -69,3 +69,7 @@ }; }; +&gpmc { + ranges = <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ +}; diff --git a/arch/arm/boot/dts/omap3-sbc-t3530.dts b/arch/arm/boot/dts/omap3-sbc-t3530.dts index c994f0f7e38a..834bc786cd12 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3530.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3530.dts @@ -26,14 +26,10 @@ }; }; -/* - * The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and - * SB-T35 baseboard respectively. - * This setting includes both chips in SBC-T3530 board device tree. - */ &gpmc { - ranges = <5 0 0x2c000000 0x01000000>, - <4 0 0x2d000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ }; &mmc1 { diff --git a/arch/arm/boot/dts/omap3-sbc-t3730.dts b/arch/arm/boot/dts/omap3-sbc-t3730.dts index 5bdddf29341d..73c7bf4a4a08 100644 --- a/arch/arm/boot/dts/omap3-sbc-t3730.dts +++ b/arch/arm/boot/dts/omap3-sbc-t3730.dts @@ -27,8 +27,9 @@ }; &gpmc { - ranges = <5 0 0x2c000000 0x01000000>, - <4 0 0x2d000000 0x01000000>; + ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */ + <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */ + <0 0 0x00000000 0x01000000>; /* CM-T3x NAND */ }; &dss { -- cgit v1.2.3 From 7300bfff886a1340cfeb252035303e265cd556d9 Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Wed, 3 Dec 2014 22:33:22 +0100 Subject: ARM: dts: omap3-gta04: Add handling for tv output Add handling for gta04 tv out chain: venc -> opa362 -> svideo Use invert-polarity in venc node because opa362 is doing polarity inversion also. Signed-off-by: Marek Belisko Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 49 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 655d6e920a86..ee62d00bcbe6 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -83,6 +83,41 @@ compatible = "usb-nop-xceiv"; reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; }; + + tv0: connector@1 { + compatible = "svideo-connector"; + label = "tv"; + + port { + tv_connector_in: endpoint { + remote-endpoint = <&opa_out>; + }; + }; + }; + + tv_amp: opa362 { + compatible = "ti,opa362"; + enable-gpios = <&gpio1 23 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + opa_in: endpoint@0 { + remote-endpoint = <&venc_out>; + }; + }; + + port@1 { + reg = <1>; + opa_out: endpoint@0 { + remote-endpoint = <&tv_connector_in>; + }; + }; + }; + }; }; &omap3_pmx_core { @@ -396,6 +431,20 @@ }; }; +&venc { + status = "okay"; + + vdda-supply = <&vdac>; + + port { + venc_out: endpoint { + remote-endpoint = <&opa_in>; + ti,channels = <2>; + ti,invert-polarity; + }; + }; +}; + &gpmc { ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ -- cgit v1.2.3 From e5e5c6d14e39236485bdc706b918486511817678 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 15 Jan 2015 00:30:35 +0900 Subject: ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow The Exynos5250 Snow Chromebook has GPIO keys for power and lid so the SoC I/O pins have to be configured in external interrupt mode. Currently, this is working without setting the pinctrl lines but is better to set it explicitly instead of relying on the previous state of the I/O pins. The DTS snippets were taken from the downstream ChromeOS tree. Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-snow.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index effaf2af41bc..b9aeec430527 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -33,6 +33,8 @@ gpio-keys { compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&power_key_irq &lid_irq>; power { label = "Power"; @@ -540,6 +542,13 @@ }; &pinctrl_0 { + power_key_irq: power-key-irq { + samsung,pins = "gpx1-3"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + ec_irq: ec-irq { samsung,pins = "gpx1-6"; samsung,pin-function = <0>; @@ -575,6 +584,13 @@ samsung,pin-drv = <0>; }; + lid_irq: lid-irq { + samsung,pins = "gpx3-5"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + hdmi_hpd_irq: hdmi-hpd-irq { samsung,pins = "gpx3-7"; samsung,pin-function = <0>; -- cgit v1.2.3 From 1f3cde4bc5fd6405466dd47e5c12479e4724af24 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 15 Jan 2015 00:30:40 +0900 Subject: ARM: dts: Add lid GPIO key device node for Peach boards The Exynos5420 Peach Pit and Exynos5800 Peach Pi boards have both a power and lid GPIO keys but only the former was defined in the DTS. Add DTS snippets for the lid GPIO key too. These were taken from the downstream ChromeOS 3.8 kernel tree. Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420-peach-pit.dts | 18 +++++++++++++++++- arch/arm/boot/dts/exynos5800-peach-pi.dts | 19 ++++++++++++++++++- 2 files changed, 35 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index 9a050e19a4dc..fa74a731d720 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -53,7 +53,7 @@ compatible = "gpio-keys"; pinctrl-names = "default"; - pinctrl-0 = <&power_key_irq>; + pinctrl-0 = <&power_key_irq &lid_irq>; power { label = "Power"; @@ -61,6 +61,15 @@ linux,code = ; gpio-key,wakeup; }; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + gpio-key,wakeup; + }; }; memory { @@ -658,6 +667,13 @@ samsung,pin-drv = <0>; }; + lid_irq: lid-irq { + samsung,pins = "gpx3-4"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + hdmi_hpd_irq: hdmi-hpd-irq { samsung,pins = "gpx3-7"; samsung,pin-function = <0>; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index e8fdda827fc9..d603e733ad13 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -52,7 +52,7 @@ compatible = "gpio-keys"; pinctrl-names = "default"; - pinctrl-0 = <&power_key_irq>; + pinctrl-0 = <&power_key_irq &lid_irq>; power { label = "Power"; @@ -60,6 +60,16 @@ linux,code = ; gpio-key,wakeup; }; + + lid-switch { + label = "Lid"; + gpios = <&gpx3 4 GPIO_ACTIVE_LOW>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; memory { @@ -646,6 +656,13 @@ samsung,pin-drv = <0>; }; + lid_irq: lid-irq { + samsung,pins = "gpx3-4"; + samsung,pin-function = <0xf>; + samsung,pin-pud = <0>; + samsung,pin-drv = <0>; + }; + hdmi_hpd_irq: hdmi-hpd-irq { samsung,pins = "gpx3-7"; samsung,pin-function = <0>; -- cgit v1.2.3 From ae845476b2116f839550e49a7af133a2d246e657 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 15 Jan 2015 00:30:44 +0900 Subject: ARM: dts: Set Peach boards USB WebCam regulators to always on The Exynos5420 Peach Pit and Exynos5800 Peach Pi boards have a built-in Silicon Motion USB UVC WebCam whose power supply is the tps65090 fet5 regulator. Since the camera uses the generic USB Video Class driver and this does not grab a regulator, mark the regulator as always on so the USB device is enumerated and usable. Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420-peach-pit.dts | 1 + arch/arm/boot/dts/exynos5800-peach-pi.dts | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index fa74a731d720..a4c5152f6b6e 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -831,6 +831,7 @@ }; tps65090_fet5: fet5 { regulator-name = "camout"; + regulator-always-on; }; tps65090_fet6: fet6 { regulator-name = "lcd_vdd"; diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index d603e733ad13..136727696ebe 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -820,6 +820,7 @@ }; tps65090_fet5: fet5 { regulator-name = "camout"; + regulator-always-on; }; tps65090_fet6: fet6 { regulator-name = "lcd_vdd"; -- cgit v1.2.3 From 23c76dc666471dce5ce71b620839d2465723a7c9 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Thu, 15 Jan 2015 00:30:49 +0900 Subject: ARM: dts: Configure regulators for suspend on exynos Peach boards The regulator core now has support to choose if a regulator has to be enabled or disabled during system suspend and also supports changing the regulator operating mode during runtime and when the system enters into sleep mode. To lower power during suspend, configure the regulators state using the same configuration found in the ChromeOS 3.8 kernel Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420-peach-pit.dts | 81 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos5800-peach-pi.dts | 81 ++++++++++++++++++++++++++++++ 2 files changed, 162 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts index a4c5152f6b6e..c47bb70665c1 100644 --- a/arch/arm/boot/dts/exynos5420-peach-pit.dts +++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts @@ -13,6 +13,7 @@ #include #include #include +#include #include "exynos5420.dtsi" / { @@ -201,6 +202,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck2_reg: BUCK2 { @@ -210,6 +214,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck3_reg: BUCK3 { @@ -219,6 +226,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck4_reg: BUCK4 { @@ -228,6 +238,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck5_reg: BUCK5 { @@ -236,6 +249,9 @@ regulator-max-microvolt = <1200000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck6_reg: BUCK6 { @@ -245,6 +261,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck7_reg: BUCK7 { @@ -253,6 +272,9 @@ regulator-max-microvolt = <1350000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck8_reg: BUCK8 { @@ -261,6 +283,9 @@ regulator-max-microvolt = <2850000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck9_reg: BUCK9 { @@ -269,6 +294,9 @@ regulator-max-microvolt = <2000000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck10_reg: BUCK10 { @@ -277,6 +305,9 @@ regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo1_reg: LDO1 { @@ -284,6 +315,10 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo2_reg: LDO2 { @@ -297,6 +332,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; vqmmc_sdcard: ldo4_reg: LDO4 { @@ -304,6 +343,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo5_reg: LDO5 { @@ -311,6 +353,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo6_reg: LDO6 { @@ -318,6 +363,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo7_reg: LDO7 { @@ -331,6 +379,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo9_reg: LDO9 { @@ -338,6 +389,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo10_reg: LDO10 { @@ -345,6 +400,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo11_reg: LDO11 { @@ -352,6 +410,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo12_reg: LDO12 { @@ -359,6 +421,9 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo13_reg: LDO13 { @@ -366,6 +431,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo14_reg: LDO14 { @@ -373,6 +442,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo15_reg: LDO15 { @@ -380,6 +452,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo17_reg: LDO17 { @@ -387,6 +462,9 @@ regulator-min-microvolt = <900000>; regulator-max-microvolt = <1400000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo18_reg: LDO18 { @@ -460,6 +538,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo32_reg: LDO32 { diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts index 136727696ebe..06737c60d333 100644 --- a/arch/arm/boot/dts/exynos5800-peach-pi.dts +++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts @@ -13,6 +13,7 @@ #include #include #include +#include #include "exynos5800.dtsi" / { @@ -201,6 +202,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck2_reg: BUCK2 { @@ -210,6 +214,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck3_reg: BUCK3 { @@ -219,6 +226,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck4_reg: BUCK4 { @@ -228,6 +238,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck5_reg: BUCK5 { @@ -236,6 +249,9 @@ regulator-max-microvolt = <1200000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck6_reg: BUCK6 { @@ -245,6 +261,9 @@ regulator-always-on; regulator-boot-on; regulator-ramp-delay = <12500>; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck7_reg: BUCK7 { @@ -253,6 +272,9 @@ regulator-max-microvolt = <1350000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck8_reg: BUCK8 { @@ -261,6 +283,9 @@ regulator-max-microvolt = <2850000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck9_reg: BUCK9 { @@ -269,6 +294,9 @@ regulator-max-microvolt = <2000000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck10_reg: BUCK10 { @@ -277,6 +305,9 @@ regulator-max-microvolt = <1800000>; regulator-always-on; regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo1_reg: LDO1 { @@ -284,6 +315,10 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo2_reg: LDO2 { @@ -297,6 +332,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; vqmmc_sdcard: ldo4_reg: LDO4 { @@ -304,6 +343,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <2800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo5_reg: LDO5 { @@ -311,6 +353,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo6_reg: LDO6 { @@ -318,6 +363,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo7_reg: LDO7 { @@ -331,6 +379,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo9_reg: LDO9 { @@ -338,6 +389,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo10_reg: LDO10 { @@ -345,6 +400,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo11_reg: LDO11 { @@ -352,6 +410,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo12_reg: LDO12 { @@ -359,6 +421,9 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo13_reg: LDO13 { @@ -366,6 +431,10 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-mode = ; + }; }; ldo14_reg: LDO14 { @@ -373,6 +442,9 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo15_reg: LDO15 { @@ -380,6 +452,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo17_reg: LDO17 { @@ -387,6 +462,9 @@ regulator-min-microvolt = <900000>; regulator-max-microvolt = <1400000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo18_reg: LDO18 { @@ -460,6 +538,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo32_reg: LDO32 { -- cgit v1.2.3 From 35dd549cb300e346e2f2ec1f12dd9cd245b3276b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 14 Jan 2015 12:13:00 +0100 Subject: ARM: shmobile: r8a73a4 dtsi: Add memory-controller nodes Add device nodes for the two DDR Bus State Controllers (DBSC). The DBSCs are located in the A3BC PM domain, which must not be powered down, else the system will crash. A reference to the A3BC PM domain will be added later. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a73a4.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi index 5ac57babc3b9..38136d9f6d95 100644 --- a/arch/arm/boot/dts/r8a73a4.dtsi +++ b/arch/arm/boot/dts/r8a73a4.dtsi @@ -38,6 +38,16 @@ <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; + dbsc1: memory-controller@e6790000 { + compatible = "renesas,dbsc-r8a73a4"; + reg = <0 0xe6790000 0 0x10000>; + }; + + dbsc2: memory-controller@e67a0000 { + compatible = "renesas,dbsc-r8a73a4"; + reg = <0 0xe67a0000 0 0x10000>; + }; + dmac: dma-multiplexer { compatible = "renesas,shdma-mux"; #dma-cells = <1>; -- cgit v1.2.3 From f4c6d004eac803cf90452c94ec5f3210c2d44c01 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 14 Jan 2015 12:13:01 +0100 Subject: ARM: shmobile: r8a7740 dtsi: Add memory-controller node Add a device node for the DDR3 Bus State Controller (DBSC3). The DBSC3 is located in the A4S PM domain, which must not be powered down, else the system will crash. This has no visible effect for now, as A4S was never turned off anyway because its child PM domain A3SM contains the CPU core. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7740.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi index 52f2cf4b84d3..8a092605d641 100644 --- a/arch/arm/boot/dts/r8a7740.dtsi +++ b/arch/arm/boot/dts/r8a7740.dtsi @@ -37,6 +37,12 @@ <0xc2000000 0x1000>; }; + dbsc3: memory-controller@fe400000 { + compatible = "renesas,dbsc3-r8a7740"; + reg = <0xfe400000 0x400>; + power-domains = <&pd_a4s>; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; -- cgit v1.2.3 From 29828c87560dbdb567e759e4e6bb4ad0febfcf21 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 14 Jan 2015 12:13:02 +0100 Subject: ARM: shmobile: sh73a0 dtsi: Add memory-controller nodes Add device nodes for the two SDRAM Bus State Controllers. The SBSCs are located in the A4BC0 resp. A4BC1 PM domains, which must not be powered down, else the system will crash. References to the A4BC0 and A4BC1 PM domains will be added later. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/boot/dts/sh73a0.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index d4cfb0662643..37c8a761aeab 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -42,6 +42,22 @@ <0xf0000100 0x100>; }; + sbsc2: memory-controller@fb400000 { + compatible = "renesas,sbsc-sh73a0"; + reg = <0xfb400000 0x400>; + interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>, + <0 38 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "sec", "temp"; + }; + + sbsc1: memory-controller@fe400000 { + compatible = "renesas,sbsc-sh73a0"; + reg = <0xfe400000 0x400>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>, + <0 36 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "sec", "temp"; + }; + pmu { compatible = "arm,cortex-a9-pmu"; interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>, -- cgit v1.2.3 From a01a35e03ede38db0fcc8c09d0cfc39bc5d37b7d Mon Sep 17 00:00:00 2001 From: Gabriel FERNANDEZ Date: Wed, 14 Jan 2015 16:47:00 +0100 Subject: ARM: DT: STiH407: Add DRM dt nodes This patch adds the DRM/KMS dt nodes. This node can't be in stih407-family.dtsi file because in the future we will integrate a new stih418-b2199 board. It's a stih407 family board with different drm/kms dt nodes. That is why i created the stih407.dtsi file. Signed-off-by: Gabriel Fernandez Acked-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih407-b2120.dts | 3 +- arch/arm/boot/dts/stih407.dtsi | 151 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stihxxx-b2120.dtsi | 2 +- 3 files changed, 153 insertions(+), 3 deletions(-) create mode 100644 arch/arm/boot/dts/stih407.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts index 261d5e2c48d2..af487145cd89 100644 --- a/arch/arm/boot/dts/stih407-b2120.dts +++ b/arch/arm/boot/dts/stih407-b2120.dts @@ -7,9 +7,8 @@ * published by the Free Software Foundation. */ /dts-v1/; -#include "stih407-clock.dtsi" -#include "stih407-family.dtsi" #include "stihxxx-b2120.dtsi" +#include "stih407.dtsi" / { model = "STiH407 B2120"; compatible = "st,stih407-b2120", "st,stih407"; diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi new file mode 100644 index 000000000000..3efa3b2ebe90 --- /dev/null +++ b/arch/arm/boot/dts/stih407.dtsi @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2015 STMicroelectronics Limited. + * Author: Gabriel Fernandez + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih407-clock.dtsi" +#include "stih407-family.dtsi" +/ { + soc { + /* Display */ + vtg_main: sti-vtg-main@8d02800 { + compatible = "st,vtg"; + reg = <0x8d02800 0x200>; + interrupts = ; + }; + + vtg_aux: sti-vtg-aux@8d00200 { + compatible = "st,vtg"; + reg = <0x8d00200 0x100>; + interrupts = ; + }; + + sti-display-subsystem { + compatible = "st,sti-display-subsystem"; + #address-cells = <1>; + #size-cells = <1>; + + assigned-clocks = <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, + <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, + <&clk_s_d2_flexgen CLK_PIX_GDP1>, + <&clk_s_d2_flexgen CLK_PIX_GDP2>, + <&clk_s_d2_flexgen CLK_PIX_GDP3>, + <&clk_s_d2_flexgen CLK_PIX_GDP4>; + + assigned-clock-parents = <0>, + <0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>; + + assigned-clock-rates = <297000000>, <297000000>; + + ranges; + + sti-compositor@9d11000 { + compatible = "st,stih407-compositor"; + reg = <0x9d11000 0x1000>; + + clock-names = "compo_main", + "compo_aux", + "pix_main", + "pix_aux", + "pix_gdp1", + "pix_gdp2", + "pix_gdp3", + "pix_gdp4", + "main_parent", + "aux_parent"; + + clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>, + <&clk_s_c0_flexgen CLK_COMPO_DVP>, + <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, + <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, + <&clk_s_d2_flexgen CLK_PIX_GDP1>, + <&clk_s_d2_flexgen CLK_PIX_GDP2>, + <&clk_s_d2_flexgen CLK_PIX_GDP3>, + <&clk_s_d2_flexgen CLK_PIX_GDP4>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + + reset-names = "compo-main", "compo-aux"; + resets = <&softreset STIH407_COMPO_SOFTRESET>, + <&softreset STIH407_COMPO_SOFTRESET>; + st,vtg = <&vtg_main>, <&vtg_aux>; + }; + + sti-tvout@8d08000 { + compatible = "st,stih407-tvout"; + reg = <0x8d08000 0x1000>; + reg-names = "tvout-reg"; + reset-names = "tvout"; + resets = <&softreset STIH407_HDTVOUT_SOFTRESET>; + #address-cells = <1>; + #size-cells = <1>; + assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, + <&clk_s_d2_flexgen CLK_TMDS_HDMI>, + <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, + <&clk_s_d0_flexgen CLK_PCM_0>, + <&clk_s_d2_flexgen CLK_PIX_HDDAC>, + <&clk_s_d2_flexgen CLK_HDDAC>; + + assigned-clock-parents = <&clk_s_d2_quadfs 0>, + <&clk_tmdsout_hdmi>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d0_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>; + ranges; + + sti-hdmi@8d04000 { + compatible = "st,stih407-hdmi"; + reg = <0x8d04000 0x1000>; + reg-names = "hdmi-reg"; + interrupts = ; + interrupt-names = "irq"; + clock-names = "pix", + "tmds", + "phy", + "audio", + "main_parent", + "aux_parent"; + + clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, + <&clk_s_d2_flexgen CLK_TMDS_HDMI>, + <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, + <&clk_s_d0_flexgen CLK_PCM_0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + + hdmi,hpd-gpio = <&pio5 3>; + reset-names = "hdmi"; + resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; + ddc = <&hdmiddc>; + + }; + + sti-hda@8d02000 { + compatible = "st,stih407-hda"; + reg = <0x8d02000 0x400>, <0x92b0120 0x4>; + reg-names = "hda-reg", "video-dacs-ctrl"; + clock-names = "pix", + "hddac", + "main_parent", + "aux_parent"; + clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, + <&clk_s_d2_flexgen CLK_HDDAC>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi index 0074bd49797c..0bc8c17aa81f 100644 --- a/arch/arm/boot/dts/stihxxx-b2120.dtsi +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi @@ -48,7 +48,7 @@ }; /* SSC11 to HDMI */ - i2c@9541000 { + hdmiddc: i2c@9541000 { status = "okay"; /* HDMI V1.3a supports Standard mode only */ clock-frequency = <100000>; -- cgit v1.2.3 From 956b42d1998a77ad5168b9476fa86e831fd17ac3 Mon Sep 17 00:00:00 2001 From: Gabriel FERNANDEZ Date: Wed, 14 Jan 2015 16:47:00 +0100 Subject: ARM: DT: STiH410: Add DRM dt nodes This patch adds the DRM/KMS dt nodes. Signed-off-by: Benjamin Gaignard Signed-off-by: Gabriel Fernandez Acked-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih410.dtsi | 138 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 138 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/stih410.dtsi b/arch/arm/boot/dts/stih410.dtsi index 37995f4739d2..208b5e89036a 100644 --- a/arch/arm/boot/dts/stih410.dtsi +++ b/arch/arm/boot/dts/stih410.dtsi @@ -80,5 +80,143 @@ phys = <&usb2_picophy2>; phy-names = "usb"; }; + + /* Display */ + vtg_main: sti-vtg-main@8d02800 { + compatible = "st,vtg"; + reg = <0x8d02800 0x200>; + interrupts = ; + }; + + vtg_aux: sti-vtg-aux@8d00200 { + compatible = "st,vtg"; + reg = <0x8d00200 0x100>; + interrupts = ; + }; + + sti-display-subsystem { + compatible = "st,sti-display-subsystem"; + #address-cells = <1>; + #size-cells = <1>; + + assigned-clocks = <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, + <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, + <&clk_s_d2_flexgen CLK_PIX_GDP1>, + <&clk_s_d2_flexgen CLK_PIX_GDP2>, + <&clk_s_d2_flexgen CLK_PIX_GDP3>, + <&clk_s_d2_flexgen CLK_PIX_GDP4>; + + assigned-clock-parents = <0>, + <0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>; + + assigned-clock-rates = <297000000>, <297000000>; + + ranges; + + sti-compositor@9d11000 { + compatible = "st,stih407-compositor"; + reg = <0x9d11000 0x1000>; + + clock-names = "compo_main", + "compo_aux", + "pix_main", + "pix_aux", + "pix_gdp1", + "pix_gdp2", + "pix_gdp3", + "pix_gdp4", + "main_parent", + "aux_parent"; + + clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>, + <&clk_s_c0_flexgen CLK_COMPO_DVP>, + <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>, + <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>, + <&clk_s_d2_flexgen CLK_PIX_GDP1>, + <&clk_s_d2_flexgen CLK_PIX_GDP2>, + <&clk_s_d2_flexgen CLK_PIX_GDP3>, + <&clk_s_d2_flexgen CLK_PIX_GDP4>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + + reset-names = "compo-main", "compo-aux"; + resets = <&softreset STIH407_COMPO_SOFTRESET>, + <&softreset STIH407_COMPO_SOFTRESET>; + st,vtg = <&vtg_main>, <&vtg_aux>; + }; + + sti-tvout@8d08000 { + compatible = "st,stih407-tvout"; + reg = <0x8d08000 0x1000>; + reg-names = "tvout-reg"; + reset-names = "tvout"; + resets = <&softreset STIH407_HDTVOUT_SOFTRESET>; + #address-cells = <1>; + #size-cells = <1>; + assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, + <&clk_s_d2_flexgen CLK_TMDS_HDMI>, + <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, + <&clk_s_d0_flexgen CLK_PCM_0>, + <&clk_s_d2_flexgen CLK_PIX_HDDAC>, + <&clk_s_d2_flexgen CLK_HDDAC>; + + assigned-clock-parents = <&clk_s_d2_quadfs 0>, + <&clk_tmdsout_hdmi>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d0_quadfs 0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 0>; + ranges; + + sti-hdmi@8d04000 { + compatible = "st,stih407-hdmi"; + reg = <0x8d04000 0x1000>; + reg-names = "hdmi-reg"; + interrupts = ; + interrupt-names = "irq"; + clock-names = "pix", + "tmds", + "phy", + "audio", + "main_parent", + "aux_parent"; + + clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, + <&clk_s_d2_flexgen CLK_TMDS_HDMI>, + <&clk_s_d2_flexgen CLK_REF_HDMIPHY>, + <&clk_s_d0_flexgen CLK_PCM_0>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + + hdmi,hpd-gpio = <&pio5 3>; + reset-names = "hdmi"; + resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; + ddc = <&hdmiddc>; + + }; + + sti-hda@8d02000 { + compatible = "st,stih407-hda"; + reg = <0x8d02000 0x400>, <0x92b0120 0x4>; + reg-names = "hda-reg", "video-dacs-ctrl"; + clock-names = "pix", + "hddac", + "main_parent", + "aux_parent"; + clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, + <&clk_s_d2_flexgen CLK_HDDAC>, + <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>; + }; + }; + }; }; }; -- cgit v1.2.3 From 63f3171d5e5c6f826f8be4dcfa943212cb119eaf Mon Sep 17 00:00:00 2001 From: Maxime COQUELIN Date: Fri, 9 Jan 2015 16:11:00 +0100 Subject: ARM: dts: Add STiH418 SoC support The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and quad-core ARM Cortex A9 CPU. Reviewed-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih418-clock.dtsi | 348 +++++++++++++++++++++++++++++++ arch/arm/boot/dts/stih418.dtsi | 99 +++++++++ include/dt-bindings/clock/stih418-clks.h | 34 +++ 3 files changed, 481 insertions(+) create mode 100644 arch/arm/boot/dts/stih418-clock.dtsi create mode 100644 arch/arm/boot/dts/stih418.dtsi create mode 100644 include/dt-bindings/clock/stih418-clks.h (limited to 'arch') diff --git a/arch/arm/boot/dts/stih418-clock.dtsi b/arch/arm/boot/dts/stih418-clock.dtsi new file mode 100644 index 000000000000..0ab23daa2829 --- /dev/null +++ b/arch/arm/boot/dts/stih418-clock.dtsi @@ -0,0 +1,348 @@ +/* + * Copyright (C) 2015 STMicroelectronics R&D Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +/ { + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + compatible = "st,stih418-clk", "simple-bus"; + + /* + * Fixed 30MHz oscillator inputs to SoC + */ + clk_sysin: clk-sysin { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <30000000>; + clock-output-names = "CLK_SYSIN"; + }; + + /* + * ARM Peripheral clock for timers + */ + arm_periph_clk: clk-m-a9-periphs { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&clk_m_a9>; + clock-div = <2>; + clock-mult = <1>; + }; + + /* + * A9 PLL. + */ + clockgen-a9@92b0000 { + compatible = "st,clkgen-c32"; + reg = <0x92b0000 0xffff>; + + clockgen_a9_pll: clockgen-a9-pll { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clockgen-a9-pll-odf"; + }; + }; + + /* + * ARM CPU related clocks. + */ + clk_m_a9: clk-m-a9@92b0000 { + #clock-cells = <0>; + compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux"; + reg = <0x92b0000 0x10000>; + + clocks = <&clockgen_a9_pll 0>, + <&clockgen_a9_pll 0>, + <&clk_s_c0_flexgen 13>, + <&clk_m_a9_ext2f_div2>; + }; + + /* + * ARM Peripheral clock for timers + */ + clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + + clocks = <&clk_s_c0_flexgen 13>; + + clock-output-names = "clk-m-a9-ext2f-div2"; + + clock-div = <2>; + clock-mult = <1>; + }; + + /* + * Bootloader initialized system infrastructure clock for + * serial devices. + */ + clk_ext2f_a9: clockgen-c0@13 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "clk-s-icn-reg-0"; + }; + + clockgen-a@090ff000 { + compatible = "st,clkgen-c32"; + reg = <0x90ff000 0x1000>; + + clk_s_a0_pll: clk-s-a0-pll { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-a0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-a0-pll-ofd-0"; + }; + + clk_s_a0_flexgen: clk-s-a0-flexgen { + compatible = "st,flexgen"; + + #clock-cells = <1>; + + clocks = <&clk_s_a0_pll 0>, + <&clk_sysin>; + + clock-output-names = "clk-ic-lmi0", + "clk-ic-lmi1"; + }; + }; + + clk_s_c0_quadfs: clk-s-c0-quadfs@9103000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-C", "st,quadfs"; + reg = <0x9103000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-fs0-ch0", + "clk-s-c0-fs0-ch1", + "clk-s-c0-fs0-ch2", + "clk-s-c0-fs0-ch3"; + }; + + clk_s_c0: clockgen-c@09103000 { + compatible = "st,clkgen-c32"; + reg = <0x9103000 0x1000>; + + clk_s_c0_pll0: clk-s-c0-pll0 { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-c0_0", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-pll0-odf-0"; + }; + + clk_s_c0_pll1: clk-s-c0-pll1 { + #clock-cells = <1>; + compatible = "st,stih407-plls-c32-c0_1", "st,clkgen-plls-c32"; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-c0-pll1-odf-0"; + }; + + clk_s_c0_flexgen: clk-s-c0-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_c0_pll0 0>, + <&clk_s_c0_pll1 0>, + <&clk_s_c0_quadfs 0>, + <&clk_s_c0_quadfs 1>, + <&clk_s_c0_quadfs 2>, + <&clk_s_c0_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-icn-gpu", + "clk-fdma", + "clk-nand", + "clk-hva", + "clk-proc-stfe", + "clk-tp", + "clk-rx-icn-dmu", + "clk-rx-icn-hva", + "clk-icn-cpu", + "clk-tx-icn-dmu", + "clk-mmc-0", + "clk-mmc-1", + "clk-jpegdec", + "clk-icn-reg", + "clk-proc-bdisp-0", + "clk-proc-bdisp-1", + "clk-pp-dmu", + "clk-vid-dmu", + "clk-dss-lpc", + "clk-st231-aud-0", + "clk-st231-gp-1", + "clk-st231-dmu", + "clk-icn-lmi", + "clk-tx-icn-1", + "clk-icn-sbc", + "clk-stfe-frc2", + "clk-eth-phyref", + "clk-eth-ref-phyclk", + "clk-flash-promip", + "clk-main-disp", + "clk-aux-disp", + "clk-compo-dvp", + "clk-tx-icn-hades", + "clk-rx-icn-hades", + "clk-icn-reg-16", + "clk-pp-hevc", + "clk-clust-hevc", + "clk-hwpe-hevc", + "clk-fc-hevc", + "clk-proc-mixer", + "clk-proc-sc", + "clk-avsp-hevc"; + }; + }; + + clk_s_d0_quadfs: clk-s-d0-quadfs@9104000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9104000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d0-fs0-ch0", + "clk-s-d0-fs0-ch1", + "clk-s-d0-fs0-ch2", + "clk-s-d0-fs0-ch3"; + }; + + clockgen-d0@09104000 { + compatible = "st,clkgen-c32"; + reg = <0x9104000 0x1000>; + + clk_s_d0_flexgen: clk-s-d0-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d0_quadfs 0>, + <&clk_s_d0_quadfs 1>, + <&clk_s_d0_quadfs 2>, + <&clk_s_d0_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-pcm-0", + "clk-pcm-1", + "clk-pcm-2", + "clk-spdiff", + "clk-pcmr10-master", + "clk-usb2-phy"; + }; + }; + + clk_s_d2_quadfs: clk-s-d2-quadfs@9106000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9106000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d2-fs0-ch0", + "clk-s-d2-fs0-ch1", + "clk-s-d2-fs0-ch2", + "clk-s-d2-fs0-ch3"; + }; + + clk_tmdsout_hdmi: clk-tmdsout-hdmi { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; + + clockgen-d2@x9106000 { + compatible = "st,clkgen-c32"; + reg = <0x9106000 0x1000>; + + clk_s_d2_flexgen: clk-s-d2-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d2_quadfs 0>, + <&clk_s_d2_quadfs 1>, + <&clk_s_d2_quadfs 2>, + <&clk_s_d2_quadfs 3>, + <&clk_sysin>, + <&clk_sysin>, + <&clk_tmdsout_hdmi>; + + clock-output-names = "clk-pix-main-disp", + "", + "", + "", + "", + "clk-tmds-hdmi-div2", + "clk-pix-aux-disp", + "clk-denc", + "clk-pix-hddac", + "clk-hddac", + "clk-sddac", + "clk-pix-dvo", + "clk-dvo", + "clk-pix-hdmi", + "clk-tmds-hdmi", + "clk-ref-hdmiphy", + "", "", "", "", "", + "", "", "", "", "", + "", "", "", "", "", + "", "", "", "", "", + "", "", "", "", "", + "", "", "", "", "", + "", "clk-vp9"; + }; + }; + + clk_s_d3_quadfs: clk-s-d3-quadfs@9107000 { + #clock-cells = <1>; + compatible = "st,stih407-quadfs660-D", "st,quadfs"; + reg = <0x9107000 0x1000>; + + clocks = <&clk_sysin>; + + clock-output-names = "clk-s-d3-fs0-ch0", + "clk-s-d3-fs0-ch1", + "clk-s-d3-fs0-ch2", + "clk-s-d3-fs0-ch3"; + }; + + clockgen-d3@9107000 { + compatible = "st,clkgen-c32"; + reg = <0x9107000 0x1000>; + + clk_s_d3_flexgen: clk-s-d3-flexgen { + #clock-cells = <1>; + compatible = "st,flexgen"; + + clocks = <&clk_s_d3_quadfs 0>, + <&clk_s_d3_quadfs 1>, + <&clk_s_d3_quadfs 2>, + <&clk_s_d3_quadfs 3>, + <&clk_sysin>; + + clock-output-names = "clk-stfe-frc1", + "clk-tsout-0", + "clk-tsout-1", + "clk-mchi", + "clk-vsens-compo", + "clk-frc1-remote", + "clk-lpc-0", + "clk-lpc-1"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/stih418.dtsi b/arch/arm/boot/dts/stih418.dtsi new file mode 100644 index 000000000000..354d90f521b6 --- /dev/null +++ b/arch/arm/boot/dts/stih418.dtsi @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2014 STMicroelectronics Limited. + * Author: Peter Griffin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * publishhed by the Free Software Foundation. + */ +#include "stih418-clock.dtsi" +#include "stih407-family.dtsi" +#include "stih410-pinctrl.dtsi" +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <3>; + }; + }; + + soc { + usb2_picophy1: phy2 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xf8 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY0_RESET>; + reset-names = "global", "port"; + }; + + usb2_picophy2: phy3 { + compatible = "st,stih407-usb2-phy"; + #phy-cells = <0>; + st,syscfg = <&syscfg_core 0xfc 0xf4>; + resets = <&softreset STIH407_PICOPHY_SOFTRESET>, + <&picophyreset STIH407_PICOPHY1_RESET>; + reset-names = "global", "port"; + }; + + ohci0: usb@9a03c00 { + compatible = "st,st-ohci-300x"; + reg = <0x9a03c00 0x100>; + interrupts = ; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, + <&softreset STIH407_USB2_PORT0_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy1>; + phy-names = "usb"; + }; + + ehci0: usb@9a03e00 { + compatible = "st,st-ehci-300x"; + reg = <0x9a03e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT0_POWERDOWN>, + <&softreset STIH407_USB2_PORT0_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy1>; + phy-names = "usb"; + }; + + ohci1: usb@9a83c00 { + compatible = "st,st-ohci-300x"; + reg = <0x9a83c00 0x100>; + interrupts = ; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, + <&softreset STIH407_USB2_PORT1_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy2>; + phy-names = "usb"; + }; + + ehci1: usb@9a83e00 { + compatible = "st,st-ehci-300x"; + reg = <0x9a83e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + clocks = <&clk_s_c0_flexgen CLK_TX_ICN_DISP_0>; + resets = <&powerdown STIH407_USB2_PORT1_POWERDOWN>, + <&softreset STIH407_USB2_PORT1_SOFTRESET>; + reset-names = "power", "softreset"; + phys = <&usb2_picophy2>; + phy-names = "usb"; + }; + }; +}; diff --git a/include/dt-bindings/clock/stih418-clks.h b/include/dt-bindings/clock/stih418-clks.h new file mode 100644 index 000000000000..b62aa0b20217 --- /dev/null +++ b/include/dt-bindings/clock/stih418-clks.h @@ -0,0 +1,34 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH418 SoC. + */ +#ifndef _DT_BINDINGS_CLK_STIH418 +#define _DT_BINDINGS_CLK_STIH418 + +#include "stih410-clks.h" + +/* STiH418 introduces new clock outputs compared to STiH410 */ + +/* CLOCKGEN C0 */ +#define CLK_PROC_BDISP_0 14 +#define CLK_PROC_BDISP_1 15 +#define CLK_TX_ICN_1 23 +#define CLK_ETH_PHYREF 27 +#define CLK_PP_HEVC 35 +#define CLK_CLUST_HEVC 36 +#define CLK_HWPE_HEVC 37 +#define CLK_FC_HEVC 38 +#define CLK_PROC_MIXER 39 +#define CLK_PROC_SC 40 +#define CLK_AVSP_HEVC 41 + +/* CLOCKGEN D2 */ +#undef CLK_PIX_PIP +#undef CLK_PIX_GDP1 +#undef CLK_PIX_GDP2 +#undef CLK_PIX_GDP3 +#undef CLK_PIX_GDP4 + +#define CLK_TMDS_HDMI_DIV2 5 +#define CLK_VP9 47 +#endif -- cgit v1.2.3 From 3fba7036c53e2c24c7505b7869dc77464fdd7d9e Mon Sep 17 00:00:00 2001 From: Maxime COQUELIN Date: Fri, 9 Jan 2015 16:11:00 +0100 Subject: ARM: dts: STiH418: Add B2199 board support B2199 HDK is the reference board for STiH418 SoC. It has the following characteristics: - 3GB DDR3 - 8GB eMMC / SD-Card slot - 32MB NOR Flash - 1 x Gbit Ethernet - 1 x USB3.0 port - 2 x USB2.0 ports - 1 x Sata or Mini-PCIe port - 1 x WiFi 802.11ac (Quantenna) - 1 x HDMI out - 1 x HDMI in - 1 x SPDIF Reviewed-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/stih418-b2199.dts | 78 +++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/stih418-b2199.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..cb37b5efce06 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -441,7 +441,8 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ stih415-b2020.dtb \ stih416-b2000.dtb \ stih416-b2020.dtb \ - stih416-b2020e.dtb + stih416-b2020e.dtb \ + stih418-b2199.dtb dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-a1000.dtb \ sun4i-a10-ba10-tvbox.dtb \ diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts new file mode 100644 index 000000000000..926235c08e4d --- /dev/null +++ b/arch/arm/boot/dts/stih418-b2199.dts @@ -0,0 +1,78 @@ +/* + * Copyright (C) 2015 STMicroelectronics (R&D) Limited. + * Author: Maxime Coquelin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +#include "stih418.dtsi" +/ { + model = "STiH418 B2199"; + compatible = "st,stih418-b2199", "st,stih418"; + + chosen { + bootargs = "console=ttyAS0,115200 clk_ignore_unused"; + linux,stdout-path = &sbc_serial0; + }; + + memory { + device_type = "memory"; + reg = <0x40000000 0xc0000000>; + }; + + aliases { + ttyAS0 = &sbc_serial0; + }; + + soc { + sbc_serial0: serial@9530000 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + red { + #gpio-cells = <2>; + label = "Front Panel LED"; + gpios = <&pio4 1 0>; + linux,default-trigger = "heartbeat"; + }; + green { + #gpio-cells = <2>; + gpios = <&pio1 3 0>; + default-state = "off"; + }; + }; + + i2c@9842000 { + status = "okay"; + }; + + i2c@9843000 { + status = "okay"; + }; + + i2c@9844000 { + status = "okay"; + }; + + i2c@9845000 { + status = "okay"; + }; + + i2c@9540000 { + status = "okay"; + }; + + /* SSC11 to HDMI */ + i2c@9541000 { + status = "okay"; + /* HDMI V1.3a supports Standard mode only */ + clock-frequency = <100000>; + st,i2c-min-scl-pulse-width-us = <0>; + st,i2c-min-sda-pulse-width-us = <5>; + }; + }; +}; -- cgit v1.2.3 From b26373c0da982f8a29406f10db39e287c1f0696b Mon Sep 17 00:00:00 2001 From: Gabriel FERNANDEZ Date: Wed, 14 Jan 2015 10:54:00 +0100 Subject: ARM: DT: STi: STiH407: Add DT node for MiPHY28lp The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or USB3 devices. The two first ports can be use for either; both SATA, both PCIe or one of each in any configuration. The Third port is only for USB3. Signed-off-by: Gabriel Fernandez Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih407-family.dtsi | 53 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/stihxxx-b2120.dtsi | 11 ++++++++ 2 files changed, 64 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index d4a8f843cdc8..c06a54681912 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -283,5 +283,58 @@ <&picophyreset STIH407_PICOPHY0_RESET>; reset-names = "global", "port"; }; + + miphy28lp_phy: miphy28lp@9b22000 { + compatible = "st,miphy28lp-phy"; + st,syscfg = <&syscfg_core>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + phy_port0: port@9b22000 { + reg = <0x9b22000 0xff>, + <0x9b09000 0xff>, + <0x9b04000 0xff>; + reg-names = "sata-up", + "pcie-up", + "pipew"; + + st,syscfg = <0x114 0x818 0xe0 0xec>; + #phy-cells = <1>; + + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY0_SOFTRESET>; + }; + + phy_port1: port@9b2a000 { + reg = <0x9b2a000 0xff>, + <0x9b19000 0xff>, + <0x9b14000 0xff>; + reg-names = "sata-up", + "pcie-up", + "pipew"; + + st,syscfg = <0x118 0x81c 0xe4 0xf0>; + + #phy-cells = <1>; + + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY1_SOFTRESET>; + }; + + phy_port2: port@8f95000 { + reg = <0x8f95000 0xff>, + <0x8f90000 0xff>; + reg-names = "pipew", + "usb3-up"; + + st,syscfg = <0x11c 0x820>; + + #phy-cells = <1>; + + reset-names = "miphy-sw-rst"; + resets = <&softreset STIH407_MIPHY2_SOFTRESET>; + }; + }; }; }; diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi index 0bc8c17aa81f..c1d859092be7 100644 --- a/arch/arm/boot/dts/stihxxx-b2120.dtsi +++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi @@ -55,5 +55,16 @@ st,i2c-min-scl-pulse-width-us = <0>; st,i2c-min-sda-pulse-width-us = <5>; }; + + miphy28lp_phy: miphy28lp@9b22000 { + + phy_port0: port@9b22000 { + st,osc-rdy; + }; + + phy_port1: port@9b2a000 { + st,osc-force-ext; + }; + }; }; }; -- cgit v1.2.3 From 73734551f88394528506e8773a308d2fb84db5f0 Mon Sep 17 00:00:00 2001 From: Sylvain Rochet Date: Fri, 16 Jan 2015 10:50:39 +0100 Subject: ARM: at91/dt: disable pull-up on vbus-gpio (PB16) to reduce power consumption There is an external resistor divider on PB16, acting like a pull-down, the pull-up increase power consumption and prevent the vbus detect pin to reach Vss voltage, ~1.5V mesured on my board, it might not even work if the pull-up is stronger than usual. Signed-off-by: Sylvain Rochet Acked-by: Bo Shen Acked-by: Alexandre Belloni Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9x5ek.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi index 3a9f6fa4a36a..bd16bd360272 100644 --- a/arch/arm/boot/dts/at91sam9x5ek.dtsi +++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi @@ -53,6 +53,8 @@ }; usb2: gadget@f803c000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_board_usb2>; atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -80,6 +82,13 @@ ; /* PD14 gpio CD pin pull up and deglitch */ }; }; + + usb2 { + pinctrl_board_usb2: usb2-board { + atmel,pins = + ; /* PB16 gpio vbus sense, deglitch */ + }; + }; }; spi0: spi@f0000000 { -- cgit v1.2.3 From b4e10dd7902689d4d4016f2f7d2d8318720ac749 Mon Sep 17 00:00:00 2001 From: Pramod Gurav Date: Tue, 21 Oct 2014 11:23:19 +0530 Subject: ARM: dts: qcom: Add Support for SD Card Detect for ifc6410 board This changes muxes in gpio26 pin to function as gpio and adds support for sd card detect for apq8064 based IFC6410 board. Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Russell King Cc: Srinivas Kandagatla Signed-off-by: Pramod Gurav Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index b396c8311b27..e641001ca2a7 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -1,4 +1,5 @@ #include "qcom-apq8064-v2.0.dtsi" +#include / { model = "Qualcomm APQ8064/IFC6410"; @@ -12,6 +13,14 @@ function = "gsbi1"; }; }; + + card_detect: card_detect { + mux { + pins = "gpio26"; + function = "gpio"; + bias-disable; + }; + }; }; gsbi@12440000 { @@ -49,6 +58,9 @@ /* External micro SD card */ sdcc3: sdcc@12180000 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&card_detect>; + cd-gpios = <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>; }; /* WLAN */ sdcc4: sdcc@121c0000 { -- cgit v1.2.3 From bb901bd6596e93fc2e0fc6da2f367a651bd8d16e Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Fri, 5 Dec 2014 12:53:33 -0800 Subject: ARM: dts: qcom: Correct IPQ8064 tlmm interrupt The interrupt is 16, not 32 (which it would be if we include PPIs in the count of interrupts). Cc: Andy Gross Signed-off-by: Stephen Boyd Reviewed-by: Andy Gross Tested-by: Andy Gross Signed-off-by: Kumar Gala --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 63b2146f563b..cb225dafe97c 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -74,7 +74,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - interrupts = <0 32 0x4>; + interrupts = <0 16 0x4>; }; intc: interrupt-controller@2000000 { -- cgit v1.2.3 From 7800064ba507e79f0afb6926204b997be4eabc80 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 19 Jan 2015 11:47:35 -0800 Subject: ARM: dts: Add basic dm816x device tree configuration Similar to other omap variants, let's add dm816x support. Note that this is based on generated data from the TI81XX-LINUX-PSP-04.04.00.02 patches published at: http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html I've verified the basic functionality, but have not been able to test all the devices on dm8168-evm. Cc: Brian Hutchinson Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dm816x.dtsi | 386 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 386 insertions(+) create mode 100644 arch/arm/boot/dts/dm816x.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi new file mode 100644 index 000000000000..5b5df63a21c8 --- /dev/null +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -0,0 +1,386 @@ +/* + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include + +#include "skeleton.dtsi" + +/ { + compatible = "ti,dm816"; + interrupt-parent = <&intc>; + + aliases { + i2c0 = &i2c1; + i2c1 = &i2c2; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + ethernet0 = ð0; + ethernet1 = ð1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + compatible = "arm,cortex-a8"; + device_type = "cpu"; + reg = <0>; + }; + }; + + pmu { + compatible = "arm,cortex-a8-pmu"; + interrupts = <3>; + }; + + /* + * The soc node represents the soc top level view. It is used for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + mpu { + compatible = "ti,omap3-mpu"; + ti,hwmods = "mpu"; + }; + }; + + dm816x_pinmux: pinmux@44e10800 { + compatible = "pinctrl-single"; + reg = <0x48140800 0x50a>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xf>; + }; + + /* + * XXX: Use a flat representation of the dm816x interconnect. + * The real dm816x interconnect network is quite complex. Since + * it will not bring real advantage to represent that in DT + * for the moment, just use a fake OCP bus entry to represent + * the whole bus hierarchy. + */ + ocp { + compatible = "ti,omap3-l3-smx", "simple-bus"; + reg = <0x44000000 0x10000>; + interrupts = <9 10>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main"; + + prcm: prcm@48180000 { + compatible = "ti,dm816-prcm"; + reg = <0x48180000 0x4000>; + + prcm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + prcm_clockdomains: clockdomains { + }; + }; + + scrm: scrm@48140000 { + compatible = "ti,dm816-scrm"; + reg = <0x48140000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x48140000 0x21000>; + + scrm_clocks: clocks { + #address-cells = <1>; + #size-cells = <0>; + }; + + scrm_clockdomains: clockdomains { + }; + }; + + cm: syscon@44e10000 { + compatible = "ti,am33xx-controlmodule", "syscon"; + reg = <0x44e10000 0x800>; + }; + + edma: edma@49000000 { + compatible = "ti,edma3"; + ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; + reg = <0x49000000 0x10000>, + <0x44e10f90 0x40>; + interrupts = <12 13 14>; + #dma-cells = <1>; + }; + + elm: elm@48080000 { + compatible = "ti,816-elm"; + ti,hwmods = "elm"; + reg = <0x48080000 0x2000>; + interrupts = <4>; + }; + + gpio1: gpio@48032000 { + compatible = "ti,omap3-gpio"; + ti,hwmods = "gpio1"; + reg = <0x48032000 0x1000>; + interrupts = <97>; + }; + + gpio2: gpio@4804c000 { + compatible = "ti,omap3-gpio"; + ti,hwmods = "gpio2"; + reg = <0x4804c000 0x1000>; + interrupts = <99>; + }; + + gpmc: gpmc@50000000 { + compatible = "ti,am3352-gpmc"; + ti,hwmods = "gpmc"; + reg = <0x50000000 0x2000>; + #address-cells = <2>; + #size-cells = <1>; + interrupts = <100>; + gpmc,num-cs = <6>; + gpmc,num-waitpins = <2>; + }; + + i2c1: i2c@48028000 { + compatible = "ti,omap4-i2c"; + ti,hwmods = "i2c1"; + reg = <0x48028000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <70>; + dmas = <&edma 58 &edma 59>; + dma-names = "tx", "rx"; + }; + + i2c2: i2c@4802a000 { + compatible = "ti,omap4-i2c"; + ti,hwmods = "i2c2"; + reg = <0x4802a000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <71>; + dmas = <&edma 60 &edma 61>; + dma-names = "tx", "rx"; + }; + + intc: interrupt-controller@48200000 { + compatible = "ti,dm816-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x48200000 0x1000>; + }; + + mailbox: mailbox@480c8000 { + compatible = "ti,omap4-mailbox"; + reg = <0x480c8000 0x2000>; + interrupts = <77>; + ti,hwmods = "mailbox"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + mbox_dsp: mbox_dsp { + ti,mbox-tx = <3 0 0>; + ti,mbox-rx = <0 0 0>; + }; + }; + + mdio: mdio@4a100800 { + compatible = "ti,davinci_mdio"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4a100800 0x100>; + ti,hwmods = "davinci_mdio"; + bus_freq = <1000000>; + phy0: ethernet-phy@0 { + reg = <1>; + }; + phy1: ethernet-phy@1 { + reg = <2>; + }; + }; + + eth0: ethernet@4a100000 { + compatible = "ti,dm816-emac"; + ti,hwmods = "emac0"; + reg = <0x4a100000 0x800 + 0x4a100900 0x3700>; + clocks = <&sysclk24_ck>; + ti,davinci-ctrl-reg-offset = <0>; + ti,davinci-ctrl-mod-reg-offset = <0x900>; + ti,davinci-ctrl-ram-offset = <0x2000>; + ti,davinci-ctrl-ram-size = <0x2000>; + interrupts = <40 41 42 43>; + phy-handle = <&phy0>; + }; + + eth1: ethernet@4a120000 { + compatible = "ti,dm816-emac"; + ti,hwmods = "emac1"; + reg = <0x4a120000 0x4000>; + clocks = <&sysclk24_ck>; + ti,davinci-ctrl-reg-offset = <0>; + ti,davinci-ctrl-mod-reg-offset = <0x900>; + ti,davinci-ctrl-ram-offset = <0x2000>; + ti,davinci-ctrl-ram-size = <0x2000>; + interrupts = <44 45 46 47>; + phy-handle = <&phy1>; + }; + + mcspi1: spi@48030000 { + compatible = "ti,omap4-mcspi"; + reg = <0x48030000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <65>; + ti,spi-num-cs = <4>; + ti,hwmods = "mcspi1"; + dmas = <&edma 16 &edma 17 + &edma 18 &edma 19>; + dma-names = "tx0", "rx0", "tx1", "rx1"; + }; + + mmc1: mmc@48060000 { + compatible = "ti,omap4-hsmmc"; + reg = <0x48060000 0x11000>; + ti,hwmods = "mmc1"; + interrupts = <64>; + dmas = <&edma 24 &edma 25>; + dma-names = "tx", "rx"; + }; + + timer1: timer@4802e000 { + compatible = "ti,dm816-timer"; + reg = <0x4802e000 0x2000>; + interrupts = <67>; + ti,hwmods = "timer1"; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,dm816-timer"; + reg = <0x48040000 0x2000>; + interrupts = <68>; + ti,hwmods = "timer2"; + }; + + timer3: timer@48042000 { + compatible = "ti,dm816-timer"; + reg = <0x48042000 0x2000>; + interrupts = <69>; + ti,hwmods = "timer3"; + }; + + timer4: timer@48044000 { + compatible = "ti,dm816-timer"; + reg = <0x48044000 0x2000>; + interrupts = <92>; + ti,hwmods = "timer4"; + }; + + timer5: timer@48046000 { + compatible = "ti,dm816-timer"; + reg = <0x48046000 0x2000>; + interrupts = <93>; + ti,hwmods = "timer5"; + }; + + timer6: timer@48048000 { + compatible = "ti,dm816-timer"; + reg = <0x48048000 0x2000>; + interrupts = <94>; + ti,hwmods = "timer6"; + }; + + timer7: timer@4804a000 { + compatible = "ti,dm816-timer"; + reg = <0x4804a000 0x2000>; + interrupts = <95>; + ti,hwmods = "timer7"; + }; + + uart1: uart@48020000 { + compatible = "ti,omap3-uart"; + ti,hwmods = "uart1"; + reg = <0x48020000 0x2000>; + clock-frequency = <48000000>; + interrupts = <72>; + dmas = <&edma 26 &edma 27>; + dma-names = "tx", "rx"; + }; + + uart2: uart@48022000 { + compatible = "ti,omap3-uart"; + ti,hwmods = "uart2"; + reg = <0x48022000 0x2000>; + clock-frequency = <48000000>; + interrupts = <73>; + dmas = <&edma 28 &edma 29>; + dma-names = "tx", "rx"; + }; + + uart3: uart@48024000 { + compatible = "ti,omap3-uart"; + ti,hwmods = "uart3"; + reg = <0x48024000 0x2000>; + clock-frequency = <48000000>; + interrupts = <74>; + dmas = <&edma 30 &edma 31>; + dma-names = "tx", "rx"; + }; + + /* NOTE: USB needs a transceiver driver for phys to work */ + usb: usb_otg_hs@47401000 { + compatible = "ti,am33xx-usb"; + reg = <0x47401000 0x400000>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + ti,hwmods = "usb_otg_hs"; + + usb0: usb@47401000 { + compatible = "ti,musb-am33xx"; + reg = <0x47401400 0x400 + 0x47401000 0x200>; + reg-names = "mc", "control"; + interrupts = <18>; + interrupt-names = "mc"; + dr_mode = "otg"; + mentor,multipoint = <1>; + mentor,num-eps = <16>; + mentor,ram-bits = <12>; + mentor,power = <500>; + }; + + usb1: usb@47401800 { + compatible = "ti,musb-am33xx"; + status = "disabled"; + reg = <0x47401c00 0x400 + 0x47401800 0x200>; + reg-names = "mc", "control"; + interrupts = <19>; + interrupt-names = "mc"; + dr_mode = "otg"; + mentor,multipoint = <1>; + mentor,num-eps = <16>; + mentor,ram-bits = <12>; + mentor,power = <500>; + }; + }; + + wd_timer2: wd_timer@480c2000 { + compatible = "ti,omap3-wdt"; + ti,hwmods = "wd_timer"; + reg = <0x480c2000 0x1000>; + interrupts = <0>; + }; + }; +}; + -- cgit v1.2.3 From 7383ca92552721fe430a82aab8271bc462423dca Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 19 Jan 2015 11:47:35 -0800 Subject: ARM: dts: Add basic clocks for dm816x The clocks on dm816x are a bit different from the other omap variants. The clocks are sourced from a FAPLL (Flying Adder PLL) unlike on other omaps. Other than that, it's a similar setup to am33xx with extra muxes and dividers that can be defined as existing component clocks. Cc: Brian Hutchinson Cc: Paul Walmsley Cc: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dm816x-clocks.dtsi | 250 +++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/dm816x.dtsi | 1 + 2 files changed, 251 insertions(+) create mode 100644 arch/arm/boot/dts/dm816x-clocks.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/dm816x-clocks.dtsi b/arch/arm/boot/dts/dm816x-clocks.dtsi new file mode 100644 index 000000000000..50d9d338fbe9 --- /dev/null +++ b/arch/arm/boot/dts/dm816x-clocks.dtsi @@ -0,0 +1,250 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&scrm { + main_fapll: main_fapll { + #clock-cells = <1>; + compatible = "ti,dm816-fapll-clock"; + reg = <0x400 0x40>; + clocks = <&sys_clkin_ck &sys_clkin_ck>; + clock-indices = <1>, <2>, <3>, <4>, <5>, + <6>, <7>; + clock-output-names = "main_pll_clk1", + "main_pll_clk2", + "main_pll_clk3", + "main_pll_clk4", + "main_pll_clk5", + "main_pll_clk6", + "main_pll_clk7"; + }; + + ddr_fapll: ddr_fapll { + #clock-cells = <1>; + compatible = "ti,dm816-fapll-clock"; + reg = <0x440 0x30>; + clocks = <&sys_clkin_ck &sys_clkin_ck>; + clock-indices = <1>, <2>, <3>, <4>; + clock-output-names = "ddr_pll_clk1", + "ddr_pll_clk2", + "ddr_pll_clk3", + "ddr_pll_clk4"; + }; + + video_fapll: video_fapll { + #clock-cells = <1>; + compatible = "ti,dm816-fapll-clock"; + reg = <0x470 0x30>; + clocks = <&sys_clkin_ck &sys_clkin_ck>; + clock-indices = <1>, <2>, <3>; + clock-output-names = "video_pll_clk1", + "video_pll_clk2", + "video_pll_clk3"; + }; + + audio_fapll: audio_fapll { + #clock-cells = <1>; + compatible = "ti,dm816-fapll-clock"; + reg = <0x4a0 0x30>; + clocks = <&main_fapll 7>, < &sys_clkin_ck>; + clock-indices = <1>, <2>, <3>, <4>, <5>; + clock-output-names = "audio_pll_clk1", + "audio_pll_clk2", + "audio_pll_clk3", + "audio_pll_clk4", + "audio_pll_clk5"; + }; +}; + +&scrm_clocks { + secure_32k_ck: secure_32k_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + sys_32k_ck: sys_32k_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + tclkin_ck: tclkin_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <32768>; + }; + + sys_clkin_ck: sys_clkin_ck { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + }; +}; + +/* 0x48180000 */ +&prcm_clocks { + clkout_pre_ck: clkout_pre_ck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1 + &audio_fapll 1>; + reg = <0x100>; + }; + + clkout_div_ck: clkout_div_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&clkout_pre_ck>; + ti,bit-shift = <3>; + ti,max-div = <8>; + reg = <0x100>; + }; + + clkout_ck: clkout_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&clkout_div_ck>; + ti,bit-shift = <7>; + reg = <0x100>; + }; + + /* CM_DPLL clocks p1795 */ + sysclk1_ck: sysclk1_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 1>; + ti,max-div = <7>; + reg = <0x0300>; + }; + + sysclk2_ck: sysclk2_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 2>; + ti,max-div = <7>; + reg = <0x0304>; + }; + + sysclk3_ck: sysclk3_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 3>; + ti,max-div = <7>; + reg = <0x0308>; + }; + + sysclk4_ck: sysclk4_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 4>; + ti,max-div = <1>; + reg = <0x030c>; + }; + + sysclk5_ck: sysclk5_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&sysclk4_ck>; + ti,max-div = <1>; + reg = <0x0310>; + }; + + sysclk6_ck: sysclk6_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 4>; + ti,dividers = <2>, <4>; + reg = <0x0314>; + }; + + sysclk10_ck: sysclk10_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&ddr_fapll 2>; + ti,max-div = <7>; + reg = <0x0324>; + }; + + sysclk24_ck: sysclk24_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&main_fapll 5>; + ti,max-div = <7>; + reg = <0x03b4>; + }; + + mpu_ck: mpu_ck { + #clock-cells = <0>; + compatible = "ti,gate-clock"; + clocks = <&sysclk2_ck>; + ti,bit-shift = <1>; + reg = <0x15dc>; + }; + + audio_pll_a_ck: audio_pll_a_ck { + #clock-cells = <0>; + compatible = "ti,divider-clock"; + clocks = <&audio_fapll 1>; + ti,max-div = <7>; + reg = <0x035c>; + }; + + sysclk18_ck: sysclk18_ck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&sys_32k_ck>, <&audio_pll_a_ck>; + reg = <0x0378>; + }; + + timer1_fck: timer1_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x0390>; + }; + + timer2_fck: timer2_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x0394>; + }; + + timer3_fck: timer3_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x0398>; + }; + + timer4_fck: timer4_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x039c>; + }; + + timer5_fck: timer5_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x03a0>; + }; + + timer6_fck: timer6_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x03a4>; + }; + + timer7_fck: timer7_fck { + #clock-cells = <0>; + compatible = "ti,mux-clock"; + clocks = <&tclkin_ck>, <&sysclk18_ck>, <&sys_clkin_ck>; + reg = <0x03a8>; + }; +}; diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index 5b5df63a21c8..7adac097a71c 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -384,3 +384,4 @@ }; }; +#include "dm816x-clocks.dtsi" -- cgit v1.2.3 From ac7452cee7430ea507ddf70700de56482f15dae3 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 19 Jan 2015 11:47:35 -0800 Subject: ARM: dts: Add minimal support for dm8168-evm This allows booting the device with basic functionality. Note that at least on my revision c board the DDR3 does not seem to work properly and only some of the memory can be reliably used. Also, the mainline u-boot does not seem to properly initialize the ethernet, so I've been using the old TI u-boot at: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary Cc: Brian Hutchinson Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/dm8168-evm.dts | 129 +++++++++++++++++++++++++++++++++++++ include/dt-bindings/pinctrl/omap.h | 1 + 3 files changed, 131 insertions(+) create mode 100644 arch/arm/boot/dts/dm8168-evm.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 1b2c7de17cf3..a6ace4d57ea5 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -348,6 +348,7 @@ dtb-$(CONFIG_ARCH_OMAP3) += am3517-craneboard.dtb \ omap3-sbc-t3730.dtb \ omap3-thunder.dtb \ omap3-zoom3.dtb +dtb-$(CONFIG_SOC_TI81XX) += dm8168-evm.dtb dtb-$(CONFIG_SOC_AM33XX) += am335x-base0033.dtb \ am335x-bone.dtb \ am335x-boneblack.dtb \ diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts new file mode 100644 index 000000000000..857d0289ad4d --- /dev/null +++ b/arch/arm/boot/dts/dm8168-evm.dts @@ -0,0 +1,129 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "dm816x.dtsi" + +/ { + model = "DM8168 EVM"; + compatible = "ti,dm8168-evm", "ti,dm8168"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x40000000 /* 1 GB */ + 0xc0000000 0x40000000>; /* 1 GB */ + }; + + /* FDC6331L controlled by SD_POW pin */ + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&dm816x_pinmux { + mcspi1_pins: pinmux_mcspi1_pins { + pinctrl-single,pins = < + DM816X_IOPAD(0x0a94, PIN_INPUT | MUX_MODE0) /* SPI_SCLK */ + DM816X_IOPAD(0x0a98, PIN_OUTPUT | MUX_MODE0) /* SPI_SCS0 */ + DM816X_IOPAD(0x0aa8, PIN_INPUT | MUX_MODE0) /* SPI_D0 */ + DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ + >; + }; +}; + +&i2c1 { + extgpio0: pcf8575@20 { + compatible = "nxp,pcf8575"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&i2c2 { + extgpio1: pcf8575@20 { + compatible = "nxp,pcf8575"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&gpmc { + ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */ + + nand@0,0 { + linux,mtd-name= "micron,mt29f2g16aadwp"; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + #address-cells = <1>; + #size-cells = <1>; + ti,nand-ecc-opt = "bch8"; + nand-bus-width = <16>; + gpmc,device-width = <2>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + partition@0 { + label = "X-Loader"; + reg = <0 0x80000>; + }; + partition@0x80000 { + label = "U-Boot"; + reg = <0x80000 0x1c0000>; + }; + partition@0x1c0000 { + label = "Environment"; + reg = <0x240000 0x40000>; + }; + partition@0x280000 { + label = "Kernel"; + reg = <0x280000 0x500000>; + }; + partition@0x780000 { + label = "Filesystem"; + reg = <0x780000 0xf880000>; + }; + }; +}; + +&mcspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi1_pins>; + + m25p80@0 { + compatible = "w25x32"; + spi-max-frequency = <48000000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h index 1c75b8ca5228..13949259705a 100644 --- a/include/dt-bindings/pinctrl/omap.h +++ b/include/dt-bindings/pinctrl/omap.h @@ -61,6 +61,7 @@ #define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) +#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) #define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) #define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val) -- cgit v1.2.3 From c878eb621137a89492fc72d3672562374e2e0a8a Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Thu, 8 Jan 2015 10:16:45 +0100 Subject: ARM: dts: add DT for Alphascale ASM9260 SoC for now it is wary basic SoC description with most important IPs needed to make this device work Signed-off-by: Oleksij Rempel Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 2 +- arch/arm/boot/dts/alphascale-asm9260-devkit.dts | 13 +++++ arch/arm/boot/dts/alphascale-asm9260.dtsi | 63 +++++++++++++++++++++++++ 3 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/alphascale-asm9260-devkit.dts create mode 100644 arch/arm/boot/dts/alphascale-asm9260.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..d556f188a0de 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -555,7 +555,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \ mt6592-evb.dtb \ mt8127-moose.dtb \ mt8135-evbp1.dtb - +dtb-$(CONFIG_MACH_ASM9260) += alphascale-asm9260-devkit.dtb endif always := $(dtb-y) diff --git a/arch/arm/boot/dts/alphascale-asm9260-devkit.dts b/arch/arm/boot/dts/alphascale-asm9260-devkit.dts new file mode 100644 index 000000000000..c77e2c902fb6 --- /dev/null +++ b/arch/arm/boot/dts/alphascale-asm9260-devkit.dts @@ -0,0 +1,13 @@ +/* + * Copyright 2014 Oleksij Rempel + * + * Licensed under the X11 license or the GPL v2 (or later) + */ + +/dts-v1/; +#include "alphascale-asm9260.dtsi" + +/ { + model = "Alphascale asm9260 Development Kit"; + compatible = "alphascale,asm9260devkit", "alphascale,asm9260"; +}; diff --git a/arch/arm/boot/dts/alphascale-asm9260.dtsi b/arch/arm/boot/dts/alphascale-asm9260.dtsi new file mode 100644 index 000000000000..907fc7bfc418 --- /dev/null +++ b/arch/arm/boot/dts/alphascale-asm9260.dtsi @@ -0,0 +1,63 @@ +/* + * Copyright 2014 Oleksij Rempel + * + * Licensed under the X11 license or the GPL v2 (or later) + */ + +#include "skeleton.dtsi" +#include + +/ { + interrupt-parent = <&icoll>; + + memory { + device_type = "memory"; + reg = <0x20000000 0x2000000>; + }; + + cpus { + #address-cells = <0>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ej-s"; + device_type = "cpu"; + clocks = <&acc CLKID_SYS_CPU>; + }; + }; + + osc24m: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-accuracy = <30000>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + acc: clock-controller@80040000 { + compatible = "alphascale,asm9260-clock-controller"; + #clock-cells = <1>; + clocks = <&osc24m>; + reg = <0x80040000 0x204>; + }; + + icoll: interrupt-controller@80054000 { + compatible = "alphascale,asm9260-icoll"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x80054000 0x200>; + }; + + timer0: timer@80088000 { + compatible = "alphascale,asm9260-timer"; + reg = <0x80088000 0x4000>; + clocks = <&acc CLKID_AHB_TIMER0>; + interrupts = <29>; + }; + }; +}; -- cgit v1.2.3 From 1b012fbc11878a3c965d982f828fccc15caed996 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Mon, 19 Jan 2015 16:32:42 -0800 Subject: ARM: dts: move alphascale in makefile The file is roughly sorted alphabetically (with some exceptions where old options have been split in two), so alphascale should go at the top instead of at the bottom. Also linewrap like other entries have been lately. Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f2fd0a2eda40..31065cc01df3 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1,5 +1,7 @@ ifeq ($(CONFIG_OF),y) +dtb-$(CONFIG_MACH_ASM9260) += \ + alphascale-asm9260-devkit.dtb # Keep at91 dtb files sorted alphabetically for each SoC # rm9200 dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb @@ -628,7 +630,6 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt6592-evb.dtb \ mt8127-moose.dtb \ mt8135-evbp1.dtb -dtb-$(CONFIG_MACH_ASM9260) += alphascale-asm9260-devkit.dtb endif always := $(dtb-y) -- cgit v1.2.3 From 677940258dd8ecab88c8c20e421fd82e9c605680 Mon Sep 17 00:00:00 2001 From: Anton Bondarenko Date: Tue, 13 Jan 2015 19:04:08 +0100 Subject: ARM: dts: imx6q: enable dma for ecspi5 Enable dma support for ecspi5 controller Signed-off-by: Anton Bondarenko Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6q.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 37ee4e588910..93ec79bb6b35 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -95,6 +95,8 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; + dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; + dma-names = "rx", "tx"; status = "disabled"; }; }; -- cgit v1.2.3 From 767139540cbf72886112f427e0691acd5c12f8eb Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 16 Jan 2015 18:06:15 +0100 Subject: ARM: vf610: use zero based naming for GPIO nodes On Vybrid, all peripherals are numbered starting with zero, including the GPIO and PORT module. However, the labels of the corresponding device tree nodes start with one, which is confusing. Fix that by renaming the labels of the gpio nodes in the device tree. Signed-off-by: Stefan Agner Signed-off-by: Shawn Guo --- arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 2 +- arch/arm/boot/dts/vf-colibri.dtsi | 2 +- arch/arm/boot/dts/vf500.dtsi | 10 +++++----- arch/arm/boot/dts/vf610-twr.dts | 2 +- arch/arm/boot/dts/vfxxx.dtsi | 20 ++++++++++---------- 5 files changed, 18 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi index 56a452bc326c..36cafbfa1bfa 100644 --- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi @@ -35,7 +35,7 @@ regulator-name = "usbh_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio3 19 GPIO_ACTIVE_LOW>; + gpio = <&gpio2 19 GPIO_ACTIVE_LOW>; vin-supply = <&sys_5v0_reg>; }; }; diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi index 95b6ff222eee..5c2b7320856d 100644 --- a/arch/arm/boot/dts/vf-colibri.dtsi +++ b/arch/arm/boot/dts/vf-colibri.dtsi @@ -31,7 +31,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1>; bus-width = <4>; - cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; }; &fec1 { diff --git a/arch/arm/boot/dts/vf500.dtsi b/arch/arm/boot/dts/vf500.dtsi index 0d0de864643f..1dbf8d2d1ddf 100644 --- a/arch/arm/boot/dts/vf500.dtsi +++ b/arch/arm/boot/dts/vf500.dtsi @@ -94,23 +94,23 @@ interrupts = ; }; -&gpio1 { +&gpio0 { interrupts = ; }; -&gpio2 { +&gpio1 { interrupts = ; }; -&gpio3 { +&gpio2 { interrupts = ; }; -&gpio4 { +&gpio3 { interrupts = ; }; -&gpio5 { +&gpio4 { interrupts = ; }; diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts index a0f762159cb2..289fef20cd83 100644 --- a/arch/arm/boot/dts/vf610-twr.dts +++ b/arch/arm/boot/dts/vf610-twr.dts @@ -123,7 +123,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc1>; bus-width = <4>; - cd-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index ae5c35879a53..a29c7ce15eaf 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi @@ -22,11 +22,11 @@ serial3 = &uart3; serial4 = &uart4; serial5 = &uart5; - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; - gpio3 = &gpio4; - gpio4 = &gpio5; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; usbphy0 = &usbphy0; usbphy1 = &usbphy1; }; @@ -216,7 +216,7 @@ #gpio-range-cells = <3>; }; - gpio1: gpio@40049000 { + gpio0: gpio@40049000 { compatible = "fsl,vf610-gpio"; reg = <0x40049000 0x1000 0x400ff000 0x40>; gpio-controller; @@ -226,7 +226,7 @@ gpio-ranges = <&iomuxc 0 0 32>; }; - gpio2: gpio@4004a000 { + gpio1: gpio@4004a000 { compatible = "fsl,vf610-gpio"; reg = <0x4004a000 0x1000 0x400ff040 0x40>; gpio-controller; @@ -236,7 +236,7 @@ gpio-ranges = <&iomuxc 0 32 32>; }; - gpio3: gpio@4004b000 { + gpio2: gpio@4004b000 { compatible = "fsl,vf610-gpio"; reg = <0x4004b000 0x1000 0x400ff080 0x40>; gpio-controller; @@ -246,7 +246,7 @@ gpio-ranges = <&iomuxc 0 64 32>; }; - gpio4: gpio@4004c000 { + gpio3: gpio@4004c000 { compatible = "fsl,vf610-gpio"; reg = <0x4004c000 0x1000 0x400ff0c0 0x40>; gpio-controller; @@ -256,7 +256,7 @@ gpio-ranges = <&iomuxc 0 96 32>; }; - gpio5: gpio@4004d000 { + gpio4: gpio@4004d000 { compatible = "fsl,vf610-gpio"; reg = <0x4004d000 0x1000 0x400ff100 0x40>; gpio-controller; -- cgit v1.2.3 From 16baf8ddd84b36e6880092da777a67de362f8677 Mon Sep 17 00:00:00 2001 From: Michael Heimpold Date: Tue, 7 Oct 2014 23:00:39 +0200 Subject: ARM: dts: imx28-evk: remove duplicate property Seems to be a left-over from an automatic merge. Signed-off-by: Michael Heimpold Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx28-evk.dts | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts index 0e13b4b10a92..279249b8c3f3 100644 --- a/arch/arm/boot/dts/imx28-evk.dts +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -182,7 +182,6 @@ }; lradc@80050000 { - fsl,lradc-touchscreen-wires = <4>; status = "okay"; fsl,lradc-touchscreen-wires = <4>; fsl,ave-ctrl = <4>; -- cgit v1.2.3 From b8be56634b247e5dc892d8ec6d785e77a5f23845 Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Wed, 14 Jan 2015 09:45:53 +0100 Subject: ARM: mediatek: dts: Add uart to mt6592 This patch adds the uart ports and the uart clock to Mediateks mt6592 SoC. Signed-off-by: Matthias Brugger --- arch/arm/boot/dts/mt6592.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi index 67c817418392..c69201ffff72 100644 --- a/arch/arm/boot/dts/mt6592.dtsi +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -78,6 +78,12 @@ #clock-cells = <0>; }; + uart_clk: dummy26m { + compatible = "fixed-clock"; + clock-frequency = <26000000>; + #clock-cells = <0>; + }; + timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; @@ -102,4 +108,36 @@ reg = <0x10211000 0x1000>, <0x10212000 0x1000>; }; + + uart0: serial@11002000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11002000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart1: serial@11003000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11003000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart2: serial@11004000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11004000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; + + uart3: serial@11005000 { + compatible = "mediatek,mt6577-uart"; + reg = <0x11005000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + status = "disabled"; + }; }; -- cgit v1.2.3 From 1f43c45df7afb706470f7d81d983dd7763a9452f Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Mon, 19 Jan 2015 15:19:28 +0530 Subject: ARM: dts: dra72-evm: Add qspi device These add device tree entry for qspi device on dra72-evm. Signed-off-by: Mugunthan V N Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra72-evm.dts | 77 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 89085d066c65..cacddd74c516 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -121,6 +121,18 @@ 0x418 (MUX_MODE15) /* wakeup0.off */ >; }; + + qspi1_pins: pinmux_qspi1_pins { + pinctrl-single,pins = < + 0x74 (PIN_OUTPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ + 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */ + 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */ + 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */ + 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */ + 0x88 (PIN_OUTPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */ + 0xb8 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */ + >; + }; }; &i2c1 { @@ -461,3 +473,68 @@ pinctrl-0 = <&dcan1_pins_default>; pinctrl-1 = <&dcan1_pins_sleep>; }; + +&qspi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&qspi1_pins>; + + spi-max-frequency = <48000000>; + m25p80@0 { + compatible = "s25fl256s1"; + spi-max-frequency = <48000000>; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-cpol; + spi-cpha; + #address-cells = <1>; + #size-cells = <1>; + + /* MTD partition table. + * The ROM checks the first four physical blocks + * for a valid file to boot and the flash here is + * 64KiB block size. + */ + partition@0 { + label = "QSPI.SPL"; + reg = <0x00000000 0x000010000>; + }; + partition@1 { + label = "QSPI.SPL.backup1"; + reg = <0x00010000 0x00010000>; + }; + partition@2 { + label = "QSPI.SPL.backup2"; + reg = <0x00020000 0x00010000>; + }; + partition@3 { + label = "QSPI.SPL.backup3"; + reg = <0x00030000 0x00010000>; + }; + partition@4 { + label = "QSPI.u-boot"; + reg = <0x00040000 0x00100000>; + }; + partition@5 { + label = "QSPI.u-boot-spl-os"; + reg = <0x00140000 0x00080000>; + }; + partition@6 { + label = "QSPI.u-boot-env"; + reg = <0x001c0000 0x00010000>; + }; + partition@7 { + label = "QSPI.u-boot-env.backup1"; + reg = <0x001d0000 0x0010000>; + }; + partition@8 { + label = "QSPI.kernel"; + reg = <0x001e0000 0x0800000>; + }; + partition@9 { + label = "QSPI.file-system"; + reg = <0x009e0000 0x01620000>; + }; + }; +}; -- cgit v1.2.3 From e27a09ae9369e10bc589ef4d720ecf4abcbcec50 Mon Sep 17 00:00:00 2001 From: Dan Haab Date: Mon, 19 Jan 2015 12:45:37 -0700 Subject: ARM: BCM5301X: Add DT for Luxul XWC-1000 Luxul XWC-1000 is a controller device based on BCM4708 SoC. The only unusual thing in its DTS file is "ubi" partition on NAND flash. Signed-off-by: Dan Haab Signed-off-by: Hauke Mehrtens --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts | 60 ++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..ff4a5ae8c2d6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -57,6 +57,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b-plus.dtb dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-buffalo-wzr-1750dhp.dtb \ + bcm4708-luxul-xwc-1000.dtb \ bcm4708-netgear-r6250.dtb \ bcm4708-netgear-r6300-v2.dtb \ bcm47081-asus-rt-n18u.dtb \ diff --git a/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts new file mode 100644 index 000000000000..946c728c4eb7 --- /dev/null +++ b/arch/arm/boot/dts/bcm4708-luxul-xwc-1000.dts @@ -0,0 +1,60 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for Luxul XWC-1000 + * + * Copyright 2014 Luxul Inc. + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/dts-v1/; + +#include "bcm4708.dtsi" + +/ { + compatible = "luxul,xwc-1000", "brcm,bcm4708"; + model = "Luxul XWC-1000 (BCM4708)"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + axi@18000000 { + nand@28000 { + reg = <0x00028000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + status { + label = "bcm53xx:green:status"; + gpios = <&chipcommon 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "timer"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>; + }; + }; +}; -- cgit v1.2.3 From 78b745a4b05c920beaa66dfb140af134b5fc2425 Mon Sep 17 00:00:00 2001 From: RafaÅ‚ MiÅ‚ecki Date: Wed, 14 Jan 2015 08:20:48 +0100 Subject: ARM: BCM5301X: Drop unused poll-interval from gpio-keys MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It was accidentally left (& copied & pasted all around) from our experiments with gpio-keys-polled. Signed-off-by: RafaÅ‚ MiÅ‚ecki Signed-off-by: Hauke Mehrtens --- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 1 - arch/arm/boot/dts/bcm4708-netgear-r6250.dts | 1 - arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts | 1 - arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts | 1 - arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 1 - 5 files changed, 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts index 5fc0fae03092..13d51a919f0c 100644 --- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts +++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts @@ -27,7 +27,6 @@ compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - poll-interval = <200>; restart { label = "Reset"; diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts index 4ed7de1058b7..f18c9d9b2f2c 100644 --- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts @@ -71,7 +71,6 @@ compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - poll-interval = <200>; wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts index 12fc2a01e6ab..39910428246a 100644 --- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts +++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts @@ -61,7 +61,6 @@ compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - poll-interval = <200>; wps { label = "WPS"; diff --git a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts index fb76378bd511..0ee85ea10bb2 100644 --- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts +++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts @@ -61,7 +61,6 @@ compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - poll-interval = <200>; restart { label = "Reset"; diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts index bbb414fbad65..e23dbbfbafc3 100644 --- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts +++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts @@ -27,7 +27,6 @@ compatible = "gpio-keys"; #address-cells = <1>; #size-cells = <0>; - poll-interval = <200>; aoss { label = "AOSS"; -- cgit v1.2.3 From 8115a4e8d687427fbc1aa3774f50551563bf87f9 Mon Sep 17 00:00:00 2001 From: RafaÅ‚ MiÅ‚ecki Date: Wed, 14 Jan 2015 08:20:49 +0100 Subject: ARM: BCM5301X: Add LEDs for Buffalo devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: RafaÅ‚ MiÅ‚ecki Signed-off-by: Hauke Mehrtens --- arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts | 67 ++++++++++++++++++++++ arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 67 ++++++++++++++++++++++ 2 files changed, 134 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts index 13d51a919f0c..b359c1e6178e 100644 --- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts +++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts @@ -23,6 +23,73 @@ reg = <0x00000000 0x08000000>; }; + spi { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&chipcommon 7 0>; + gpio-mosi = <&chipcommon 4 0>; + cs-gpios = <&chipcommon 6 0>; + #address-cells = <1>; + #size-cells = <0>; + + hc595: gpio_spi@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + registers-number = <1>; + spi-max-frequency = <100000>; + + gpio-controller; + #gpio-cells = <2>; + + }; + }; + + leds { + compatible = "gpio-leds"; + + power0 { + label = "bcm53xx:red:power"; + gpios = <&hc595 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + power1 { + label = "bcm53xx:white:power"; + gpios = <&hc595 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + router0 { + label = "bcm53xx:blue:router"; + gpios = <&hc595 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + router1 { + label = "bcm53xx:amber:router"; + gpios = <&hc595 4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + wan { + label = "bcm53xx:blue:wan"; + gpios = <&hc595 5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + wireless0 { + label = "bcm53xx:blue:wireless"; + gpios = <&hc595 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + wireless1 { + label = "bcm53xx:amber:wireless"; + gpios = <&hc595 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts index e23dbbfbafc3..db9131e03268 100644 --- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts +++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts @@ -23,6 +23,73 @@ reg = <0x00000000 0x08000000>; }; + spi { + compatible = "spi-gpio"; + num-chipselects = <1>; + gpio-sck = <&chipcommon 7 0>; + gpio-mosi = <&chipcommon 4 0>; + cs-gpios = <&chipcommon 6 0>; + #address-cells = <1>; + #size-cells = <0>; + + hc595: gpio_spi@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + registers-number = <1>; + spi-max-frequency = <100000>; + + gpio-controller; + #gpio-cells = <2>; + + }; + }; + + leds { + compatible = "gpio-leds"; + + power0 { + label = "bcm53xx:green:power"; + gpios = <&hc595 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + power1 { + label = "bcm53xx:red:power"; + gpios = <&hc595 2 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + router0 { + label = "bcm53xx:green:router"; + gpios = <&hc595 3 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + router1 { + label = "bcm53xx:amber:router"; + gpios = <&hc595 4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + wan { + label = "bcm53xx:green:wan"; + gpios = <&hc595 5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + wireless0 { + label = "bcm53xx:green:wireless"; + gpios = <&hc595 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + + wireless1 { + label = "bcm53xx:amber:wireless"; + gpios = <&hc595 7 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-off"; + }; + }; + gpio-keys { compatible = "gpio-keys"; #address-cells = <1>; -- cgit v1.2.3 From 5b1864b899d2b591402704dd0f6528c8661f1817 Mon Sep 17 00:00:00 2001 From: RafaÅ‚ MiÅ‚ecki Date: Tue, 20 Jan 2015 22:42:16 +0100 Subject: ARM: BCM5301X: Add DT for Buffalo WZR-900DHP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: RafaÅ‚ MiÅ‚ecki Signed-off-by: Hauke Mehrtens --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts | 37 +++++++++++++++++++++++ 2 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ff4a5ae8c2d6..0de664e90c8f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -61,7 +61,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ bcm4708-netgear-r6250.dtb \ bcm4708-netgear-r6300-v2.dtb \ bcm47081-asus-rt-n18u.dtb \ - bcm47081-buffalo-wzr-600dhp2.dtb + bcm47081-buffalo-wzr-600dhp2.dtb \ + bcm47081-buffalo-wzr-900dhp.dtb dtb-$(CONFIG_ARCH_BCM_63XX) += bcm963138dvt.dtb dtb-$(CONFIG_ARCH_BCM_CYGNUS) += bcm911360_entphn.dtb \ bcm911360k.dtb \ diff --git a/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts new file mode 100644 index 000000000000..7d6868acb1c6 --- /dev/null +++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-900dhp.dts @@ -0,0 +1,37 @@ +/* + * Broadcom BCM470X / BCM5301X ARM platform code. + * DTS for Buffalo WZR-900DHP + * + * Copyright (C) 2015 RafaÅ‚ MiÅ‚ecki + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/dts-v1/; + +#include "bcm47081.dtsi" + +/ { + compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708"; + model = "Buffalo WZR-900DHP (BCM47081)"; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + memory { + reg = <0x00000000 0x08000000>; + }; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + restart { + label = "Reset"; + linux,code = ; + gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; + }; + }; +}; -- cgit v1.2.3 From dbbcd881ee97100077295f48fcc7a53a8ce95c52 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 23 Nov 2014 14:38:14 +0100 Subject: ARM: dts: sun6i: Add pinmux settings for the ir pins Add pinmux settings for the ir receive pin of the A31. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index f47156b6572b..02d990a1e382 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -901,6 +901,13 @@ #interrupt-cells = <2>; #size-cells = <0>; #gpio-cells = <3>; + + ir_pins_a: ir@0 { + allwinner,pins = "PL4"; + allwinner,function = "s_ir"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; }; }; -- cgit v1.2.3 From e1391804967f38f64e6e73cab45da7fa5f451f6e Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 3 Dec 2014 15:19:13 +0800 Subject: ARM: dts: sun6i: hummingbird: Add ethernet phy reset gpio properties On the Hummingbird A31 board, the RTL8211E ethernet phy has its reset line connect to a gpio pin, instead of floating like on other boards. Add the stmmac properties for describing the reset gpio. The reset delays were taken from the RTL8211E datasheet. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index 6e924d9d2912..55a367ac2a0a 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -139,6 +139,9 @@ pinctrl-0 = <&gmac_pins_rgmii_a>; phy = <&phy1>; phy-mode = "rgmii"; + snps,reset-gpio = <&pio 0 21 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; status = "okay"; phy1: ethernet-phy@1 { -- cgit v1.2.3 From ec66d0bb3d8a0643c0772c5999e0383d542e0043 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Mon, 8 Dec 2014 04:14:01 -0600 Subject: ARM: sun4i: dt: Add pin muxing options for SPI These are based on the available SPI configurations of Cubieboard, Olimex LIME, and PcDuino. There is no pin group for SPI3, as all the boards seem to use those pins for EMAC. Signed-off-by: Alexandru Gagniuc Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 3b25de8f5fce..b76c13fa89aa 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -637,6 +637,34 @@ allwinner,drive = <0>; allwinner,pull = <0>; }; + + spi0_pins_a: spi0@0 { + allwinner,pins = "PI10", "PI11", "PI12", "PI13"; + allwinner,function = "spi0"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + spi1_pins_a: spi1@0 { + allwinner,pins = "PI16", "PI17", "PI18", "PI19"; + allwinner,function = "spi1"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + spi2_pins_a: spi2@0 { + allwinner,pins = "PB14", "PB15", "PB16", "PB17"; + allwinner,function = "spi2"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; + + spi2_pins_b: spi2@1 { + allwinner,pins = "PC19", "PC20", "PC21", "PC22"; + allwinner,function = "spi2"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; }; timer@01c20c00 { -- cgit v1.2.3 From c9f80dd3b1dc9d1fd4864374b549efb9e3b1f779 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Mon, 8 Dec 2014 04:14:02 -0600 Subject: ARM: sun4i: dt: cubieboard: Enable SPI0 Only SPI0 is enabled, as the schematic denotes it as the only SPI bus, while other pins are reserved for different peripherals. Signed-off-by: Alexandru Gagniuc Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 6a310da53f18..140e3ee0c15f 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -148,6 +148,12 @@ pinctrl-0 = <&i2c1_pins_a>; status = "okay"; }; + + spi0: spi@01c05000 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_a>; + status = "okay"; + }; }; leds { -- cgit v1.2.3 From 9b5c6e06937a7bbbc3af60b3041ff6523cb4a23e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 17 Dec 2014 18:18:19 +0100 Subject: ARM: dts: sun6i: Add ir_clk node Add an ir_clk sub-node to the prcm node. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 02d990a1e382..766822ddb739 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -878,6 +878,13 @@ "apb0_i2c"; }; + ir_clk: ir_clk { + #clock-cells = <0>; + compatible = "allwinner,sun4i-a10-mod0-clk"; + clocks = <&osc32k>, <&osc24M>; + clock-output-names = "ir"; + }; + apb0_rst: apb0_rst { compatible = "allwinner,sun6i-a31-clock-reset"; #reset-cells = <1>; -- cgit v1.2.3 From 4ac367b4ec7257a300bd39e5757aa988f1435194 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 29 Dec 2014 12:09:24 +0100 Subject: ARM: dts: sun6i: Add ir node Add a node for the ir receiver found on the A31. Signed-off-by: Hans de Goede [Maxime: Added a node label] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 766822ddb739..c50d4e8c1150 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -896,6 +896,16 @@ reg = <0x01f01c00 0x300>; }; + ir: ir@01f02000 { + compatible = "allwinner,sun5i-a13-ir"; + clocks = <&apb0_gates 1>, <&ir_clk>; + clock-names = "apb", "ir"; + resets = <&apb0_rst 1>; + interrupts = <0 37 4>; + reg = <0x01f02000 0x40>; + status = "disabled"; + }; + r_pio: pinctrl@01f02c00 { compatible = "allwinner,sun6i-a31-r-pinctrl"; reg = <0x01f02c00 0x400>; -- cgit v1.2.3 From 1be83c4f086299948614dfaebda5106e0008f1f7 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Wed, 17 Dec 2014 18:18:22 +0100 Subject: ARM: dts: sun6i: Enable ir receiver on the Mele M9 The Mele M9 has an ir receiver, enable it. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts index 3ab544f3af4a..fccf709195e0 100644 --- a/arch/arm/boot/dts/sun6i-a31-m9.dts +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -121,6 +121,12 @@ reg = <1>; }; }; + + ir@01f02000 { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; + }; }; leds { -- cgit v1.2.3 From b0512e15453b3a0e9d4b411d65154dabefc87cbd Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 23 Dec 2014 11:13:20 +0100 Subject: ARM: dts: sun4i: Add lradc node Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index b76c13fa89aa..0e3cc9aed484 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -711,6 +711,13 @@ status = "disabled"; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <31>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; -- cgit v1.2.3 From ec011af59ebfd7404d351aa2ef16fb6c88233b32 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 23 Dec 2014 11:13:21 +0100 Subject: ARM: dts: sun5i: Add lradc node Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 45 ++++++++++++++++++++++-- arch/arm/boot/dts/sun5i-a10s.dtsi | 7 ++++ arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 45 ++++++++++++++++++++++-- arch/arm/boot/dts/sun5i-a13.dtsi | 7 ++++ 4 files changed, 100 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index fe3c559ca6a8..dac9d493c205 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -48,8 +48,9 @@ */ /dts-v1/; -/include/ "sun5i-a10s.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun5i-a10s.dtsi" +#include "sunxi-common-regulators.dtsi" +#include / { model = "Olimex A10s-Olinuxino Micro"; @@ -134,6 +135,46 @@ }; }; + lradc: lradc@01c22800 { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@191 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <191274>; + }; + + button@392 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <392644>; + }; + + button@601 { + label = "Menu"; + linux,code = ; + channel = <0>; + voltage = <601151>; + }; + + button@795 { + label = "Enter"; + linux,code = ; + channel = <0>; + voltage = <795090>; + }; + + button@987 { + label = "Home"; + linux,code = ; + channel = <0>; + voltage = <987387>; + }; + }; + uart0: serial@01c28000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 3c3c1920788a..b36a65c50bc1 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -526,6 +526,13 @@ reg = <0x01c20c90 0x10>; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <31>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index e31d291d14cb..529ff27dbb9f 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -48,8 +48,9 @@ */ /dts-v1/; -/include/ "sun5i-a13.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun5i-a13.dtsi" +#include "sunxi-common-regulators.dtsi" +#include / { model = "Olimex A13-Olinuxino"; @@ -102,6 +103,46 @@ }; }; + lradc: lradc@01c22800 { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@191 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <191274>; + }; + + button@392 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <392644>; + }; + + button@601 { + label = "Menu"; + linux,code = ; + channel = <0>; + voltage = <601151>; + }; + + button@795 { + label = "Enter"; + linux,code = ; + channel = <0>; + voltage = <795090>; + }; + + button@987 { + label = "Home"; + linux,code = ; + channel = <0>; + voltage = <987387>; + }; + }; + uart1: serial@01c28400 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins_b>; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 2448d7f38d6b..17d3e795856b 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -460,6 +460,13 @@ reg = <0x01c20c90 0x10>; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <31>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun4i-a10-sid"; reg = <0x01c23800 0x10>; -- cgit v1.2.3 From a6a2d64466812d7e7c1f91f52c767636d76f9454 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 23 Dec 2014 11:13:22 +0100 Subject: ARM: dts: sun7i: Add lradc node Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 59 ++++++++++++++++++++++++- arch/arm/boot/dts/sun7i-a20.dtsi | 7 +++ 2 files changed, 64 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index 9d669cdf031d..c00badd96cf9 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -12,8 +12,9 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" +#include / { model = "Olimex A20-Olinuxino Micro"; @@ -100,6 +101,60 @@ }; }; + lradc: lradc@01c22800 { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@191 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <191274>; + }; + + button@392 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <392644>; + }; + + button@601 { + label = "Menu"; + linux,code = ; + channel = <0>; + voltage = <601151>; + }; + + button@795 { + label = "Search"; + linux,code = ; + channel = <0>; + voltage = <795090>; + }; + + button@987 { + label = "Home"; + linux,code = ; + channel = <0>; + voltage = <987387>; + }; + + button@1184 { + label = "Esc"; + linux,code = ; + channel = <0>; + voltage = <1184678>; + }; + + button@1398 { + label = "Enter"; + linux,code = ; + channel = <0>; + voltage = <1398804>; + }; + }; + uart0: serial@01c28000 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e21ce5992d56..9f67508cd611 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -917,6 +917,13 @@ status = "disabled"; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <0 31 4>; + status = "disabled"; + }; + sid: eeprom@01c23800 { compatible = "allwinner,sun7i-a20-sid"; reg = <0x01c23800 0x200>; -- cgit v1.2.3 From e5bb25cb10b612e4724f46feba48638990a032f5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 29 Dec 2014 12:09:25 +0100 Subject: ARM: dts: sun6i: Add sun6i-a31s.dtsi Add a dtsi file for A31s based boards. Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31s.dtsi | 58 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31s.dtsi b/arch/arm/boot/dts/sun6i-a31s.dtsi new file mode 100644 index 000000000000..1e73e19db9d7 --- /dev/null +++ b/arch/arm/boot/dts/sun6i-a31s.dtsi @@ -0,0 +1,58 @@ +/* + * Copyright 2014 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * The A31s is the same die as the A31 in a different package, this is + * reflected by it having different pinctrl compatible everything else is + * identical. + */ + +/include/ "sun6i-a31.dtsi" + +&pio { + compatible = "allwinner,sun6i-a31s-pinctrl"; +}; -- cgit v1.2.3 From 721c259a88486c4c686afbf51a19bad556cc385e Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 29 Dec 2014 12:09:26 +0100 Subject: ARM: dts: sun6i: Add dts file for CSQ CS908 board The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND, rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG controller), ethernet, 3.5 mm jack with a/v out and hdmi out. Note it has no sdcard slot and therefore can only be fel booted. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/sun6i-a31s-cs908.dts | 102 +++++++++++++++++++++++++++++++++ 2 files changed, 104 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/sun6i-a31s-cs908.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..66a4282738b1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -461,7 +461,8 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-app4-evb1.dtb \ sun6i-a31-colombus.dtb \ sun6i-a31-hummingbird.dtb \ - sun6i-a31-m9.dtb + sun6i-a31-m9.dtb \ + sun6i-a31s-cs908.dtb dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-bananapi.dtb \ sun7i-a20-cubieboard2.dtb \ diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts b/arch/arm/boot/dts/sun6i-a31s-cs908.dts new file mode 100644 index 000000000000..491aa83cad5d --- /dev/null +++ b/arch/arm/boot/dts/sun6i-a31s-cs908.dts @@ -0,0 +1,102 @@ +/* + * Copyright 2014 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this library; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +/include/ "sun6i-a31s.dtsi" + +/ { + model = "CSQ CS908 top set box"; + compatible = "csq,cs908", "allwinner,sun6i-a31s"; +}; + +&usbphy { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + usb1_vbus_pin_csq908: usb1_vbus_pin@0 { + allwinner,pins = "PC27"; + allwinner,function = "gpio_out"; + allwinner,drive = <0>; + allwinner,pull = <0>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_mii_a>; + phy = <&phy1>; + phy-mode = "mii"; + status = "okay"; + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; + status = "okay"; +}; -- cgit v1.2.3 From 7145570159fb20654b507026a8e388f739fffa5c Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:54 +0100 Subject: ARM: sunxi: DT: Convert to device tree includes Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-a1000.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-hackberry.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10-pcduino.dts | 4 ++-- arch/arm/boot/dts/sun4i-a10.dtsi | 2 +- arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 4 ++-- arch/arm/boot/dts/sun5i-a10s.dtsi | 2 +- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 4 ++-- arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 4 ++-- arch/arm/boot/dts/sun5i-a13.dtsi | 2 +- arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 4 ++-- arch/arm/boot/dts/sun6i-a31-colombus.dts | 4 ++-- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 4 ++-- arch/arm/boot/dts/sun6i-a31-m9.dts | 4 ++-- arch/arm/boot/dts/sun6i-a31.dtsi | 2 +- arch/arm/boot/dts/sun6i-a31s-cs908.dts | 2 +- arch/arm/boot/dts/sun6i-a31s.dtsi | 2 +- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-m3.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 4 ++-- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 5 +++-- arch/arm/boot/dts/sun7i-a20.dtsi | 2 +- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 4 ++-- arch/arm/boot/dts/sun8i-a23.dtsi | 2 +- arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +- arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- 35 files changed, 61 insertions(+), 60 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts index 3bcfd81837f0..3bb636978582 100644 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Mele A1000"; diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts index f3f2974658e4..b2b45c4f7915 100644 --- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts +++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "BA10 tvbox"; diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 140e3ee0c15f..b9202716fbdb 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -47,8 +47,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Cubietech Cubieboard"; diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts index efc116287e0f..0c6c81a6b61b 100644 --- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Miniand Hackberry"; diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts index 3e25ee4d3248..5980ad0e69e3 100644 --- a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "INet-97F Rev 02"; diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index 8b3f97470249..e55639988e5d 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "PineRiver Mini X-Plus"; diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts index 88cf1a531155..3f607946abad 100644 --- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Olimex A10-OLinuXino-LIME"; diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts index ce5994597407..7367eff79dea 100644 --- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts @@ -47,8 +47,8 @@ */ /dts-v1/; -/include/ "sun4i-a10.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "LinkSprite pcDuino"; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 0e3cc9aed484..94283a5fa77c 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -10,7 +10,7 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&intc>; diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts index 1fa2916eafc2..3a0d9dc39914 100644 --- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts +++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun5i-a10s.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun5i-a10s.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "R7 A10s hdmi tv-stick"; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index b36a65c50bc1..452b774332cc 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -11,7 +11,7 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&intc>; diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index eeed1f236ee8..ca6b6dd30e47 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun5i-a13.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun5i-a13.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "HSG H702"; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts index 916ee8bb826f..729f02daf605 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts @@ -47,8 +47,8 @@ */ /dts-v1/; -/include/ "sun5i-a13.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun5i-a13.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Olimex A13-Olinuxino Micro"; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 17d3e795856b..93f1c8435019 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -11,7 +11,7 @@ * http://www.gnu.org/copyleft/gpl.html */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&intc>; diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts index c74a63a39531..42a11f4795f7 100644 --- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts +++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun6i-a31.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun6i-a31.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Allwinner A31 APP4 EVB1 Evaluation Board"; diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts index c36b4dc89c13..2e5bcaf6e860 100644 --- a/arch/arm/boot/dts/sun6i-a31-colombus.dts +++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun6i-a31.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun6i-a31.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "WITS A31 Colombus Evaluation Board"; diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index 55a367ac2a0a..a3bf20930d50 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun6i-a31.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun6i-a31.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Merrii A31 Hummingbird"; diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts index fccf709195e0..74d4a23a0bdc 100644 --- a/arch/arm/boot/dts/sun6i-a31-m9.dts +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun6i-a31.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun6i-a31.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Mele M9 / A1000G Quad top set box"; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c50d4e8c1150..b47d42ab1c1f 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -47,7 +47,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts b/arch/arm/boot/dts/sun6i-a31s-cs908.dts index 491aa83cad5d..dc57ffa3e82c 100644 --- a/arch/arm/boot/dts/sun6i-a31s-cs908.dts +++ b/arch/arm/boot/dts/sun6i-a31s-cs908.dts @@ -46,7 +46,7 @@ */ /dts-v1/; -/include/ "sun6i-a31s.dtsi" +#include "sun6i-a31s.dtsi" / { model = "CSQ CS908 top set box"; diff --git a/arch/arm/boot/dts/sun6i-a31s.dtsi b/arch/arm/boot/dts/sun6i-a31s.dtsi index 1e73e19db9d7..eaf5ec8fd459 100644 --- a/arch/arm/boot/dts/sun6i-a31s.dtsi +++ b/arch/arm/boot/dts/sun6i-a31s.dtsi @@ -51,7 +51,7 @@ * identical. */ -/include/ "sun6i-a31.dtsi" +#include "sun6i-a31.dtsi" &pio { compatible = "allwinner,sun6i-a31s-pinctrl"; diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index 1cf1214cc068..e9e96584bedd 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "LeMaker Banana Pi"; diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 53680983461a..809d448ecf30 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -12,8 +12,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Cubietech Cubieboard2"; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index a281d259b9b8..9812a3a34831 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -12,8 +12,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Cubietech Cubietruck"; diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts index 0e4bfa3b2b85..add6d95a0246 100644 --- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts @@ -12,8 +12,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Merrii A20 Hummingbird"; diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts index f38bb1a6656c..780f1aa98429 100644 --- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "I12 / Q5 / QT840A A20 tvbox"; diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts index b8e568c55271..82046234d9e8 100644 --- a/arch/arm/boot/dts/sun7i-a20-m3.dts +++ b/arch/arm/boot/dts/sun7i-a20-m3.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Mele M3"; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts index 3f3ff9693992..996da8be0e44 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts @@ -49,8 +49,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Olimex A20-OLinuXino-LIME"; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts index ed364d5e755e..5fda1e02acdb 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts @@ -46,8 +46,8 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Olimex A20-OLinuXino-LIME2"; diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index 8dca49b2477b..eb7b8878303d 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -47,8 +47,9 @@ */ /dts-v1/; -/include/ "sun7i-a20.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + #include #include diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 9f67508cd611..8c0507054757 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -47,7 +47,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts index 32ad80804dbb..adc3a54b6612 100644 --- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts @@ -48,8 +48,8 @@ */ /dts-v1/; -/include/ "sun8i-a23.dtsi" -/include/ "sunxi-common-regulators.dtsi" +#include "sun8i-a23.dtsi" +#include "sunxi-common-regulators.dtsi" / { model = "Ippo Q8H Dual Core Tablet (v5)"; diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 0746cd1024d7..4b0ae502f59e 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -47,7 +47,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { interrupt-parent = <&gic>; diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 506948f582ee..7fe242a8134b 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -48,7 +48,7 @@ */ /dts-v1/; -/include/ "sun9i-a80.dtsi" +#include "sun9i-a80.dtsi" / { model = "Merrii A80 Optimus Board"; diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 494714f67b57..90d0450850e9 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -47,7 +47,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ -/include/ "skeleton64.dtsi" +#include "skeleton64.dtsi" / { interrupt-parent = <&gic>; -- cgit v1.2.3 From bca12924f09dc03f2bda3b3e39408fee920a343b Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:55 +0100 Subject: ARM: sunxi: DT: convert DTs to use common GPIOs includes Replace the various raw GPIO flags by their definition in the common dt-bindings header. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-a1000.dts | 10 ++++++---- arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts | 6 ++++-- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 8 +++++--- arch/arm/boot/dts/sun4i-a10-hackberry.dts | 8 +++++--- arch/arm/boot/dts/sun4i-a10-inet97fv2.dts | 4 +++- arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 4 +++- arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 8 +++++--- arch/arm/boot/dts/sun4i-a10-pcduino.dts | 4 +++- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 10 ++++++---- arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 8 +++++--- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 4 +++- arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 8 +++++--- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 8 +++++--- arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 4 +++- arch/arm/boot/dts/sun6i-a31-colombus.dts | 6 ++++-- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 8 +++++--- arch/arm/boot/dts/sun6i-a31-m9.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 18 ++++++++++-------- arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 14 ++++++++------ arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 14 ++++++++------ arch/arm/boot/dts/sun7i-a20-m3.dts | 6 ++++-- arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 8 +++++--- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 4 ++-- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 4 +++- arch/arm/boot/dts/sun9i-a80-optimus.dts | 6 ++++-- arch/arm/boot/dts/sunxi-common-regulators.dtsi | 10 ++++++---- 30 files changed, 145 insertions(+), 87 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts index 3bb636978582..532ab3bd9735 100644 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -51,6 +51,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Mele A1000"; compatible = "mele,a1000", "allwinner,sun4i-a10"; @@ -77,7 +79,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -159,12 +161,12 @@ red { label = "a1000:red:usr"; - gpios = <&pio 7 10 0>; + gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; }; blue { label = "a1000:blue:usr"; - gpios = <&pio 7 20 0>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; }; }; @@ -176,7 +178,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpio = <&pio 7 15 0>; + gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; }; reg_usb1_vbus: usb1-vbus { diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts index b2b45c4f7915..490b77c9bb36 100644 --- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts +++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts @@ -49,6 +49,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "BA10 tvbox"; compatible = "allwinner,ba10-tvbox", "allwinner,sun4i-a10"; @@ -74,7 +76,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -140,7 +142,7 @@ }; reg_usb2_vbus: usb2-vbus { - gpio = <&pio 7 12 0>; + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index b9202716fbdb..53f12b71e837 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -50,6 +50,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Cubietech Cubieboard"; compatible = "cubietech,a10-cubieboard", "allwinner,sun4i-a10"; @@ -75,7 +77,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -163,12 +165,12 @@ blue { label = "cubieboard:blue:usr"; - gpios = <&pio 7 21 0>; /* LED1 */ + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* LED1 */ }; green { label = "cubieboard:green:usr"; - gpios = <&pio 7 20 0>; /* LED2 */ + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */ linux,default-trigger = "heartbeat"; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts index 0c6c81a6b61b..be1f29e50811 100644 --- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts @@ -51,6 +51,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Miniand Hackberry"; compatible = "miniand,hackberry", "allwinner,sun4i-a10"; @@ -77,7 +79,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -157,7 +159,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpio = <&pio 7 19 0>; + gpio = <&pio 7 19 GPIO_ACTIVE_HIGH>; }; reg_usb1_vbus: usb1-vbus { @@ -166,7 +168,7 @@ reg_usb2_vbus: usb2-vbus { pinctrl-0 = <&usb2_vbus_pin_hackberry>; - gpio = <&pio 7 12 0>; + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts index 5980ad0e69e3..482914333bba 100644 --- a/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts +++ b/arch/arm/boot/dts/sun4i-a10-inet97fv2.dts @@ -51,6 +51,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "INet-97F Rev 02"; compatible = "primux,inet97fv2", "allwinner,sun4i-a10"; @@ -65,7 +67,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index e55639988e5d..1db02eb3796c 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -51,6 +51,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "PineRiver Mini X-Plus"; compatible = "pineriver,mini-xplus", "allwinner,sun4i-a10"; @@ -61,7 +63,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts index 3f607946abad..5d9b86839f16 100644 --- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts @@ -49,6 +49,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Olimex A10-OLinuXino-LIME"; compatible = "olimex,a10-olinuxino-lime", "allwinner,sun4i-a10"; @@ -74,7 +76,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -151,14 +153,14 @@ green { label = "a10-olinuxino-lime:green:usr"; - gpios = <&pio 7 2 0>; + gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_ahci_5v: ahci-5v { pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>; - gpio = <&pio 2 3 0>; + gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts index 7367eff79dea..48161adfb32c 100644 --- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts @@ -50,6 +50,8 @@ #include "sun4i-a10.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "LinkSprite pcDuino"; compatible = "linksprite,a10-pcduino", "allwinner,sun4i-a10"; @@ -75,7 +77,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index dac9d493c205..f80d2facc158 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -50,6 +50,8 @@ /dts-v1/; #include "sun5i-a10s.dtsi" #include "sunxi-common-regulators.dtsi" + +#include #include / { @@ -77,7 +79,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino_micro>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 1 0>; /* PG1 */ + cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ cd-inverted; status = "okay"; }; @@ -87,7 +89,7 @@ pinctrl-0 = <&mmc1_pins_a>, <&mmc1_cd_pin_olinuxino_micro>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 13 0>; /* PG13 */ + cd-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ cd-inverted; status = "okay"; }; @@ -226,14 +228,14 @@ green { label = "a10s-olinuxino-micro:green:usr"; - gpios = <&pio 4 3 0>; + gpios = <&pio 4 3 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxino_m>; - gpio = <&pio 1 10 0>; + gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts index 3a0d9dc39914..da2d2535b1bc 100644 --- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts +++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts @@ -49,6 +49,8 @@ #include "sun5i-a10s.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "R7 A10s hdmi tv-stick"; compatible = "allwinner,r7-tv-dongle", "allwinner,sun5i-a10s"; @@ -59,7 +61,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_r7>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 1 0>; /* PG1 */ + cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ cd-inverted; status = "okay"; }; @@ -123,14 +125,14 @@ green { label = "r7-tv-dongle:green:usr"; - gpios = <&pio 1 2 0>; + gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_r7>; - gpio = <&pio 6 13 0>; + gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index ca6b6dd30e47..bccc1bcaa868 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -49,6 +49,8 @@ #include "sun5i-a13.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "HSG H702"; compatible = "hsg,h702", "allwinner,sun5i-a13"; @@ -59,7 +61,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_h702>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 0 0>; /* PG0 */ + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ cd-inverted; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts index 729f02daf605..c30180794c54 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts @@ -50,6 +50,8 @@ #include "sun5i-a13.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Olimex A13-Olinuxino Micro"; compatible = "olimex,a13-olinuxino-micro", "allwinner,sun5i-a13"; @@ -60,7 +62,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxinom>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 0 0>; /* PG0 */ + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ cd-inverted; status = "okay"; }; @@ -133,14 +135,14 @@ power { label = "a13-olinuxino-micro:green:power"; - gpios = <&pio 6 9 0>; + gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxinom>; - gpio = <&pio 6 11 0>; + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 529ff27dbb9f..e28a0765429a 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -50,6 +50,8 @@ /dts-v1/; #include "sun5i-a13.dtsi" #include "sunxi-common-regulators.dtsi" + +#include #include / { @@ -62,7 +64,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_olinuxino>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 6 0 0>; /* PG0 */ + cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */ cd-inverted; status = "okay"; }; @@ -174,14 +176,14 @@ pinctrl-0 = <&led_pins_olinuxino>; power { - gpios = <&pio 6 9 0>; + gpios = <&pio 6 9 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_olinuxino>; - gpio = <&pio 6 11 0>; + gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts index 42a11f4795f7..0d86e8cb2ca2 100644 --- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts +++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts @@ -51,6 +51,8 @@ #include "sun6i-a31.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Allwinner A31 APP4 EVB1 Evaluation Board"; compatible = "allwinner,app4-evb1", "allwinner,sun6i-a31"; @@ -87,7 +89,7 @@ reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_a>; - gpio = <&pio 7 27 0>; + gpio = <&pio 7 27 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts index 2e5bcaf6e860..deab8f357ad7 100644 --- a/arch/arm/boot/dts/sun6i-a31-colombus.dts +++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts @@ -51,6 +51,8 @@ #include "sun6i-a31.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "WITS A31 Colombus Evaluation Board"; compatible = "wits,colombus", "allwinner,sun6i-a31"; @@ -65,7 +67,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_colombus>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; - cd-gpios = <&pio 0 8 0>; /* PA8 */ + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ cd-inverted; status = "okay"; }; @@ -127,7 +129,7 @@ reg_usb2_vbus: usb2-vbus { pinctrl-names = "default"; pinctrl-0 = <&usb2_vbus_pin_colombus>; - gpio = <&pio 7 24 0>; + gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index a3bf20930d50..7364d22b33dd 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -51,6 +51,8 @@ #include "sun6i-a31.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Merrii A31 Hummingbird"; compatible = "merrii,a31-hummingbird", "allwinner,sun6i-a31"; @@ -65,7 +67,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; - cd-gpios = <&pio 0 8 0>; /* PA8 */ + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ cd-inverted; status = "okay"; }; @@ -139,7 +141,7 @@ pinctrl-0 = <&gmac_pins_rgmii_a>; phy = <&phy1>; phy-mode = "rgmii"; - snps,reset-gpio = <&pio 0 21 0>; + snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; snps,reset-active-low; snps,reset-delays-us = <0 10000 30000>; status = "okay"; @@ -152,7 +154,7 @@ reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_a>; - gpio = <&pio 7 24 0>; /* PH24 */ + gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts index 74d4a23a0bdc..8018baa6814d 100644 --- a/arch/arm/boot/dts/sun6i-a31-m9.dts +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -49,6 +49,8 @@ #include "sun6i-a31.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Mele M9 / A1000G Quad top set box"; compatible = "mele,m9", "allwinner,sun6i-a31"; @@ -63,7 +65,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_m9>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 22 0>; /* PH22 */ + cd-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */ cd-inverted; status = "okay"; }; @@ -136,14 +138,14 @@ blue { label = "m9:blue:usr"; - gpios = <&pio 7 13 0>; + gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; }; }; reg_usb1_vbus: usb1-vbus { pinctrl-names = "default"; pinctrl-0 = <&usb1_vbus_pin_m9>; - gpio = <&pio 2 27 0>; + gpio = <&pio 2 27 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index e9e96584bedd..e273f0e0627a 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -51,6 +51,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "LeMaker Banana Pi"; compatible = "lemaker,bananapi", "allwinner,sun7i-a20"; @@ -67,7 +69,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapi>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 10 0>; /* PH10 */ + cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ cd-inverted; status = "okay"; }; @@ -188,7 +190,7 @@ green { label = "bananapi:green:usr"; - gpios = <&pio 7 24 0>; + gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>; }; }; @@ -209,6 +211,6 @@ regulator-max-microvolt = <3300000>; startup-delay-us = <100000>; enable-active-high; - gpio = <&pio 7 23 0>; + gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 809d448ecf30..27ca1a16ca91 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -15,6 +15,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Cubietech Cubieboard2"; compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20"; @@ -25,7 +27,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -120,12 +122,12 @@ blue { label = "cubieboard2:blue:usr"; - gpios = <&pio 7 21 0>; + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; }; green { label = "cubieboard2:green:usr"; - gpios = <&pio 7 20 0>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 9812a3a34831..a6e88f8ce533 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -15,6 +15,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Cubietech Cubietruck"; compatible = "cubietech,cubietruck", "allwinner,sun7i-a20"; @@ -25,7 +27,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -168,34 +170,34 @@ blue { label = "cubietruck:blue:usr"; - gpios = <&pio 7 21 0>; + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; }; orange { label = "cubietruck:orange:usr"; - gpios = <&pio 7 20 0>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; }; white { label = "cubietruck:white:usr"; - gpios = <&pio 7 11 0>; + gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; }; green { label = "cubietruck:green:usr"; - gpios = <&pio 7 7 0>; + gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; }; }; reg_ahci_5v: ahci-5v { pinctrl-0 = <&ahci_pwr_pin_cubietruck>; - gpio = <&pio 7 12 0>; + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; status = "okay"; }; reg_usb0_vbus: usb0-vbus { pinctrl-0 = <&usb0_vbus_pin_a>; - gpio = <&pio 7 17 0>; + gpio = <&pio 7 17 GPIO_ACTIVE_HIGH>; status = "okay"; }; @@ -215,6 +217,6 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpio = <&pio 7 9 0>; + gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts index add6d95a0246..3b8bd22296e6 100644 --- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts @@ -15,6 +15,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Merrii A20 Hummingbird"; compatible = "merrii,a20-hummingbird", "allwinner,sun7i-a20"; @@ -25,7 +27,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -184,7 +186,7 @@ phy-mode = "rgmii"; phy-supply = <®_gmac_vdd>; /* phy reset config */ - snps,reset-gpio = <&pio 0 17 0>; /* PA17 */ + snps,reset-gpio = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ snps,reset-active-low; /* wait 1s after reset, otherwise fail to read phy id */ snps,reset-delays-us = <0 10000 1000000>; @@ -198,13 +200,13 @@ reg_ahci_5v: ahci-5v { pinctrl-0 = <&ahci_pwr_pin_a20_hummingbird>; - gpio = <&pio 7 15 0>; /* PH15 */ + gpio = <&pio 7 15 GPIO_ACTIVE_HIGH>; /* PH15 */ status = "okay"; }; reg_usb1_vbus: usb1-vbus { pinctrl-0 = <&usb1_vbus_pin_a20_hummingbird>; - gpio = <&pio 7 2 0>; /* PH2 */ + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */ status = "okay"; }; @@ -220,7 +222,7 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; enable-active-high; - gpio = <&pio 7 9 0>; /* PH9 */ + gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */ }; reg_gmac_vdd: gmac_vdd { @@ -231,6 +233,6 @@ regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; enable-active-high; - gpio = <&pio 7 16 0>; /* PH16 */ + gpio = <&pio 7 16 GPIO_ACTIVE_HIGH>; /* PH16 */ }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts index 780f1aa98429..a422f19a0261 100644 --- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts @@ -49,6 +49,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "I12 / Q5 / QT840A A20 tvbox"; compatible = "allwinner,i12-tvbox", "allwinner,sun7i-a20"; @@ -59,7 +61,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -179,12 +181,12 @@ red { label = "i12_tvbox:red:usr"; - gpios = <&pio 7 9 1>; + gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; }; blue { label = "i12_tvbox:blue:usr"; - gpios = <&pio 7 20 0>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; }; }; @@ -204,7 +206,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpio = <&pio 7 2 0>; + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; }; reg_vmmc3_io: vmmc3-io { @@ -217,7 +219,7 @@ /* This controls VCC-PI, must be always on! */ regulator-always-on; enable-active-high; - gpio = <&pio 7 12 0>; + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; }; reg_gmac_3v3: gmac-3v3 { @@ -229,6 +231,6 @@ regulator-max-microvolt = <3300000>; startup-delay-us = <50000>; enable-active-high; - gpio = <&pio 7 21 0>; + gpio = <&pio 7 21 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts index 82046234d9e8..3e40ae74f5e2 100644 --- a/arch/arm/boot/dts/sun7i-a20-m3.dts +++ b/arch/arm/boot/dts/sun7i-a20-m3.dts @@ -51,6 +51,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Mele M3"; compatible = "mele,m3", "allwinner,sun7i-a20"; @@ -61,7 +63,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -154,7 +156,7 @@ blue { label = "m3:blue:usr"; - gpios = <&pio 7 20 0>; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts index 996da8be0e44..0423b1cbb365 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts @@ -52,6 +52,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Olimex A20-OLinuXino-LIME"; compatible = "olimex,a20-olinuxino-lime", "allwinner,sun7i-a20"; @@ -62,7 +64,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -152,14 +154,14 @@ green { label = "a20-olinuxino-lime:green:usr"; - gpios = <&pio 7 2 0>; + gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_ahci_5v: ahci-5v { pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>; - gpio = <&pio 2 3 0>; + gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts index 5fda1e02acdb..ce1e28afa2fe 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts @@ -49,6 +49,8 @@ #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Olimex A20-OLinuXino-LIME2"; compatible = "olimex,a20-olinuxino-lime2", "allwinner,sun7i-a20"; @@ -59,7 +61,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -199,14 +201,14 @@ green { label = "a20-olinuxino-lime2:green:usr"; - gpios = <&pio 7 2 0>; + gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; reg_ahci_5v: ahci-5v { pinctrl-0 = <&ahci_pwr_pin_olinuxinolime>; - gpio = <&pio 2 3 0>; + gpio = <&pio 2 3 GPIO_ACTIVE_HIGH>; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index c00badd96cf9..ae3dd3953212 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -14,6 +14,8 @@ /dts-v1/; #include "sun7i-a20.dtsi" #include "sunxi-common-regulators.dtsi" + +#include #include / { @@ -37,7 +39,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -47,7 +49,7 @@ pinctrl-0 = <&mmc3_pins_a>, <&mmc3_cd_pin_olinuxinom>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 11 0>; /* PH11 */ + cd-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */ cd-inverted; status = "okay"; }; @@ -221,7 +223,7 @@ green { label = "a20-olinuxino-micro:green:usr"; - gpios = <&pio 7 2 0>; + gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; default-state = "on"; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index eb7b8878303d..acce93300abf 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -63,7 +63,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; - cd-gpios = <&pio 7 1 0>; /* PH1 */ + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ cd-inverted; status = "okay"; }; @@ -204,7 +204,7 @@ }; reg_ahci_5v: ahci-5v { - gpio = <&pio 7 2 0>; + gpio = <&pio 7 2 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts index adc3a54b6612..72ece67258f4 100644 --- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts @@ -51,6 +51,8 @@ #include "sun8i-a23.dtsi" #include "sunxi-common-regulators.dtsi" +#include + / { model = "Ippo Q8H Dual Core Tablet (v5)"; compatible = "ippo,q8h-v5", "allwinner,sun8i-a23"; @@ -69,7 +71,7 @@ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8h>; vmmc-supply = <®_vcc3v0>; bus-width = <4>; - cd-gpios = <&pio 1 4 0>; /* PB4 */ + cd-gpios = <&pio 1 4 GPIO_ACTIVE_HIGH>; /* PB4 */ cd-inverted; status = "okay"; }; diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 7fe242a8134b..8868c946e034 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -50,6 +50,8 @@ /dts-v1/; #include "sun9i-a80.dtsi" +#include + / { model = "Merrii A80 Optimus Board"; compatible = "merrii,a80-optimus", "allwinner,sun9i-a80"; @@ -106,14 +108,14 @@ led2 { label = "optimus:led2:usr"; - gpios = <&pio 7 1 0>; + gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; }; /* led3 is on PM15, in R_PIO */ led4 { label = "optimus:led4:usr"; - gpios = <&pio 7 0 0>; + gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>; }; }; }; diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi index d8876634f965..d6b7983cf16a 100644 --- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi @@ -47,6 +47,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include + / { soc@01c00000 { pio: pinctrl@01c20800 { @@ -89,7 +91,7 @@ regulator-max-microvolt = <5000000>; regulator-boot-on; enable-active-high; - gpio = <&pio 1 8 0>; + gpio = <&pio 1 8 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -101,7 +103,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&pio 1 9 0>; + gpio = <&pio 1 9 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -113,7 +115,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&pio 7 6 0>; + gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -125,7 +127,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&pio 7 3 0>; + gpio = <&pio 7 3 GPIO_ACTIVE_HIGH>; status = "disabled"; }; -- cgit v1.2.3 From 1f9f6a78735f56f5d718565b235c7e0188933e2d Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:56 +0100 Subject: ARM: sunxi: DT: Convert the DTs to use a header for the DMA arguments The DMA engine for the A10/A20 and derivatives require an opaque extra argument. Add a dt-bindings header, and convert the device trees to it. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 14 +++++++--- arch/arm/boot/dts/sun5i-a10s.dtsi | 11 ++++++-- arch/arm/boot/dts/sun5i-a13.dtsi | 11 ++++++-- arch/arm/boot/dts/sun7i-a20.dtsi | 14 +++++++--- include/dt-bindings/dma/sun4i-a10.h | 56 +++++++++++++++++++++++++++++++++++++ 5 files changed, 92 insertions(+), 14 deletions(-) create mode 100644 include/dt-bindings/dma/sun4i-a10.h (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 94283a5fa77c..fb413e49fa42 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -12,6 +12,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&intc>; @@ -367,7 +369,8 @@ interrupts = <10>; clocks = <&ahb_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 27>, <&dma 1 26>; + dmas = <&dma SUN4I_DMA_DEDICATED 27>, + <&dma SUN4I_DMA_DEDICATED 26>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -380,7 +383,8 @@ interrupts = <11>; clocks = <&ahb_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 9>, <&dma 1 8>; + dmas = <&dma SUN4I_DMA_DEDICATED 9>, + <&dma SUN4I_DMA_DEDICATED 8>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -477,7 +481,8 @@ interrupts = <12>; clocks = <&ahb_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 29>, <&dma 1 28>; + dmas = <&dma SUN4I_DMA_DEDICATED 29>, + <&dma SUN4I_DMA_DEDICATED 28>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -518,7 +523,8 @@ interrupts = <50>; clocks = <&ahb_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 31>, <&dma 1 30>; + dmas = <&dma SUN4I_DMA_DEDICATED 31>, + <&dma SUN4I_DMA_DEDICATED 30>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 452b774332cc..d0b7182e6fdd 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -13,6 +13,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&intc>; @@ -320,7 +322,8 @@ interrupts = <10>; clocks = <&ahb_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 27>, <&dma 1 26>; + dmas = <&dma SUN4I_DMA_DEDICATED 27>, + <&dma SUN4I_DMA_DEDICATED 26>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -333,7 +336,8 @@ interrupts = <11>; clocks = <&ahb_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 9>, <&dma 1 8>; + dmas = <&dma SUN4I_DMA_DEDICATED 9>, + <&dma SUN4I_DMA_DEDICATED 8>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -421,7 +425,8 @@ interrupts = <12>; clocks = <&ahb_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 29>, <&dma 1 28>; + dmas = <&dma SUN4I_DMA_DEDICATED 29>, + <&dma SUN4I_DMA_DEDICATED 28>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 93f1c8435019..43441fc3b1a1 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -13,6 +13,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&intc>; @@ -304,7 +306,8 @@ interrupts = <10>; clocks = <&ahb_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 27>, <&dma 1 26>; + dmas = <&dma SUN4I_DMA_DEDICATED 27>, + <&dma SUN4I_DMA_DEDICATED 26>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -317,7 +320,8 @@ interrupts = <11>; clocks = <&ahb_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 9>, <&dma 1 8>; + dmas = <&dma SUN4I_DMA_DEDICATED 9>, + <&dma SUN4I_DMA_DEDICATED 8>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -380,7 +384,8 @@ interrupts = <12>; clocks = <&ahb_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 29>, <&dma 1 28>; + dmas = <&dma SUN4I_DMA_DEDICATED 29>, + <&dma SUN4I_DMA_DEDICATED 28>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 8c0507054757..cd492ac9b200 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&gic>; @@ -479,7 +481,8 @@ interrupts = <0 10 4>; clocks = <&ahb_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 27>, <&dma 1 26>; + dmas = <&dma SUN4I_DMA_DEDICATED 27>, + <&dma SUN4I_DMA_DEDICATED 26>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -492,7 +495,8 @@ interrupts = <0 11 4>; clocks = <&ahb_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 9>, <&dma 1 8>; + dmas = <&dma SUN4I_DMA_DEDICATED 9>, + <&dma SUN4I_DMA_DEDICATED 8>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -589,7 +593,8 @@ interrupts = <0 12 4>; clocks = <&ahb_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 29>, <&dma 1 28>; + dmas = <&dma SUN4I_DMA_DEDICATED 29>, + <&dma SUN4I_DMA_DEDICATED 28>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; @@ -630,7 +635,8 @@ interrupts = <0 50 4>; clocks = <&ahb_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; - dmas = <&dma 1 31>, <&dma 1 30>; + dmas = <&dma SUN4I_DMA_DEDICATED 31>, + <&dma SUN4I_DMA_DEDICATED 30>; dma-names = "rx", "tx"; status = "disabled"; #address-cells = <1>; diff --git a/include/dt-bindings/dma/sun4i-a10.h b/include/dt-bindings/dma/sun4i-a10.h new file mode 100644 index 000000000000..8caba9ef7e9d --- /dev/null +++ b/include/dt-bindings/dma/sun4i-a10.h @@ -0,0 +1,56 @@ +/* + * Copyright 2014 Maxime Ripard + * + * Maxime Ripard + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __DT_BINDINGS_DMA_SUN4I_A10_H_ +#define __DT_BINDINGS_DMA_SUN4I_A10_H_ + +#define SUN4I_DMA_NORMAL 0 +#define SUN4I_DMA_DEDICATED 1 + +#endif /* __DT_BINDINGS_DMA_SUN4I_A10_H_ */ -- cgit v1.2.3 From 092a0c3b18ce8f2207591846dad5c9071ed2f832 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:57 +0100 Subject: ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-a1000.dts | 9 +- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 5 +- arch/arm/boot/dts/sun4i-a10-hackberry.dts | 9 +- arch/arm/boot/dts/sun4i-a10-mini-xplus.dts | 3 +- arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts | 9 +- arch/arm/boot/dts/sun4i-a10.dtsi | 69 ++++++------- arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 17 ++-- arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts | 13 +-- arch/arm/boot/dts/sun5i-a10s.dtsi | 37 +++---- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 5 +- arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts | 13 +-- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 13 +-- arch/arm/boot/dts/sun5i-a13.dtsi | 25 ++--- arch/arm/boot/dts/sun6i-a31-app4-evb1.dts | 5 +- arch/arm/boot/dts/sun6i-a31-colombus.dts | 11 ++- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 11 ++- arch/arm/boot/dts/sun6i-a31-m9.dts | 13 +-- arch/arm/boot/dts/sun6i-a31.dtsi | 38 ++++---- arch/arm/boot/dts/sun6i-a31s-cs908.dts | 6 +- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 13 +-- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 5 +- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 19 ++-- arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 17 ++-- arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 19 ++-- arch/arm/boot/dts/sun7i-a20-m3.dts | 5 +- arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 9 +- arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 9 +- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 9 +- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 9 +- arch/arm/boot/dts/sun7i-a20.dtsi | 117 ++++++++++++----------- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 5 +- arch/arm/boot/dts/sun8i-a23.dtsi | 30 +++--- arch/arm/boot/dts/sun9i-a80-optimus.dts | 9 +- arch/arm/boot/dts/sun9i-a80.dtsi | 14 +-- arch/arm/boot/dts/sunxi-common-regulators.dtsi | 17 ++-- include/dt-bindings/pinctrl/sun4i-a10.h | 62 ++++++++++++ 36 files changed, 390 insertions(+), 289 deletions(-) create mode 100644 include/dt-bindings/pinctrl/sun4i-a10.h (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts b/arch/arm/boot/dts/sun4i-a10-a1000.dts index 532ab3bd9735..b67e5be618cf 100644 --- a/arch/arm/boot/dts/sun4i-a10-a1000.dts +++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Mele A1000"; @@ -114,15 +115,15 @@ emac_power_pin_a1000: emac_power_pin@0 { allwinner,pins = "PH15"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_a1000: led_pins@0 { allwinner,pins = "PH10", "PH20"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 53f12b71e837..87ac84db836d 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -51,6 +51,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Cubietech Cubieboard"; @@ -113,8 +114,8 @@ led_pins_cubieboard: led_pins@0 { allwinner,pins = "PH20", "PH21"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts index be1f29e50811..d3f73ea25567 100644 --- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts +++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Miniand Hackberry"; @@ -113,15 +114,15 @@ hackberry_hogs: hogs@0 { allwinner,pins = "PH19"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb2_vbus_pin_hackberry: usb2_vbus_pin@0 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts index 1db02eb3796c..eb5fd6904a69 100644 --- a/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts +++ b/arch/arm/boot/dts/sun4i-a10-mini-xplus.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "PineRiver Mini X-Plus"; @@ -93,7 +94,7 @@ pinctrl@01c20800 { ir0_pins_a: ir0@0 { /* The ir receiver is not always populated */ - allwinner,pull = <1>; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts index 5d9b86839f16..ab7891c43231 100644 --- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Olimex A10-OLinuXino-LIME"; @@ -112,15 +113,15 @@ ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxinolime: led_pins@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index fb413e49fa42..fe190e89b5b5 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -13,6 +13,7 @@ #include "skeleton.dtsi" #include +#include / { interrupt-parent = <&intc>; @@ -552,57 +553,57 @@ pwm0_pins_a: pwm0@0 { allwinner,pins = "PB2"; allwinner,function = "pwm"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; pwm1_pins_a: pwm1@0 { allwinner,pins = "PI3"; allwinner,function = "pwm"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart0_pins_b: uart0@1 { allwinner,pins = "PF2", "PF4"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart1_pins_a: uart1@0 { allwinner,pins = "PA10", "PA11"; allwinner,function = "uart1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PB0", "PB1"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PB18", "PB19"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PB20", "PB21"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; emac_pins_a: emac0@0 { @@ -612,64 +613,64 @@ "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; allwinner,function = "emac"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { allwinner,pins = "PH1"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; ir0_pins_a: ir0@0 { allwinner,pins = "PB3","PB4"; allwinner,function = "ir0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; ir1_pins_a: ir1@0 { allwinner,pins = "PB22","PB23"; allwinner,function = "ir1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi0_pins_a: spi0@0 { allwinner,pins = "PI10", "PI11", "PI12", "PI13"; allwinner,function = "spi0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi1_pins_a: spi1@0 { allwinner,pins = "PI16", "PI17", "PI18", "PI19"; allwinner,function = "spi1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi2_pins_a: spi2@0 { allwinner,pins = "PB14", "PB15", "PB16", "PB17"; allwinner,function = "spi2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi2_pins_b: spi2@1 { allwinner,pins = "PC19", "PC20", "PC21", "PC22"; allwinner,function = "spi2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts index f80d2facc158..6b8180507139 100644 --- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts @@ -53,6 +53,7 @@ #include #include +#include / { model = "Olimex A10s-Olinuxino Micro"; @@ -111,29 +112,29 @@ mmc0_cd_pin_olinuxino_micro: mmc0_cd_pin@0 { allwinner,pins = "PG1"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; mmc1_cd_pin_olinuxino_micro: mmc1_cd_pin@0 { allwinner,pins = "PG13"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxino: led_pins@0 { allwinner,pins = "PE3"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_olinuxino_m: usb1_vbus_pin@0 { allwinner,pins = "PB10"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts index da2d2535b1bc..7deddfc9df8b 100644 --- a/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts +++ b/arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "R7 A10s hdmi tv-stick"; @@ -92,22 +93,22 @@ mmc0_cd_pin_r7: mmc0_cd_pin@0 { allwinner,pins = "PG1"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_r7: led_pins@0 { allwinner,pins = "PB2"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_r7: usb1_vbus_pin@0 { allwinner,pins = "PG13"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index d0b7182e6fdd..241d69d0e7d6 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -14,6 +14,7 @@ #include "skeleton.dtsi" #include +#include / { interrupt-parent = <&intc>; @@ -454,22 +455,22 @@ uart0_pins_a: uart0@0 { allwinner,pins = "PB19", "PB20"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart2_pins_a: uart2@0 { allwinner,pins = "PC18", "PC19"; allwinner,function = "uart2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart3_pins_a: uart3@0 { allwinner,pins = "PG9", "PG10"; allwinner,function = "uart3"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; emac_pins_a: emac0@0 { @@ -479,43 +480,43 @@ "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; allwinner,function = "emac"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PB0", "PB1"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PB15", "PB16"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PB17", "PB18"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc1_pins_a: mmc1@0 { allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8"; allwinner,function = "mmc1"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index bccc1bcaa868..99a5968720b4 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "HSG H702"; @@ -87,8 +88,8 @@ mmc0_cd_pin_h702: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts index c30180794c54..64d516200dae 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts @@ -51,6 +51,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Olimex A13-Olinuxino Micro"; @@ -84,22 +85,22 @@ mmc0_cd_pin_olinuxinom: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxinom: led_pins@0 { allwinner,pins = "PG9"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_olinuxinom: usb1_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index e28a0765429a..3649e78045eb 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -53,6 +53,7 @@ #include #include +#include / { model = "Olimex A13-Olinuxino"; @@ -86,22 +87,22 @@ mmc0_cd_pin_olinuxino: mmc0_cd_pin@0 { allwinner,pins = "PG0"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxino: led_pins@0 { allwinner,pins = "PG9"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_olinuxino: usb1_vbus_pin@0 { allwinner,pins = "PG11"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 43441fc3b1a1..2d2734a03672 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -14,6 +14,7 @@ #include "skeleton.dtsi" #include +#include / { interrupt-parent = <&intc>; @@ -413,43 +414,43 @@ uart1_pins_a: uart1@0 { allwinner,pins = "PE10", "PE11"; allwinner,function = "uart1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart1_pins_b: uart1@1 { allwinner,pins = "PG3", "PG4"; allwinner,function = "uart1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PB0", "PB1"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PB15", "PB16"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PB17", "PB18"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts index 0d86e8cb2ca2..be9f5ee6b59e 100644 --- a/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts +++ b/arch/arm/boot/dts/sun6i-a31-app4-evb1.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Allwinner A31 APP4 EVB1 Evaluation Board"; @@ -66,8 +67,8 @@ usb1_vbus_pin_a: usb1_vbus_pin@0 { allwinner,pins = "PH27"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-colombus.dts b/arch/arm/boot/dts/sun6i-a31-colombus.dts index deab8f357ad7..84630e56acd7 100644 --- a/arch/arm/boot/dts/sun6i-a31-colombus.dts +++ b/arch/arm/boot/dts/sun6i-a31-colombus.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "WITS A31 Colombus Evaluation Board"; @@ -83,21 +84,21 @@ pio: pinctrl@01c20800 { mmc0_pins_a: mmc0@0 { - allwinner,pull = <1>; + allwinner,pull = ; }; mmc0_cd_pin_colombus: mmc0_cd_pin@0 { allwinner,pins = "PA8"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; usb2_vbus_pin_colombus: usb2_vbus_pin@0 { allwinner,pins = "PH24"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index 7364d22b33dd..ebd5f7854b1b 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Merrii A31 Hummingbird"; @@ -88,21 +89,21 @@ pio: pinctrl@01c20800 { mmc0_pins_a: mmc0@0 { /* external pull-ups missing for some pins */ - allwinner,pull = <1>; + allwinner,pull = ; }; mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 { allwinner,pins = "PA8"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_a: usb1_vbus_pin@0 { allwinner,pins = "PH24"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts b/arch/arm/boot/dts/sun6i-a31-m9.dts index 8018baa6814d..139a21e6b695 100644 --- a/arch/arm/boot/dts/sun6i-a31-m9.dts +++ b/arch/arm/boot/dts/sun6i-a31-m9.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Mele M9 / A1000G Quad top set box"; @@ -87,22 +88,22 @@ led_pins_m9: led_pins@0 { allwinner,pins = "PH13"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_cd_pin_m9: mmc0_cd_pin@0 { allwinner,pins = "PH22"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_m9: usb1_vbus_pin@0 { allwinner,pins = "PC27"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index b47d42ab1c1f..6d53d38ebde1 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&gic>; @@ -509,36 +511,36 @@ uart0_pins_a: uart0@0 { allwinner,pins = "PH20", "PH21"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PH14", "PH15"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PH16", "PH17"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PH18", "PH19"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_pins_mii_a: gmac_mii@0 { @@ -548,8 +550,8 @@ "PA20", "PA21", "PA22", "PA23", "PA24", "PA26", "PA27"; allwinner,function = "gmac"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_pins_gmii_a: gmac_gmii@0 { @@ -565,8 +567,8 @@ * data lines in GMII mode run at 125MHz and * might need a higher signal drive strength */ - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_pins_rgmii_a: gmac_rgmii@0 { @@ -579,8 +581,8 @@ * data lines in RGMII mode use DDR mode * and need a higher signal drive strength */ - allwinner,drive = <3>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; @@ -922,8 +924,8 @@ ir_pins_a: ir@0 { allwinner,pins = "PL4"; allwinner,function = "s_ir"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; }; diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts b/arch/arm/boot/dts/sun6i-a31s-cs908.dts index dc57ffa3e82c..bc3734f67cf0 100644 --- a/arch/arm/boot/dts/sun6i-a31s-cs908.dts +++ b/arch/arm/boot/dts/sun6i-a31s-cs908.dts @@ -48,6 +48,8 @@ /dts-v1/; #include "sun6i-a31s.dtsi" +#include + / { model = "CSQ CS908 top set box"; compatible = "csq,cs908", "allwinner,sun6i-a31s"; @@ -73,8 +75,8 @@ usb1_vbus_pin_csq908: usb1_vbus_pin@0 { allwinner,pins = "PC27"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index e273f0e0627a..d5e5d39ff3c0 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "LeMaker Banana Pi"; @@ -104,22 +105,22 @@ mmc0_cd_pin_bananapi: mmc0_cd_pin@0 { allwinner,pins = "PH10"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_power_pin_bananapi: gmac_power_pin@0 { allwinner,pins = "PH23"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_bananapi: led_pins@0 { allwinner,pins = "PH24"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 27ca1a16ca91..9dc4c10f682e 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Cubietech Cubieboard2"; @@ -63,8 +64,8 @@ led_pins_cubieboard2: led_pins@0 { allwinner,pins = "PH20", "PH21"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index a6e88f8ce533..673846245cd9 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Cubietech Cubietruck"; @@ -72,35 +73,35 @@ pinctrl@01c20800 { mmc3_pins_a: mmc3@0 { /* AP6210 requires pull-up */ - allwinner,pull = <1>; + allwinner,pull = ; }; vmmc3_pin_cubietruck: vmmc3_pin@0 { allwinner,pins = "PH9"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_cubietruck: led_pins@0 { allwinner,pins = "PH7", "PH11", "PH20", "PH21"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb0_vbus_pin_a: usb0_vbus_pin@0 { allwinner,pins = "PH17"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts index 3b8bd22296e6..4356a1709559 100644 --- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Merrii A20 Hummingbird"; @@ -72,29 +73,29 @@ ahci_pwr_pin_a20_hummingbird: ahci_pwr_pin@0 { allwinner,pins = "PH15"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_a20_hummingbird: usb1_vbus_pin@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc3_vdd_pin_a20_hummingbird: mmc3_vdd_pin@0 { allwinner,pins = "PH9"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_vdd_pin_a20_hummingbird: gmac_vdd_pin@0 { allwinner,pins = "PH16"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts index a422f19a0261..275e49ffb78b 100644 --- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "I12 / Q5 / QT840A A20 tvbox"; @@ -100,35 +101,35 @@ pinctrl@01c20800 { mmc3_pins_a: mmc3@0 { /* AP6210 / AP6330 requires pull-up */ - allwinner,pull = <1>; + allwinner,pull = ; }; vmmc3_pin_i12_tvbox: vmmc3_pin@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; vmmc3_io_pin_i12_tvbox: vmmc3_io_pin@0 { allwinner,pins = "PH12"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_power_pin_i12_tvbox: gmac_power_pin@0 { allwinner,pins = "PH21"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_i12_tvbox: led_pins@0 { allwinner,pins = "PH9", "PH20"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts index 3e40ae74f5e2..15be3ea80088 100644 --- a/arch/arm/boot/dts/sun7i-a20-m3.dts +++ b/arch/arm/boot/dts/sun7i-a20-m3.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Mele M3"; @@ -103,8 +104,8 @@ led_pins_m3: led_pins@0 { allwinner,pins = "PH20"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts index 0423b1cbb365..f74405cd18b6 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts @@ -53,6 +53,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Olimex A20-OLinuXino-LIME"; @@ -100,15 +101,15 @@ ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxinolime: led_pins@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts index ce1e28afa2fe..7176721f6c6b 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Olimex A20-OLinuXino-LIME2"; @@ -97,15 +98,15 @@ ahci_pwr_pin_olinuxinolime: ahci_pwr_pin@1 { allwinner,pins = "PC3"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxinolime: led_pins@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index ae3dd3953212..63e4d54bdd0c 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -17,6 +17,7 @@ #include #include +#include / { model = "Olimex A20-Olinuxino Micro"; @@ -91,15 +92,15 @@ mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 { allwinner,pins = "PH11"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; led_pins_olinuxino: led_pins@0 { allwinner,pins = "PH2"; allwinner,function = "gpio_out"; - allwinner,drive = <1>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index acce93300abf..0a668d9166c5 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -52,6 +52,7 @@ #include #include +#include / { model = "LinkSprite pcDuino3"; @@ -103,15 +104,15 @@ led_pins_pcduino3: led_pins@0 { allwinner,pins = "PH15", "PH16"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; key_pins_pcduino3: key_pins@0 { allwinner,pins = "PH17", "PH18", "PH19"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index cd492ac9b200..b9eba9370934 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -50,6 +50,7 @@ #include "skeleton.dtsi" #include +#include / { interrupt-parent = <&gic>; @@ -657,99 +658,99 @@ pwm0_pins_a: pwm0@0 { allwinner,pins = "PB2"; allwinner,function = "pwm"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; pwm1_pins_a: pwm1@0 { allwinner,pins = "PI3"; allwinner,function = "pwm"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart0_pins_a: uart0@0 { allwinner,pins = "PB22", "PB23"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart2_pins_a: uart2@0 { allwinner,pins = "PI16", "PI17", "PI18", "PI19"; allwinner,function = "uart2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart3_pins_a: uart3@0 { allwinner,pins = "PG6", "PG7", "PG8", "PG9"; allwinner,function = "uart3"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart3_pins_b: uart3@1 { allwinner,pins = "PH0", "PH1"; allwinner,function = "uart3"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart4_pins_a: uart4@0 { allwinner,pins = "PG10", "PG11"; allwinner,function = "uart4"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart5_pins_a: uart5@0 { allwinner,pins = "PI10", "PI11"; allwinner,function = "uart5"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart6_pins_a: uart6@0 { allwinner,pins = "PI12", "PI13"; allwinner,function = "uart6"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart7_pins_a: uart7@0 { allwinner,pins = "PI20", "PI21"; allwinner,function = "uart7"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PB0", "PB1"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PB18", "PB19"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PB20", "PB21"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c3_pins_a: i2c3@0 { allwinner,pins = "PI0", "PI1"; allwinner,function = "i2c3"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; emac_pins_a: emac0@0 { @@ -759,22 +760,22 @@ "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; allwinner,function = "emac"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; clk_out_a_pins_a: clk_out_a@0 { allwinner,pins = "PI12"; allwinner,function = "clk_out_a"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; clk_out_b_pins_a: clk_out_b@0 { allwinner,pins = "PI13"; allwinner,function = "clk_out_b"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_pins_mii_a: gmac_mii@0 { @@ -784,8 +785,8 @@ "PA11", "PA12", "PA13", "PA14", "PA15", "PA16"; allwinner,function = "gmac"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; gmac_pins_rgmii_a: gmac_rgmii@0 { @@ -799,78 +800,78 @@ * data lines in RGMII mode use DDR mode * and need a higher signal drive strength */ - allwinner,drive = <3>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi0_pins_a: spi0@0 { allwinner,pins = "PI10", "PI11", "PI12", "PI13", "PI14"; allwinner,function = "spi0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi1_pins_a: spi1@0 { allwinner,pins = "PI16", "PI17", "PI18", "PI19"; allwinner,function = "spi1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi2_pins_a: spi2@0 { allwinner,pins = "PC19", "PC20", "PC21", "PC22"; allwinner,function = "spi2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; spi2_pins_b: spi2@1 { allwinner,pins = "PB14", "PB15", "PB16", "PB17"; allwinner,function = "spi2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_cd_pin_reference_design: mmc0_cd_pin@0 { allwinner,pins = "PH1"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; mmc2_pins_a: mmc2@0 { allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11"; allwinner,function = "mmc2"; - allwinner,drive = <2>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; mmc3_pins_a: mmc3@0 { allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9"; allwinner,function = "mmc3"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; ir0_pins_a: ir0@0 { allwinner,pins = "PB3","PB4"; allwinner,function = "ir0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; ir1_pins_a: ir1@0 { allwinner,pins = "PB22","PB23"; allwinner,function = "ir1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts index 72ece67258f4..1da31d0e7338 100644 --- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include / { model = "Ippo Q8H Dual Core Tablet (v5)"; @@ -80,8 +81,8 @@ mmc0_cd_pin_q8h: mmc0_cd_pin@0 { allwinner,pins = "PB4"; allwinner,function = "gpio_in"; - allwinner,drive = <0>; - allwinner,pull = <1>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 4b0ae502f59e..74b4ac086cca 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + / { interrupt-parent = <&gic>; @@ -297,43 +299,43 @@ uart0_pins_a: uart0@0 { allwinner,pins = "PF2", "PF4"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5"; allwinner,function = "mmc0"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; mmc1_pins_a: mmc1@0 { allwinner,pins = "PG0","PG1","PG2","PG3","PG4","PG5"; allwinner,function = "mmc1"; - allwinner,drive = <2>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c0_pins_a: i2c0@0 { allwinner,pins = "PH2", "PH3"; allwinner,function = "i2c0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c1_pins_a: i2c1@0 { allwinner,pins = "PH4", "PH5"; allwinner,function = "i2c1"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; i2c2_pins_a: i2c2@0 { allwinner,pins = "PE12", "PE13"; allwinner,function = "i2c2"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; @@ -554,8 +556,8 @@ r_uart_pins_a: r_uart@0 { allwinner,pins = "PL2", "PL3"; allwinner,function = "s_uart"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; }; diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 8868c946e034..58f5cb346519 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -51,6 +51,7 @@ #include "sun9i-a80.dtsi" #include +#include / { model = "Merrii A80 Optimus Board"; @@ -64,19 +65,19 @@ pio: pinctrl@06000800 { i2c3_pins_a: i2c3@0 { /* Enable internal pull-up */ - allwinner,pull = <1>; + allwinner,pull = ; }; led_pins_optimus: led-pins@0 { allwinner,pins = "PH0", "PH1"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart4_pins_a: uart4@0 { /* Enable internal pull-up */ - allwinner,pull = <1>; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 90d0450850e9..de31b210e2c1 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -49,6 +49,8 @@ #include "skeleton64.dtsi" +#include + / { interrupt-parent = <&gic>; @@ -355,22 +357,22 @@ i2c3_pins_a: i2c3@0 { allwinner,pins = "PG10", "PG11"; allwinner,function = "i2c3"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart0_pins_a: uart0@0 { allwinner,pins = "PH12", "PH13"; allwinner,function = "uart0"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; uart4_pins_a: uart4@0 { allwinner,pins = "PG12", "PG13", "PG14", "PG15"; allwinner,function = "uart4"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi index d6b7983cf16a..b1d64dd183f4 100644 --- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi @@ -48,6 +48,7 @@ */ #include +#include / { soc@01c00000 { @@ -55,29 +56,29 @@ ahci_pwr_pin_a: ahci_pwr_pin@0 { allwinner,pins = "PB8"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb0_vbus_pin_a: usb0_vbus_pin@0 { allwinner,pins = "PB9"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb1_vbus_pin_a: usb1_vbus_pin@0 { allwinner,pins = "PH6"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; usb2_vbus_pin_a: usb2_vbus_pin@0 { allwinner,pins = "PH3"; allwinner,function = "gpio_out"; - allwinner,drive = <0>; - allwinner,pull = <0>; + allwinner,drive = ; + allwinner,pull = ; }; }; }; diff --git a/include/dt-bindings/pinctrl/sun4i-a10.h b/include/dt-bindings/pinctrl/sun4i-a10.h new file mode 100644 index 000000000000..f7553c143b40 --- /dev/null +++ b/include/dt-bindings/pinctrl/sun4i-a10.h @@ -0,0 +1,62 @@ +/* + * Copyright 2014 Maxime Ripard + * + * Maxime Ripard + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#ifndef __DT_BINDINGS_PINCTRL_SUN4I_A10_H_ +#define __DT_BINDINGS_PINCTRL_SUN4I_A10_H_ + +#define SUN4I_PINCTRL_10_MA 0 +#define SUN4I_PINCTRL_20_MA 1 +#define SUN4I_PINCTRL_30_MA 2 +#define SUN4I_PINCTRL_40_MA 3 + +#define SUN4I_PINCTRL_NO_PULL 0 +#define SUN4I_PINCTRL_PULL_UP 1 +#define SUN4I_PINCTRL_PULL_DOWN 2 + +#endif /* __DT_BINDINGS_PINCTRL_SUN4I_A10_H_ */ -- cgit v1.2.3 From 19882b84d7d9b1888b03f35b2430de550b61e49d Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:58 +0100 Subject: ARM: sunxi: DT: Convert the DTs to use the GIC headers The GIC requires some extra opaque arguments to set the IRQ type and flags. Convert the DTs to using the common defines. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 99 ++++++++++++++++++----------------- arch/arm/boot/dts/sun7i-a20.dtsi | 108 ++++++++++++++++++++------------------- arch/arm/boot/dts/sun8i-a23.dtsi | 47 +++++++++-------- arch/arm/boot/dts/sun9i-a80.dtsi | 52 ++++++++++--------- 4 files changed, 158 insertions(+), 148 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 6d53d38ebde1..97b6c3393099 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + #include / { @@ -113,10 +115,10 @@ pmu { compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; - interrupts = <0 120 4>, - <0 121 4>, - <0 122 4>, - <0 123 4>; + interrupts = , + , + , + ; }; clocks { @@ -363,7 +365,7 @@ dma: dma-controller@01c02000 { compatible = "allwinner,sun6i-a31-dma"; reg = <0x01c02000 0x1000>; - interrupts = <0 50 4>; + interrupts = ; clocks = <&ahb1_gates 6>; resets = <&ahb1_rst 6>; #dma-cells = <1>; @@ -380,7 +382,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 8>; reset-names = "ahb"; - interrupts = <0 60 4>; + interrupts = ; status = "disabled"; }; @@ -391,7 +393,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 9>; reset-names = "ahb"; - interrupts = <0 61 4>; + interrupts = ; status = "disabled"; }; @@ -402,7 +404,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 10>; reset-names = "ahb"; - interrupts = <0 62 4>; + interrupts = ; status = "disabled"; }; @@ -413,7 +415,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 11>; reset-names = "ahb"; - interrupts = <0 63 4>; + interrupts = ; status = "disabled"; }; @@ -444,7 +446,7 @@ ehci0: usb@01c1a000 { compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; - interrupts = <0 72 4>; + interrupts = ; clocks = <&ahb1_gates 26>; resets = <&ahb1_rst 26>; phys = <&usbphy 1>; @@ -455,7 +457,7 @@ ohci0: usb@01c1a400 { compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; reg = <0x01c1a400 0x100>; - interrupts = <0 73 4>; + interrupts = ; clocks = <&ahb1_gates 29>, <&usb_clk 16>; resets = <&ahb1_rst 29>; phys = <&usbphy 1>; @@ -466,7 +468,7 @@ ehci1: usb@01c1b000 { compatible = "allwinner,sun6i-a31-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; - interrupts = <0 74 4>; + interrupts = ; clocks = <&ahb1_gates 27>; resets = <&ahb1_rst 27>; phys = <&usbphy 2>; @@ -477,7 +479,7 @@ ohci1: usb@01c1b400 { compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; reg = <0x01c1b400 0x100>; - interrupts = <0 75 4>; + interrupts = ; clocks = <&ahb1_gates 30>, <&usb_clk 17>; resets = <&ahb1_rst 30>; phys = <&usbphy 2>; @@ -488,7 +490,7 @@ ohci2: usb@01c1c400 { compatible = "allwinner,sun6i-a31-ohci", "generic-ohci"; reg = <0x01c1c400 0x100>; - interrupts = <0 77 4>; + interrupts = ; clocks = <&ahb1_gates 31>, <&usb_clk 18>; resets = <&ahb1_rst 31>; status = "disabled"; @@ -497,10 +499,10 @@ pio: pinctrl@01c20800 { compatible = "allwinner,sun6i-a31-pinctrl"; reg = <0x01c20800 0x400>; - interrupts = <0 11 4>, - <0 15 4>, - <0 16 4>, - <0 17 4>; + interrupts = , + , + , + ; clocks = <&apb1_gates 5>; gpio-controller; interrupt-controller; @@ -607,11 +609,11 @@ timer@01c20c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x01c20c00 0xa0>; - interrupts = <0 18 4>, - <0 19 4>, - <0 20 4>, - <0 21 4>, - <0 22 4>; + interrupts = , + , + , + , + ; clocks = <&osc24M>; }; @@ -623,7 +625,7 @@ uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; - interrupts = <0 0 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 16>; @@ -636,7 +638,7 @@ uart1: serial@01c28400 { compatible = "snps,dw-apb-uart"; reg = <0x01c28400 0x400>; - interrupts = <0 1 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 17>; @@ -649,7 +651,7 @@ uart2: serial@01c28800 { compatible = "snps,dw-apb-uart"; reg = <0x01c28800 0x400>; - interrupts = <0 2 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 18>; @@ -662,7 +664,7 @@ uart3: serial@01c28c00 { compatible = "snps,dw-apb-uart"; reg = <0x01c28c00 0x400>; - interrupts = <0 3 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 19>; @@ -675,7 +677,7 @@ uart4: serial@01c29000 { compatible = "snps,dw-apb-uart"; reg = <0x01c29000 0x400>; - interrupts = <0 4 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 20>; @@ -688,7 +690,7 @@ uart5: serial@01c29400 { compatible = "snps,dw-apb-uart"; reg = <0x01c29400 0x400>; - interrupts = <0 5 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 21>; @@ -701,7 +703,7 @@ i2c0: i2c@01c2ac00 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; - interrupts = <0 6 4>; + interrupts = ; clocks = <&apb2_gates 0>; resets = <&apb2_rst 0>; status = "disabled"; @@ -712,7 +714,7 @@ i2c1: i2c@01c2b000 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; - interrupts = <0 7 4>; + interrupts = ; clocks = <&apb2_gates 1>; resets = <&apb2_rst 1>; status = "disabled"; @@ -723,7 +725,7 @@ i2c2: i2c@01c2b400 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b400 0x400>; - interrupts = <0 8 4>; + interrupts = ; clocks = <&apb2_gates 2>; resets = <&apb2_rst 2>; status = "disabled"; @@ -734,7 +736,7 @@ i2c3: i2c@01c2b800 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b800 0x400>; - interrupts = <0 9 4>; + interrupts = ; clocks = <&apb2_gates 3>; resets = <&apb2_rst 3>; status = "disabled"; @@ -745,7 +747,7 @@ gmac: ethernet@01c30000 { compatible = "allwinner,sun7i-a20-gmac"; reg = <0x01c30000 0x1054>; - interrupts = <0 82 4>; + interrupts = ; interrupt-names = "macirq"; clocks = <&ahb1_gates 17>, <&gmac_tx_clk>; clock-names = "stmmaceth", "allwinner_gmac_tx"; @@ -762,10 +764,10 @@ timer@01c60000 { compatible = "allwinner,sun6i-a31-hstimer", "allwinner,sun7i-a20-hstimer"; reg = <0x01c60000 0x1000>; - interrupts = <0 51 4>, - <0 52 4>, - <0 53 4>, - <0 54 4>; + interrupts = , + , + , + ; clocks = <&ahb1_gates 19>; resets = <&ahb1_rst 19>; }; @@ -773,7 +775,7 @@ spi0: spi@01c68000 { compatible = "allwinner,sun6i-a31-spi"; reg = <0x01c68000 0x1000>; - interrupts = <0 65 4>; + interrupts = ; clocks = <&ahb1_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; dmas = <&dma 23>, <&dma 23>; @@ -785,7 +787,7 @@ spi1: spi@01c69000 { compatible = "allwinner,sun6i-a31-spi"; reg = <0x01c69000 0x1000>; - interrupts = <0 66 4>; + interrupts = ; clocks = <&ahb1_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; dmas = <&dma 24>, <&dma 24>; @@ -797,7 +799,7 @@ spi2: spi@01c6a000 { compatible = "allwinner,sun6i-a31-spi"; reg = <0x01c6a000 0x1000>; - interrupts = <0 67 4>; + interrupts = ; clocks = <&ahb1_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; dmas = <&dma 25>, <&dma 25>; @@ -809,7 +811,7 @@ spi3: spi@01c6b000 { compatible = "allwinner,sun6i-a31-spi"; reg = <0x01c6b000 0x1000>; - interrupts = <0 68 4>; + interrupts = ; clocks = <&ahb1_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; dmas = <&dma 26>, <&dma 26>; @@ -826,13 +828,14 @@ <0x01c86000 0x2000>; interrupt-controller; #interrupt-cells = <3>; - interrupts = <1 9 0xf04>; + interrupts = ; }; rtc: rtc@01f00000 { compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; - interrupts = <0 40 4>, <0 41 4>; + interrupts = , + ; }; nmi_intc: interrupt-controller@01f00c0c { @@ -840,7 +843,7 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x01f00c0c 0x38>; - interrupts = <0 32 4>; + interrupts = ; }; prcm@01f01400 { @@ -903,7 +906,7 @@ clocks = <&apb0_gates 1>, <&ir_clk>; clock-names = "apb", "ir"; resets = <&apb0_rst 1>; - interrupts = <0 37 4>; + interrupts = ; reg = <0x01f02000 0x40>; status = "disabled"; }; @@ -911,8 +914,8 @@ r_pio: pinctrl@01f02c00 { compatible = "allwinner,sun6i-a31-r-pinctrl"; reg = <0x01f02c00 0x400>; - interrupts = <0 45 4>, - <0 46 4>; + interrupts = , + ; clocks = <&apb0_gates 0>; resets = <&apb0_rst 0>; gpio-controller; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index b9eba9370934..252b4bf6084d 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + #include #include @@ -104,16 +106,16 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <1 13 0xf08>, - <1 14 0xf08>, - <1 11 0xf08>, - <1 10 0xf08>; + interrupts = , + , + , + ; }; pmu { compatible = "arm,cortex-a7-pmu", "arm,cortex-a15-pmu"; - interrupts = <0 120 4>, - <0 121 4>; + interrupts = , + ; }; clocks { @@ -465,13 +467,13 @@ interrupt-controller; #interrupt-cells = <2>; reg = <0x01c00030 0x0c>; - interrupts = <0 0 4>; + interrupts = ; }; dma: dma-controller@01c02000 { compatible = "allwinner,sun4i-a10-dma"; reg = <0x01c02000 0x1000>; - interrupts = <0 27 4>; + interrupts = ; clocks = <&ahb_gates 6>; #dma-cells = <2>; }; @@ -479,7 +481,7 @@ spi0: spi@01c05000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c05000 0x1000>; - interrupts = <0 10 4>; + interrupts = ; clocks = <&ahb_gates 20>, <&spi0_clk>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 27>, @@ -493,7 +495,7 @@ spi1: spi@01c06000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c06000 0x1000>; - interrupts = <0 11 4>; + interrupts = ; clocks = <&ahb_gates 21>, <&spi1_clk>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 9>, @@ -507,7 +509,7 @@ emac: ethernet@01c0b000 { compatible = "allwinner,sun4i-a10-emac"; reg = <0x01c0b000 0x1000>; - interrupts = <0 55 4>; + interrupts = ; clocks = <&ahb_gates 17>; status = "disabled"; }; @@ -525,7 +527,7 @@ reg = <0x01c0f000 0x1000>; clocks = <&ahb_gates 8>, <&mmc0_clk>; clock-names = "ahb", "mmc"; - interrupts = <0 32 4>; + interrupts = ; status = "disabled"; }; @@ -534,7 +536,7 @@ reg = <0x01c10000 0x1000>; clocks = <&ahb_gates 9>, <&mmc1_clk>; clock-names = "ahb", "mmc"; - interrupts = <0 33 4>; + interrupts = ; status = "disabled"; }; @@ -543,7 +545,7 @@ reg = <0x01c11000 0x1000>; clocks = <&ahb_gates 10>, <&mmc2_clk>; clock-names = "ahb", "mmc"; - interrupts = <0 34 4>; + interrupts = ; status = "disabled"; }; @@ -552,7 +554,7 @@ reg = <0x01c12000 0x1000>; clocks = <&ahb_gates 11>, <&mmc3_clk>; clock-names = "ahb", "mmc"; - interrupts = <0 35 4>; + interrupts = ; status = "disabled"; }; @@ -571,7 +573,7 @@ ehci0: usb@01c14000 { compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; reg = <0x01c14000 0x100>; - interrupts = <0 39 4>; + interrupts = ; clocks = <&ahb_gates 1>; phys = <&usbphy 1>; phy-names = "usb"; @@ -581,7 +583,7 @@ ohci0: usb@01c14400 { compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; reg = <0x01c14400 0x100>; - interrupts = <0 64 4>; + interrupts = ; clocks = <&usb_clk 6>, <&ahb_gates 2>; phys = <&usbphy 1>; phy-names = "usb"; @@ -591,7 +593,7 @@ spi2: spi@01c17000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c17000 0x1000>; - interrupts = <0 12 4>; + interrupts = ; clocks = <&ahb_gates 22>, <&spi2_clk>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 29>, @@ -605,7 +607,7 @@ ahci: sata@01c18000 { compatible = "allwinner,sun4i-a10-ahci"; reg = <0x01c18000 0x1000>; - interrupts = <0 56 4>; + interrupts = ; clocks = <&pll6 0>, <&ahb_gates 25>; status = "disabled"; }; @@ -613,7 +615,7 @@ ehci1: usb@01c1c000 { compatible = "allwinner,sun7i-a20-ehci", "generic-ehci"; reg = <0x01c1c000 0x100>; - interrupts = <0 40 4>; + interrupts = ; clocks = <&ahb_gates 3>; phys = <&usbphy 2>; phy-names = "usb"; @@ -623,7 +625,7 @@ ohci1: usb@01c1c400 { compatible = "allwinner,sun7i-a20-ohci", "generic-ohci"; reg = <0x01c1c400 0x100>; - interrupts = <0 65 4>; + interrupts = ; clocks = <&usb_clk 7>, <&ahb_gates 4>; phys = <&usbphy 2>; phy-names = "usb"; @@ -633,7 +635,7 @@ spi3: spi@01c1f000 { compatible = "allwinner,sun4i-a10-spi"; reg = <0x01c1f000 0x1000>; - interrupts = <0 50 4>; + interrupts = ; clocks = <&ahb_gates 23>, <&spi3_clk>; clock-names = "ahb", "mod"; dmas = <&dma SUN4I_DMA_DEDICATED 31>, @@ -647,7 +649,7 @@ pio: pinctrl@01c20800 { compatible = "allwinner,sun7i-a20-pinctrl"; reg = <0x01c20800 0x400>; - interrupts = <0 28 4>; + interrupts = ; clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; @@ -878,12 +880,12 @@ timer@01c20c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x01c20c00 0x90>; - interrupts = <0 22 4>, - <0 23 4>, - <0 24 4>, - <0 25 4>, - <0 67 4>, - <0 68 4>; + interrupts = , + , + , + , + , + ; clocks = <&osc24M>; }; @@ -895,7 +897,7 @@ rtc: rtc@01c20d00 { compatible = "allwinner,sun7i-a20-rtc"; reg = <0x01c20d00 0x20>; - interrupts = <0 24 4>; + interrupts = ; }; pwm: pwm@01c20e00 { @@ -910,7 +912,7 @@ compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 6>, <&ir0_clk>; clock-names = "apb", "ir"; - interrupts = <0 5 4>; + interrupts = ; reg = <0x01c21800 0x40>; status = "disabled"; }; @@ -919,7 +921,7 @@ compatible = "allwinner,sun4i-a10-ir"; clocks = <&apb0_gates 7>, <&ir1_clk>; clock-names = "apb", "ir"; - interrupts = <0 6 4>; + interrupts = ; reg = <0x01c21c00 0x40>; status = "disabled"; }; @@ -927,7 +929,7 @@ lradc: lradc@01c22800 { compatible = "allwinner,sun4i-a10-lradc-keys"; reg = <0x01c22800 0x100>; - interrupts = <0 31 4>; + interrupts = ; status = "disabled"; }; @@ -939,13 +941,13 @@ rtp: rtp@01c25000 { compatible = "allwinner,sun4i-a10-ts"; reg = <0x01c25000 0x100>; - interrupts = <0 29 4>; + interrupts = ; }; uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; - interrupts = <0 1 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 16>; @@ -955,7 +957,7 @@ uart1: serial@01c28400 { compatible = "snps,dw-apb-uart"; reg = <0x01c28400 0x400>; - interrupts = <0 2 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 17>; @@ -965,7 +967,7 @@ uart2: serial@01c28800 { compatible = "snps,dw-apb-uart"; reg = <0x01c28800 0x400>; - interrupts = <0 3 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 18>; @@ -975,7 +977,7 @@ uart3: serial@01c28c00 { compatible = "snps,dw-apb-uart"; reg = <0x01c28c00 0x400>; - interrupts = <0 4 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 19>; @@ -985,7 +987,7 @@ uart4: serial@01c29000 { compatible = "snps,dw-apb-uart"; reg = <0x01c29000 0x400>; - interrupts = <0 17 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 20>; @@ -995,7 +997,7 @@ uart5: serial@01c29400 { compatible = "snps,dw-apb-uart"; reg = <0x01c29400 0x400>; - interrupts = <0 18 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 21>; @@ -1005,7 +1007,7 @@ uart6: serial@01c29800 { compatible = "snps,dw-apb-uart"; reg = <0x01c29800 0x400>; - interrupts = <0 19 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 22>; @@ -1015,7 +1017,7 @@ uart7: serial@01c29c00 { compatible = "snps,dw-apb-uart"; reg = <0x01c29c00 0x400>; - interrupts = <0 20 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 23>; @@ -1025,7 +1027,7 @@ i2c0: i2c@01c2ac00 { compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; reg = <0x01c2ac00 0x400>; - interrupts = <0 7 4>; + interrupts = ; clocks = <&apb1_gates 0>; status = "disabled"; #address-cells = <1>; @@ -1035,7 +1037,7 @@ i2c1: i2c@01c2b000 { compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; reg = <0x01c2b000 0x400>; - interrupts = <0 8 4>; + interrupts = ; clocks = <&apb1_gates 1>; status = "disabled"; #address-cells = <1>; @@ -1045,7 +1047,7 @@ i2c2: i2c@01c2b400 { compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; reg = <0x01c2b400 0x400>; - interrupts = <0 9 4>; + interrupts = ; clocks = <&apb1_gates 2>; status = "disabled"; #address-cells = <1>; @@ -1055,7 +1057,7 @@ i2c3: i2c@01c2b800 { compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; reg = <0x01c2b800 0x400>; - interrupts = <0 88 4>; + interrupts = ; clocks = <&apb1_gates 3>; status = "disabled"; #address-cells = <1>; @@ -1065,7 +1067,7 @@ i2c4: i2c@01c2c000 { compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c"; reg = <0x01c2c000 0x400>; - interrupts = <0 89 4>; + interrupts = ; clocks = <&apb1_gates 15>; status = "disabled"; #address-cells = <1>; @@ -1075,7 +1077,7 @@ gmac: ethernet@01c50000 { compatible = "allwinner,sun7i-a20-gmac"; reg = <0x01c50000 0x10000>; - interrupts = <0 85 4>; + interrupts = ; interrupt-names = "macirq"; clocks = <&ahb_gates 49>, <&gmac_tx_clk>; clock-names = "stmmaceth", "allwinner_gmac_tx"; @@ -1090,10 +1092,10 @@ hstimer@01c60000 { compatible = "allwinner,sun7i-a20-hstimer"; reg = <0x01c60000 0x1000>; - interrupts = <0 81 4>, - <0 82 4>, - <0 83 4>, - <0 84 4>; + interrupts = , + , + , + ; clocks = <&ahb_gates 28>; }; @@ -1105,7 +1107,7 @@ <0x01c86000 0x2000>; interrupt-controller; #interrupt-cells = <3>; - interrupts = <1 9 0xf04>; + interrupts = ; }; }; }; diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 74b4ac086cca..6602fdee2694 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -49,6 +49,8 @@ #include "skeleton.dtsi" +#include + #include / { @@ -244,7 +246,7 @@ dma: dma-controller@01c02000 { compatible = "allwinner,sun8i-a23-dma"; reg = <0x01c02000 0x1000>; - interrupts = <0 50 4>; + interrupts = ; clocks = <&ahb1_gates 6>; resets = <&ahb1_rst 6>; #dma-cells = <1>; @@ -257,7 +259,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 8>; reset-names = "ahb"; - interrupts = <0 60 4>; + interrupts = ; status = "disabled"; }; @@ -268,7 +270,7 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 9>; reset-names = "ahb"; - interrupts = <0 61 4>; + interrupts = ; status = "disabled"; }; @@ -279,16 +281,16 @@ clock-names = "ahb", "mmc"; resets = <&ahb1_rst 10>; reset-names = "ahb"; - interrupts = <0 62 4>; + interrupts = ; status = "disabled"; }; pio: pinctrl@01c20800 { compatible = "allwinner,sun8i-a23-pinctrl"; reg = <0x01c20800 0x400>; - interrupts = <0 11 4>, - <0 15 4>, - <0 17 4>; + interrupts = , + , + ; clocks = <&apb1_gates 5>; gpio-controller; interrupt-controller; @@ -360,21 +362,21 @@ timer@01c20c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x01c20c00 0xa0>; - interrupts = <0 18 4>, - <0 19 4>; + interrupts = , + ; clocks = <&osc24M>; }; wdt0: watchdog@01c20ca0 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x01c20ca0 0x20>; - interrupts = <0 25 4>; + interrupts = ; }; uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; - interrupts = <0 0 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 16>; @@ -387,7 +389,7 @@ uart1: serial@01c28400 { compatible = "snps,dw-apb-uart"; reg = <0x01c28400 0x400>; - interrupts = <0 1 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 17>; @@ -400,7 +402,7 @@ uart2: serial@01c28800 { compatible = "snps,dw-apb-uart"; reg = <0x01c28800 0x400>; - interrupts = <0 2 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 18>; @@ -413,7 +415,7 @@ uart3: serial@01c28c00 { compatible = "snps,dw-apb-uart"; reg = <0x01c28c00 0x400>; - interrupts = <0 3 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 19>; @@ -426,7 +428,7 @@ uart4: serial@01c29000 { compatible = "snps,dw-apb-uart"; reg = <0x01c29000 0x400>; - interrupts = <0 4 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb2_gates 20>; @@ -439,7 +441,7 @@ i2c0: i2c@01c2ac00 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2ac00 0x400>; - interrupts = <0 6 4>; + interrupts = ; clocks = <&apb2_gates 0>; resets = <&apb2_rst 0>; status = "disabled"; @@ -450,7 +452,7 @@ i2c1: i2c@01c2b000 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b000 0x400>; - interrupts = <0 7 4>; + interrupts = ; clocks = <&apb2_gates 1>; resets = <&apb2_rst 1>; status = "disabled"; @@ -461,7 +463,7 @@ i2c2: i2c@01c2b400 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x01c2b400 0x400>; - interrupts = <0 8 4>; + interrupts = ; clocks = <&apb2_gates 2>; resets = <&apb2_rst 2>; status = "disabled"; @@ -477,13 +479,14 @@ <0x01c86000 0x2000>; interrupt-controller; #interrupt-cells = <3>; - interrupts = <1 9 0xf04>; + interrupts = ; }; rtc: rtc@01f00000 { compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; - interrupts = <0 40 4>, <0 41 4>; + interrupts = , + ; }; prcm@01f01400 { @@ -533,7 +536,7 @@ r_uart: serial@01f02800 { compatible = "snps,dw-apb-uart"; reg = <0x01f02800 0x400>; - interrupts = <0 38 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb0_gates 4>; @@ -544,7 +547,7 @@ r_pio: pinctrl@01f02c00 { compatible = "allwinner,sun8i-a23-r-pinctrl"; reg = <0x01f02c00 0x400>; - interrupts = <0 45 4>; + interrupts = ; clocks = <&apb0_gates 0>; resets = <&apb0_rst 0>; gpio-controller; diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index de31b210e2c1..4b584cb9c2f0 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -49,6 +49,8 @@ #include "skeleton64.dtsi" +#include + #include / { @@ -293,7 +295,7 @@ <0x01c46000 0x2000>; interrupt-controller; #interrupt-cells = <3>; - interrupts = <1 9 0xf04>; + interrupts = ; }; ahb0_resets: reset@060005a0 { @@ -329,12 +331,12 @@ timer@06000c00 { compatible = "allwinner,sun4i-a10-timer"; reg = <0x06000c00 0xa0>; - interrupts = <0 18 4>, - <0 19 4>, - <0 20 4>, - <0 21 4>, - <0 22 4>, - <0 23 4>; + interrupts = , + , + , + , + , + ; clocks = <&osc24M>; }; @@ -342,11 +344,11 @@ pio: pinctrl@06000800 { compatible = "allwinner,sun9i-a80-pinctrl"; reg = <0x06000800 0x400>; - interrupts = <0 11 4>, - <0 15 4>, - <0 16 4>, - <0 17 4>, - <0 120 4>; + interrupts = , + , + , + , + ; clocks = <&apb0_gates 5>; gpio-controller; interrupt-controller; @@ -379,7 +381,7 @@ uart0: serial@07000000 { compatible = "snps,dw-apb-uart"; reg = <0x07000000 0x400>; - interrupts = <0 0 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 16>; @@ -390,7 +392,7 @@ uart1: serial@07000400 { compatible = "snps,dw-apb-uart"; reg = <0x07000400 0x400>; - interrupts = <0 1 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 17>; @@ -401,7 +403,7 @@ uart2: serial@07000800 { compatible = "snps,dw-apb-uart"; reg = <0x07000800 0x400>; - interrupts = <0 2 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 18>; @@ -412,7 +414,7 @@ uart3: serial@07000c00 { compatible = "snps,dw-apb-uart"; reg = <0x07000c00 0x400>; - interrupts = <0 3 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 19>; @@ -423,7 +425,7 @@ uart4: serial@07001000 { compatible = "snps,dw-apb-uart"; reg = <0x07001000 0x400>; - interrupts = <0 4 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 20>; @@ -434,7 +436,7 @@ uart5: serial@07001400 { compatible = "snps,dw-apb-uart"; reg = <0x07001400 0x400>; - interrupts = <0 5 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&apb1_gates 21>; @@ -445,7 +447,7 @@ i2c0: i2c@07002800 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07002800 0x400>; - interrupts = <0 6 4>; + interrupts = ; clocks = <&apb1_gates 0>; resets = <&apb1_resets 0>; status = "disabled"; @@ -456,7 +458,7 @@ i2c1: i2c@07002c00 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07002c00 0x400>; - interrupts = <0 7 4>; + interrupts = ; clocks = <&apb1_gates 1>; resets = <&apb1_resets 1>; status = "disabled"; @@ -467,7 +469,7 @@ i2c2: i2c@07003000 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07003000 0x400>; - interrupts = <0 8 4>; + interrupts = ; clocks = <&apb1_gates 2>; resets = <&apb1_resets 2>; status = "disabled"; @@ -478,7 +480,7 @@ i2c3: i2c@07003400 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07003400 0x400>; - interrupts = <0 9 4>; + interrupts = ; clocks = <&apb1_gates 3>; resets = <&apb1_resets 3>; status = "disabled"; @@ -489,7 +491,7 @@ i2c4: i2c@07003800 { compatible = "allwinner,sun6i-a31-i2c"; reg = <0x07003800 0x400>; - interrupts = <0 10 4>; + interrupts = ; clocks = <&apb1_gates 4>; resets = <&apb1_resets 4>; status = "disabled"; @@ -500,13 +502,13 @@ r_wdt: watchdog@08001000 { compatible = "allwinner,sun6i-a31-wdt"; reg = <0x08001000 0x20>; - interrupts = <0 36 4>; + interrupts = ; }; r_uart: serial@08002800 { compatible = "snps,dw-apb-uart"; reg = <0x08002800 0x400>; - interrupts = <0 38 4>; + interrupts = ; reg-shift = <2>; reg-io-width = <4>; clocks = <&osc24M>; -- cgit v1.2.3 From a6bac9ebf05a51d9c1c570e64a1df2e284b61818 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 16 Dec 2014 22:59:59 +0100 Subject: ARM: sunxi: DT: Convert the DTs to use the generic interrupt header The NMI IRQ controller uses the standard flags definition for the IRQ level and edges. Use the common header to use defines instead of opaque numbers. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-bananapi.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-hummingbird.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-m3.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 3 ++- arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 3 ++- 10 files changed, 20 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts index d5e5d39ff3c0..4b0cd776c5c5 100644 --- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts +++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -157,7 +158,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 9dc4c10f682e..18fc5db9c976 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -90,7 +91,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 673846245cd9..77bc7e79cab9 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -132,7 +133,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts index 4356a1709559..4d6a88ec8c0f 100644 --- a/arch/arm/boot/dts/sun7i-a20-hummingbird.dts +++ b/arch/arm/boot/dts/sun7i-a20-hummingbird.dts @@ -16,6 +16,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -150,7 +151,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; }; diff --git a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts index 275e49ffb78b..06148b4d000f 100644 --- a/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts +++ b/arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -154,7 +155,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-m3.dts b/arch/arm/boot/dts/sun7i-a20-m3.dts index 15be3ea80088..5add9f243ec3 100644 --- a/arch/arm/boot/dts/sun7i-a20-m3.dts +++ b/arch/arm/boot/dts/sun7i-a20-m3.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -130,7 +131,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts index f74405cd18b6..12ded69d61eb 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts @@ -53,6 +53,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -128,7 +129,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts index 7176721f6c6b..260dbd3bf29d 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts @@ -50,6 +50,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -125,7 +126,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts index 63e4d54bdd0c..d0dcf7260971 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts @@ -17,6 +17,7 @@ #include #include +#include #include / { @@ -185,7 +186,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; diff --git a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts index 0a668d9166c5..0a2c2aeb4687 100644 --- a/arch/arm/boot/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/boot/dts/sun7i-a20-pcduino3.dts @@ -52,6 +52,7 @@ #include #include +#include #include / { @@ -137,7 +138,7 @@ compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; - interrupts = <0 8>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; -- cgit v1.2.3 From 41e7afb1c14f92e02055d130352843665a170a07 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 6 Jan 2015 10:35:15 +0800 Subject: ARM: dts: sunxi: Enable thermal sensor support for RTP on sun[457]i Now that the resistive touchpanel driver supports thermal sensors, add the "#thermal-sensor-cells" property as required by the thermal framework. Signed-off-by: Chen-Yu Tsai Acked-by: Eduardo Valentin Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 1 + arch/arm/boot/dts/sun5i-a10s.dtsi | 1 + arch/arm/boot/dts/sun5i-a13.dtsi | 1 + arch/arm/boot/dts/sun7i-a20.dtsi | 1 + 4 files changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index fe190e89b5b5..5aae86cb8994 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -734,6 +734,7 @@ compatible = "allwinner,sun4i-a10-ts"; reg = <0x01c25000 0x100>; interrupts = <29>; + #thermal-sensor-cells = <0>; }; uart0: serial@01c28000 { diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 241d69d0e7d6..7ab6d32078b6 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -548,6 +548,7 @@ compatible = "allwinner,sun4i-a10-ts"; reg = <0x01c25000 0x100>; interrupts = <29>; + #thermal-sensor-cells = <0>; }; uart0: serial@01c28000 { diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 2d2734a03672..b3c3573f8fbc 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -482,6 +482,7 @@ compatible = "allwinner,sun4i-a10-ts"; reg = <0x01c25000 0x100>; interrupts = <29>; + #thermal-sensor-cells = <0>; }; uart1: serial@01c28400 { diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 252b4bf6084d..17639ad57186 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -942,6 +942,7 @@ compatible = "allwinner,sun4i-a10-ts"; reg = <0x01c25000 0x100>; interrupts = ; + #thermal-sensor-cells = <0>; }; uart0: serial@01c28000 { -- cgit v1.2.3 From d96b7161916f1b5c1a676fba2d54ef0106a88aff Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 6 Jan 2015 10:35:16 +0800 Subject: ARM: dts: sun7i: Add cpu clock reference and operating points to dtsi The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A20 FEX files in the sunxi-boards repository. Not all boards have the same settings. The settings in this patch are the most generic ones. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 17639ad57186..c2e964939991 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -87,10 +87,26 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1450000 + 960000 1400000 + 912000 1400000 + 864000 1300000 + 720000 1200000 + 528000 1100000 + 312000 1000000 + 144000 900000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <7>; }; cpu@1 { -- cgit v1.2.3 From 882facf7400f4acecc814977e980cd6f7e7ae718 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 6 Jan 2015 10:35:20 +0800 Subject: ARM: dts: sun5i: Add cpu clock reference and operating points to dtsi The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A13 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index b3c3573f8fbc..dee2aa5bc9ed 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -27,10 +27,26 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1104000 1500000 + 1008000 1400000 + 912000 1350000 + 864000 1300000 + 624000 1200000 + 576000 1200000 + 432000 1200000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <6>; }; }; -- cgit v1.2.3 From 7294be5dbf6cdbc0b7dbe484096db7dcff45e59b Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 6 Jan 2015 10:35:23 +0800 Subject: ARM: dts: sun4i: Add cpu clock reference and operating points to dtsi The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A10 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 5aae86cb8994..f33752d8befb 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -55,10 +55,23 @@ cpus { #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a8"; reg = <0x0>; + clocks = <&cpu>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1056000 1500000 + 1008000 1400000 + 912000 1350000 + 864000 1300000 + 624000 1250000 + >; + #cooling-cells = <2>; + cooling-min-level = <0>; + cooling-max-level = <4>; }; }; -- cgit v1.2.3 From fd18c7eac03540654abdbfedd52e6dfb3718b489 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 19 Jan 2015 14:05:12 +0100 Subject: ARM: dts: sunxi: Add simplefb nodes for de_be0-lcd0, de_be0-lcd0-tve0 pipelines Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0" display pipelines for when u-boot has set up a pipeline to drive a LCD panel / VGA output rather then the HDMI output. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 18 ++++++++++++++++++ arch/arm/boot/dts/sun5i-a10s.dtsi | 8 ++++++++ arch/arm/boot/dts/sun5i-a13.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/sun8i-a23.dtsi | 14 ++++++++++++++ 6 files changed, 79 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index f33752d8befb..f9d20a589ba1 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -50,6 +50,24 @@ <&ahb_gates 44>, <&ahb_gates 46>; status = "disabled"; }; + + framebuffer@2 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_fe0-de_be0-lcd0"; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>, + <&ahb_gates 46>; + status = "disabled"; + }; + + framebuffer@3 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_fe0-de_be0-lcd0-tve0"; + clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, + <&ahb_gates 44>, <&ahb_gates 46>; + status = "disabled"; + }; }; cpus { diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index 7ab6d32078b6..c570a9b08fec 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -39,6 +39,14 @@ <&ahb_gates 44>; status = "disabled"; }; + + framebuffer@1 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + status = "disabled"; + }; }; cpus { diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index dee2aa5bc9ed..258ebdc17458 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -24,6 +24,20 @@ serial1 = &uart3; }; + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@0 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + status = "disabled"; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 97b6c3393099..4ae3e2eef679 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -77,6 +77,14 @@ clocks = <&pll6 0>; status = "disabled"; }; + + framebuffer@1 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll6 0>; + status = "disabled"; + }; }; cpus { diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index c2e964939991..beb0b7f6464c 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -81,6 +81,23 @@ <&ahb_gates 44>; status = "disabled"; }; + + framebuffer@1 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>; + status = "disabled"; + }; + + framebuffer@2 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0-tve0"; + clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>, + <&ahb_gates 44>; + status = "disabled"; + }; }; cpus { diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 6602fdee2694..11bce47367b0 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -65,6 +65,20 @@ serial5 = &r_uart; }; + chosen { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + framebuffer@0 { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "de_be0-lcd0"; + clocks = <&pll6 0>; + status = "disabled"; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From e721a2871620735922c2dd6cfe4c6b1b1d4ed81f Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Thu, 8 Jan 2015 10:34:24 +0100 Subject: ARM: dts: pcduino: Enable user LED and button support for pcDuino The pcDuino board has LEDs connected to PH15/PH16, and back/home/menu buttons to PH17/18/19 respectively. Enable these via gpio-leds and gpio-keys. This is shared across the v1 and v2 versions of the board. Tested on a v2 and verified against the schematics of a v1. Signed-off-by: Zoltan HERPAI Acked-by: Hans de Goede [Maxime: Added some newlines between the button nodes] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-pcduino.dts | 60 +++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-pcduino.dts b/arch/arm/boot/dts/sun4i-a10-pcduino.dts index 48161adfb32c..9d1e5482cf82 100644 --- a/arch/arm/boot/dts/sun4i-a10-pcduino.dts +++ b/arch/arm/boot/dts/sun4i-a10-pcduino.dts @@ -51,6 +51,8 @@ #include "sunxi-common-regulators.dtsi" #include +#include +#include / { model = "LinkSprite pcDuino"; @@ -64,6 +66,22 @@ status = "okay"; }; + pinctrl@01c20800 { + led_pins_pcduino: led_pins@0 { + allwinner,pins = "PH15", "PH16"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + key_pins_pcduino: key_pins@0 { + allwinner,pins = "PH17", "PH18", "PH19"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + }; + mdio@01c0b080 { status = "okay"; @@ -126,6 +144,48 @@ }; }; + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_pcduino>; + + tx { + label = "pcduino:green:tx"; + gpios = <&pio 7 15 GPIO_ACTIVE_LOW>; + }; + + rx { + label = "pcduino:green:rx"; + gpios = <&pio 7 16 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_pins_pcduino>; + #address-cells = <1>; + #size-cells = <0>; + + button@0 { + label = "Key Back"; + linux,code = ; + gpios = <&pio 7 17 GPIO_ACTIVE_LOW>; + }; + + button@1 { + label = "Key Home"; + linux,code = ; + gpios = <&pio 7 18 GPIO_ACTIVE_LOW>; + }; + + button@2 { + label = "Key Menu"; + linux,code = ; + gpios = <&pio 7 19 GPIO_ACTIVE_LOW>; + }; + }; + reg_usb1_vbus: usb1-vbus { status = "okay"; }; -- cgit v1.2.3 From ddfd0232ede34e673fe338d1e5a7ec7aa022aa99 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:02 +0800 Subject: ARM: dts: sunxi: Add dtsi for AXP209 PMIC The AXP209 PMIC is used with some Allwinner SoCs. This patch adds a dtsi file listing all the regulator nodes. The regulators are initialized based on their device node names. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/axp209.dtsi | 97 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 arch/arm/boot/dts/axp209.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi new file mode 100644 index 000000000000..c20cf537f5a5 --- /dev/null +++ b/arch/arm/boot/dts/axp209.dtsi @@ -0,0 +1,97 @@ +/* + * Copyright 2015 Chen-Yu Tsai + * + * Chen-Yu Tsai + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * AXP202/209 Integrated Power Management Chip + * http://www.x-powers.com/product/AXP20X.php + * http://dl.linux-sunxi.org/AXP/AXP209%20Datasheet%20v1.0_cn.pdf + */ + +&axp209 { + compatible = "x-powers,axp209"; + interrupt-controller; + #interrupt-cells = <1>; + + regulators { + /* Default work frequency for buck regulators */ + x-powers,dcdc-freq = <1500>; + + reg_dcdc2: dcdc2 { + regulator-name = "dcdc2"; + }; + + reg_dcdc3: dcdc3 { + regulator-name = "dcdc3"; + }; + + reg_ldo1: ldo1 { + /* LDO1 is a fixed output regulator */ + regulator-always-on; + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1300000>; + regulator-name = "ldo1"; + }; + + reg_ldo2: ldo2 { + regulator-name = "ldo2"; + }; + + reg_ldo3: ldo3 { + regulator-name = "ldo3"; + }; + + reg_ldo4: ldo4 { + regulator-name = "ldo4"; + }; + + reg_ldo5: ldo5 { + regulator-name = "ldo5"; + }; + }; +}; -- cgit v1.2.3 From b6d34248b8485ef5dc51952bd5e72ca2b9226ff0 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:03 +0800 Subject: ARM: dts: sun7i: Add cpu thermal zones to dtsi The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai Acked-by: Eduardo Valentin Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index beb0b7f6464c..929630aee299 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -50,6 +50,7 @@ #include "skeleton.dtsi" #include +#include #include #include @@ -133,6 +134,38 @@ }; }; + thermal-zones { + cpu_thermal { + /* milliseconds */ + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&rtp>; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + memory { reg = <0x40000000 0x80000000>; }; -- cgit v1.2.3 From 32a5d2d170cc24e9c5398d2a9432899f8368ba5c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:06 +0800 Subject: ARM: dts: sun5i: Add cpu thermal zones to dtsi The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai Acked-by: Eduardo Valentin Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi index 258ebdc17458..fd85720ec6a2 100644 --- a/arch/arm/boot/dts/sun5i-a13.dtsi +++ b/arch/arm/boot/dts/sun5i-a13.dtsi @@ -13,6 +13,8 @@ #include "skeleton.dtsi" +#include + #include #include @@ -64,6 +66,38 @@ }; }; + thermal-zones { + cpu_thermal { + /* milliseconds */ + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&rtp>; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <850000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + memory { reg = <0x40000000 0x20000000>; }; -- cgit v1.2.3 From 541ce2ca7ec8aa3f45bdd746a91ca24233d2a0d6 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:08 +0800 Subject: ARM: dts: sun4i: Add cpu thermal zones to dtsi The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index f9d20a589ba1..af11f5da8e98 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -12,6 +12,8 @@ #include "skeleton.dtsi" +#include + #include #include @@ -93,6 +95,38 @@ }; }; + thermal-zones { + cpu_thermal { + /* milliseconds */ + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&rtp>; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + + trips { + cpu_alert0: cpu_alert0 { + /* milliCelsius */ + temperature = <850000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit: cpu_crit { + /* milliCelsius */ + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + memory { reg = <0x40000000 0x80000000>; }; -- cgit v1.2.3 From ae265c801ffdbd58e4c7a83efc8dc08932de1f74 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:04 +0800 Subject: ARM: dts: sun7i: cubieboard2: add axp209 regulator nodes This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 35 +++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index 18fc5db9c976..ec1fc2c8b3e3 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -88,13 +88,9 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -145,3 +141,34 @@ status = "okay"; }; }; + +#include "axp209.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; -- cgit v1.2.3 From 0d4e29343ce6317cf5cf073346c3e66ad82d61a1 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:05 +0800 Subject: ARM: dts: sun7i: cubietruck: add axp209 regulator nodes This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 35 ++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 77bc7e79cab9..5f817b65ceea 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -130,13 +130,9 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -222,3 +218,34 @@ gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; }; }; + +#include "axp209.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; -- cgit v1.2.3 From 6a73ff3f6c98b669966dde2d5340f0d27f0e1b14 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:07 +0800 Subject: ARM: dts: sun5i: hsg-h702: add axp209 regulator nodes This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. LDO3 powers the USB WiFi module. This patch also references it from the usb-phy node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-hsg-h702.dts | 46 ++++++++++++++++++++++++++------ 1 file changed, 38 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts index 99a5968720b4..82637db1c55a 100644 --- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts +++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts @@ -68,11 +68,7 @@ }; usbphy: phy@01c13400 { - /* - * There doesn't seem to be a GPIO for controlling - * usb1 vbus, despite the fex file saying otherwise. - */ - usb1_vbus-supply = <®_vcc5v0>; + usb1_vbus-supply = <®_ldo3>; status = "okay"; }; @@ -105,11 +101,8 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupts = <0>; - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -131,3 +124,40 @@ }; }; }; + +#include "axp209.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + +®_ldo3 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; -- cgit v1.2.3 From ce124f7a18c5ebc9dc93aaec15aaef779c8708ae Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Mon, 12 Jan 2015 12:34:09 +0800 Subject: ARM: dts: sun4i: cubieboard: add axp209 regulator nodes This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 35 ++++++++++++++++++++++++++---- 1 file changed, 31 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts index 87ac84db836d..4260c2b47607 100644 --- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts @@ -137,12 +137,8 @@ status = "okay"; axp209: pmic@34 { - compatible = "x-powers,axp209"; reg = <0x34>; interrupts = <0>; - - interrupt-controller; - #interrupt-cells = <1>; }; }; @@ -188,3 +184,34 @@ status = "okay"; }; }; + +#include "axp209.dtsi" + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1450000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; -- cgit v1.2.3 From f0a05a0cd444a242d78a915a5dc0ad0c8f33a6e7 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 13 Jan 2015 11:47:03 +0100 Subject: ARM: dts: sun8i: Add lradc node to sun8i-a23.dtsi The A23 has the same lradc controller as previous Allwinner SoCs. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 11bce47367b0..d04944334830 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -387,6 +387,13 @@ interrupts = ; }; + lradc: lradc@01c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = ; + status = "disabled"; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -- cgit v1.2.3 From 03d6372c844950eb7bbf9729c780051e07daa8a9 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 13 Jan 2015 11:47:04 +0100 Subject: ARM: dts: sun8i: Enable lradc on a23-ippo-q8h-v5 The a23-ippo-q8h tablets have volume up/down buttons using the lradc. This has been tested on both a v5 and a v1.2 tablet. Tested-by: Chen-Yu Tsai Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts index 1da31d0e7338..623573e46080 100644 --- a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts @@ -52,6 +52,7 @@ #include "sunxi-common-regulators.dtsi" #include +#include #include / { @@ -86,6 +87,25 @@ }; }; + lradc: lradc@01c22800 { + vref-supply = <®_vcc3v0>; + status = "okay"; + + button@200 { + label = "Volume Up"; + linux,code = ; + channel = <0>; + voltage = <200000>; + }; + + button@400 { + label = "Volume Down"; + linux,code = ; + channel = <0>; + voltage = <400000>; + }; + }; + i2c0: i2c@01c2ac00 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; -- cgit v1.2.3 From b811c283d6d732c3c1bf9649da87e7d219572f5d Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Tue, 13 Jan 2015 11:44:32 +0100 Subject: ARM: dts: sun8i: Add dts file for Ippo Q8H v1.2 tablets The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate dtb file since some gpio-s surrounding the wlan/bluetooth are different, it uses different camera sensors, and different DRAM timings. Note that atm neither the wlan/bluetooth nor the camera are supported, so atm their is no difference between the dts files, but because of the different DRAM timings there are already separate u-boot configs for the 2 different versions, and the 1.2 config refers to sun8i-a23-ippo-q8h-v1.2.dtb to be future proof, so we need to provide a sun8i-a23-ippo-q8h-v1.2.dtb file. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 3 +- arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts | 59 +++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 66a4282738b1..601eb3d55226 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -475,7 +475,8 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-olinuxino-micro.dtb \ sun7i-a20-pcduino3.dtb dtb-$(CONFIG_MACH_SUN8I) += \ - sun8i-a23-ippo-q8h-v5.dtb + sun8i-a23-ippo-q8h-v5.dtb \ + sun8i-a23-ippo-q8h-v1.2.dtb dtb-$(CONFIG_MACH_SUN9I) += \ sun9i-a80-optimus.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts new file mode 100644 index 000000000000..dd31c53e2ab6 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v1.2.dts @@ -0,0 +1,59 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/* + * The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate + * dtb file since some gpio-s surrounding the wlan/bluetooth are different, + * and it uses different camera sensors. + */ + +#include "sun8i-a23-ippo-q8h-v5.dts" + +/ { + model = "Ippo Q8H Dual Core Tablet (v1.2)"; + compatible = "ippo,q8h-v1.2", "allwinner,sun8i-a23"; +}; -- cgit v1.2.3 From 774c5845d70c10f6609966e589e2ca9c58e6e536 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 2 Sep 2014 19:25:26 +0200 Subject: ARM: sun7i: cubieboard2: Relicense the device tree under GPLv2/X11 The current GPL only licensing on the DTSI makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Maxime Ripard Acked-by: Alexander Bersenev Acked-by: Carlo Caione Acked-by: Chen-Yu Tsai Acked-by: Hans de Goede Acked-by: Roman Byshko --- arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 46 +++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts index ec1fc2c8b3e3..c4ab6edb6f15 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts @@ -3,12 +3,48 @@ * * Maxime Ripard * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From a6f19d5bed4fb9776c55f463007b229bb4a775b6 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Tue, 2 Sep 2014 19:25:26 +0200 Subject: ARM: sun7i: cubietruck: Relicense the device tree under GPLv2/X11 The current GPL only licensing on the DTSI makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Maxime Ripard Acked-by: Alexander Bersenev Acked-by: Alexandre Belloni Acked-by: Carlo Caione Acked-by: Chen-Yu Tsai Acked-by: Hans de Goede Acked-by: Olliver Schinagl --- arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 46 ++++++++++++++++++++++++++---- 1 file changed, 41 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts index 5f817b65ceea..8f74a649576d 100644 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts @@ -3,12 +3,48 @@ * * Oliver Schinagl * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From d2aa6f540022f3308fc959d9192dae5cc409ac3e Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 13 Jan 2015 09:37:25 +0800 Subject: ARM: dts: sun9i: Add mmc module clock nodes for A80 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mmc module clocks are A80 specific module 0 (storage) type clocks. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 4b584cb9c2f0..ddc34676987d 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -219,6 +219,42 @@ clock-output-names = "cci400"; }; + mmc0_clk: clk@06000410 { + #clock-cells = <1>; + compatible = "allwinner,sun9i-a80-mmc-clk"; + reg = <0x06000410 0x4>; + clocks = <&osc24M>, <&pll4>; + clock-output-names = "mmc0", "mmc0_output", + "mmc0_sample"; + }; + + mmc1_clk: clk@06000414 { + #clock-cells = <1>; + compatible = "allwinner,sun9i-a80-mmc-clk"; + reg = <0x06000414 0x4>; + clocks = <&osc24M>, <&pll4>; + clock-output-names = "mmc1", "mmc1_output", + "mmc1_sample"; + }; + + mmc2_clk: clk@06000418 { + #clock-cells = <1>; + compatible = "allwinner,sun9i-a80-mmc-clk"; + reg = <0x06000418 0x4>; + clocks = <&osc24M>, <&pll4>; + clock-output-names = "mmc2", "mmc2_output", + "mmc2_sample"; + }; + + mmc3_clk: clk@0600041c { + #clock-cells = <1>; + compatible = "allwinner,sun9i-a80-mmc-clk"; + reg = <0x0600041c 0x4>; + clocks = <&osc24M>, <&pll4>; + clock-output-names = "mmc3", "mmc3_output", + "mmc3_sample"; + }; + ahb0_gates: clk@06000580 { #clock-cells = <1>; compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; -- cgit v1.2.3 From 203c6883b8b4754eb833d50935338556685b8a93 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 13 Jan 2015 09:37:27 +0800 Subject: ARM: dts: sun9i: Add clock-indices property for bus gate clocks of_clk_get_parent_name() uses the clock-indices property to resolve clock phandle arguments in case that the argument index does not match the clock-output-names sequence. This is the case on sunxi, where we use the actual bit index as the argument to the phandle. Add the clock-indices property so that of_clk_get_parent_name() resolves the names correctly. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index ddc34676987d..9d0a66c14caf 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -260,6 +260,9 @@ compatible = "allwinner,sun9i-a80-ahb0-gates-clk"; reg = <0x06000580 0x4>; clocks = <&ahb0>; + clock-indices = <0>, <1>, <3>, <5>, <8>, <12>, <13>, + <14>, <15>, <16>, <18>, <20>, <21>, + <22>, <23>; clock-output-names = "ahb0_fd", "ahb0_ve", "ahb0_gpu", "ahb0_ss", "ahb0_sd", "ahb0_nand1", "ahb0_nand0", "ahb0_sdram", @@ -273,6 +276,7 @@ compatible = "allwinner,sun9i-a80-ahb1-gates-clk"; reg = <0x06000584 0x4>; clocks = <&ahb1>; + clock-indices = <0>, <1>, <17>, <21>, <22>, <23>, <24>; clock-output-names = "ahb1_usbotg", "ahb1_usbhci", "ahb1_gmac", "ahb1_msgbox", "ahb1_spinlock", "ahb1_hstimer", @@ -284,6 +288,8 @@ compatible = "allwinner,sun9i-a80-ahb2-gates-clk"; reg = <0x06000588 0x4>; clocks = <&ahb2>; + clock-indices = <0>, <1>, <2>, <4>, <5>, <7>, <8>, + <11>; clock-output-names = "ahb2_lcd0", "ahb2_lcd1", "ahb2_edp", "ahb2_csi", "ahb2_hdmi", "ahb2_de", "ahb2_mp", "ahb2_mipi_dsi"; @@ -294,6 +300,8 @@ compatible = "allwinner,sun9i-a80-apb0-gates-clk"; reg = <0x06000590 0x4>; clocks = <&apb0>; + clock-indices = <1>, <5>, <11>, <12>, <13>, <15>, + <17>, <18>, <19>; clock-output-names = "apb0_spdif", "apb0_pio", "apb0_ac97", "apb0_i2s0", "apb0_i2s1", "apb0_lradc", "apb0_gpadc", "apb0_twd", @@ -305,6 +313,8 @@ compatible = "allwinner,sun9i-a80-apb1-gates-clk"; reg = <0x06000594 0x4>; clocks = <&apb1>; + clock-indices = <0>, <1>, <2>, <3>, <4>, + <16>, <17>, <18>, <19>, <20>, <21>; clock-output-names = "apb1_i2c0", "apb1_i2c1", "apb1_i2c2", "apb1_i2c3", "apb1_i2c4", "apb1_uart0", "apb1_uart1", -- cgit v1.2.3 From 809ed95f5c649bc660fca852698c8102b039cbd3 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 13 Jan 2015 09:37:29 +0800 Subject: ARM: dts: sunxi: Use label to reference pio in sunxi-common-regulators Use the label to reference the pin controller node, so that we can use sunxi-common-regulators with sunxi families that don't share the same address space mappings, such as sun9i. This patch is mostly space changes due to the reduction of node parents. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sunxi-common-regulators.dtsi | 54 +++++++++++++------------- 1 file changed, 26 insertions(+), 28 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi b/arch/arm/boot/dts/sunxi-common-regulators.dtsi index b1d64dd183f4..e02baa66b33c 100644 --- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi +++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi @@ -50,39 +50,37 @@ #include #include -/ { - soc@01c00000 { - pio: pinctrl@01c20800 { - ahci_pwr_pin_a: ahci_pwr_pin@0 { - allwinner,pins = "PB8"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; +&pio { + ahci_pwr_pin_a: ahci_pwr_pin@0 { + allwinner,pins = "PB8"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; - usb0_vbus_pin_a: usb0_vbus_pin@0 { - allwinner,pins = "PB9"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; + usb0_vbus_pin_a: usb0_vbus_pin@0 { + allwinner,pins = "PB9"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; - usb1_vbus_pin_a: usb1_vbus_pin@0 { - allwinner,pins = "PH6"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; + usb1_vbus_pin_a: usb1_vbus_pin@0 { + allwinner,pins = "PH6"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; - usb2_vbus_pin_a: usb2_vbus_pin@0 { - allwinner,pins = "PH3"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - }; + usb2_vbus_pin_a: usb2_vbus_pin@0 { + allwinner,pins = "PH3"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; }; +}; +/ { reg_ahci_5v: ahci-5v { compatible = "regulator-fixed"; pinctrl-names = "default"; -- cgit v1.2.3 From cd23e2e5ce874cef5c1adc469ca93c9a373b3804 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Tue, 13 Jan 2015 09:37:31 +0800 Subject: ARM: dts: sun9i: Add pinmux setting for mmc0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mmc0 is only available on port F, and is always used with a 4 bit wide bus for the onboard micro-sd slot. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 9d0a66c14caf..820b4c5995f3 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -409,6 +409,14 @@ allwinner,pull = ; }; + mmc0_pins: mmc0 { + allwinner,pins = "PF0", "PF1" ,"PF2", "PF3", + "PF4", "PF5"; + allwinner,function = "mmc0"; + allwinner,drive = ; + allwinner,pull = ; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PH12", "PH13"; allwinner,function = "uart0"; -- cgit v1.2.3 From 19f3af1df6d714dbfa89b2357efffd41cbc6b82c Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Thu, 15 Jan 2015 23:50:15 +0800 Subject: ARM: dts: sun6i: Convert hummingbird a31 dts to label references Using label references is preferred when override settings from the included dtsi. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 181 ++++++++++++++-------------- 1 file changed, 88 insertions(+), 93 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts index ebd5f7854b1b..8b61b1b342e0 100644 --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts @@ -61,101 +61,96 @@ chosen { bootargs = "earlyprintk console=ttyS0,115200"; }; +}; + +&ehci0 { + status = "okay"; +}; - soc@01c00000 { - mmc0: mmc@01c0f000 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; - vmmc-supply = <®_vcc3v0>; - bus-width = <4>; - cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ - cd-inverted; - status = "okay"; - }; - - usbphy: phy@01c19400 { - usb1_vbus-supply = <®_usb1_vbus>; - status = "okay"; - }; - - ehci0: usb@01c1a000 { - status = "okay"; - }; - - ohci0: usb@01c1a400 { - status = "okay"; - }; - - pio: pinctrl@01c20800 { - mmc0_pins_a: mmc0@0 { - /* external pull-ups missing for some pins */ - allwinner,pull = ; - }; - - mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 { - allwinner,pins = "PA8"; - allwinner,function = "gpio_in"; - allwinner,drive = ; - allwinner,pull = ; - }; - - usb1_vbus_pin_a: usb1_vbus_pin@0 { - allwinner,pins = "PH24"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - }; - - uart0: serial@01c28000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; - }; - - i2c0: i2c@01c2ac00 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - /* pull-ups and devices require AXP221 DLDO3 */ - status = "failed"; - }; - - i2c1: i2c@01c2b000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; - }; - - i2c2: i2c@01c2b400 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_a>; - status = "okay"; - - pcf8563: rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - }; - }; - - gmac: ethernet@01c30000 { - pinctrl-names = "default"; - pinctrl-0 = <&gmac_pins_rgmii_a>; - phy = <&phy1>; - phy-mode = "rgmii"; - snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 30000>; - status = "okay"; - - phy1: ethernet-phy@1 { - reg = <1>; - }; - }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii_a>; + phy = <&phy1>; + phy-mode = "rgmii"; + snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + /* pull-ups and devices require AXP221 DLDO3 */ + status = "failed"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; + + pcf8563: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_hummingbird>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ + cd-inverted; + status = "okay"; +}; + +&mmc0_pins_a { + /* external pull-ups missing for some pins */ + allwinner,pull = ; +}; - reg_usb1_vbus: usb1-vbus { - pinctrl-0 = <&usb1_vbus_pin_a>; - gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ - status = "okay"; +&ohci0 { + status = "okay"; +}; + +&pio { + mmc0_cd_pin_hummingbird: mmc0_cd_pin@0 { + allwinner,pins = "PA8"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; }; }; + +®_usb1_vbus { + gpio = <&pio 7 24 GPIO_ACTIVE_HIGH>; /* PH24 */ + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb1_vbus_pin_a { + /* different pin from sunxi-common-regulators */ + allwinner,pins = "PH24"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 121b96cd9d7e6ec090331c4e7ef1298198bd8522 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sun, 11 Jan 2015 20:33:44 +0100 Subject: ARM: sun6i: Enable ARM arch timers The A31 has non-initialized architected timers, without CNTFRQ or CNTVOFF set by the Allwinner's bootloader. Use the new DT property for such case, and enable the arch timers. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 4ae3e2eef679..0c17079b4636 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -87,6 +87,16 @@ }; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = , + , + , + ; + clock-frequency = <24000000>; + arm,cpu-registers-not-fw-configured; + }; + cpus { enable-method = "allwinner,sun6i-a31"; #address-cells = <1>; -- cgit v1.2.3 From 10662a33dcd97f27004779df7e9188c124bc7076 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 18 Jan 2015 13:08:19 +0100 Subject: ARM: dts: sun7i: Add dts file for Bananapro board Add support for the new Bananapro A20 development board from lemaker.org. This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for OTG, 1 micro USB receptacle for power, HDMI, sata, Gbit ethernet, ir receiver, 3.5 mm jack for a/v out, on board microphone, 40 gpio pins and sdio wifi. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun7i-a20-bananapro.dts | 262 ++++++++++++++++++++++++++++++ 2 files changed, 263 insertions(+) create mode 100644 arch/arm/boot/dts/sun7i-a20-bananapro.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 601eb3d55226..34281aa5bfed 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -465,6 +465,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31s-cs908.dtb dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-bananapi.dtb \ + sun7i-a20-bananapro.dtb \ sun7i-a20-cubieboard2.dtb \ sun7i-a20-cubietruck.dtb \ sun7i-a20-hummingbird.dtb \ diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts new file mode 100644 index 000000000000..fb89fe7ed21b --- /dev/null +++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts @@ -0,0 +1,262 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" +#include +#include + +/ { + model = "LeMaker Banana Pro"; + compatible = "lemaker,bananapro", "allwinner,sun7i-a20"; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_bananapro>; + + blue { + label = "bananapro:blue:usr"; + gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; + }; + + green { + label = "bananapro:green:usr"; + gpios = <&pio 7 24 GPIO_ACTIVE_HIGH>; + }; + }; + + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_power_pin_bananapro>; + regulator-name = "gmac-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + enable-active-high; + gpio = <&pio 7 23 GPIO_ACTIVE_HIGH>; + }; + + reg_vmmc3: vmmc3 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&vmmc3_pin_bananapro>; + regulator-name = "vmmc3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pio 7 22 GPIO_ACTIVE_HIGH>; + }; +}; + +&ahci { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii_a>; + phy = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&ir0 { + pinctrl-names = "default"; + pinctrl-0 = <&ir0_pins_a>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bananapro>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ + cd-inverted; + status = "okay"; +}; + +&mmc3 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins_a>; + vmmc-supply = <®_vmmc3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + gmac_power_pin_bananapro: gmac_power_pin@0 { + allwinner,pins = "PH23"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + led_pins_bananapro: led_pins@0 { + allwinner,pins = "PH24", "PG2"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_bananapro: mmc0_cd_pin@0 { + allwinner,pins = "PH10"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb1_vbus_pin_bananapro: usb1_vbus_pin@0 { + allwinner,pins = "PH0"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb2_vbus_pin_bananapro: usb2_vbus_pin@0 { + allwinner,pins = "PH1"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + vmmc3_pin_bananapro: vmmc3_pin@0 { + allwinner,pins = "PH22"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb1_vbus { + pinctrl-0 = <&usb1_vbus_pin_bananapro>; + gpio = <&pio 7 0 GPIO_ACTIVE_HIGH>; /* PH0 */ + status = "okay"; +}; + +®_usb2_vbus { + pinctrl-0 = <&usb2_vbus_pin_bananapro>; + gpio = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_a>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins_a>; + status = "okay"; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&uart7_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From c49927421a85255ff061767fbee365d65b35d85b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 18 Jan 2015 13:08:20 +0100 Subject: ARM: dts: sun4i: Add dts file for Chuwi V7 CW0825 tablet The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash, microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out, stereo speakers, front & back camera and usb wifi. It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the tablet. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts | 100 ++++++++++++++++++++++++ 2 files changed, 101 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 34281aa5bfed..fa8fd93d4cf6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -445,6 +445,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-a1000.dtb \ sun4i-a10-ba10-tvbox.dtb \ + sun4i-a10-chuwi-v7-cw0825.dtb \ sun4i-a10-cubieboard.dtb \ sun4i-a10-mini-xplus.dtb \ sun4i-a10-hackberry.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts new file mode 100644 index 000000000000..58214f249598 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts @@ -0,0 +1,100 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include + +/ { + model = "Chuwi V7 CW0825"; + compatible = "chuwi,v7-cw0825", "allwinner,sun4i-a10"; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From ab9a4f188787a9437884372188188a0fb35827ba Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 18 Jan 2015 13:09:43 +0100 Subject: ARM: dts: sun4i: Add mk802 board The mk802 is the "classic" Allwinner A10 based hdmi tv-stick, it features 512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG) and USB-wifi. Somewhat unique the mk802 does not use the AXP209 pmic, it does not have a pmic at all. For more details see: http://linux-sunxi.org/Rikomagic_mk802 Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-mk802.dts | 109 ++++++++++++++++++++++++++++++++++ 2 files changed, 110 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-mk802.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index fa8fd93d4cf6..61ffd5f4849f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -448,6 +448,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-chuwi-v7-cw0825.dtb \ sun4i-a10-cubieboard.dtb \ sun4i-a10-mini-xplus.dtb \ + sun4i-a10-mk802.dtb \ sun4i-a10-hackberry.dtb \ sun4i-a10-inet97fv2.dtb \ sun4i-a10-olinuxino-lime.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-mk802.dts b/arch/arm/boot/dts/sun4i-a10-mk802.dts new file mode 100644 index 000000000000..e9a6886f0d51 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-mk802.dts @@ -0,0 +1,109 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include + +/ { + model = "MK802"; + compatible = "allwinner,mk802", "allwinner,sun4i-a10"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + usb2_vbus_pin_mk802: usb2_vbus_pin@0 { + allwinner,pins = "PH12"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + pinctrl-0 = <&usb2_vbus_pin_mk802>; + gpio = <&pio 7 12 GPIO_ACTIVE_HIGH>; /* PH12 */ + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 431729a037e8a15956b174351f7299ce785af5e5 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 18 Jan 2015 13:09:44 +0100 Subject: ARM: dts: sun4i: Add mk802ii board The mk802ii is a revised version of the mk802 A10 based hdmi tv-stick, it features 1G RAM, 4G nand, a hdmi male connector, USB-A receptacle, 2 micro usb receptacles (OTG & power) and USB-wifi, and does come with an axp209 pmic. For more details see: http://linux-sunxi.org/Rikomagic_mk802ii Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-mk802ii.dts | 113 ++++++++++++++++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-mk802ii.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 61ffd5f4849f..6563b576b7b1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -449,6 +449,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-cubieboard.dtb \ sun4i-a10-mini-xplus.dtb \ sun4i-a10-mk802.dtb \ + sun4i-a10-mk802ii.dtb \ sun4i-a10-hackberry.dtb \ sun4i-a10-inet97fv2.dtb \ sun4i-a10-olinuxino-lime.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-mk802ii.dts b/arch/arm/boot/dts/sun4i-a10-mk802ii.dts new file mode 100644 index 000000000000..802eda494d1c --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-mk802ii.dts @@ -0,0 +1,113 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include + +/ { + model = "MK802ii"; + compatible = "allwinner,mk802ii", "allwinner,sun4i-a10"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From a084a779d6de9ba84f748a28af1bde070001a516 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 18 Jan 2015 13:09:45 +0100 Subject: ARM: dts: sun5i: Add mk802_a10s board The mk802_a10s re-uses is the "classic" mk802 case and functionality, but has an A10s SoC inside rather then the A10, it features 512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG) and a sdio realtek wifi chip. Unlike the original mk802 it does have a pmic, the axp152. For more details see: http://linux-sunxi.org/Semitime_g2 Signed-off-by: Hans de Goede [Maxime: Changed the compatible and node names labels] Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun5i-a10s-mk802.dts | 125 +++++++++++++++++++++++++++++++++ 2 files changed, 126 insertions(+) create mode 100644 arch/arm/boot/dts/sun5i-a10s-mk802.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6563b576b7b1..3de014222cd6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -455,6 +455,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-olinuxino-lime.dtb \ sun4i-a10-pcduino.dtb dtb-$(CONFIG_MACH_SUN5I) += \ + sun5i-a10s-mk802.dtb \ sun5i-a10s-olinuxino-micro.dtb \ sun5i-a10s-r7-tv-dongle.dtb \ sun5i-a13-hsg-h702.dtb \ diff --git a/arch/arm/boot/dts/sun5i-a10s-mk802.dts b/arch/arm/boot/dts/sun5i-a10s-mk802.dts new file mode 100644 index 000000000000..b21af87d9eae --- /dev/null +++ b/arch/arm/boot/dts/sun5i-a10s-mk802.dts @@ -0,0 +1,125 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun5i-a10s.dtsi" +#include "sunxi-common-regulators.dtsi" +#include + +/ { + model = "MK802-A10s"; + compatible = "allwinner,a10s-mk802", "allwinner,sun5i-a10s"; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_mk802>; + + red { + label = "mk802:red:usr"; + gpios = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */ + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_mk802>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&pio { + led_pins_mk802: led_pins@0 { + allwinner,pins = "PB2"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; + + mmc0_cd_pin_mk802: mmc0_cd_pin@0 { + allwinner,pins = "PG1"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; + + usb1_vbus_pin_mk802: usb1_vbus_pin@0 { + allwinner,pins = "PB10"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb1_vbus { + pinctrl-0 = <&usb1_vbus_pin_mk802>; + gpio = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */ + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 92395f569c36cbf077fe3f090e3cee85ad8a0926 Mon Sep 17 00:00:00 2001 From: Aleksei Mamlin Date: Mon, 19 Jan 2015 22:35:22 +0300 Subject: ARM: dts: sunxi: Add missing mdio label This patch add missing mdio label for sun[457]i. Signed-off-by: Aleksei Mamlin Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 2 +- arch/arm/boot/dts/sun5i-a10s.dtsi | 2 +- arch/arm/boot/dts/sun7i-a20.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index af11f5da8e98..234e4de39fb5 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -465,7 +465,7 @@ status = "disabled"; }; - mdio@01c0b080 { + mdio: mdio@01c0b080 { compatible = "allwinner,sun4i-a10-mdio"; reg = <0x01c0b080 0x14>; status = "disabled"; diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi index c570a9b08fec..ac919e621754 100644 --- a/arch/arm/boot/dts/sun5i-a10s.dtsi +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi @@ -361,7 +361,7 @@ status = "disabled"; }; - mdio@01c0b080 { + mdio: mdio@01c0b080 { compatible = "allwinner,sun4i-a10-mdio"; reg = <0x01c0b080 0x14>; status = "disabled"; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 929630aee299..270cdddd054c 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -580,7 +580,7 @@ status = "disabled"; }; - mdio@01c0b080 { + mdio: mdio@01c0b080 { compatible = "allwinner,sun4i-a10-mdio"; reg = <0x01c0b080 0x14>; status = "disabled"; -- cgit v1.2.3 From 9c56f3f39a60292d785f3a72a7fb09997570abe0 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:29 +0800 Subject: ARM: dts: sun9i: Add mmc config clock nodes Add the device tree nodes for the mmc config clock nodes. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 820b4c5995f3..1925c89ee701 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -333,6 +333,19 @@ */ ranges = <0 0 0 0x20000000>; + mmc_config_clk: clk@01c13000 { + compatible = "allwinner,sun9i-a80-mmc-config-clk"; + reg = <0x01c13000 0x10>; + clocks = <&ahb0_gates 8>; + clock-names = "ahb"; + resets = <&ahb0_resets 8>; + reset-names = "ahb"; + #clock-cells = <1>; + #reset-cells = <1>; + clock-output-names = "mmc0_config", "mmc1_config", + "mmc2_config", "mmc3_config"; + }; + gic: interrupt-controller@01c41000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c41000 0x1000>, -- cgit v1.2.3 From 2f6941cd2923c37ea93ec27a6f7ae2a7f0f8332a Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:30 +0800 Subject: ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The A80 has 4 mmc controllers. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 48 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 1925c89ee701..7387fb2a5111 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -333,6 +333,54 @@ */ ranges = <0 0 0 0x20000000>; + mmc0: mmc@01c0f000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c0f000 0x1000>; + clocks = <&mmc_config_clk 0>, <&mmc0_clk 0>, + <&mmc0_clk 1>, <&mmc0_clk 2>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&mmc_config_clk 0>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + }; + + mmc1: mmc@01c10000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c10000 0x1000>; + clocks = <&mmc_config_clk 1>, <&mmc1_clk 0>, + <&mmc1_clk 1>, <&mmc1_clk 2>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&mmc_config_clk 1>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + }; + + mmc2: mmc@01c11000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c11000 0x1000>; + clocks = <&mmc_config_clk 2>, <&mmc2_clk 0>, + <&mmc2_clk 1>, <&mmc2_clk 2>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&mmc_config_clk 2>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + }; + + mmc3: mmc@01c12000 { + compatible = "allwinner,sun5i-a13-mmc"; + reg = <0x01c12000 0x1000>; + clocks = <&mmc_config_clk 3>, <&mmc3_clk 0>, + <&mmc3_clk 1>, <&mmc3_clk 2>; + clock-names = "ahb", "mmc", "output", "sample"; + resets = <&mmc_config_clk 3>; + reset-names = "ahb"; + interrupts = ; + status = "disabled"; + }; + mmc_config_clk: clk@01c13000 { compatible = "allwinner,sun9i-a80-mmc-config-clk"; reg = <0x01c13000 0x10>; -- cgit v1.2.3 From 10eb98b1f3362174f712e3aed1651f4edcdf4312 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:31 +0800 Subject: ARM: dts: sun9i: Convert a80 optimus board dts to label referencing The preferred method of referencing nodes from the dtsi is to use labels, instead of copying the complete tree. This patch converts sun9i-a80-optimus.dts to use label references. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 76 ++++++++++++++++----------------- 1 file changed, 37 insertions(+), 39 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 58f5cb346519..d4f3866a8d0b 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -61,45 +61,6 @@ bootargs = "earlyprintk console=ttyS0,115200"; }; - soc { - pio: pinctrl@06000800 { - i2c3_pins_a: i2c3@0 { - /* Enable internal pull-up */ - allwinner,pull = ; - }; - - led_pins_optimus: led-pins@0 { - allwinner,pins = "PH0", "PH1"; - allwinner,function = "gpio_out"; - allwinner,drive = ; - allwinner,pull = ; - }; - - uart4_pins_a: uart4@0 { - /* Enable internal pull-up */ - allwinner,pull = ; - }; - }; - - uart0: serial@07000000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "okay"; - }; - - uart4: serial@07001000 { - pinctrl-names = "default"; - pinctrl-0 = <&uart4_pins_a>; - status = "okay"; - }; - - i2c3: i2c@07003400 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins_a>; - status = "okay"; - }; - }; - leds { compatible = "gpio-leds"; pinctrl-names = "default"; @@ -120,3 +81,40 @@ }; }; }; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins_a>; + status = "okay"; +}; + +&i2c3_pins_a { + /* Enable internal pull-up */ + allwinner,pull = ; +}; + +&pio { + led_pins_optimus: led-pins@0 { + allwinner,pins = "PH0", "PH1"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins_a>; + status = "okay"; +}; + +&uart4_pins_a { + /* Enable internal pull-up */ + allwinner,pull = ; +}; -- cgit v1.2.3 From 9e320feb2c44e1f5ec1e6cf09a1d511efcc0a313 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:32 +0800 Subject: ARM: dts: sun9i: Enable mmc0 on A80 Optimus Board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable the micro-sd slot on the A80 Optimus Board, which is connected to mmc0. This adds the card-detect gpio and enables mmc0. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index d4f3866a8d0b..5c9505a724d4 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -49,6 +49,7 @@ /dts-v1/; #include "sun9i-a80.dtsi" +#include "sunxi-common-regulators.dtsi" #include #include @@ -100,6 +101,23 @@ allwinner,drive = ; allwinner,pull = ; }; + + mmc0_cd_pin_optimus: mmc0_cd_pin@0 { + allwinner,pins = "PH18"; + allwinner,function = "gpio_in"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>; + vmmc-supply = <®_vcc3v0>; + bus-width = <4>; + cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */ + cd-inverted; + status = "okay"; }; &uart0 { -- cgit v1.2.3 From 23a602b665d6ab6b82378f866475d8b657e84729 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:33 +0800 Subject: ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit mmc2 is available on port C. Add a pinmux setting for 8 bit wide eMMC. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi index 7387fb2a5111..9e28ffc6dd90 100644 --- a/arch/arm/boot/dts/sun9i-a80.dtsi +++ b/arch/arm/boot/dts/sun9i-a80.dtsi @@ -478,6 +478,15 @@ allwinner,pull = ; }; + mmc2_8bit_pins: mmc2_8bit { + allwinner,pins = "PC6", "PC7", "PC8", "PC9", + "PC10", "PC11", "PC12", + "PC13", "PC14", "PC15"; + allwinner,function = "mmc2"; + allwinner,drive = ; + allwinner,pull = ; + }; + uart0_pins_a: uart0@0 { allwinner,pins = "PH12", "PH13"; allwinner,function = "uart0"; -- cgit v1.2.3 From 0d69f87c2fba4899c6686d7de3960bc76f8dd1c4 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 17 Jan 2015 13:19:34 +0800 Subject: ARM: dts: sun9i: Enable mmc2 on A80 Optimus Board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The A80 Optimus Board has a 16GB eMMC connected to mmc2, with 8 bit wide data bus. Signed-off-by: Chen-Yu Tsai Signed-off-by: Andreas Färber Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun9i-a80-optimus.dts | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts b/arch/arm/boot/dts/sun9i-a80-optimus.dts index 5c9505a724d4..c4de9cb9a5f6 100644 --- a/arch/arm/boot/dts/sun9i-a80-optimus.dts +++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts @@ -120,6 +120,15 @@ status = "okay"; }; +&mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; + vmmc-supply = <®_vcc3v0>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; -- cgit v1.2.3 From a58c570af90942b3b7e646a6bf531a4eef0b44b1 Mon Sep 17 00:00:00 2001 From: Aleksei Mamlin Date: Tue, 20 Jan 2015 22:03:28 +0400 Subject: ARM: dts: sun4i: Add Marsboard A10 board This patch add support for Marsboard A10 board. The Marsboard A10 is a A10 based development board with 1G RAM, 1G NAND, micro SD card slot, SATA 2.0 socket, 10/100 ethernet, mini HDMI port, 1 USB OTG port and 2 USB 2.0 ports. Board does not use the AXP209 pmic, it does not have a pmic at all. Board also have 2 expansion 70 pin headers. Signed-off-by: Aleksei Mamlin Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-marsboard.dts | 183 ++++++++++++++++++++++++++++++ 2 files changed, 184 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-marsboard.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 3de014222cd6..7df26a203f97 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -447,6 +447,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-ba10-tvbox.dtb \ sun4i-a10-chuwi-v7-cw0825.dtb \ sun4i-a10-cubieboard.dtb \ + sun4i-a10-marsboard.dtb \ sun4i-a10-mini-xplus.dtb \ sun4i-a10-mk802.dtb \ sun4i-a10-mk802ii.dtb \ diff --git a/arch/arm/boot/dts/sun4i-a10-marsboard.dts b/arch/arm/boot/dts/sun4i-a10-marsboard.dts new file mode 100644 index 000000000000..9ee86a700c2b --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-marsboard.dts @@ -0,0 +1,183 @@ +/* + * Copyright 2015 Aleksei Mamlin + * Aleksei Mamlin + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include +#include + +/ { + model = "HAOYU Electronics Marsboard A10"; + compatible = "haoyu,a10-marsboard", "allwinner,sun4i-a10"; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins_marsboard>; + + red1 { + label = "marsboard:red1:usr"; + gpios = <&pio 1 5 GPIO_ACTIVE_HIGH>; + }; + + red2 { + label = "marsboard:red2:usr"; + gpios = <&pio 1 6 GPIO_ACTIVE_HIGH>; + }; + + red3 { + label = "marsboard:red3:usr"; + gpios = <&pio 1 7 GPIO_ACTIVE_HIGH>; + }; + + red4 { + label = "marsboard:red4:usr"; + gpios = <&pio 1 8 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&ahci { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_pins_a>; + phy = <&phy1>; + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins_a>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins_a>; + status = "okay"; +}; + +&mdio { + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + led_pins_marsboard: led_pins@0 { + allwinner,pins = "PB5", "PB6", "PB7", "PB8"; + allwinner,function = "gpio_out"; + allwinner,drive = ; + allwinner,pull = ; + }; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_a>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From 56a9c909d88ab3f66e14c5d21727b8e388a8ec90 Mon Sep 17 00:00:00 2001 From: Wang Long Date: Wed, 24 Dec 2014 03:09:58 +0000 Subject: ARM: dts: Add hip01-ca9x2 dts file Add dts file for Hisilicon hip01 ca9x2 board Signed-off-by: Wang Long Signed-off-by: Wei Xu [olof: Folded in smp enable-method from a different patch] Signed-off-by: Olof Johansson --- .../bindings/arm/hisilicon/hisilicon.txt | 25 +++++ arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/hip01-ca9x2.dts | 51 ++++++++++ arch/arm/boot/dts/hip01.dtsi | 110 +++++++++++++++++++++ 4 files changed, 188 insertions(+) create mode 100644 arch/arm/boot/dts/hip01-ca9x2.dts create mode 100644 arch/arm/boot/dts/hip01.dtsi (limited to 'arch') diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index f717c7b48603..35b1bd49cfa1 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -9,6 +9,10 @@ HiP04 D01 Board Required root node properties: - compatible = "hisilicon,hip04-d01"; +HiP01 ca9x2 Board +Required root node properties: + - compatible = "hisilicon,hip01-ca9x2"; + Hisilicon system controller @@ -36,6 +40,27 @@ Example: reboot-offset = <0x4>; }; +----------------------------------------------------------------------- +Hisilicon HiP01 system controller + +Required properties: +- compatible : "hisilicon,hip01-sysctrl" +- reg : Register address and size + +The HiP01 system controller is mostly compatible with hisilicon +system controller,but it has some specific control registers for +HIP01 SoC family, such as slave core boot, and also some same +registers located at different offset. + +Example: + + /* for hip01-ca9x2 */ + sysctrl: system-controller@10000000 { + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; + reg = <0x10000000 0x1000>; + reboot-offset = <0x4>; + }; + ----------------------------------------------------------------------- Hisilicon CPU controller diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 31065cc01df3..293b80e196b7 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -123,6 +123,8 @@ dtb-$(CONFIG_ARCH_HIX5HD2) += \ dtb-$(CONFIG_ARCH_HIGHBANK) += \ highbank.dtb \ ecx-2000.dtb +dtb-$(CONFIG_ARCH_HIP01) += \ + hip01-ca9x2.dtb dtb-$(CONFIG_ARCH_HIP04) += \ hip04-d01.dtb dtb-$(CONFIG_ARCH_INTEGRATOR) += \ diff --git a/arch/arm/boot/dts/hip01-ca9x2.dts b/arch/arm/boot/dts/hip01-ca9x2.dts new file mode 100644 index 000000000000..eca5e42770fe --- /dev/null +++ b/arch/arm/boot/dts/hip01-ca9x2.dts @@ -0,0 +1,51 @@ +/* + * Hisilicon Ltd. HiP01 SoC + * + * Copyright (C) 2014 Hisilicon Ltd. + * Copyright (C) 2014 Huawei Ltd. + * + * Author: Wang Long + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +/* First 8KB reserved for secondary core boot */ +/memreserve/ 0x80000000 0x00002000; + +#include "hip01.dtsi" + +/ { + model = "Hisilicon HIP01 Development Board"; + compatible = "hisilicon,hip01-ca9x2", "hisilicon,hip01"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "hisilicon,hip01-smp"; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x80000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi new file mode 100644 index 000000000000..33130f8461c3 --- /dev/null +++ b/arch/arm/boot/dts/hip01.dtsi @@ -0,0 +1,110 @@ +/* + * Hisilicon Ltd. HiP01 SoC + * + * Copyright (c) 2014 Hisilicon Ltd. + * Copyright (c) 2014 Huawei Ltd. + * + * Author: Wang Long + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "skeleton.dtsi" + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + gic: interrupt-controller@1e001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x1a001000 0x1000>, <0x1a000100 0x1000>; + }; + + hisi_refclk144mhz: refclk144mkhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <144000000>; + clock-output-names = "hisi:refclk144khz"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&gic>; + ranges = <0 0x10000000 0x20000000>; + + amba { + #address-cells = <1>; + #size-cells = <1>; + compatible = "arm,amba-bus"; + ranges; + + uart0: uart@10001000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10001000 0x1000>; + clocks = <&hisi_refclk144mhz>; + clock-names = "apb_pclk"; + reg-shift = <2>; + interrupts = <0 32 4>; + status = "disabled"; + }; + + uart1: uart@10002000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10002000 0x1000>; + clocks = <&hisi_refclk144mhz>; + clock-names = "apb_pclk"; + reg-shift = <2>; + interrupts = <0 33 4>; + status = "disabled"; + }; + + uart2: uart@10003000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10003000 0x1000>; + clocks = <&hisi_refclk144mhz>; + clock-names = "apb_pclk"; + reg-shift = <2>; + interrupts = <0 34 4>; + status = "disabled"; + }; + + uart3: uart@10006000 { + compatible = "snps,dw-apb-uart"; + reg = <0x10006000 0x1000>; + clocks = <&hisi_refclk144mhz>; + clock-names = "apb_pclk"; + reg-shift = <2>; + interrupts = <0 4 4>; + status = "disabled"; + }; + }; + + system-controller@10000000 { + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; + reg = <0x10000000 0x1000>; + reboot-offset = <0x4>; + }; + + global_timer@0a000200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x0a000200 0x100>; + interrupts = <1 11 0xf04>; + clocks = <&hisi_refclk144mhz>; + }; + + local_timer@0a000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x0a000600 0x100>; + interrupts = <1 13 0xf04>; + clocks = <&hisi_refclk144mhz>; + }; + }; +}; -- cgit v1.2.3 From 7636bda61aacbef955c7f0088f7c3cb0875dc4a9 Mon Sep 17 00:00:00 2001 From: Christoph Junghans Date: Tue, 13 Jan 2015 21:49:29 -0700 Subject: ARM: Kirkwood: Added support for pogoplug e02 (pink/gray) The pogoplug differs from the SheevaPlug only by a few details, but especially in the led assignments. This patch was tested under Gentoo Linux and is based on dts files from Arch Linux ARM and OpenWrt. Suggested-by: Felix Kaechele Suggested-by: Oleg Rakhmanov Signed-off-by: Christoph Junghans [Andrew Lunn : Fixed subject line] Signed-off-by: Andrew Lunn --- .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/kirkwood-pogo_e02.dts | 134 +++++++++++++++++++++ 3 files changed, 136 insertions(+) create mode 100644 arch/arm/boot/dts/kirkwood-pogo_e02.dts (limited to 'arch') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index b1df0ad1306c..61888db9ee72 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -34,6 +34,7 @@ chipidea Chipidea, Inc chrp Common Hardware Reference Platform chunghwa Chunghwa Picture Tubes Ltd. cirrus Cirrus Logic, Inc. +cloudengines Cloud Engines, Inc. cnm Chips&Media, Inc. cortina Cortina Systems, Inc. crystalfontz Crystalfontz America, Inc. diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 17ee1d6a0ac0..968bc7a9a43b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -161,6 +161,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += kirkwood-b3.dtb \ kirkwood-openrd-base.dtb \ kirkwood-openrd-client.dtb \ kirkwood-openrd-ultimate.dtb \ + kirkwood-pogo_e02.dtb \ kirkwood-rd88f6192.dtb \ kirkwood-rd88f6281-z0.dtb \ kirkwood-rd88f6281-a.dtb \ diff --git a/arch/arm/boot/dts/kirkwood-pogo_e02.dts b/arch/arm/boot/dts/kirkwood-pogo_e02.dts new file mode 100644 index 000000000000..a190080c9c4f --- /dev/null +++ b/arch/arm/boot/dts/kirkwood-pogo_e02.dts @@ -0,0 +1,134 @@ +/* + * kirkwood-pogo_e02.dts - Device tree file for Pogoplug E02 + * + * Copyright (C) 2015 Christoph Junghans + * + * based on information of dts files from + * Arch Linux ARM by Oleg Rakhmanov + * OpenWrt by Felix Kaechele + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "kirkwood.dtsi" +#include "kirkwood-6281.dtsi" + +/ { + model = "Cloud Engines Pogoplug E02"; + compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281", + "marvell,kirkwood"; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + stdout-path = &uart0; + }; + + gpio-leds { + compatible = "gpio-leds"; + + health { + label = "pogo_e02:green:health"; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + fault { + label = "pogo_e02:orange:fault"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + }; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-0 = <&pmx_usb_power_enable>; + pinctrl-names = "default"; + + usb_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "USB Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&pinctrl { + pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange + &pmx_led_green >; + pinctrl-names = "default"; + + pmx_usb_power_enable: pmx-usb-power-enable { + marvell,pins = "mpp29"; + marvell,function = "gpio"; + }; + + pmx_led_green: pmx-led-green { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; + + pmx_led_orange: pmx-led-orange { + marvell,pins = "mpp49"; + marvell,function = "gpio"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&nand { + chip-delay = <40>; + status = "okay"; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x100000>; + read-only; + }; + + partition@100000 { + label = "uImage"; + reg = <0x0100000 0x400000>; + }; + + partition@500000 { + label = "pogoplug"; + reg = <0x0500000 0x2000000>; + }; + + partition@2500000 { + label = "root"; + reg = <0x02500000 0x5b00000>; + }; +}; + +&mdio { + status = "okay"; + + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + ethernet0-port@0 { + phy-handle = <ðphy0>; + }; +}; -- cgit v1.2.3 From 0df5a6ccd0c2869663e72d87eecfed45cf2a16b2 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 15 Jan 2015 15:09:38 +0100 Subject: ARM: mvebu: Armada 385 GP: Add regulators to the SATA port Add the regulators to each SATA port. Signed-off-by: Gregory CLEMENT --- arch/arm/boot/dts/armada-388-gp.dts | 126 ++++++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-388-gp.dts b/arch/arm/boot/dts/armada-388-gp.dts index 4df22bf91683..590b383db323 100644 --- a/arch/arm/boot/dts/armada-388-gp.dts +++ b/arch/arm/boot/dts/armada-388-gp.dts @@ -173,6 +173,16 @@ status = "okay"; #address-cells = <1>; #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + target-supply = <®_5v_sata0>; + }; + + sata1: sata-port@1 { + reg = <1>; + target-supply = <®_5v_sata1>; + }; }; sata@e0000 { @@ -181,6 +191,16 @@ status = "okay"; #address-cells = <1>; #size-cells = <0>; + + sata2: sata-port@0 { + reg = <0>; + target-supply = <®_5v_sata2>; + }; + + sata3: sata-port@1 { + reg = <1>; + target-supply = <®_5v_sata3>; + }; }; sdhci@d8000 { @@ -278,6 +298,112 @@ regulator-always-on; gpio = <&expander0 4 GPIO_ACTIVE_HIGH>; }; + + reg_sata0: pwr-sata0 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata0"; + enable-active-high; + regulator-always-on; + + }; + + reg_5v_sata0: v5-sata0 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata0>; + }; + + reg_12v_sata0: v12-sata0 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata0"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata0>; + }; + + reg_sata1: pwr-sata1 { + regulator-name = "pwr_en_sata1"; + compatible = "regulator-fixed"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + enable-active-high; + regulator-always-on; + gpio = <&expander0 3 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata1: v5-sata1 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata1>; + }; + + reg_12v_sata1: v12-sata1 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata1"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata1>; + }; + + reg_sata2: pwr-sata2 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata2"; + enable-active-high; + regulator-always-on; + gpio = <&expander0 11 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata2: v5-sata2 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata2>; + }; + + reg_12v_sata2: v12-sata2 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata2"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata2>; + }; + + reg_sata3: pwr-sata3 { + compatible = "regulator-fixed"; + regulator-name = "pwr_en_sata3"; + enable-active-high; + regulator-always-on; + gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; + }; + + reg_5v_sata3: v5-sata3 { + compatible = "regulator-fixed"; + regulator-name = "v5.0-sata3"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <®_sata3>; + }; + + reg_12v_sata3: v12-sata3 { + compatible = "regulator-fixed"; + regulator-name = "v12.0-sata3"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + vin-supply = <®_sata3>; + }; }; &pinctrl { -- cgit v1.2.3 From 6cc082a84e13f3a0078973a08adf22f1404acc3d Mon Sep 17 00:00:00 2001 From: Paul Bolle Date: Mon, 19 Jan 2015 20:40:25 +0100 Subject: ARM: mvebu: make DTS comments reflect DEBUG_LL changes The Kconfig symbol DEBUG_MVEBU_UART_ALTERNATE was renamed to DEBUG_MVEBU_UART0_ALTERNATE. And the symbol DEBUG_MVEBU_UART1_ALTERNATE was added to allow UART1 as a DEBUG_LL target. Make the comment at the top of this DTS reflect those changes. Since we're touching this DTS add comments to show which blocks describe UART0 and UART1. Signed-off-by: Paul Bolle Signed-off-by: Andrew Lunn --- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index ca0200e20751..28174ab019f9 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -3,8 +3,8 @@ * * Note: this board is shipped with a new generation boot loader that * remaps internal registers at 0xf1000000. Therefore, if earlyprintk - * is used, the CONFIG_DEBUG_MVEBU_UART_ALTERNATE option should be - * used. + * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the + * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used. * * Copyright (C) 2013 Marvell * @@ -60,10 +60,12 @@ }; internal-regs { + /* UART0 */ serial@12000 { status = "okay"; }; + /* UART1 */ serial@12100 { status = "okay"; }; -- cgit v1.2.3 From a29cb8c45d445a1ad812a0f7b3676926d08053f0 Mon Sep 17 00:00:00 2001 From: Daniel Kurtz Date: Fri, 10 Oct 2014 20:26:14 +0800 Subject: ARM: dts: rockchip: Add rk3288 vop and display-subsystem Add devicetree nodes for rk3288 VOP (Video Output Processors), and the top level display-subsystem root node. Later patches add endpoints (eDP, HDMI, LVDS, etc) that attach to the VOPs' output ports. Signed-off-by: Daniel Kurtz Signed-off-by: Mark yao Reviewed-by: Stephane Marchesin Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2a878a35facc..1d22238416c7 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -149,6 +149,11 @@ clock-frequency = <24000000>; }; + display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vopl_out>, <&vopb_out>; + }; + sdmmc: dwmmc@ff0c0000 { compatible = "rockchip,rk3288-dw-mshc"; clock-freq-min-max = <400000 150000000>; @@ -566,6 +571,23 @@ status = "disabled"; }; + vopb: vop@ff930000 { + compatible = "rockchip,rk3288-vop"; + reg = <0xff930000 0x19c>; + interrupts = ; + clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vopb_mmu>; + status = "disabled"; + + vopb_out: port { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + vopb_mmu: iommu@ff930300 { compatible = "rockchip,iommu"; reg = <0xff930300 0x100>; @@ -575,6 +597,23 @@ status = "disabled"; }; + vopl: vop@ff940000 { + compatible = "rockchip,rk3288-vop"; + reg = <0xff940000 0x19c>; + interrupts = ; + clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vopl_mmu>; + status = "disabled"; + + vopl_out: port { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + vopl_mmu: iommu@ff940300 { compatible = "rockchip,iommu"; reg = <0xff940300 0x100>; -- cgit v1.2.3 From d5a1df48d051838ec83bcb56a6debc7e347ae1f9 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Tue, 4 Nov 2014 13:13:14 +0800 Subject: ARM: dts: rockchip: add rk3288 hdmi nodes Add an hdmi node, and also add hdmi endpoints to vopb and vopl output port nodes. Signed-off-by: Andy Yan Signed-off-by: Yakir Yang Reviewed-by: Daniel Kurtz Tested-by: Daniel Kurtz Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 1d22238416c7..c7235fa899cc 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -585,6 +585,11 @@ vopb_out: port { #address-cells = <1>; #size-cells = <0>; + + vopb_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_vopb>; + }; }; }; @@ -611,6 +616,11 @@ vopl_out: port { #address-cells = <1>; #size-cells = <0>; + + vopl_out_hdmi: endpoint@0 { + reg = <0>; + remote-endpoint = <&hdmi_in_vopl>; + }; }; }; @@ -623,6 +633,33 @@ status = "disabled"; }; + hdmi: hdmi@ff980000 { + compatible = "rockchip,rk3288-dw-hdmi"; + reg = <0xff980000 0x20000>; + reg-io-width = <4>; + ddc-i2c-bus = <&i2c5>; + rockchip,grf = <&grf>; + interrupts = ; + clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; + clock-names = "iahb", "isfr"; + status = "disabled"; + + ports { + hdmi_in: port { + #address-cells = <1>; + #size-cells = <0>; + hdmi_in_vopb: endpoint@0 { + reg = <0>; + remote-endpoint = <&vopb_out_hdmi>; + }; + hdmi_in_vopl: endpoint@1 { + reg = <1>; + remote-endpoint = <&vopl_out_hdmi>; + }; + }; + }; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; interrupt-controller; -- cgit v1.2.3 From 1de77b7f904ad53bd16a1ca790caf149ef0d7454 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Fri, 16 Jan 2015 16:31:06 +0100 Subject: ARM: at91/dt: sama5d4: add pioD controller PioD controller was not described in the device tree since we don't use it. As pinctrl-at91 allows disabled gpio controllers in the device tree, we can add it to complete the device description. Signed-off-by: Ludovic Desroches Acked-by: Linus Walleij Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d4.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index 1b4fe4e19721..e7a1d76a9f7e 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -62,6 +62,7 @@ gpio0 = &pioA; gpio1 = &pioB; gpio2 = &pioC; + gpio3 = &pioD; gpio4 = &pioE; tcb0 = &tcb0; tcb1 = &tcb1; @@ -1121,6 +1122,18 @@ clocks = <&pioC_clk>; }; + pioD: gpio@fc068000 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfc068000 0x100>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&pioD_clk>; + status = "disabled"; + }; + pioE: gpio@fc06d000 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfc06d000 0x100>; -- cgit v1.2.3 From 19a08b6b3f782f577b4b0fef9b6e60beba66c2f3 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Fri, 23 Jan 2015 16:39:23 +0100 Subject: ARM: dts: sun4i: Add Hyundau A7HD board The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD Cc: Mark Janssen Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts | 105 +++++++++++++++++++++++++++ 2 files changed, 106 insertions(+) create mode 100644 arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7df26a203f97..09d46eece90f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -452,6 +452,7 @@ dtb-$(CONFIG_MACH_SUN4I) += \ sun4i-a10-mk802.dtb \ sun4i-a10-mk802ii.dtb \ sun4i-a10-hackberry.dtb \ + sun4i-a10-hyundai-a7hd.dtb \ sun4i-a10-inet97fv2.dtb \ sun4i-a10-olinuxino-lime.dtb \ sun4i-a10-pcduino.dtb diff --git a/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts b/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts new file mode 100644 index 000000000000..c88382aacc36 --- /dev/null +++ b/arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts @@ -0,0 +1,105 @@ +/* + * Copyright 2015 Hans de Goede + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public + * License along with this file; if not, write to the Free + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "sun4i-a10.dtsi" +#include "sunxi-common-regulators.dtsi" +#include + +/ { + model = "Hyundai A7HD"; + compatible = "hyundai,a7hd", "allwinner,sun4i-a10"; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins_a>; + status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <1>; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_reference_design>; + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */ + cd-inverted; + status = "okay"; +}; + +®_usb2_vbus { + gpio = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */ + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&usb2_vbus_pin_a { + allwinner,pins = "PH6"; +}; + +&usbphy { + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From e8b1029dcc4776b5b35e727b4702c58f4a64c329 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Fri, 23 Jan 2015 14:45:34 -0800 Subject: ARM: dts: imx6q: sort dtbs in makefile Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 38e1ec7a81ff..b4d5b5af9c35 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -297,14 +297,14 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6q-sabresd.dtb \ imx6q-sbc6x.dtb \ imx6q-tbs2910.dtb \ - imx6q-udoo.dtb \ - imx6q-wandboard.dtb \ - imx6q-wandboard-revb1.dtb \ imx6q-tx6q-1010.dtb \ imx6q-tx6q-1010-comtft.dtb \ imx6q-tx6q-1020.dtb \ imx6q-tx6q-1020-comtft.dtb \ - imx6q-tx6q-1110.dtb + imx6q-tx6q-1110.dtb \ + imx6q-udoo.dtb \ + imx6q-wandboard.dtb \ + imx6q-wandboard-revb1.dtb dtb-$(CONFIG_SOC_IMX6SL) += \ imx6sl-evk.dtb dtb-$(CONFIG_SOC_IMX6SX) += \ -- cgit v1.2.3 From 0da65870413630339399eb691162eef5c27272de Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Sat, 24 Jan 2015 13:16:15 +0900 Subject: ARM: dts: convert to generic power domain bindings for exynos DT This patch replaces all custom samsung,power-domain dt properties with generic power domain bindings and updates documentation Samsung's devices referring to old binding. Suggested-by: Kevin Hilman Signed-off-by: Marek Szyprowski Reviewed-by: Javier Martinez Canillas [javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook] Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- .../bindings/arm/exynos/power_domain.txt | 2 +- .../devicetree/bindings/iommu/samsung,sysmmu.txt | 6 +++--- .../devicetree/bindings/media/s5p-mfc.txt | 4 ++-- .../devicetree/bindings/video/exynos_dsim.txt | 4 ++-- .../devicetree/bindings/video/samsung-fimd.txt | 4 ++-- arch/arm/boot/dts/exynos3250.dtsi | 11 +++++++--- arch/arm/boot/dts/exynos4.dtsi | 25 ++++++++++++++-------- arch/arm/boot/dts/exynos4210.dtsi | 1 + arch/arm/boot/dts/exynos4415.dtsi | 7 ++++++ arch/arm/boot/dts/exynos4x12.dtsi | 7 +++--- arch/arm/boot/dts/exynos5250.dtsi | 12 ++++++----- arch/arm/boot/dts/exynos5420.dtsi | 10 ++++++--- 12 files changed, 60 insertions(+), 33 deletions(-) (limited to 'arch') diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index abde1ea8a119..f4445e5a2bbb 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -23,7 +23,7 @@ Optional Properties: devices in this power domain. Maximum of 4 pairs (N = 0 to 3) are supported currently. -Node of a device using power domains must have a samsung,power-domain property +Node of a device using power domains must have a power-domains property defined with a phandle to respective power domain. Example: diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt index 6fa4c737af23..729543c47046 100644 --- a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt +++ b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.txt @@ -45,7 +45,7 @@ Required properties: Exynos4 SoCs, there needs no "master" clock. Exynos5 SoCs, some System MMUs must have "master" clocks. - clocks: Required if the System MMU is needed to gate its clock. -- samsung,power-domain: Required if the System MMU is needed to gate its power. +- power-domains: Required if the System MMU is needed to gate its power. Please refer to the following document: Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -54,7 +54,7 @@ Examples: compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; interrupts = <0 85 0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; }; @@ -66,5 +66,5 @@ Examples: interrupts = <2 0>; clock-names = "sysmmu", "master"; clocks = <&clock CLK_SMMU_GSCL0>, <&clock CLK_GSCL0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; }; diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt index 3e3c5f349570..2d5787eac91a 100644 --- a/Documentation/devicetree/bindings/media/s5p-mfc.txt +++ b/Documentation/devicetree/bindings/media/s5p-mfc.txt @@ -28,7 +28,7 @@ Required properties: for DMA contiguous memory allocation and its size. Optional properties: - - samsung,power-domain : power-domain property defined with a phandle + - power-domains : power-domain property defined with a phandle to respective power domain. Example: @@ -38,7 +38,7 @@ mfc: codec@13400000 { compatible = "samsung,mfc-v5"; reg = <0x13400000 0x10000>; interrupts = <0 94 0>; - samsung,power-domain = <&pd_mfc>; + power-domains = <&pd_mfc>; clocks = <&clock 273>; clock-names = "mfc"; }; diff --git a/Documentation/devicetree/bindings/video/exynos_dsim.txt b/Documentation/devicetree/bindings/video/exynos_dsim.txt index ca2b4aacd9af..802aa7ef64e5 100644 --- a/Documentation/devicetree/bindings/video/exynos_dsim.txt +++ b/Documentation/devicetree/bindings/video/exynos_dsim.txt @@ -21,7 +21,7 @@ Required properties: according to DSI host bindings (see MIPI DSI bindings [1]) Optional properties: - - samsung,power-domain: a phandle to DSIM power domain node + - power-domains: a phandle to DSIM power domain node Child nodes: Should contain DSI peripheral nodes (see MIPI DSI bindings [1]). @@ -53,7 +53,7 @@ Example: phy-names = "dsim"; vddcore-supply = <&vusb_reg>; vddio-supply = <&vmipi_reg>; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; #address-cells = <1>; #size-cells = <0>; samsung,pll-clock-frequency = <24000000>; diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt b/Documentation/devicetree/bindings/video/samsung-fimd.txt index cf1af6371021..a8bbbde03e79 100644 --- a/Documentation/devicetree/bindings/video/samsung-fimd.txt +++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt @@ -38,7 +38,7 @@ Required properties: property. Must contain "sclk_fimd" and "fimd". Optional Properties: -- samsung,power-domain: a phandle to FIMD power domain node. +- power-domains: a phandle to FIMD power domain node. - samsung,invert-vden: video enable signal is inverted - samsung,invert-vclk: video clock signal is inverted - display-timings: timing settings for FIMD, as described in document [1]. @@ -97,7 +97,7 @@ SoC specific DT entry: interrupts = <11 0>, <11 1>, <11 2>; clocks = <&clock 140>, <&clock 283>; clock-names = "sclk_fimd", "fimd"; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 204a84be5b87..acdf34401015 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -141,26 +141,31 @@ pd_cam: cam-power-domain@10023C00 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C00 0x20>; + #power-domain-cells = <0>; }; pd_mfc: mfc-power-domain@10023C40 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C40 0x20>; + #power-domain-cells = <0>; }; pd_g3d: g3d-power-domain@10023C60 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C60 0x20>; + #power-domain-cells = <0>; }; pd_lcd0: lcd0-power-domain@10023C80 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C80 0x20>; + #power-domain-cells = <0>; }; pd_isp: isp-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; + #power-domain-cells = <0>; }; cmu: clock-controller@10030000 { @@ -235,7 +240,7 @@ interrupts = <0 84 0>, <0 85 0>, <0 86 0>; clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; clock-names = "sclk_fimd", "fimd"; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; @@ -245,7 +250,7 @@ reg = <0x11C80000 0x10000>; interrupts = <0 83 0>; samsung,phy-type = <0>; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; phys = <&mipi_phy 1>; phy-names = "dsim"; clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; @@ -348,7 +353,7 @@ interrupts = <0 102 0>; clock-names = "mfc", "sclk_mfc"; clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>; - samsung,power-domain = <&pd_mfc>; + power-domains = <&pd_mfc>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index b8168f1f8139..c5dc2efb99ed 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -81,36 +81,43 @@ pd_mfc: mfc-power-domain@10023C40 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C40 0x20>; + #power-domain-cells = <0>; }; pd_g3d: g3d-power-domain@10023C60 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C60 0x20>; + #power-domain-cells = <0>; }; pd_lcd0: lcd0-power-domain@10023C80 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C80 0x20>; + #power-domain-cells = <0>; }; pd_tv: tv-power-domain@10023C20 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C20 0x20>; + #power-domain-cells = <0>; }; pd_cam: cam-power-domain@10023C00 { compatible = "samsung,exynos4210-pd"; reg = <0x10023C00 0x20>; + #power-domain-cells = <0>; }; pd_gps: gps-power-domain@10023CE0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CE0 0x20>; + #power-domain-cells = <0>; }; pd_gps_alive: gps-alive-power-domain@10023D00 { compatible = "samsung,exynos4210-pd"; reg = <0x10023D00 0x20>; + #power-domain-cells = <0>; }; gic: interrupt-controller@10490000 { @@ -147,7 +154,7 @@ compatible = "samsung,exynos4210-mipi-dsi"; reg = <0x11C80000 0x10000>; interrupts = <0 79 0>; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; phys = <&mipi_phy 1>; phy-names = "dsim"; clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>; @@ -172,7 +179,7 @@ interrupts = <0 84 0>; clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>; clock-names = "fimc", "sclk_fimc"; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; @@ -183,7 +190,7 @@ interrupts = <0 85 0>; clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>; clock-names = "fimc", "sclk_fimc"; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; @@ -194,7 +201,7 @@ interrupts = <0 86 0>; clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>; clock-names = "fimc", "sclk_fimc"; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; @@ -205,7 +212,7 @@ interrupts = <0 87 0>; clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>; clock-names = "fimc", "sclk_fimc"; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; @@ -217,7 +224,7 @@ clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>; clock-names = "csis", "sclk_csis"; bus-width = <4>; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; phys = <&mipi_phy 0>; phy-names = "csis"; status = "disabled"; @@ -232,7 +239,7 @@ clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>; clock-names = "csis", "sclk_csis"; bus-width = <2>; - samsung,power-domain = <&pd_cam>; + power-domains = <&pd_cam>; phys = <&mipi_phy 2>; phy-names = "csis"; status = "disabled"; @@ -391,7 +398,7 @@ compatible = "samsung,mfc-v5"; reg = <0x13400000 0x10000>; interrupts = <0 94 0>; - samsung,power-domain = <&pd_mfc>; + power-domains = <&pd_mfc>; clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>; clock-names = "mfc", "sclk_mfc"; status = "disabled"; @@ -641,7 +648,7 @@ interrupts = <11 0>, <11 1>, <11 2>; clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; clock-names = "sclk_fimd", "fimd"; - samsung,power-domain = <&pd_lcd0>; + power-domains = <&pd_lcd0>; samsung,sysreg = <&sys_reg>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index bcc9e63c8070..6728aaa2af9d 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -79,6 +79,7 @@ pd_lcd1: lcd1-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; + #power-domain-cells = <0>; }; gic: interrupt-controller@10490000 { diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index c1c9b37340d9..2007def1ab43 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi @@ -131,36 +131,43 @@ pd_cam: cam-power-domain@10024000 { compatible = "samsung,exynos4210-pd"; reg = <0x10024000 0x20>; + #power-domain-cells = <0>; }; pd_tv: tv-power-domain@10024020 { compatible = "samsung,exynos4210-pd"; reg = <0x10024020 0x20>; + #power-domain-cells = <0>; }; pd_mfc: mfc-power-domain@10024040 { compatible = "samsung,exynos4210-pd"; reg = <0x10024040 0x20>; + #power-domain-cells = <0>; }; pd_g3d: g3d-power-domain@10024060 { compatible = "samsung,exynos4210-pd"; reg = <0x10024060 0x20>; + #power-domain-cells = <0>; }; pd_lcd0: lcd0-power-domain@10024080 { compatible = "samsung,exynos4210-pd"; reg = <0x10024080 0x20>; + #power-domain-cells = <0>; }; pd_isp0: isp0-power-domain@100240A0 { compatible = "samsung,exynos4210-pd"; reg = <0x100240A0 0x20>; + #power-domain-cells = <0>; }; pd_isp1: isp1-power-domain@100240E0 { compatible = "samsung,exynos4210-pd"; reg = <0x100240E0 0x20>; + #power-domain-cells = <0>; }; cmu: clock-controller@10030000 { diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 93b70402e943..da8734e25f50 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -52,6 +52,7 @@ pd_isp: isp-power-domain@10023CA0 { compatible = "samsung,exynos4210-pd"; reg = <0x10023CA0 0x20>; + #power-domain-cells = <0>; }; clock: clock-controller@10030000 { @@ -195,7 +196,7 @@ compatible = "samsung,exynos4212-fimc-lite"; reg = <0x12390000 0x1000>; interrupts = <0 105 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>; clock-names = "flite"; status = "disabled"; @@ -205,7 +206,7 @@ compatible = "samsung,exynos4212-fimc-lite"; reg = <0x123A0000 0x1000>; interrupts = <0 106 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE1>; clock-names = "flite"; status = "disabled"; @@ -215,7 +216,7 @@ compatible = "samsung,exynos4212-fimc-is", "simple-bus"; reg = <0x12000000 0x260000>; interrupts = <0 90 0>, <0 95 0>; - samsung,power-domain = <&pd_isp>; + power-domains = <&pd_isp>; clocks = <&clock CLK_FIMC_LITE0>, <&clock CLK_FIMC_LITE1>, <&clock CLK_PPMUISPX>, <&clock CLK_PPMUISPMX>, diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 0a229fcd7acf..2b5a62c91d26 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -93,11 +93,13 @@ pd_gsc: gsc-power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; + #power-domain-cells = <0>; }; pd_mfc: mfc-power-domain@10044040 { compatible = "samsung,exynos4210-pd"; reg = <0x10044040 0x20>; + #power-domain-cells = <0>; }; clock: clock-controller@10010000 { @@ -222,7 +224,7 @@ compatible = "samsung,mfc-v6"; reg = <0x11000000 0x10000>; interrupts = <0 96 0>; - samsung,power-domain = <&pd_mfc>; + power-domains = <&pd_mfc>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; }; @@ -682,7 +684,7 @@ compatible = "samsung,exynos5-gsc"; reg = <0x13e00000 0x1000>; interrupts = <0 85 0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; }; @@ -691,7 +693,7 @@ compatible = "samsung,exynos5-gsc"; reg = <0x13e10000 0x1000>; interrupts = <0 86 0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL1>; clock-names = "gscl"; }; @@ -700,7 +702,7 @@ compatible = "samsung,exynos5-gsc"; reg = <0x13e20000 0x1000>; interrupts = <0 87 0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL2>; clock-names = "gscl"; }; @@ -709,7 +711,7 @@ compatible = "samsung,exynos5-gsc"; reg = <0x13e30000 0x1000>; interrupts = <0 88 0>; - samsung,power-domain = <&pd_gsc>; + power-domains = <&pd_gsc>; clocks = <&clock CLK_GSCL3>; clock-names = "gscl"; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 517e50f6760b..03ef2481c640 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -178,7 +178,7 @@ interrupts = <0 96 0>; clocks = <&clock CLK_MFC>; clock-names = "mfc"; - samsung,power-domain = <&mfc_pd>; + power-domains = <&mfc_pd>; }; mmc_0: mmc@12200000 { @@ -250,11 +250,13 @@ gsc_pd: power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; + #power-domain-cells = <0>; }; isp_pd: power-domain@10044020 { compatible = "samsung,exynos4210-pd"; reg = <0x10044020 0x20>; + #power-domain-cells = <0>; }; mfc_pd: power-domain@10044060 { @@ -263,11 +265,13 @@ clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, <&clock CLK_MOUT_USER_ACLK333>; clock-names = "oscclk", "pclk0", "clk0"; + #power-domain-cells = <0>; }; msc_pd: power-domain@10044120 { compatible = "samsung,exynos4210-pd"; reg = <0x10044120 0x20>; + #power-domain-cells = <0>; }; pinctrl_0: pinctrl@13400000 { @@ -730,7 +734,7 @@ interrupts = <0 85 0>; clocks = <&clock CLK_GSCL0>; clock-names = "gscl"; - samsung,power-domain = <&gsc_pd>; + power-domains = <&gsc_pd>; }; gsc_1: video-scaler@13e10000 { @@ -739,7 +743,7 @@ interrupts = <0 86 0>; clocks = <&clock CLK_GSCL1>; clock-names = "gscl"; - samsung,power-domain = <&gsc_pd>; + power-domains = <&gsc_pd>; }; pmu_system_controller: system-controller@10040000 { -- cgit v1.2.3 From 32f144f28e1b0cc8de7fb1a920775fd665213fe4 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Sat, 24 Jan 2015 13:12:03 +0900 Subject: ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards All currently supported boards use hsotg/dwc2 controller in device ('peripheral') mode, so add property which sets correct operation mode. This patch fixes support in recent changes in dwc2 driver, which added support for dual-role devices. Suggested-by: Paul Zimmerman Signed-off-by: Marek Szyprowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 1 + arch/arm/boot/dts/exynos3250-rinato.dts | 1 + arch/arm/boot/dts/exynos4210-trats.dts | 1 + arch/arm/boot/dts/exynos4210-universal_c210.dts | 1 + arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 1 + arch/arm/boot/dts/exynos4412-trats2.dts | 1 + arch/arm/boot/dts/s5pv210-aquila.dts | 1 + arch/arm/boot/dts/s5pv210-goni.dts | 1 + arch/arm/boot/dts/s5pv210-smdkv210.dts | 1 + 9 files changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 5e4a471faee1..683596844ef3 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -140,6 +140,7 @@ &hsotg { vusb_d-supply = <&ldo15_reg>; vusb_a-supply = <&ldo12_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index c7f4fab6dfd9..5121954579ad 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -131,6 +131,7 @@ &hsotg { vusb_d-supply = <&ldo15_reg>; vusb_a-supply = <&ldo12_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 720836205546..1c0c7be02616 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -91,6 +91,7 @@ hsotg@12480000 { vusb_d-supply = <&vusb_reg>; vusb_a-supply = <&vusbdac_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index aaf0cae4f5e8..08f89e0ff2b8 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -71,6 +71,7 @@ hsotg@12480000 { vusb_d-supply = <&ldo3_reg>; vusb_a-supply = <&ldo8_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index 3fbf588682b9..ffcf17bbf63b 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -381,6 +381,7 @@ }; hsotg@12480000 { + dr_mode = "peripheral"; status = "okay"; vusb_d-supply = <&ldo15_reg>; vusb_a-supply = <&ldo12_reg>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 29231b452643..c81c4769411d 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -845,6 +845,7 @@ hsotg@12480000 { vusb_d-supply = <&ldo15_reg>; vusb_a-supply = <&ldo12_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/s5pv210-aquila.dts b/arch/arm/boot/dts/s5pv210-aquila.dts index aa31b84a707a..f00cea7aca2f 100644 --- a/arch/arm/boot/dts/s5pv210-aquila.dts +++ b/arch/arm/boot/dts/s5pv210-aquila.dts @@ -355,6 +355,7 @@ &hsotg { vusb_a-supply = <&ldo3_reg>; vusb_d-supply = <&ldo8_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/s5pv210-goni.dts b/arch/arm/boot/dts/s5pv210-goni.dts index 6387c77a6f7b..a3d4643b202e 100644 --- a/arch/arm/boot/dts/s5pv210-goni.dts +++ b/arch/arm/boot/dts/s5pv210-goni.dts @@ -333,6 +333,7 @@ &hsotg { vusb_a-supply = <&ldo3_reg>; vusb_d-supply = <&ldo8_reg>; + dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/boot/dts/s5pv210-smdkv210.dts b/arch/arm/boot/dts/s5pv210-smdkv210.dts index cb8521899ec8..da7d210df670 100644 --- a/arch/arm/boot/dts/s5pv210-smdkv210.dts +++ b/arch/arm/boot/dts/s5pv210-smdkv210.dts @@ -181,6 +181,7 @@ }; &hsotg { + dr_mode = "peripheral"; status = "okay"; }; -- cgit v1.2.3 From c0276bc1e95f48dca75808aaaf2fb4330d636b69 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Sat, 24 Jan 2015 13:13:58 +0900 Subject: ARM: dts: Add regulator-haptic node for exynos3250-rinato This patch adds regulator-haptic device node controlled by regulator. Signed-off-by: Jaewon Kim Reviewed-by: Chanwoo Choi Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-rinato.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 5121954579ad..af7589efa567 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -99,6 +99,13 @@ }; }; }; + + haptics { + compatible = "regulator-haptic"; + haptic-supply = <&motor_reg>; + min-microvolt = <1100000>; + max-microvolt = <2700000>; + }; }; &adc { -- cgit v1.2.3 From 9ce09a1f11f68e2c91e0a592c7250cd5df041468 Mon Sep 17 00:00:00 2001 From: Jaewon Kim Date: Sat, 24 Jan 2015 13:13:58 +0900 Subject: ARM: dts: Add regulator-haptic node for exynos3250-monk This patch adds regulator-haptic device node controlled by regulator. Signed-off-by: Jaewon Kim Reviewed-by: Chanwoo Choi Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index 683596844ef3..d9a6dd525791 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -108,6 +108,13 @@ }; }; }; + + haptics { + compatible = "regulator-haptic"; + haptic-supply = <&motor_reg>; + min-microvolt = <1100000>; + max-microvolt = <2700000>; + }; }; &adc { -- cgit v1.2.3 From e0fc8de687e3f78d2e9d36fed9feb1ad8ecc0995 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Sat, 24 Jan 2015 13:19:03 +0900 Subject: ARM: dts: add on-board INA231 sensors for exynos5422-odroidxu3 The odroid-xu3 has 4 INA231 current sensors on board which can be accessed from the Linux via the hwmon interface. There is one sensor for each of these power rails: - A15 cluster: VDD_ARM - A7 cluster: VDD_KFC - GPU: VDD_G3D - memory: VDD_MEM In addition to adding the sensors, LDO26 from the PMIC needs to be enabled because it's powering these sensor. Cc: Javier Martinez Canillas Cc: Sjoerd Simons Reviewed-by: Sjoerd Simons Signed-off-by: Kevin Hilman Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5422-odroidxu3.dts | 39 ++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index c29123c0734d..38694a4a5417 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -174,6 +174,13 @@ regulator-always-on; }; + ldo26_reg: LDO26 { + regulator-name = "vdd_ldo26"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + buck1_reg: BUCK1 { regulator-name = "vdd_mif"; regulator-min-microvolt = <800000>; @@ -330,3 +337,35 @@ &usbdrd_dwc3_1 { dr_mode = "otg"; }; + +&i2c_0 { + status = "okay"; + + /* A15 cluster: VDD_ARM */ + ina231@40 { + compatible = "ti,ina231"; + reg = <0x40>; + shunt-resistor = <10000>; + }; + + /* memory: VDD_MEM */ + ina231@41 { + compatible = "ti,ina231"; + reg = <0x41>; + shunt-resistor = <10000>; + }; + + /* GPU: VDD_G3D */ + ina231@44 { + compatible = "ti,ina231"; + reg = <0x44>; + shunt-resistor = <10000>; + }; + + /* A7 cluster: VDD_KFC */ + ina231@45 { + compatible = "ti,ina231"; + reg = <0x45>; + shunt-resistor = <10000>; + }; +}; -- cgit v1.2.3 From 6591a02e17e6d6587c3cf7588d523fa6f26b584a Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Sat, 24 Jan 2015 13:08:09 +0900 Subject: ARM: dts: reduce total RAM by 22 MiB for exynos5422-odroidxu3 Last 22 MiB is RAM is reserved by secure monitor code and cannot be accessed from Linux kernel, so adjust total RAM size to 0x7EA00000 (2 GiB - 22 MiB). This fixes random 'imprecise kernel abort' kernel failures. Signed-off-by: Marek Szyprowski Reviewed-by: Sjoerd Simons Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5422-odroidxu3.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5422-odroidxu3.dts b/arch/arm/boot/dts/exynos5422-odroidxu3.dts index 38694a4a5417..a519c863248d 100644 --- a/arch/arm/boot/dts/exynos5422-odroidxu3.dts +++ b/arch/arm/boot/dts/exynos5422-odroidxu3.dts @@ -18,7 +18,7 @@ compatible = "hardkernel,odroid-xu3", "samsung,exynos5800", "samsung,exynos5"; memory { - reg = <0x40000000 0x80000000>; + reg = <0x40000000 0x7EA00000>; }; chosen { -- cgit v1.2.3 From 4ec45cd3fc239fc93649ac34bd9463d8cdc26d84 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 24 Jan 2015 22:33:48 +0800 Subject: ARM: dts: sun6i: Add resistive touchscreen controller node to dtsi Now that we support the sun6i variant of the touchscreen controller, add the device node to the dtsi so we can use it. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 0c17079b4636..805f67a2e02f 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -640,6 +640,13 @@ reg = <0x01c20ca0 0x20>; }; + rtp: rtp@01c25000 { + compatible = "allwinner,sun6i-a31-ts"; + reg = <0x01c25000 0x100>; + interrupts = ; + #thermal-sensor-cells = <0>; + }; + uart0: serial@01c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; -- cgit v1.2.3 From 196654aea31012f250289407a6672ad3f7232086 Mon Sep 17 00:00:00 2001 From: Vishnu Patekar Date: Sun, 25 Jan 2015 19:10:08 +0530 Subject: ARM: sunxi: dts: Add PS2 nodes to dtsi for A10,A20 Signed-off-by: VishnuPatekar Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 16 ++++++++++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 16 ++++++++++++++++ 2 files changed, 32 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 234e4de39fb5..54aeb68099c2 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -911,5 +911,21 @@ #address-cells = <1>; #size-cells = <0>; }; + + ps20: ps2@01c2a000 { + compatible = "allwinner,sun4i-a10-ps2"; + reg = <0x01c2a000 0x400>; + interrupts = <62>; + clocks = <&apb1_gates 6>; + status = "disabled"; + }; + + ps21: ps2@01c2a400 { + compatible = "allwinner,sun4i-a10-ps2"; + reg = <0x01c2a400 0x400>; + interrupts = <63>; + clocks = <&apb1_gates 7>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 270cdddd054c..a7c643151156 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -1176,5 +1176,21 @@ #interrupt-cells = <3>; interrupts = ; }; + + ps20: ps2@01c2a000 { + compatible = "allwinner,sun4i-a10-ps2"; + reg = <0x01c2a000 0x400>; + interrupts = ; + clocks = <&apb1_gates 6>; + status = "disabled"; + }; + + ps21: ps2@01c2a400 { + compatible = "allwinner,sun4i-a10-ps2"; + reg = <0x01c2a400 0x400>; + interrupts = ; + clocks = <&apb1_gates 7>; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From 1e8d156750a3fcd8c7543d8d47dee2ffd0daa298 Mon Sep 17 00:00:00 2001 From: Vishnu Patekar Date: Sun, 25 Jan 2015 19:10:09 +0530 Subject: ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options Signed-off-by: VishnuPatekar Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun4i-a10.dtsi | 14 ++++++++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 14 ++++++++++++++ 2 files changed, 28 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index 54aeb68099c2..2d7483a500ef 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -737,6 +737,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + ps20_pins_a: ps20@0 { + allwinner,pins = "PI20", "PI21"; + allwinner,function = "ps2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + ps21_pins_a: ps21@0 { + allwinner,pins = "PH12", "PH13"; + allwinner,function = "ps2"; + allwinner,drive = ; + allwinner,pull = ; + }; }; timer@01c20c00 { diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index a7c643151156..9108feb44e58 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -941,6 +941,20 @@ allwinner,drive = ; allwinner,pull = ; }; + + ps20_pins_a: ps20@0 { + allwinner,pins = "PI20", "PI21"; + allwinner,function = "ps2"; + allwinner,drive = ; + allwinner,pull = ; + }; + + ps21_pins_a: ps21@0 { + allwinner,pins = "PH12", "PH13"; + allwinner,function = "ps2"; + allwinner,drive = ; + allwinner,pull = ; + }; }; timer@01c20c00 { -- cgit v1.2.3 From c121f45e6291e00c71b919ce4a439e0b6e829668 Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Sun, 25 Jan 2015 15:36:08 +0100 Subject: ARM: dts: sun5i: Enable axp209 support on A13-OLinuxIno The (non micro) A13-OLinuxIno has an axp203 pmic, enable support for this. Signed-off-by: Hans de Goede Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts index 3649e78045eb..76a4bdeacb96 100644 --- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts +++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts @@ -156,6 +156,15 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins_a>; status = "okay"; + + axp209: pmic@34 { + compatible = "x-powers,axp209"; + reg = <0x34>; + interrupts = <0>; + + interrupt-controller; + #interrupt-cells = <1>; + }; }; i2c1: i2c@01c2b000 { -- cgit v1.2.3 From e48cc181bf9abe0eeaaa884d3ec82e185a6285da Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Sun, 25 Jan 2015 10:42:59 +0100 Subject: ARM: dts: rockchip: Add rockchip timer node for rk3288 The rk3288 board uses the architected timers and these ones are shutdown when the cpu is powered down. There is a need of a broadcast timer in this case to ensure proper wakeup when the cpus are in sleep mode and a timer expires. Add the timer node for the broadcast timer. Signed-off-by: Daniel Lezcano Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index c7235fa899cc..37847c14b449 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -149,6 +149,14 @@ clock-frequency = <24000000>; }; + timer: timer@ff810000 { + compatible = "rockchip,rk3288-timer"; + reg = <0xff810000 0x20>; + interrupts = ; + clocks = <&xin24m>, <&cru PCLK_TIMER>; + clock-names = "timer", "pclk"; + }; + display-subsystem { compatible = "rockchip,display-subsystem"; ports = <&vopl_out>, <&vopb_out>; -- cgit v1.2.3 From 6e81fadb2c0ddc4ff3c34789c3cea40f7eaed138 Mon Sep 17 00:00:00 2001 From: FUKAUMI Naoki Date: Sun, 25 Jan 2015 21:39:35 +0900 Subject: ARM: dts: rockchip: add dts for Firefly Firefly-RK3288 boards This adds support for Firefly-RK3288, Rockchip RK3288 based development boards made by Firefly. There are 2 dts for 2 versions of the board. rk3288-firefly-beta.dts is for the beta version, rk3288-firefly.dts is for the mass production version. Signed-off-by: FUKAUMI Naoki [removed gmac reference, due to the gmac node going through the net-tree] Tested-by: Heiko Stuebner Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/Makefile | 4 +- arch/arm/boot/dts/rk3288-firefly-beta.dts | 71 +++++ arch/arm/boot/dts/rk3288-firefly.dts | 71 +++++ arch/arm/boot/dts/rk3288-firefly.dtsi | 467 ++++++++++++++++++++++++++++++ 4 files changed, 612 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/rk3288-firefly-beta.dts create mode 100644 arch/arm/boot/dts/rk3288-firefly.dts create mode 100644 arch/arm/boot/dts/rk3288-firefly.dtsi (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..89e617365af0 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -394,7 +394,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3066a-marsboard.dtb \ rk3188-radxarock.dtb \ rk3288-evb-act8846.dtb \ - rk3288-evb-rk808.dtb + rk3288-evb-rk808.dtb \ + rk3288-firefly-beta.dtb \ + rk3288-firefly.dtb dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \ s3c6410-smdk6410.dtb diff --git a/arch/arm/boot/dts/rk3288-firefly-beta.dts b/arch/arm/boot/dts/rk3288-firefly-beta.dts new file mode 100644 index 000000000000..75d77e38e0d6 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-firefly-beta.dts @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2014, 2015 FUKAUMI Naoki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3288-firefly.dtsi" + +/ { + model = "Firefly-RK3288 Beta"; + compatible = "firefly,firefly-rk3288-beta", "rockchip,rk3288"; +}; + +&ir { + gpios = <&gpio7 5 GPIO_ACTIVE_LOW>; +}; + +&pinctrl { + act8846 { + pmic_vsel: pmic-vsel { + rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + ir { + ir_int: ir-int { + rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm0 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rk3288-firefly.dts b/arch/arm/boot/dts/rk3288-firefly.dts new file mode 100644 index 000000000000..c07fe92dc69f --- /dev/null +++ b/arch/arm/boot/dts/rk3288-firefly.dts @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2014, 2015 FUKAUMI Naoki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3288-firefly.dtsi" + +/ { + model = "Firefly-RK3288"; + compatible = "firefly,firefly-rk3288", "rockchip,rk3288"; +}; + +&ir { + gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; +}; + +&pinctrl { + act8846 { + pmic_vsel: pmic-vsel { + rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + ir { + ir_int: ir-int { + rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&pwm1 { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi new file mode 100644 index 000000000000..7f0ba9b24869 --- /dev/null +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -0,0 +1,467 @@ +/* + * Copyright (c) 2014, 2015 FUKAUMI Naoki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "rk3288.dtsi" + +/ { + memory { + reg = <0 0x80000000>; + }; + + ext_gmac: external-gmac-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + }; + + ir: ir-receiver { + compatible = "gpio-ir-receiver"; + pinctrl-names = "default"; + pinctrl-0 = <&ir_int>; + }; + + keys: gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@0 { + gpio-key,wakeup = <1>; + gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = <116>; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key>; + }; + }; + + leds { + compatible = "gpio-leds"; + + work { + gpios = <&gpio8 1 GPIO_ACTIVE_LOW>; + label = "firefly:blue:user"; + linux,default-trigger = "rc-feedback"; + pinctrl-names = "default"; + pinctrl-0 = <&work_led>; + }; + + power { + gpios = <&gpio8 2 GPIO_ACTIVE_LOW>; + label = "firefly:green:power"; + linux,default-trigger = "default-on"; + pinctrl-names = "default"; + pinctrl-0 = <&power_led>; + }; + }; + + vcc_sys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; + + vcc_flash: flash-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_flash"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_5v: usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + }; + + vcc_host_5v: usb-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_vbus_drv>; + regulator-name = "vcc_host_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_5v>; + }; + + vcc_otg_5v: usb-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_drv>; + regulator-name = "vcc_otg_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_5v>; + }; +}; + +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + +&emmc { + broken-cd; + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc_flash>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + vdd_cpu: syr827@40 { + compatible = "silergy,syr827"; + fcs,suspend-voltage-selector = <1>; + reg = <0x40>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + }; + + vdd_gpu: syr828@41 { + compatible = "silergy,syr828"; + fcs,suspend-voltage-selector = <1>; + reg = <0x41>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + interrupt-parent = <&gpio7>; + interrupts = <4 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&rtc_int>; + }; + + act8846: act8846@5a { + compatible = "active-semi,act8846"; + reg = <0x5a>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_vsel>, <&pwr_hold>; + system-power-controller; + + regulators { + vcc_ddr: REG1 { + regulator-name = "vcc_ddr"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vcc_io: REG2 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_log: REG3 { + regulator-name = "vdd_log"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + vcc_20: REG4 { + regulator-name = "vcc_20"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-always-on; + }; + + vccio_sd: REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd10_lcd: REG6 { + regulator-name = "vdd10_lcd"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vcca_18: REG7 { + regulator-name = "vcca_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcca_33: REG8 { + regulator-name = "vcca_33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_lan: REG9 { + regulator-name = "vcc_lan"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vdd_10: REG10 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + vcc_18: REG11 { + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc18_lcd: REG12 { + regulator-name = "vcc18_lcd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + pcfg_output_low: pcfg-output-low { + output-low; + }; + + act8846 { + pwr_hold: pwr-hold { + rockchip,pins = <0 1 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + gmac { + phy_int: phy-int { + rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + phy_pmeb: phy-pmeb { + rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + phy_rst: phy-rst { + rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + hym8563 { + rtc_int: rtc-int { + rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + keys { + pwr_key: pwr-key { + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + power_led: power-led { + rockchip,pins = <8 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + work_led: work-led { + rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb_host { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbhub_rst: usbhub-rst { + rockchip,pins = <8 3 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + usb_otg { + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + vref-supply = <&vcc_18>; + status = "okay"; +}; + +&sdio0 { + broken-cd; + bus-width = <4>; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>; + vmmc-supply = <&vcc_18>; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + card-detect-delay = <200>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>; + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usb_host1 { + pinctrl-names = "default"; + pinctrl-0 = <&usbhub_rst>; + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&wdt { + status = "okay"; +}; -- cgit v1.2.3 From 11ff8c86d74002cb493407742fd1c128055e1abe Mon Sep 17 00:00:00 2001 From: FUKAUMI Naoki Date: Sun, 25 Jan 2015 21:39:36 +0900 Subject: ARM: dts: rockchip: add dts for ChipSPARK Rayeager PX2 board This add support for Rayeager PX2, Rockchip PX2 based development board made by ChipSPARK. Signed-off-by: FUKAUMI Naoki Tested-by: Andy Yan Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/rk3066a-rayeager.dts | 468 +++++++++++++++++++++++++++++++++ 2 files changed, 469 insertions(+) create mode 100644 arch/arm/boot/dts/rk3066a-rayeager.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 89e617365af0..7442f3d6ae3f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -392,6 +392,7 @@ dtb-$(CONFIG_ARCH_REALVIEW) += arm-realview-pb1176.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3066a-bqcurie2.dtb \ rk3066a-marsboard.dtb \ + rk3066a-rayeager.dtb \ rk3188-radxarock.dtb \ rk3288-evb-act8846.dtb \ rk3288-evb-rk808.dtb \ diff --git a/arch/arm/boot/dts/rk3066a-rayeager.dts b/arch/arm/boot/dts/rk3066a-rayeager.dts new file mode 100644 index 000000000000..3ac151102c2f --- /dev/null +++ b/arch/arm/boot/dts/rk3066a-rayeager.dts @@ -0,0 +1,468 @@ +/* + * Copyright (c) 2014, 2015 FUKAUMI Naoki + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3066a.dtsi" + +/ { + model = "Rayeager PX2"; + compatible = "chipspark,rayeager-px2", "rockchip,rk3066a"; + + memory { + reg = <0x60000000 0x40000000>; + }; + + ir: ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio6 1 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_int>; + }; + + keys: gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + button@0 { + gpio-key,wakeup = <1>; + gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = <116>; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key>; + }; + }; + + vsys: vsys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vsys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + /* input for 5V_STDBY is VSYS or DC5V, selectable by jumper J4 */ + vcc_stdby: 5v-stdby-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_stdby"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + vcc_emmc: emmc-regulator { + compatible = "regulator-fixed"; + regulator-name = "emmc_vccq"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + vin-supply = <&vsys>; + }; + + vcc_sata: sata-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&sata_pwr>; + regulator-name = "usb_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_stdby>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio3 7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_pwr>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <100000>; + vin-supply = <&vcc_io>; + }; + + vcc_host: usb-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&host_drv>; + regulator-name = "host-pwr"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_stdby>; + }; + + vcc_otg: usb-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_drv>; + regulator-name = "vcc_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + vin-supply = <&vcc_stdby>; + }; +}; + +&cpu0 { + cpu0-supply = <&vdd_arm>; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&rmii_rst>; + phy = <&phy0>; + phy-supply = <&vcc_rmii>; + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&emmc { + broken-cd; + bus-width = <8>; + cap-mmc-highspeed; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_rst>; + vmmc-supply = <&vcc_emmc>; + vqmmc-supply = <&vcc_emmc>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + status = "okay"; + + ak8963: ak8963@0d { + compatible = "asahi-kasei,ak8975"; + reg = <0x0d>; + interrupt-parent = <&gpio4>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&comp_int>; + }; + + mma8452: mma8452@1d { + compatible = "fsl,mma8452"; + reg = <0x1d>; + interrupt-parent = <&gpio4>; + interrupts = <16 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&gsensor_int>; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + status = "okay"; + + tps: tps@2d { + reg = <0x2d>; + interrupt-parent = <&gpio6>; + interrupts = <4 IRQ_TYPE_EDGE_RISING>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>, <&pwr_hold>; + + vcc1-supply = <&vsys>; + vcc2-supply = <&vsys>; + vcc3-supply = <&vsys>; + vcc4-supply = <&vsys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_io>; + vcc7-supply = <&vsys>; + vccio-supply = <&vsys>; + + regulators { + vcc_rtc: regulator@0 { + regulator-name = "vcc_rtc"; + regulator-always-on; + }; + + vcc_io: regulator@1 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vdd_arm: regulator@2 { + regulator-name = "vdd_arm"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + vcc_ddr: regulator@3 { + regulator-name = "vcc_ddr"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + vcc18: regulator@5 { + regulator-name = "vcc18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdd_11: regulator@6 { + regulator-name = "vdd_11"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + vcc_25: regulator@7 { + regulator-name = "vcc_25"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + vccio_wl: regulator@8 { + regulator-name = "vccio_wl"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc25_hdmi: regulator@9 { + regulator-name = "vcc25_hdmi"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + + vcca_33: regulator@10 { + regulator-name = "vcca_33"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_rmii: regulator@11 { + regulator-name = "vcc_rmii"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc28_cif: regulator@12 { + regulator-name = "vcc28_cif"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + }; + }; + }; +}; + +#include "tps65910.dtsi" + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + disable-wp; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sd0_clk>, <&sd0_cmd>, <&sd0_cd>, <&sd0_bus4>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&mmc1 { + broken-cd; + bus-width = <4>; + disable-wp; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sd1_clk>, <&sd1_cmd>, <&sd1_bus4>; + vmmc-supply = <&vccio_wl>; + status = "okay"; +}; + +&pinctrl { + pcfg_output_high: pcfg-output-high { + output-high; + }; + + ak8963 { + comp_int: comp-int { + rockchip,pins = <4 17 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + emac { + rmii_rst: rmii-rst { + rockchip,pins = <1 30 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + ir { + ir_int: ir-int { + rockchip,pins = <6 1 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + keys { + pwr_key: pwr-key { + rockchip,pins = <6 2 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + mma8452 { + gsensor_int: gsensor-int { + rockchip,pins = <4 16 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + mmc { + sdmmc_pwr: sdmmc-pwr { + rockchip,pins = <3 7 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + usb_host { + host_drv: host-drv { + rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_default>; + }; + + hub_rst: hub-rst { + rockchip,pins = <1 31 RK_FUNC_GPIO &pcfg_output_high>; + }; + + sata_pwr: sata-pwr { + rockchip,pins = <4 22 RK_FUNC_GPIO &pcfg_pull_default>; + }; + + sata_reset: sata-reset { + rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + usb_otg { + otg_drv: otg-drv { + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_default>; + }; + }; + + tps { + pmic_int: pmic-int { + rockchip,pins = <6 4 RK_FUNC_GPIO &pcfg_pull_default>; + }; + + pwr_hold: pwr-hold { + rockchip,pins = <6 8 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; +}; + +&pwm1 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_25>; + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_xfer>, <&uart3_cts>, <&uart3_rts>; + status = "okay"; +}; + +&usb_host { + pinctrl-names = "default"; + pinctrl-0 = <&hub_rst>, <&sata_reset>; + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&wdt { + status = "okay"; +}; -- cgit v1.2.3 From fda077c0d6b3a82abfed0d7c56f9e391cd5e5b1e Mon Sep 17 00:00:00 2001 From: Josh Wu Date: Thu, 22 Jan 2015 18:41:45 +0800 Subject: ARM: at91: sama5d4: dts: change the nand compatible string As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4, so we need to apply it for sama5d4 chip. Signed-off-by: Josh Wu Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d4.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi index e7a1d76a9f7e..5d6d0b3f5768 100644 --- a/arch/arm/boot/dts/sama5d4.dtsi +++ b/arch/arm/boot/dts/sama5d4.dtsi @@ -273,7 +273,7 @@ }; nand0: nand@80000000 { - compatible = "atmel,at91rm9200-nand"; + compatible = "atmel,sama5d4-nand", "atmel,at91rm9200-nand"; #address-cells = <1>; #size-cells = <1>; ranges; -- cgit v1.2.3 From ee2322ff7715da7d2df82eb7a60ab83324bf2841 Mon Sep 17 00:00:00 2001 From: Alexander Morozov Date: Mon, 15 Dec 2014 11:31:12 +0800 Subject: ARM: at91: sama5d3xek/dt: use dt ids for wm8904 Using the wm8904 device tree compatible string. Signed-off-by: Alexander Morozov Signed-off-by: Bo Shen Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d3xmb.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi index 9fdb8a07b145..e6396b68b408 100644 --- a/arch/arm/boot/dts/sama5d3xmb.dtsi +++ b/arch/arm/boot/dts/sama5d3xmb.dtsi @@ -45,7 +45,7 @@ */ i2c0: i2c@f0014000 { wm8904: wm8904@1a { - compatible = "wm8904"; + compatible = "wlf,wm8904"; reg = <0x1a>; clocks = <&pck0>; clock-names = "mclk"; -- cgit v1.2.3 From 4bd377942b5de0ae14a9e6db4301cd4c6466f1fc Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 15 Dec 2014 11:31:13 +0800 Subject: ARM: at91: at91sam9n12ek/dt: use dt ids for wm8904 Using the device tree ids for wm8904 codec. Signed-off-by: Bo Shen Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9n12ek.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts index 13bb24ea971a..9575c0d895c9 100644 --- a/arch/arm/boot/dts/at91sam9n12ek.dts +++ b/arch/arm/boot/dts/at91sam9n12ek.dts @@ -54,7 +54,7 @@ status = "okay"; wm8904: codec@1a { - compatible = "wm8904"; + compatible = "wlf,wm8904"; reg = <0x1a>; clocks = <&pck0>; clock-names = "mclk"; -- cgit v1.2.3 From c7f85be1fdd130490b8b525b8f3a821a59e75feb Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 29 Dec 2014 13:08:41 +0100 Subject: ARM: at91/dt: sam9263: Add ac97 device node This adds the device node for the ac97 controller. Signed-off-by: Alexander Stein Acked-By Alexandre Belloni Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/at91sam9263.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 8a210d5033b1..d7e8a2420ad3 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -695,6 +695,16 @@ }; }; + ac97 { + pinctrl_ac97: ac97-0 { + atmel,pins = + ; /* PB14 periph A AC97RX pin */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -823,6 +833,17 @@ status = "disabled"; }; + ac97: sound@fffa0000 { + compatible = "atmel,at91sam9263-ac97c"; + reg = <0xfffa0000 0x4000>; + interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ac97>; + clocks = <&ac97_clk>; + clock-names = "ac97_clk"; + status = "disabled"; + }; + macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; -- cgit v1.2.3 From 55f0f0e93854cfd64e7b5499e190e1231cb0c39a Mon Sep 17 00:00:00 2001 From: "H. Nikolaus Schaller" Date: Thu, 22 Jan 2015 21:38:07 +0100 Subject: ARM: dts: omap3-gta04: Fix backup-battery charging in devicetree file. Fix attribute names. Signed-off-by: H. Nikolaus Schaller Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index ee62d00bcbe6..63c5cffbba5a 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -377,8 +377,8 @@ }; &charger { - bb_uvolt = <3200000>; - bb_uamp = <150>; + ti,bb-uvolt = <3200000>; + ti,bb-uamp = <150>; }; /* spare */ -- cgit v1.2.3 From 2a88a0b3cf65299afebb5eed0c06e7880d72307a Mon Sep 17 00:00:00 2001 From: "H. Nikolaus Schaller" Date: Thu, 22 Jan 2015 21:38:08 +0100 Subject: ARM: dts: omap3-gta04: Fix audio node malformatting Audio should be child of twl node. Signed-off-by: H. Nikolaus Schaller Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 63c5cffbba5a..ce283f5f6ad9 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -237,11 +237,11 @@ reg = <0x48>; interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupt-parent = <&intc>; - }; - twl_audio: audio { - compatible = "ti,twl4030-audio"; - codec { + twl_audio: audio { + compatible = "ti,twl4030-audio"; + codec { + }; }; }; }; -- cgit v1.2.3 From 98fd396ff7e9db29b408efb779d7d50fa2032249 Mon Sep 17 00:00:00 2001 From: "H. Nikolaus Schaller" Date: Thu, 22 Jan 2015 21:38:09 +0100 Subject: ARM: dts: omap3-gta04: Enable mcbps2 necessary for audio mcbsp2 is used in gta04 soundcard config and by default is disabled so enable it for gta04. Signed-off-by: H. Nikolaus Schaller Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index ce283f5f6ad9..12b20a3e6daf 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -498,3 +498,7 @@ }; }; }; + +&mcbsp2 { + status = "okay"; +}; -- cgit v1.2.3 From 85f534e6ceecd38108b1d11c7fe63ef910f973c6 Mon Sep 17 00:00:00 2001 From: "H. Nikolaus Schaller" Date: Thu, 22 Jan 2015 21:38:10 +0100 Subject: ARM: dts: omap3-gta04: Enable twl audio vibra support Signed-off-by: H. Nikolaus Schaller Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 12b20a3e6daf..63f4f48fe3e3 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -240,6 +240,7 @@ twl_audio: audio { compatible = "ti,twl4030-audio"; + ti,enable-vibra = <1>; codec { }; }; -- cgit v1.2.3 From 75fb2c150dd9177950b4f383889f880f3106074e Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Thu, 22 Jan 2015 21:38:11 +0100 Subject: ARM: dts: omap3-gta04: Fix a GPIO line for bma180 node GPIO_115 used as irq is in &gpio4, not &gpio3. Signed-off-by: Marek Belisko Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 63f4f48fe3e3..80409c47a4f4 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -265,7 +265,7 @@ bma180@41 { compatible = "bosch,bma180"; reg = <0x41>; - interrupt-parent = <&gpio3>; + interrupt-parent = <&gpio4>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; }; -- cgit v1.2.3 From 23c0ff5b3097daf8763b883b81f807cc8133c699 Mon Sep 17 00:00:00 2001 From: "H. Nikolaus Schaller" Date: Thu, 22 Jan 2015 21:38:12 +0100 Subject: ARM: dts: omap3-gta04: Enable power-off using twl4030 Enabled poweroff through PMIC on GTA04. Signed-off-by: H. Nikolaus Schaller Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 80409c47a4f4..2ad194cf6296 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -244,6 +244,11 @@ codec { }; }; + + twl_power: power { + compatible = "ti,twl4030-power"; + ti,use_poweroff; + }; }; }; -- cgit v1.2.3 From 2a2130c0046bbfbec4bde0efdeb5f9c608207e63 Mon Sep 17 00:00:00 2001 From: Marek Belisko Date: Thu, 22 Jan 2015 21:38:13 +0100 Subject: ARM: dts: omap3-gta04: Add ramp value for twl4030 audio Signed-off-by: Marek Belisko Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 2ad194cf6296..752a4e926045 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -242,6 +242,7 @@ compatible = "ti,twl4030-audio"; ti,enable-vibra = <1>; codec { + ti,ramp_delay_value = <3>; }; }; -- cgit v1.2.3 From ce9edf5b4f7a58da6d41f408faf3eaeaaf8d8674 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Thu, 22 Jan 2015 21:38:14 +0100 Subject: ARM: dts: omap3-gta04: add comments about gpios Add comments to state which GPIO is used for some interrupts. Signed-off-by: NeilBrown Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 752a4e926045..b675cce4c980 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -264,7 +264,7 @@ compatible = "bosch,bmp085"; reg = <0x77>; interrupt-parent = <&gpio4>; - interrupts = <17 IRQ_TYPE_EDGE_RISING>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* GPIO_113 */ }; /* accelerometer */ @@ -272,7 +272,7 @@ compatible = "bosch,bma180"; reg = <0x41>; interrupt-parent = <&gpio4>; - interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */ }; /* leds */ @@ -323,7 +323,7 @@ compatible = "ti,tsc2007"; reg = <0x48>; interrupt-parent = <&gpio6>; - interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; /* GPIO_160 */ gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; ti,x-plate-ohms = <600>; }; -- cgit v1.2.3 From e45eebfab64a66cc292084056309f5aa385dbcc7 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Thu, 22 Jan 2015 21:38:15 +0100 Subject: ARM: dts: omap3-gta04: enable power-off for wifi card. Signed-off-by: NeilBrown Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index b675cce4c980..3302b5b4b7a4 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -362,6 +362,7 @@ vmmc-supply = <&vaux4>; bus-width = <4>; ti,non-removable; + cap-power-off-card; }; &mmc3 { -- cgit v1.2.3 From c4aa13f84f160d96f24dd52f18e63896ad1af782 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Thu, 22 Jan 2015 21:38:16 +0100 Subject: ARM: dts: omap3-gta04: add gyroscope Signed-off-by: NeilBrown Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index 3302b5b4b7a4..d6579d08e631 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -275,6 +275,14 @@ interrupts = <19 IRQ_TYPE_LEVEL_HIGH>; /* GPIO_115 */ }; + /* gyroscope */ + itg3200@68 { + compatible = "invensense,itg3200"; + reg = <0x68>; + interrupt-parent = <&gpio2>; + interrupts = <24 0>; /* GPIO_56 */ + }; + /* leds */ tca6507@45 { compatible = "ti,tca6507"; -- cgit v1.2.3 From 01ca6d57ec2c28572e972b9a006f0e5a35355be0 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Thu, 22 Jan 2015 21:38:17 +0100 Subject: ARM: dts: omap3-gta04: only power DSS when necessary. i.e. configure vpll2 as a supply for the dss rather than being always-on. Signed-off-by: NeilBrown Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index d6579d08e631..eed0208f0db2 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -428,16 +428,12 @@ regulator-max-microvolt = <3150000>; }; -/* Needed to power the DPI pins */ -&vpll2 { - regulator-always-on; -}; - &dss { pinctrl-names = "default"; pinctrl-0 = < &dss_dpi_pins >; status = "okay"; + vdds_dsi-supply = <&vpll2>; port { dpi_out: endpoint { -- cgit v1.2.3 From 1e1e8cb3fa819ba94e1e505572dd8fff646f4294 Mon Sep 17 00:00:00 2001 From: NeilBrown Date: Thu, 22 Jan 2015 21:38:19 +0100 Subject: ARM: dts: omap3-gta04: Disable keypad The twl4030 keypad is not wired up in the gta04, so mark it disabled to avoid pointless initialization. Signed-off-by: NeilBrown Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap3-gta04.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/omap3-gta04.dtsi b/arch/arm/boot/dts/omap3-gta04.dtsi index eed0208f0db2..fb3a69604ed5 100644 --- a/arch/arm/boot/dts/omap3-gta04.dtsi +++ b/arch/arm/boot/dts/omap3-gta04.dtsi @@ -377,6 +377,10 @@ status = "disabled"; }; +&twl_keypad { + status = "disabled"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; -- cgit v1.2.3 From 15471d594f80926aad6ef6087f5e41baed5a57c1 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:45 +0100 Subject: ARM: mvebu: armada-370-db: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Simon Baatz Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-370-db.dts | 40 ++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 1466580be295..f4990b26dbbd 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -8,9 +8,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From e7ad1fdfacda44a43312ac4686a832d4b26c45fa Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:46 +0100 Subject: ARM: mvebu: armada-370: Relicense the device tree under GPLv2+/X11 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Jason Cooper Acked-by: Ryan Press Acked-by: Thomas Petazzoni Acked-by: Uwe Kleine-König --- arch/arm/boot/dts/armada-370.dtsi | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index fdb3c12a6139..27397f151def 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Contains definitions specific to the Armada 370 SoC that are not * common to all Armada SoCs. -- cgit v1.2.3 From 405f73f479c2d4a5172204e277bbbfdce7aba1e2 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:47 +0100 Subject: ARM: mvebu: armada-370-mirabox: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Jason Cooper Acked-by: Ryan Press Acked-by: Simon Baatz Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-370-mirabox.dts | 40 +++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts index e1b0eb6b091f..b10ceb488efe 100644 --- a/arch/arm/boot/dts/armada-370-mirabox.dts +++ b/arch/arm/boot/dts/armada-370-mirabox.dts @@ -3,9 +3,43 @@ * * Gregory CLEMENT * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 7a8af4068580ceef4efde6c5574578380c37c6ee Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:48 +0100 Subject: ARM: mvebu: armada-370-netgear-rn102: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Jason Cooper Acked-by: Ben Peddell Acked-by: Philipp Zabel Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-370-netgear-rn102.dts | 41 +++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-netgear-rn102.dts b/arch/arm/boot/dts/armada-370-netgear-rn102.dts index 4e24932c6e30..7c5c4ff941ec 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2013, Arnaud EBALARD * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 992193cd8e0265cbac36ba81253f6c3f8f664146 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:49 +0100 Subject: ARM: mvebu: armada-370-netgear-rn104: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Philipp Zabel Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-370-netgear-rn104.dts | 41 +++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-netgear-rn104.dts b/arch/arm/boot/dts/armada-370-netgear-rn104.dts index 30586e47986a..1de53b59283a 100644 --- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts +++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2013, Arnaud EBALARD * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 7f2965ae0359e7085ffe5d741316cbe1baa9a3ae Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:50 +0100 Subject: ARM: mvebu: armada-370-rd: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Andrew Lunn Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Florian Fainelli Acked-by: Simon Baatz Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-370-rd.dts | 40 ++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 394308951ed9..6ae36a38beb2 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -6,9 +6,43 @@ * * Copyright (C) 2013 Florian Fainelli * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Note: this Device Tree assumes that the bootloader has remapped the * internal registers to 0xf1000000 (instead of the default -- cgit v1.2.3 From f14855ee3f7a8aedc79604e5e5d3044dbfbf33da Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:51 +0100 Subject: ARM: mvebu: armada-370-synology-ds213j: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard --- arch/arm/boot/dts/armada-370-synology-ds213j.dts | 41 +++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-synology-ds213j.dts b/arch/arm/boot/dts/armada-370-synology-ds213j.dts index 70fecde76ccb..59f74e66963f 100644 --- a/arch/arm/boot/dts/armada-370-synology-ds213j.dts +++ b/arch/arm/boot/dts/armada-370-synology-ds213j.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2014, Arnaud EBALARD * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Note: this Device Tree assumes that the bootloader has remapped the * internal registers to 0xf1000000 (instead of the old 0xd0000000). -- cgit v1.2.3 From 8a88daf8044f66ae00306a0902cb2721d52178e3 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:52 +0100 Subject: ARM: mvebu: armada-370-xp: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Andrew Lunn Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Greg Ungerer Acked-by: Heikki Krogerus Acked-by: Jason Cooper Acked-by: Lorenzo Pieralisi Acked-by: Nobuhiro Iwamatsu Acked-by: Simon Baatz Acked-by: Simon Guinot Acked-by: Thomas Petazzoni Acked-by: Willy Tarreau --- arch/arm/boot/dts/armada-370-xp.dtsi | 40 +++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 1af428602748..8a322ad57e5f 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -8,9 +8,43 @@ * Thomas Petazzoni * Ben Dooks * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * This file contains the definitions that are common to the Armada * 370 and Armada XP SoC. -- cgit v1.2.3 From 614e3b30588d587349cf5d63c5e45ec870f93d71 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:53 +0100 Subject: ARM: mvebu: armada-375-db: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-375-db.dts | 40 ++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-375-db.dts b/arch/arm/boot/dts/armada-375-db.dts index 929ae00b4063..0440891425c0 100644 --- a/arch/arm/boot/dts/armada-375-db.dts +++ b/arch/arm/boot/dts/armada-375-db.dts @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From b89cfa65b3afbe1a5ae25465045d71d4db519a81 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:54 +0100 Subject: ARM: mvebu: armada-375: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Marcin Wojtas Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-375.dtsi | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index 126bf7e9e6b4..ba3c57e0af72 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -6,9 +6,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ #include "skeleton.dtsi" -- cgit v1.2.3 From f482a332bba2a7ff908654fc7d1dc43f2e0889df Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:55 +0100 Subject: ARM: mvebu: armada-380: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-380.dtsi | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index 7e509d2d74d0..5102d19cc8f4 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ #include "armada-38x.dtsi" -- cgit v1.2.3 From 626a102050d9fb1cc0f3912edf5e6ffae6cad902 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:56 +0100 Subject: ARM: mvebu: armada-388-db: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Marcin Wojtas Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-388-db.dts | 40 ++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-388-db.dts b/arch/arm/boot/dts/armada-388-db.dts index e200836c30be..16512efcd32c 100644 --- a/arch/arm/boot/dts/armada-388-db.dts +++ b/arch/arm/boot/dts/armada-388-db.dts @@ -6,9 +6,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 3e0bccf2be4d4709f9e13696d709b24aee86942d Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:57 +0100 Subject: ARM: mvebu: armada-385: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-385.dtsi | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi index a54a252ddb4c..8e67d2c083dd 100644 --- a/arch/arm/boot/dts/armada-385.dtsi +++ b/arch/arm/boot/dts/armada-385.dtsi @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ #include "armada-38x.dtsi" -- cgit v1.2.3 From 4fbf38b104eaed5719dd05a7f4ae5f51094a19da Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:58 +0100 Subject: ARM: mvebu: armada-388-rd: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-388-rd.dts | 40 ++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-388-rd.dts b/arch/arm/boot/dts/armada-388-rd.dts index c98a8f8d01a9..d99baac72081 100644 --- a/arch/arm/boot/dts/armada-388-rd.dts +++ b/arch/arm/boot/dts/armada-388-rd.dts @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 7674432fb875fe7f2cf5321ec9ee77e066b5aa51 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:15:59 +0100 Subject: ARM: mvebu: armada-38x: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Marcin Wojtas Acked-by: Ezequiel Garcia --- arch/arm/boot/dts/armada-38x.dtsi | 40 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi index 33cad7f7a224..54ebce71f802 100644 --- a/arch/arm/boot/dts/armada-38x.dtsi +++ b/arch/arm/boot/dts/armada-38x.dtsi @@ -7,9 +7,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ #include "skeleton.dtsi" -- cgit v1.2.3 From ebb566769accd99161920258e16f724479704df8 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:00 +0100 Subject: ARM: mvebu: armada-xp-axpwifiap: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-axpwifiap.dts | 40 ++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-axpwifiap.dts b/arch/arm/boot/dts/armada-xp-axpwifiap.dts index 28174ab019f9..c1fbab243609 100644 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts @@ -10,9 +10,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From d5272eddb180abaa812f8aee05d640ff80364741 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:01 +0100 Subject: ARM: mvebu: armada-xp-db: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Simon Baatz Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-db.dts | 40 +++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 42ddb2864365..48bdafe17526 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -8,9 +8,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Note: this Device Tree assumes that the bootloader has remapped the * internal registers to 0xf1000000 (instead of the default -- cgit v1.2.3 From ee2ff969c87870bf7b571b49e818032c34d92aee Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:02 +0100 Subject: ARM: mvebu: armada-xp: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Heikki Krogerus Acked-by: Jason Cooper Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Acked-by: Willy Tarreau --- arch/arm/boot/dts/armada-xp.dtsi | 40 +++++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 62c3ba958b39..82917236a2fb 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -8,9 +8,43 @@ * Thomas Petazzoni * Ben Dooks * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Contains definitions specific to the Armada XP SoC that are not * common to all Armada SoCs. -- cgit v1.2.3 From a0f22f8e43ede7e5e3694e6d43704708ff664224 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:03 +0100 Subject: ARM: mvebu: armada-xp-gp: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-gp.dts | 40 +++++++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index ea8673647494..206aebba01be 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -8,9 +8,43 @@ * Gregory CLEMENT * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Note: this Device Tree assumes that the bootloader has remapped the * internal registers to 0xf1000000 (instead of the default -- cgit v1.2.3 From e0b09e2fadace9911c361874483500fabb375bbf Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:04 +0100 Subject: ARM: mvebu: armada-xp-lenovo-ix4-300d: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Benoit Masson Acked-by: Sebastian Hesselbarth --- arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts | 41 ++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts index a2ef93c1eb10..5fb3c8b687cf 100644 --- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts +++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2014, Benoit Masson * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 395076eada6d42dea436c1c1cebfe3465f7e9f89 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:05 +0100 Subject: ARM: mvebu: armada-xp-matrix: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-matrix.dts | 40 +++++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-matrix.dts b/arch/arm/boot/dts/armada-xp-matrix.dts index 7e291e2ef4b3..56f958eb1ede 100644 --- a/arch/arm/boot/dts/armada-xp-matrix.dts +++ b/arch/arm/boot/dts/armada-xp-matrix.dts @@ -5,9 +5,43 @@ * * Lior Amsalem * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 6cb51fac70f5ac307b5d323c92fe26e197799a20 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:06 +0100 Subject: ARM: mvebu: armada-xp-mv78230: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Andrew Lunn Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Jason Cooper Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 40 +++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 281ccd24295c..6e6d0f04bf2b 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -5,9 +5,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Contains definitions specific to the Armada XP MV78230 SoC that are not * common to all Armada XP SoCs. -- cgit v1.2.3 From 3f0526bf56696a25963c5790193384d9450da626 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:07 +0100 Subject: ARM: mvebu: armada-xp-mv78260: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Ezequiel Garcia Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Acked-by: Willy Tarreau --- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 40 +++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index d7a8d0b0f385..4a7cbed79b07 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -5,9 +5,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Contains definitions specific to the Armada XP MV78260 SoC that are not * common to all Armada XP SoCs. -- cgit v1.2.3 From 8c4b88f5ca616fe7f71f3ea871f05bbecbd5f08b Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:08 +0100 Subject: ARM: mvebu: armada-xp-mv78460: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Ezequiel Garcia Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni Acked-by: Willy Tarreau --- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 40 +++++++++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 9c40c130d11a..36ce63a96cc9 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -5,9 +5,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Contains definitions specific to the Armada XP MV78460 SoC that are not * common to all Armada XP SoCs. -- cgit v1.2.3 From 95387a157e381366f25132921f7f1bcc388ca05e Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:09 +0100 Subject: ARM: mvebu: armada-xp-netgear-rn2120: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard Acked-by: Philipp Zabel Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-netgear-rn2120.dts | 41 +++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts index d81430aa4ab3..a7ceafd5808d 100644 --- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts +++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2013, Arnaud EBALARD * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From faeb8e208723c82b6ee3a50ee472cce2b73bbef5 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:10 +0100 Subject: ARM: mvebu: armada-xp-openblocks-ax3-4: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Ezequiel Garcia Acked-by: Jason Cooper Acked-by: Nobuhiro Iwamatsu Acked-by: Nobuhiro Iwamatsu Acked-by: Sebastian Hesselbarth Acked-by: Thomas Petazzoni --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 40 ++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 6f6b0916df48..0c76d9f05fd0 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -5,9 +5,43 @@ * * Thomas Petazzoni * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; -- cgit v1.2.3 From 3c21b5fa897ae4b594d6b76a4572741fea7824b7 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 26 Jan 2015 15:16:11 +0100 Subject: ARM: mvebu: armada-xp-synology-ds414: Relicense the device tree under GPLv2+/X11 The current GPL only licensing on the device tree makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Gregory CLEMENT Acked-by: Jason Cooper Acked-by: Arnaud Ebalard --- arch/arm/boot/dts/armada-xp-synology-ds414.dts | 41 +++++++++++++++++++++++--- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-synology-ds414.dts b/arch/arm/boot/dts/armada-xp-synology-ds414.dts index 749fdba5a642..e9fb225169aa 100644 --- a/arch/arm/boot/dts/armada-xp-synology-ds414.dts +++ b/arch/arm/boot/dts/armada-xp-synology-ds414.dts @@ -3,10 +3,43 @@ * * Copyright (C) 2014, Arnaud EBALARD * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. * * Note: this Device Tree assumes that the bootloader has remapped the * internal registers to 0xf1000000 (instead of the old 0xd0000000). -- cgit v1.2.3 From 02453b9c682cccfd5c154d24caaa5edf0d42279e Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Tue, 13 Jan 2015 15:43:00 +0100 Subject: ARM: dts: re-fromat AT91 part to match other entries The entries are separated as ARM V4/V5 and ARM V7 as some other per-SoC config options may be removed in the near future. Signed-off-by: Nicolas Ferre Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 90 +++++++++++++++++++++------------------------- 1 file changed, 40 insertions(+), 50 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b4d5b5af9c35..081e20ea7906 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -3,56 +3,46 @@ ifeq ($(CONFIG_OF),y) dtb-$(CONFIG_MACH_ASM9260) += \ alphascale-asm9260-devkit.dtb # Keep at91 dtb files sorted alphabetically for each SoC -# rm9200 -dtb-$(CONFIG_ARCH_AT91) += at91rm9200ek.dtb -dtb-$(CONFIG_ARCH_AT91) += mpa1600.dtb -# sam9260 -dtb-$(CONFIG_ARCH_AT91) += animeo_ip.dtb -dtb-$(CONFIG_ARCH_AT91) += at91-qil_a9260.dtb -dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb -dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb -dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb -dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb -dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb -# sam9261 -dtb-$(CONFIG_ARCH_AT91) += at91sam9261ek.dtb -# sam9263 -dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb -dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb -dtb-$(CONFIG_ARCH_AT91) += usb_a9263.dtb -# sam9g20 -dtb-$(CONFIG_ARCH_AT91) += at91-foxg20.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9g20ek_2mmc.dtb -dtb-$(CONFIG_ARCH_AT91) += kizbox.dtb -dtb-$(CONFIG_ARCH_AT91) += tny_a9g20.dtb -dtb-$(CONFIG_ARCH_AT91) += usb_a9g20.dtb -dtb-$(CONFIG_ARCH_AT91) += usb_a9g20_lpw.dtb -# sam9g45 -dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb -dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb -# sam9n12 -dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb -# sam9rl -dtb-$(CONFIG_ARCH_AT91) += at91sam9rlek.dtb -# sam9x5 -dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb -dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9g15ek.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb -dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb -# sama5d3 -dtb-$(CONFIG_ARCH_AT91) += at91-sama5d3_xplained.dtb -dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb -dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb -dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb -dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb -dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb -# sama5d4 -dtb-$(CONFIG_ARCH_AT91) += at91-sama5d4ek.dtb - +dtb-$(CONFIG_SOC_SAM_V4_V5) += \ + at91rm9200ek.dtb \ + mpa1600.dtb \ + animeo_ip.dtb \ + at91-qil_a9260.dtb \ + aks-cdu.dtb \ + ethernut5.dtb \ + evk-pro3.dtb \ + tny_a9260.dtb \ + usb_a9260.dtb \ + at91sam9261ek.dtb \ + at91sam9263ek.dtb \ + tny_a9263.dtb \ + usb_a9263.dtb \ + at91-foxg20.dtb \ + at91sam9g20ek.dtb \ + at91sam9g20ek_2mmc.dtb \ + kizbox.dtb \ + tny_a9g20.dtb \ + usb_a9g20.dtb \ + usb_a9g20_lpw.dtb \ + at91sam9m10g45ek.dtb \ + pm9g45.dtb \ + at91sam9n12ek.dtb \ + at91sam9rlek.dtb \ + at91-ariag25.dtb \ + at91-cosino_mega2560.dtb \ + at91sam9g15ek.dtb \ + at91sam9g25ek.dtb \ + at91sam9g35ek.dtb \ + at91sam9x25ek.dtb \ + at91sam9x35ek.dtb +dtb-$(CONFIG_SOC_SAM_V7) += \ + at91-sama5d3_xplained.dtb \ + sama5d31ek.dtb \ + sama5d33ek.dtb \ + sama5d34ek.dtb \ + sama5d35ek.dtb \ + sama5d36ek.dtb \ + at91-sama5d4ek.dtb dtb-$(CONFIG_ARCH_ATLAS6) += \ atlas6-evb.dtb dtb-$(CONFIG_ARCH_ATLAS7) += \ -- cgit v1.2.3 From 39d05162a530b8e58119952dd60c7204e8512f0d Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Tue, 20 Jan 2015 21:12:16 +0100 Subject: ARM: dts: rockchip: add rk3288 watchdog clock Add the clock property for the watchdog on rk3288 socs. Signed-off-by: Heiko Stuebner Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- arch/arm/boot/dts/rk3288.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 37847c14b449..1e75a0f556d4 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -560,6 +560,7 @@ wdt: watchdog@ff800000 { compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; reg = <0xff800000 0x100>; + clocks = <&cru PCLK_WDT>; interrupts = ; status = "disabled"; }; -- cgit v1.2.3 From 38c735f3bda8f03361b7bad1fd23f67e35ee2e82 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Mon, 26 Jan 2015 11:49:55 -0800 Subject: ARM: zynq: DT: Remove bogus value from 'bias-disable' property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In one pinctrl node, a 'bias-disable' property is erroneously assigned a value. Fixes: ARM: zynq: DT: Add pinctrl information Signed-off-by: Soren Brinkmann Reviewed-by: Andreas Färber Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-zc702.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 365bdd407eb4..4f8835be4874 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -309,7 +309,7 @@ conf-tx { pins = "MIO48"; - bias-disable = <0>; + bias-disable; }; }; }; -- cgit v1.2.3 From 0c79b9fefdc146aea497dd9fd96b50d980d4136a Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Mon, 26 Jan 2015 11:49:56 -0800 Subject: ARM: zynq: DT: Add pinctrl information to USB nodes Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-zc702.dts | 26 ++++++++++++++++++++++++++ arch/arm/boot/dts/zynq-zc706.dts | 26 ++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 4f8835be4874..483f69ba2cf5 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -312,6 +312,30 @@ bias-disable; }; }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO29", "MIO31", "MIO36"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", + "MIO35", "MIO37", "MIO38", "MIO39"; + bias-disable; + }; + }; }; &sdhci0 { @@ -330,4 +354,6 @@ status = "okay"; dr_mode = "host"; usb-phy = <&usb_phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 6979ce23175f..3a6260998116 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -261,6 +261,30 @@ bias-disable; }; }; + + pinctrl_usb0_default: usb0-default { + mux { + groups = "usb0_0_grp"; + function = "usb0"; + }; + + conf { + groups = "usb0_0_grp"; + slew-rate = <0>; + io-standard = <1>; + }; + + conf-rx { + pins = "MIO29", "MIO31", "MIO36"; + bias-high-impedance; + }; + + conf-tx { + pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", + "MIO35", "MIO37", "MIO38", "MIO39"; + bias-disable; + }; + }; }; &sdhci0 { @@ -279,4 +303,6 @@ status = "okay"; dr_mode = "host"; usb-phy = <&usb_phy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_default>; }; -- cgit v1.2.3 From 8f63a0baee5e4719abc579c2bc84f1bfaa094a6f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 15 Jan 2015 13:45:08 +0100 Subject: ARM: zynq: DT: Fix binding for cadence WDT Based on: "devicetree: Add Cadence WDT devicetree bindings documentation" (sha1: 191891c0378f44aec8e06e889a08d0b76fe6c5cb) - compatible string is cdns,wdt-r1p2 - remove device_type property - remove int reset property (reset-on-timeout is bool) Signed-off-by: Michal Simek Series-to: arm-soc Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-7000.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index c9b9722c0c59..a5cd2eda3edf 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -342,12 +342,10 @@ watchdog0: watchdog@f8005000 { clocks = <&clkc 45>; - compatible = "xlnx,zynq-wdt-r1p2"; - device_type = "watchdog"; + compatible = "cdns,wdt-r1p2"; interrupt-parent = <&intc>; interrupts = <0 9 1>; reg = <0xf8005000 0x1000>; - reset = <0>; timeout-sec = <10>; }; }; -- cgit v1.2.3 From ab216ac5a236756c4560ff7f07ec7e206acdf078 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 15 Jan 2015 14:12:46 +0100 Subject: ARM: zynq: DT: Add aliases node Add aliases node to DTs. Signed-off-by: Michal Simek --- arch/arm/boot/dts/zynq-zc702.dts | 6 ++++++ arch/arm/boot/dts/zynq-zc706.dts | 6 ++++++ arch/arm/boot/dts/zynq-zed.dts | 5 +++++ 3 files changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 483f69ba2cf5..1fc1d3911e9b 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -18,6 +18,12 @@ model = "Zynq ZC702 Development Board"; compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + serial0 = &uart1; + }; + memory { device_type = "memory"; reg = <0x0 0x40000000>; diff --git a/arch/arm/boot/dts/zynq-zc706.dts b/arch/arm/boot/dts/zynq-zc706.dts index 3a6260998116..850518d9b8ac 100644 --- a/arch/arm/boot/dts/zynq-zc706.dts +++ b/arch/arm/boot/dts/zynq-zc706.dts @@ -18,6 +18,12 @@ model = "Zynq ZC706 Development Board"; compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; + aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; + serial0 = &uart1; + }; + memory { device_type = "memory"; reg = <0x0 0x40000000>; diff --git a/arch/arm/boot/dts/zynq-zed.dts b/arch/arm/boot/dts/zynq-zed.dts index e20956e5e720..5658bc8434de 100644 --- a/arch/arm/boot/dts/zynq-zed.dts +++ b/arch/arm/boot/dts/zynq-zed.dts @@ -18,6 +18,11 @@ model = "Zynq Zed Development Board"; compatible = "xlnx,zynq-zed", "xlnx,zynq-7000"; + aliases { + ethernet0 = &gem0; + serial0 = &uart1; + }; + memory { device_type = "memory"; reg = <0x0 0x20000000>; -- cgit v1.2.3 From 72d032266b630e29ef97fc01a6cb1e15d7a20d4c Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 21 Jan 2015 16:21:52 -0800 Subject: ARM: dts: Fix dm816x pinctrl and syscon so they are children of SCM Looks like I only got half done with moving pinctrl and syscon to be children of the SCM. I've set up the FAPLL clocks that way already, but did not complete the job as I copied the syscon values from am33xx.dtsi. To make sure the syscon mapping works, I've verfified that we can set up davinci_emac mac address the same way as cpsw already does with the syscon mapping. So let's add that too. Cc: Brian Hutchinson Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dm816x.dtsi | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi index 7adac097a71c..d98d0f7de380 100644 --- a/arch/arm/boot/dts/dm816x.dtsi +++ b/arch/arm/boot/dts/dm816x.dtsi @@ -50,15 +50,6 @@ }; }; - dm816x_pinmux: pinmux@44e10800 { - compatible = "pinctrl-single"; - reg = <0x48140800 0x50a>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0xf>; - }; - /* * XXX: Use a flat representation of the dm816x interconnect. * The real dm816x interconnect network is quite complex. Since @@ -89,12 +80,29 @@ }; scrm: scrm@48140000 { - compatible = "ti,dm816-scrm"; + compatible = "ti,dm816-scrm", "simple-bus"; reg = <0x48140000 0x21000>; #address-cells = <1>; #size-cells = <1>; ranges = <0 0x48140000 0x21000>; + dm816x_pinmux: pinmux@800 { + compatible = "pinctrl-single"; + reg = <0x800 0x50a>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-single,register-width = <16>; + pinctrl-single,function-mask = <0xf>; + }; + + /* Device Configuration Registers */ + scm_conf: syscon@600 { + compatible = "syscon"; + reg = <0x600 0x110>; + #address-cells = <1>; + #size-cells = <1>; + }; + scrm_clocks: clocks { #address-cells = <1>; #size-cells = <0>; @@ -104,11 +112,6 @@ }; }; - cm: syscon@44e10000 { - compatible = "ti,am33xx-controlmodule", "syscon"; - reg = <0x44e10000 0x800>; - }; - edma: edma@49000000 { compatible = "ti,edma3"; ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3"; @@ -213,6 +216,7 @@ reg = <0x4a100000 0x800 0x4a100900 0x3700>; clocks = <&sysclk24_ck>; + syscon = <&scm_conf>; ti,davinci-ctrl-reg-offset = <0>; ti,davinci-ctrl-mod-reg-offset = <0x900>; ti,davinci-ctrl-ram-offset = <0x2000>; @@ -226,6 +230,7 @@ ti,hwmods = "emac1"; reg = <0x4a120000 0x4000>; clocks = <&sysclk24_ck>; + syscon = <&scm_conf>; ti,davinci-ctrl-reg-offset = <0>; ti,davinci-ctrl-mod-reg-offset = <0x900>; ti,davinci-ctrl-ram-offset = <0x2000>; -- cgit v1.2.3 From ea08de16eb1ba2052ce2db4b58b62a2ec33357a3 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Sat, 24 Jan 2015 13:25:35 +0900 Subject: ARM: dts: Add DISP1 power domain for exynos5420 The DISP1 power domain on Exynos5420 SoC includes the FIMD1, MIXER and HDMI modules. Add a device node for this power domain and mark these modules as consumer of the DISP1 power domain. When a power domain is powered on and off, the input clocks of the devices attached to it are reparented. So a reference to the input and parent clocks of the devices are needed to manage that. Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5420.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 03ef2481c640..a0a3b2829208 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -274,6 +274,20 @@ #power-domain-cells = <0>; }; + disp_pd: power-domain@100440C0 { + compatible = "samsung,exynos4210-pd"; + reg = <0x100440C0 0x20>; + #power-domain-cells = <0>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK200>, + <&clock CLK_MOUT_USER_ACLK200_DISP1>, + <&clock CLK_MOUT_SW_ACLK300>, + <&clock CLK_MOUT_USER_ACLK300_DISP1>, + <&clock CLK_MOUT_SW_ACLK400>, + <&clock CLK_MOUT_USER_ACLK400_DISP1>; + clock-names = "oscclk", "pclk0", "clk0", + "pclk1", "clk1", "pclk2", "clk2"; + }; + pinctrl_0: pinctrl@13400000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x13400000 0x1000>; @@ -541,6 +555,7 @@ fimd: fimd@14400000 { clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; clock-names = "sclk_fimd", "fimd"; + power-domains = <&disp_pd>; }; adc: adc@12D10000 { @@ -714,6 +729,7 @@ phy = <&hdmiphy>; samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; + power-domains = <&disp_pd>; }; hdmiphy: hdmiphy@145D0000 { @@ -726,6 +742,7 @@ interrupts = <0 94 0>; clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; clock-names = "mixer", "sclk_hdmi"; + power-domains = <&disp_pd>; }; gsc_0: video-scaler@13e00000 { -- cgit v1.2.3 From 1e4cd7e52bd0181ba057a5cda4116cb025b94635 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Thu, 29 Jan 2015 00:04:10 +0200 Subject: ARM: digicolor: add minimal device tree description cx92755.dtsi describes CX92755 on chip peripherals. cx92755_equinox.dts describes the Equinox evaluation board for the CX92755 SoC. Acked-by: Arnd Bergmann Signed-off-by: Baruch Siach Signed-off-by: Olof Johansson --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/cx92755.dtsi | 113 ++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/cx92755_equinox.dts | 74 ++++++++++++++++++++++ 3 files changed, 189 insertions(+) create mode 100644 arch/arm/boot/dts/cx92755.dtsi create mode 100644 arch/arm/boot/dts/cx92755_equinox.dts (limited to 'arch') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 09f28f468b83..a8873b8d9ed1 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -78,6 +78,8 @@ dtb-$(CONFIG_ARCH_BRCMSTB) += \ dtb-$(CONFIG_ARCH_DAVINCI) += \ da850-enbw-cmc.dtb \ da850-evm.dtb +dtb-$(CONFIG_ARCH_DIGICOLOR) += \ + cx92755_equinox.dtb dtb-$(CONFIG_ARCH_EFM32) += \ efm32gg-dk3750.dtb dtb-$(CONFIG_ARCH_EXYNOS3) += \ diff --git a/arch/arm/boot/dts/cx92755.dtsi b/arch/arm/boot/dts/cx92755.dtsi new file mode 100644 index 000000000000..490c08075e67 --- /dev/null +++ b/arch/arm/boot/dts/cx92755.dtsi @@ -0,0 +1,113 @@ +/* + * Device Tree Include file for the Conexant Digicolor CX92755 SoC + * + * Author: Baruch Siach + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "skeleton.dtsi" + +/ { + compatible = "cnxt,cx92755"; + + interrupt-parent = <&intc>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; + reg = <0x0>; + }; + }; + + main_clk: main_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + + intc: interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; + + timer@f0000fc0 { + compatible = "cnxt,cx92755-timer"; + reg = <0xf0000fc0 0x40>; + interrupts = <19>, <31>, <34>, <35>, <52>, <53>, <54>, <55>; + clocks = <&main_clk>; + }; + + uc_regs: syscon@f00003a0 { + compatible = "cnxt,cx92755-uc", "syscon"; + reg = <0xf00003a0 0x10>; + }; + + uart0: uart@f0000740 { + compatible = "cnxt,cx92755-usart"; + reg = <0xf0000740 0x20>; + clocks = <&main_clk>; + interrupts = <44>; + status = "disabled"; + }; + + uart1: uart@f0000760 { + compatible = "cnxt,cx92755-usart"; + reg = <0xf0000760 0x20>; + clocks = <&main_clk>; + interrupts = <45>; + status = "disabled"; + }; + + uart2: uart@f0000780 { + compatible = "cnxt,cx92755-usart"; + reg = <0xf0000780 0x20>; + clocks = <&main_clk>; + interrupts = <46>; + status = "disabled"; + }; +}; diff --git a/arch/arm/boot/dts/cx92755_equinox.dts b/arch/arm/boot/dts/cx92755_equinox.dts new file mode 100644 index 000000000000..f33bf5635d47 --- /dev/null +++ b/arch/arm/boot/dts/cx92755_equinox.dts @@ -0,0 +1,74 @@ +/* + * Device Tree file for the Conexant Equinox CX92755 EVK + * + * Author: Baruch Siach + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "cx92755.dtsi" + +/ { + model = "Conexant Equinox CX92755 EVK"; + compatible = "cnxt,equinox", "cnxt,cx92755"; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + }; + + memory@0 { + reg = <0 0x8000000>; + device_type = "memory"; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = &uart0; + }; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 5bbb50d5a2fbe439c5eb77511a9d65df55acd105 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 29 Jan 2015 22:21:01 +0100 Subject: ARM: dts: rockchip: add cpu and gpu regulators to rk3288-evb-act8846 The evaluation board using the act8846 as main pmic uses two additional regulators to provide the cpu and gpu voltage. Add these and also add the link to cpu supply from vdd_cpu. Signed-off-by: Heiko Stuebner Tested-by: Daniel Lezcano --- arch/arm/boot/dts/rk3288-evb-act8846.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts index a76dd44adb53..9db02bbe4156 100644 --- a/arch/arm/boot/dts/rk3288-evb-act8846.dts +++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts @@ -17,7 +17,32 @@ compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288"; }; +&cpu0 { + cpu0-supply = <&vdd_cpu>; +}; + &i2c0 { + vdd_cpu: syr827@40 { + compatible = "silergy,syr827"; + fcs,suspend-voltage-selector = <1>; + reg = <0x40>; + regulator-name = "vdd_cpu"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_gpu: syr828@41 { + compatible = "silergy,syr828"; + fcs,suspend-voltage-selector = <1>; + reg = <0x41>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + hym8563@51 { compatible = "haoyu,hym8563"; reg = <0x51>; -- cgit v1.2.3 From 9fffa7ad0d0dc139ff45fab66f3e5ef98414f277 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Thu, 29 Jan 2015 22:35:47 +0100 Subject: ARM: dts: rockchip: housekeeping off i2c0 on rk3288-evb boards Use the same transfer speed on both the rk808 and act8846 variants and remove the status=okay from the rk808 one which is already set in the shared rk3288-evb.dtsi . Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb-act8846.dts | 2 ++ arch/arm/boot/dts/rk3288-evb-rk808.dts | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb-act8846.dts b/arch/arm/boot/dts/rk3288-evb-act8846.dts index 9db02bbe4156..d7b8bbc0c25f 100644 --- a/arch/arm/boot/dts/rk3288-evb-act8846.dts +++ b/arch/arm/boot/dts/rk3288-evb-act8846.dts @@ -22,6 +22,8 @@ }; &i2c0 { + clock-frequency = <400000>; + vdd_cpu: syr827@40 { compatible = "silergy,syr827"; fcs,suspend-voltage-selector = <1>; diff --git a/arch/arm/boot/dts/rk3288-evb-rk808.dts b/arch/arm/boot/dts/rk3288-evb-rk808.dts index d453ddd4b476..3f7aa9e2e76a 100644 --- a/arch/arm/boot/dts/rk3288-evb-rk808.dts +++ b/arch/arm/boot/dts/rk3288-evb-rk808.dts @@ -23,7 +23,6 @@ &i2c0 { clock-frequency = <400000>; - status = "okay"; rk808: pmic@1b { compatible = "rockchip,rk808"; -- cgit v1.2.3 From 863b76b2b5da45cdf8819c4db468adfd2f0292f0 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 28 Jan 2015 12:27:16 +0100 Subject: ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb This enables the recently added display nodes on the firefly and evb, letting the boards output graphic data over the hdmi port. This includes enabling of i2c5 on the evb that is used for ddc probing and setting the lcd-regulators to always on until the hdmi driver learns about using them. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 24 ++++++++++++++++++++++++ arch/arm/boot/dts/rk3288-firefly.dtsi | 22 ++++++++++++++++++++++ 2 files changed, 46 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 3e067dd65d0c..6857730ca0c1 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -104,6 +104,10 @@ status = "okay"; }; +&hdmi { + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-mmc-highspeed; @@ -120,6 +124,10 @@ status = "okay"; }; +&i2c5 { + status = "okay"; +}; + &wdt { status = "okay"; }; @@ -187,3 +195,19 @@ &usb_host1 { status = "okay"; }; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi index 7f0ba9b24869..6dcc5e9d9480 100644 --- a/arch/arm/boot/dts/rk3288-firefly.dtsi +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -179,6 +179,10 @@ status = "okay"; }; +&hdmi { + status = "okay"; +}; + &i2c0 { clock-frequency = <400000>; status = "okay"; @@ -265,6 +269,7 @@ regulator-name = "vdd10_lcd"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; + regulator-always-on; }; vcca_18: REG7 { @@ -303,6 +308,7 @@ regulator-name = "vcc18_lcd"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; }; }; }; @@ -462,6 +468,22 @@ status = "okay"; }; +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; + &wdt { status = "okay"; }; -- cgit v1.2.3 From c25d8cbcd840b2c9774a285ea728e72dd56aea2e Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 28 Jan 2015 17:23:10 +0100 Subject: ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards Currently the hdmi driver is using one of the soc i2c busses for ddc probing and while documentation always specifies i2c5 as hdmi-i2c it could very well be any other bus as well. Therefore this is a property of the board and should be specified there. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288-evb.dtsi | 1 + arch/arm/boot/dts/rk3288-firefly.dtsi | 1 + arch/arm/boot/dts/rk3288.dtsi | 1 - 3 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi index 6857730ca0c1..86ede5893ab6 100644 --- a/arch/arm/boot/dts/rk3288-evb.dtsi +++ b/arch/arm/boot/dts/rk3288-evb.dtsi @@ -105,6 +105,7 @@ }; &hdmi { + ddc-i2c-bus = <&i2c5>; status = "okay"; }; diff --git a/arch/arm/boot/dts/rk3288-firefly.dtsi b/arch/arm/boot/dts/rk3288-firefly.dtsi index 6dcc5e9d9480..e6f873abbe0d 100644 --- a/arch/arm/boot/dts/rk3288-firefly.dtsi +++ b/arch/arm/boot/dts/rk3288-firefly.dtsi @@ -180,6 +180,7 @@ }; &hdmi { + ddc-i2c-bus = <&i2c5>; status = "okay"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 1e75a0f556d4..1141850d0acb 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -646,7 +646,6 @@ compatible = "rockchip,rk3288-dw-hdmi"; reg = <0xff980000 0x20000>; reg-io-width = <4>; - ddc-i2c-bus = <&i2c5>; rockchip,grf = <&grf>; interrupts = ; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>; -- cgit v1.2.3 From 87517d26d888014c1bc93f4a7df623c4f413ccfb Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Mon, 26 Jan 2015 14:15:28 +0200 Subject: ARM: dts: dra7-evm: Add extcon nodes for USB On this EVM, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). Gets USB peripheral mode to work on this EVM. Signed-off-by: Roger Quadros Reviewed-by: Felipe Balbi Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 10b725c7bfc0..c1d0ac7bd002 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -26,6 +26,16 @@ regulator-max-microvolt = <3300000>; }; + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; + }; + + extcon_usb2: extcon_usb2 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; + }; + vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; @@ -391,6 +401,19 @@ }; }; }; + + pcf_gpio_21: gpio@21 { + compatible = "ti,pcf8575"; + reg = <0x21>; + lines-initial-states = <0x1408>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio6>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; &i2c2 { @@ -520,6 +543,14 @@ }; }; +&omap_dwc3_1 { + extcon = <&extcon_usb1>; +}; + +&omap_dwc3_2 { + extcon = <&extcon_usb2>; +}; + &usb1 { dr_mode = "peripheral"; pinctrl-names = "default"; -- cgit v1.2.3 From f56de327b4c41aa8dece7f32ab76571fac4bf586 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Mon, 26 Jan 2015 14:15:29 +0200 Subject: ARM: dts: dra72-evm: Add extcon nodes for USB On this EVM, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). Gets USB peripheral mode to work on this EVM. Signed-off-by: Roger Quadros Reviewed-by: Felipe Balbi Acked-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra72-evm.dts | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index cacddd74c516..4d8711713610 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -8,6 +8,7 @@ /dts-v1/; #include "dra72x.dtsi" +#include / { model = "TI DRA722"; @@ -24,6 +25,16 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; + }; + + extcon_usb2: extcon_usb2 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; + }; }; &dra7_pmx_core { @@ -255,6 +266,18 @@ ti,palmas-long-press-seconds = <6>; }; }; + + pcf_gpio_21: gpio@21 { + compatible = "ti,pcf8575"; + reg = <0x21>; + lines-initial-states = <0x1408>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio6>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; + interrupt-controller; + #interrupt-cells = <2>; + }; }; &uart1 { @@ -357,6 +380,14 @@ phy-supply = <&ldo4_reg>; }; +&omap_dwc3_1 { + extcon = <&extcon_usb1>; +}; + +&omap_dwc3_2 { + extcon = <&extcon_usb2>; +}; + &usb1 { dr_mode = "peripheral"; pinctrl-names = "default"; -- cgit v1.2.3 From f60db98eaa67e02915f01e11933501127bc004b0 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Mon, 26 Jan 2015 14:15:30 +0200 Subject: ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB On this EVM, the USB cable state has to be determined via the ID pin tied to a GPIO line. We use the gpio-usb-extcon driver to read the ID pin and the extcon framework to forward the USB cable state information to the USB driver so the controller can be configured in the right mode (host/peripheral). NOTE: the ports on this board cannot switch roles. They are configured either host or peripheral by hardwiring the respective ID pins. Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index c5d4ceabdd80..0e889eb62a59 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -88,6 +88,20 @@ gpio-fan,speed-map = <0 0>, <13000 1>; }; + + extcon_usb1: extcon_usb1 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&extcon_usb1_pins>; + }; + + extcon_usb2: extcon_usb2 { + compatible = "linux,extcon-usb-gpio"; + id-gpio = <&gpio7 24 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&extcon_usb2_pins>; + }; }; &dra7_pmx_core { @@ -252,6 +266,17 @@ >; }; + extcon_usb1_pins: extcon_usb1_pins { + pinctrl-single,pins = < + 0x3ec (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */ + >; + }; + + extcon_usb2_pins: extcon_usb2_pins { + pinctrl-single,pins = < + 0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */ + >; + }; }; &i2c1 { @@ -523,3 +548,11 @@ pinctrl-names = "default"; pinctrl-0 = <&usb1_pins>; }; + +&omap_dwc3_1 { + extcon = <&extcon_usb1>; +}; + +&omap_dwc3_2 { + extcon = <&extcon_usb2>; +}; -- cgit v1.2.3 From 726806ad9ba10f8ba8d26ba8154d98a7c9b89a12 Mon Sep 17 00:00:00 2001 From: Roger Quadros Date: Mon, 26 Jan 2015 14:15:31 +0200 Subject: ARM: dts: am57xx-beagle-x15: Fix USB2 mode On this board USB2 is meant to be used as peripheral only. The ID pin for USB2 is hardwired HIGH. Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am57xx-beagle-x15.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts index 0e889eb62a59..03750af3b49a 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15.dts +++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts @@ -556,3 +556,7 @@ &omap_dwc3_2 { extcon = <&extcon_usb2>; }; + +&usb2 { + dr_mode = "peripheral"; +}; -- cgit v1.2.3 From e8614292cd41971b54e60188d4e99abdc8695073 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:44 +0900 Subject: ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2 Add node for fuel gauge present in Maxim 77693 PMIC. This allows control over battery charging state on Trats2 board. The fuel gauge is compatible with max17042 battery driver (Maxim 17042/17047/17050). Although datasheet rev 2.2 for MAX77693 describes fuel gauge as Maxim 17042-like, the chip on Trats2 board identifies itself as Maxim 17047-like. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index c81c4769411d..dea96574183f 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -15,6 +15,7 @@ /dts-v1/; #include "exynos4412.dtsi" #include +#include / { model = "Samsung Trats 2 based on Exynos4412"; @@ -24,6 +25,7 @@ i2c9 = &i2c_ak8975; i2c10 = &i2c_cm36651; i2c11 = &i2c_max77693; + i2c12 = &i2c_max77693_fuel; }; memory { @@ -552,6 +554,22 @@ }; }; + i2c_max77693_fuel: i2c-gpio-3 { + compatible = "i2c-gpio"; + gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + max77693-fuel-gauge@36 { + compatible = "maxim,max17047"; + interrupt-parent = <&gpx2>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + reg = <0x36>; + }; + }; + mmc@12550000 { num-slots = <1>; broken-cd; -- cgit v1.2.3 From 4a235f6aa9d0ff6819201a39c334e4989b45b57b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:49 +0900 Subject: ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2 Add suspend to RAM configuration for max77686 regulators. Some LDOs and bucks are disabled. This reduces energy consumption during S2R, approximately from 17 mA to 9 mA. Additionally remove old and not supported bindings: - regulator-mem-off - regulator-mem-idle - regulator-mem-on The max77686 driver does not parse them and they are not documented anywere. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Reviewed-by: Chanwoo Choi Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 72 +++++++++++++++++++-------------- 1 file changed, 42 insertions(+), 30 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index dea96574183f..7ea8b7dce0cb 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -227,7 +227,6 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; }; ldo2_reg: ldo2 { @@ -236,7 +235,9 @@ regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo3_reg: ldo3 { @@ -245,7 +246,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; - regulator-mem-on; }; ldo4_reg: ldo4 { @@ -254,7 +254,6 @@ regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; regulator-always-on; - regulator-mem-on; }; ldo5_reg: ldo5 { @@ -263,7 +262,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-always-on; - regulator-mem-on; }; ldo6_reg: ldo6 { @@ -272,7 +270,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo7_reg: ldo7 { @@ -281,7 +281,9 @@ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; regulator-always-on; - regulator-mem-on; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo8_reg: ldo8 { @@ -289,7 +291,9 @@ regulator-name = "VMIPI_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo9_reg: ldo9 { @@ -297,7 +301,6 @@ regulator-name = "CAM_ISP_MIPI_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-mem-idle; }; ldo10_reg: ldo10 { @@ -305,7 +308,9 @@ regulator-name = "VMIPI_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo11_reg: ldo11 { @@ -314,7 +319,9 @@ regulator-min-microvolt = <1950000>; regulator-max-microvolt = <1950000>; regulator-always-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo12_reg: ldo12 { @@ -322,7 +329,9 @@ regulator-name = "VUOTG_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo13_reg: ldo13 { @@ -330,7 +339,6 @@ regulator-name = "NFC_AVDD_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo14_reg: ldo14 { @@ -339,7 +347,9 @@ regulator-min-microvolt = <1950000>; regulator-max-microvolt = <1950000>; regulator-always-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; ldo15_reg: ldo15 { @@ -347,7 +357,9 @@ regulator-name = "VHSIC_1.0V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1000000>; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo16_reg: ldo16 { @@ -355,7 +367,9 @@ regulator-name = "VHSIC_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; ldo17_reg: ldo17 { @@ -363,7 +377,6 @@ regulator-name = "CAM_SENSOR_CORE_1.2V"; regulator-min-microvolt = <1200000>; regulator-max-microvolt = <1200000>; - regulator-mem-idle; }; ldo18_reg: ldo18 { @@ -371,7 +384,6 @@ regulator-name = "CAM_ISP_SEN_IO_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo19_reg: ldo19 { @@ -379,7 +391,6 @@ regulator-name = "VT_CAM_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo20_reg: ldo20 { @@ -387,7 +398,6 @@ regulator-name = "VDDQ_PRE_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo21_reg: ldo21 { @@ -395,7 +405,6 @@ regulator-name = "VTF_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-mem-idle; }; ldo22_reg: ldo22 { @@ -410,7 +419,6 @@ regulator-name = "TSP_AVDD_3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - regulator-mem-idle; }; ldo24_reg: ldo24 { @@ -418,7 +426,6 @@ regulator-name = "TSP_VDD_1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; - regulator-mem-idle; }; ldo25_reg: ldo25 { @@ -426,7 +433,6 @@ regulator-name = "LCD_VCC_3.3V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; - regulator-mem-idle; }; ldo26_reg: ldo26 { @@ -434,7 +440,6 @@ regulator-name = "MOTOR_VCC_3.0V"; regulator-min-microvolt = <3000000>; regulator-max-microvolt = <3000000>; - regulator-mem-idle; }; buck1_reg: buck1 { @@ -444,7 +449,9 @@ regulator-max-microvolt = <1100000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck2_reg: buck2 { @@ -454,7 +461,9 @@ regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-on-in-suspend; + }; }; buck3_reg: buck3 { @@ -464,7 +473,9 @@ regulator-max-microvolt = <1150000>; regulator-always-on; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck4_reg: buck4 { @@ -473,7 +484,9 @@ regulator-min-microvolt = <850000>; regulator-max-microvolt = <1150000>; regulator-boot-on; - regulator-mem-off; + regulator-state-mem { + regulator-off-in-suspend; + }; }; buck5_reg: buck5 { @@ -512,7 +525,6 @@ regulator-name = "CAM_ISP_CORE_1.2V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1200000>; - regulator-mem-off; }; }; }; -- cgit v1.2.3 From faf9a3eaa1226bea07c8637e993f063fb128b615 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:43:54 +0900 Subject: ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2 Remove fixed regulators (duplicating what max77686 provides) and add GPIO enable control to max77686 regulators. This gives the system full control over those regulators. Previously the state of such regulators was a mixture of what max77686 driver set over I2C and what regulator-fixed set through GPIO. Removal of 'regulator-always-on' from CAM_ISP_CORE_1.2V (buck9) allows disabling it when it is not used. Previously this regulator was always enabled because its enable state is a OR of: - ENB9 GPIO (turned always on by regulator-fixed), - BUCK9EN field in BUCK9CTRL register (off by max77686 through I2C). Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 25 +++++-------------------- 1 file changed, 5 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 7ea8b7dce0cb..8072d9002945 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -58,15 +58,6 @@ #address-cells = <1>; #size-cells = <0>; - vemmc_reg: regulator-0 { - compatible = "regulator-fixed"; - regulator-name = "VMEM_VDD_2.8V"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - gpio = <&gpk0 2 0>; - enable-active-high; - }; - cam_io_reg: voltage-regulator-1 { compatible = "regulator-fixed"; regulator-name = "CAM_SENSOR_A"; @@ -94,16 +85,6 @@ enable-active-high; }; - cam_isp_core_reg: voltage-regulator-4 { - compatible = "regulator-fixed"; - regulator-name = "CAM_ISP_CORE_1.2V_EN"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - gpio = <&gpm0 3 0>; - enable-active-high; - regulator-always-on; - }; - ps_als_reg: voltage-regulator-5 { compatible = "regulator-fixed"; regulator-name = "LED_A_3.0V"; @@ -405,6 +386,7 @@ regulator-name = "VTF_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; + maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>; }; ldo22_reg: ldo22 { @@ -412,6 +394,7 @@ regulator-name = "VMEM_VDD_2.8V"; regulator-min-microvolt = <2800000>; regulator-max-microvolt = <2800000>; + maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; }; ldo23_reg: ldo23 { @@ -518,6 +501,7 @@ regulator-name = "VMEM_VDDF_3.0V"; regulator-min-microvolt = <2850000>; regulator-max-microvolt = <2850000>; + maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>; }; buck9_reg: buck9 { @@ -525,6 +509,7 @@ regulator-name = "CAM_ISP_CORE_1.2V"; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1200000>; + maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>; }; }; }; @@ -587,7 +572,7 @@ broken-cd; non-removable; card-detect-delay = <200>; - vmmc-supply = <&vemmc_reg>; + vmmc-supply = <&ldo22_reg>; clock-frequency = <400000000>; samsung,dw-mshc-ciu-div = <0>; samsung,dw-mshc-sdr-timing = <2 3>; -- cgit v1.2.3 From 043ef1485fccd2c5ba36f6a9532b4a9697148150 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 Feb 2015 07:47:39 +0900 Subject: ARM: dts: Add max77693 charger node for exynos4412-trats2 Add to Trats2 DTS new node for configuring the max77693 charger driver. Only the maxim,constant-microvolt differs from default value but set all of the optional properties anyway. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 8072d9002945..0976f4d464af 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -548,6 +548,16 @@ haptic-supply = <&ldo26_reg>; pwms = <&pwm 0 38022 0>; }; + + charger { + compatible = "maxim,max77693-charger"; + + maxim,constant-microvolt = <4350000>; + maxim,min-system-microvolt = <3600000>; + maxim,thermal-regulation-celsius = <100>; + maxim,battery-overcurrent-microamp = <3500000>; + maxim,charge-input-threshold-microvolt = <4300000>; + }; }; }; -- cgit v1.2.3 From 79f3c37c8859d973b39b64200f7bbc2a66de057c Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:49:08 +0900 Subject: ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi Assign proper FIMC-IS UART gate clock in the device DT node and not use the SRC_MASK gate. This fixes regression introduced in commit a37c82a3b3c0910019abfd22a97be1f ("clk: samsung: exynos4: Remove SRC_MASK_ISP gates"). Without this change exynos4 fimc-is driver fails to probe with an error log: [ 1.842447] ERROR: could not get clock /camera/fimc-is@12000000:uart(13) [ 1.848529] exynos4-fimc-is 12000000.fimc-is: failed to get clock: uart [ 1.855275] exynos4-fimc-is: probe of 12000000.fimc-is failed with error -2 Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index da8734e25f50..af59cab53bd9 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -226,7 +226,7 @@ <&clock CLK_DIV_ISP0>,<&clock CLK_DIV_ISP1>, <&clock CLK_DIV_MCUISP0>, <&clock CLK_DIV_MCUISP1>, - <&clock CLK_SCLK_UART_ISP>, + <&clock CLK_UART_ISP_SCLK>, <&clock CLK_ACLK200>, <&clock CLK_DIV_ACLK200>, <&clock CLK_ACLK400_MCUISP>, <&clock CLK_DIV_ACLK400_MCUISP>; -- cgit v1.2.3 From cfe3b8933cdede8bc8cc3c03931908bb17a114f4 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:49:49 +0900 Subject: ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2 In order to get exact 24MHz clock frequency value for the camera sensor and avoid rounding errors the parent clock must be CLK_XUSBXTI, not CLK_MOUT_MPLL_USER_T. Currently the sensor's master clock frequency is too high and the sensor doesn't work properly. This fixes commit 0357a4438d531ef3cf529e80ffcd208eb8e35f55 ("ARM: dts: Specify default clocks for Exynos4 camera devices"). Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 0976f4d464af..344eaa78d236 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -746,8 +746,8 @@ status = "okay"; assigned-clocks = <&clock CLK_MOUT_CAM0>, <&clock CLK_MOUT_CAM1>; - assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>, - <&clock CLK_MOUT_MPLL_USER_T>; + assigned-clock-parents = <&clock CLK_XUSBXTI>, + <&clock CLK_XUSBXTI>; fimc_0: fimc@11800000 { status = "okay"; -- cgit v1.2.3 From 440e5aefa7d6efd46f2c166cc9410237847f7721 Mon Sep 17 00:00:00 2001 From: Inha Song Date: Wed, 4 Feb 2015 07:51:38 +0900 Subject: ARM: dts: Add sound nodes for exynos4412-trats2 This patch add WM1811 audio codec, I2S interface and the sound machine nodes to enable audio on exynos4412-trats2 board. Signed-off-by: Inha Song Reviewed-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 42 +++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 344eaa78d236..3de457393416 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -186,6 +186,25 @@ }; }; + i2c@138A0000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + pinctrl-0 = <&i2c4_bus>; + pinctrl-names = "default"; + status = "okay"; + + wm1811: wm1811@1a { + compatible = "wlf,wm1811"; + reg = <0x1a>; + clocks = <&pmu_system_controller 0>; + clock-names = "MCLK1"; + DCVDD-supply = <&ldo3_reg>; + DBVDD1-supply = <&ldo3_reg>; + wlf,ldo1ena = <&gpj0 4 0>; + }; + }; + i2c@138D0000 { samsung,i2c-sda-delay = <100>; samsung,i2c-slave-addr = <0x10>; @@ -863,6 +882,24 @@ }; }; + i2s0: i2s@03830000 { + pinctrl-0 = <&i2s0_bus>; + pinctrl-names = "default"; + status = "okay"; + }; + + sound { + compatible = "samsung,trats2-audio"; + samsung,i2s-controller = <&i2s0>; + samsung,model = "Trats2"; + samsung,audio-codec = <&wm1811>; + samsung,audio-routing = + "SPK", "SPKOUTLN", + "SPK", "SPKOUTLP", + "SPK", "SPKOUTRN", + "SPK", "SPKOUTRP"; + }; + exynos-usbphy@125B0000 { status = "okay"; }; @@ -891,6 +928,11 @@ }; }; +&pmu_system_controller { + assigned-clocks = <&pmu_system_controller 0>; + assigned-clock-parents = <&clock CLK_XUSBXTI>; +}; + &pinctrl_0 { pinctrl-names = "default"; pinctrl-0 = <&sleep0>; -- cgit v1.2.3 From c8ef0bee5f5395b1ac96225186d56fb35107a49a Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 4 Feb 2015 07:58:24 +0900 Subject: ARM: dts: Add syscon phandle to the video-phy node for Exynos4 This is required to fix regression after introducing the PMU device nodes required for the PMU driver modified in commit 14fc8b93d473 ("ARM: EXYNOS: Add platform driver support for Exynos PMU"). This change is needed to make MIPI DSI displays and MIPI CSI-2 camera sensors working again on Exynos4 boards. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index c5dc2efb99ed..8e73b67fd628 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -76,6 +76,7 @@ compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10020710 8>; #phy-cells = <1>; + syscon = <&pmu_system_controller>; }; pd_mfc: mfc-power-domain@10023C40 { -- cgit v1.2.3 From 6c7c87a3827a992ec89bcea8a00c8531dd57801c Mon Sep 17 00:00:00 2001 From: YoungJun Cho Date: Wed, 4 Feb 2015 08:05:20 +0900 Subject: ARM: dts: add fimd device node for exynos4415 This patch adds fimd device node to exynos4415.dtsi. Signed-off-by: YoungJun Cho Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4415.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index 2007def1ab43..7f364bb45dac 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi @@ -241,6 +241,18 @@ interrupts = <0 240 0>; }; + fimd: fimd@11C00000 { + compatible = "samsung,exynos4415-fimd"; + reg = <0x11C00000 0x30000>; + interrupt-names = "fifo", "vsync", "lcd_sys"; + interrupts = <0 84 0>, <0 85 0>, <0 86 0>; + clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>; + clock-names = "sclk_fimd", "fimd"; + samsung,power-domain = <&pd_lcd0>; + samsung,sysreg = <&sysreg_system_controller>; + status = "disabled"; + }; + hsotg: hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; -- cgit v1.2.3 From 59f504dc2504fb2198b3c685b0f1a4b6cc2b7edf Mon Sep 17 00:00:00 2001 From: YoungJun Cho Date: Wed, 4 Feb 2015 08:05:20 +0900 Subject: ARM: dts: add mipi dsi device node for exynos4415 This patch adds mipi dsi device node to exynos4415.dtsi. Signed-off-by: YoungJun Cho Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4415.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4415.dtsi b/arch/arm/boot/dts/exynos4415.dtsi index 7f364bb45dac..5caea996e090 100644 --- a/arch/arm/boot/dts/exynos4415.dtsi +++ b/arch/arm/boot/dts/exynos4415.dtsi @@ -253,6 +253,21 @@ status = "disabled"; }; + dsi_0: dsi@11C80000 { + compatible = "samsung,exynos4415-mipi-dsi"; + reg = <0x11C80000 0x10000>; + interrupts = <0 83 0>; + samsung,phy-type = <0>; + samsung,power-domain = <&pd_lcd0>; + phys = <&mipi_phy 1>; + phy-names = "dsim"; + clocks = <&cmu CLK_DSIM0>, <&cmu CLK_SCLK_MIPI0>; + clock-names = "bus_clk", "pll_clk"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + hsotg: hsotg@12480000 { compatible = "samsung,s3c6400-hsotg"; reg = <0x12480000 0x20000>; -- cgit v1.2.3 From e4502367a0367a7eee6b710a6e490315d16a076b Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU dt node for exynos3250 This patch adds PPMU (Platform Performance Monitoring Unit) dt node to estimate the utilization of each IP in Exynos SoC through DEVFREQ Event subsystem. This patch adds following PPMU dt nodes: - PPMU_DMC0 0x106a0000 - PPMU_DMC1 0x106b0000 - PPMU_RIGHTBUS 0x112A0000 - PPMU_LEFTBUS 0x116A0000 - PPMU_CAMIF 0x11AC0000 - PPMU_LCD0 0x11E40000 - PPMU_FSYS 0x12630000 - PPMU_3D 0x13220000 - PPMU_MFC 0x13660000 - PPMU_CPU 0x106c0000 Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250.dtsi | 74 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index acdf34401015..277b48b0b6f9 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -541,6 +541,80 @@ compatible = "arm,cortex-a7-pmu"; interrupts = <0 18 0>, <0 19 0>; }; + + ppmu_dmc0: ppmu_dmc0@106a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106a0000 0x2000>; + status = "disabled"; + }; + + ppmu_dmc1: ppmu_dmc1@106b0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106b0000 0x2000>; + status = "disabled"; + }; + + ppmu_cpu: ppmu_cpu@106c0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106c0000 0x2000>; + status = "disabled"; + }; + + ppmu_rightbus: ppmu_rightbus@112a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x112a0000 0x2000>; + clocks = <&cmu CLK_PPMURIGHT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_leftbus: ppmu_leftbus0@116a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x116a0000 0x2000>; + clocks = <&cmu CLK_PPMULEFT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_camif: ppmu_camif@11ac0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11ac0000 0x2000>; + clocks = <&cmu CLK_PPMUCAMIF>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_lcd0: ppmu_lcd0@11e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11e40000 0x2000>; + clocks = <&cmu CLK_PPMULCD0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_fsys: ppmu_fsys@12630000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12630000 0x2000>; + clocks = <&cmu CLK_PPMUFILE>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_g3d: ppmu_g3d@13220000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13220000 0x2000>; + clocks = <&cmu CLK_PPMUG3D>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc: ppmu_mfc@13660000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13660000 0x2000>; + clocks = <&cmu CLK_PPMUMFC_L>; + clock-names = "ppmu"; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From 30e0e476ae4218c4310765cdcb1775599d089270 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU dt node for exynos4 and exynos4210 This patch add PPMUs (Platform Performance Monitoring Unit) dt node for Exynos4 (Exynos4210/4212/4412) SoCs. PPMU dt node is used for monitor the utilization of each IP. The Exynos4210/Exynos4212/Exynos4412 SoC includes following PPMUs: - PPMU_DMC0 0x106A_0000 - PPMU_DMC1 0x106B_0000 - PPMU_CPU 0x106C_0000 - PPMU_ACP 0x10AE_0000 - PPMU_RIGHT_BUS 0x112A_0000 - PPMU_LEFT_BUS 0x116A_0000 - PPMU_FSYS 0x1263_0000 - PPMU_LCD0 0x11E4_0000 - PPMU_CAMIF 0x11AC_0000 - PPMU_IMAGE 0x12AA_0000 - PPMU_TV 0x12E4_0000 - PPMU_3D 0x1322_0000 - PPMU_MFC_LEFT 0x1366_0000 - PPMU_MFC_RIGHT 0x1367_0000 Additionally, the Exynos4210 SoC includes following PPMUs: - PPMU_LCD1 0x1224_0000 Signed-off-by: Chanwoo Choi Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4.dtsi | 108 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos4210.dtsi | 8 +++ 2 files changed, 116 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 8e73b67fd628..d1759bf5202f 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -653,4 +653,112 @@ samsung,sysreg = <&sys_reg>; status = "disabled"; }; + + ppmu_dmc0: ppmu_dmc0@106a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106a0000 0x2000>; + clocks = <&clock CLK_PPMUDMC0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_dmc1: ppmu_dmc1@106b0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106b0000 0x2000>; + clocks = <&clock CLK_PPMUDMC1>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_cpu: ppmu_cpu@106c0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106c0000 0x2000>; + clocks = <&clock CLK_PPMUCPU>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_acp: ppmu_acp@10ae0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x106e0000 0x2000>; + status = "disabled"; + }; + + ppmu_rightbus: ppmu_rightbus@112a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x112a0000 0x2000>; + clocks = <&clock CLK_PPMURIGHT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_leftbus: ppmu_leftbus0@116a0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x116a0000 0x2000>; + clocks = <&clock CLK_PPMULEFT>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_camif: ppmu_camif@11ac0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11ac0000 0x2000>; + clocks = <&clock CLK_PPMUCAMIF>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_lcd0: ppmu_lcd0@11e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x11e40000 0x2000>; + clocks = <&clock CLK_PPMULCD0>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_fsys: ppmu_g3d@12630000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12630000 0x2000>; + status = "disabled"; + }; + + ppmu_image: ppmu_image@12aa0000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12aa0000 0x2000>; + clocks = <&clock CLK_PPMUIMAGE>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_tv: ppmu_tv@12e40000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12e40000 0x2000>; + clocks = <&clock CLK_PPMUTV>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_g3d: ppmu_g3d@13220000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13220000 0x2000>; + clocks = <&clock CLK_PPMUG3D>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_left: ppmu_mfc_left@13660000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13660000 0x2000>; + clocks = <&clock CLK_PPMUMFC_L>; + clock-names = "ppmu"; + status = "disabled"; + }; + + ppmu_mfc_right: ppmu_mfc_right@13670000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x13670000 0x2000>; + clocks = <&clock CLK_PPMUMFC_R>; + clock-names = "ppmu"; + status = "disabled"; + }; }; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 6728aaa2af9d..7c15880bc8ba 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -193,4 +193,12 @@ samsung,lcd-wb; }; }; + + ppmu_lcd1: ppmu_lcd1@12240000 { + compatible = "samsung,exynos-ppmu"; + reg = <0x12240000 0x2000>; + clocks = <&clock CLK_PPMULCD1>; + clock-names = "ppmu"; + status = "disabled"; + }; }; -- cgit v1.2.3 From 8d6b9b46942daf8acdd1a9ae04a1e3ba5a843f97 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:10:58 +0900 Subject: ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato This patch adds PPMU dt node for Exynos3250 based Rinato and Monk boards. The PPMU node is used to get the utilization of DMC0/DMC1/ LEFTBUS/RIGHTBUS Block. Signed-off-by: Chanwoo Choi Acked-by: Kyungmin Park Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos3250-monk.dts | 40 +++++++++++++++++++++++++++++++++ arch/arm/boot/dts/exynos3250-rinato.dts | 40 +++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos3250-monk.dts b/arch/arm/boot/dts/exynos3250-monk.dts index d9a6dd525791..1d483c1c8b48 100644 --- a/arch/arm/boot/dts/exynos3250-monk.dts +++ b/arch/arm/boot/dts/exynos3250-monk.dts @@ -437,6 +437,46 @@ status = "okay"; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &xusbxti { clock-frequency = <24000000>; }; diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index af7589efa567..0b9906880c0c 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -610,6 +610,46 @@ status = "okay"; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &xusbxti { clock-frequency = <24000000>; }; -- cgit v1.2.3 From 7808cae3e97140781eb3f712084caf4e44c126c9 Mon Sep 17 00:00:00 2001 From: Chanwoo Choi Date: Wed, 4 Feb 2015 08:11:52 +0900 Subject: ARM: dts: Add PPMU node for exynos4412-trats2 This patch add dt node for PPMU_{DMC0|DMC1|LEFTBUS|RIGHTBUS} for exynos4412-trats2 board. Each PPMU dt node includes one event of 'PPMU Count3'. Cc: Kyungmin Park Signed-off-by: Chanwoo Choi Acked-by: MyungJoo Ham Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4412-trats2.dts | 40 +++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 3de457393416..d3b3f4f4653e 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -933,6 +933,46 @@ assigned-clock-parents = <&clock CLK_XUSBXTI>; }; +&ppmu_dmc0 { + status = "okay"; + + events { + ppmu_dmc0_3: ppmu-event3-dmc0 { + event-name = "ppmu-event3-dmc0"; + }; + }; +}; + +&ppmu_dmc1 { + status = "okay"; + + events { + ppmu_dmc1_3: ppmu-event3-dmc1 { + event-name = "ppmu-event3-dmc1"; + }; + }; +}; + +&ppmu_leftbus { + status = "okay"; + + events { + ppmu_leftbus_3: ppmu-event3-leftbus { + event-name = "ppmu-event3-leftbus"; + }; + }; +}; + +&ppmu_rightbus { + status = "okay"; + + events { + ppmu_rightbus_3: ppmu-event3-rightbus { + event-name = "ppmu-event3-rightbus"; + }; + }; +}; + &pinctrl_0 { pinctrl-names = "default"; pinctrl-0 = <&sleep0>; -- cgit v1.2.3