From d3e11b4d6ffd363747ac6e6b5522baa9ca5a20c0 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 14 Apr 2017 13:00:36 +0200 Subject: x86/intel_rdt: Move CBM specific data into a struct Memory bandwidth allocation requires different information than cache allocation. To avoid a lump of data in struct rdt_resource, move all cache related information into a seperate structure and add that to struct rdt_resource. Sanitize the data types while at it. Signed-off-by: Thomas Gleixner Cc: ravi.v.shankar@intel.com Cc: tony.luck@intel.com Cc: fenghua.yu@intel.com Cc: vikas.shivappa@intel.com --- arch/x86/include/asm/intel_rdt.h | 49 ++++++++++++++++++++++++---------------- 1 file changed, 29 insertions(+), 20 deletions(-) (limited to 'arch/x86/include') diff --git a/arch/x86/include/asm/intel_rdt.h b/arch/x86/include/asm/intel_rdt.h index 55e0459b9a03..ae61b0fd55bc 100644 --- a/arch/x86/include/asm/intel_rdt.h +++ b/arch/x86/include/asm/intel_rdt.h @@ -73,37 +73,46 @@ struct rftype { char *buf, size_t nbytes, loff_t off); }; +/** + * struct rdt_cache - Cache allocation related data + * @cbm_len: Length of the cache bit mask + * @min_cbm_bits: Minimum number of consecutive bits to be set + * @cbm_idx_mult: Multiplier of CBM index + * @cbm_idx_offset: Offset of CBM index. CBM index is computed by: + * closid * cbm_idx_multi + cbm_idx_offset + * in a cache bit mask + */ +struct rdt_cache { + unsigned int cbm_len; + unsigned int min_cbm_bits; + unsigned int cbm_idx_mult; + unsigned int cbm_idx_offset; +}; + /** * struct rdt_resource - attributes of an RDT resource - * @enabled: Is this feature enabled on this machine - * @capable: Is this feature available on this machine - * @name: Name to use in "schemata" file - * @num_closid: Number of CLOSIDs available - * @default_ctrl: Specifies default cache cbm or mem b/w percent. - * @data_width: Character width of data when displaying - * @min_cbm_bits: Minimum number of consecutive bits to be set - * in a cache bit mask - * @domains: All domains for this resource - * @msr_base: Base MSR address for CBMs - * @cache_level: Which cache level defines scope of this domain - * @cbm_idx_multi: Multiplier of CBM index - * @cbm_idx_offset: Offset of CBM index. CBM index is computed by: - * closid * cbm_idx_multi + cbm_idx_offset + * @enabled: Is this feature enabled on this machine + * @capable: Is this feature available on this machine + * @name: Name to use in "schemata" file + * @num_closid: Number of CLOSIDs available + * @cache_level: Which cache level defines scope of this resource + * @default_ctrl: Specifies default cache cbm or memory B/W percent. + * @msr_base: Base MSR address for CBMs + * @data_width: Character width of data when displaying + * @domains: All domains for this resource + * @cache: Cache allocation related data */ struct rdt_resource { bool enabled; bool capable; char *name; int num_closid; - int cbm_len; - int min_cbm_bits; + int cache_level; u32 default_ctrl; + unsigned int msr_base; int data_width; struct list_head domains; - int msr_base; - int cache_level; - int cbm_idx_multi; - int cbm_idx_offset; + struct rdt_cache cache; }; /** -- cgit v1.2.3