From 39fd09320b2d952c360b430c70846f8fa0244a51 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 1 Apr 2009 16:25:33 -0500 Subject: powerpc: Move SPEFSCR defines to common header SPEFSCR is a user space register and doesn't conflict with anything. Moving the defines of the various bit fields makes some emulation code have fewer ifdefs Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/reg.h | 30 ++++++++++++++++++++++++++++++ arch/powerpc/include/asm/reg_booke.h | 30 ------------------------------ 2 files changed, 30 insertions(+), 30 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index c9ff1ec97479..e8018d540e87 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -143,6 +143,36 @@ #define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ #define FPSCR_RN 0x00000003 /* FPU rounding control */ +/* Bit definitions for SPEFSCR. */ +#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */ +#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */ +#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */ +#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */ +#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */ +#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */ +#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */ +#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */ +#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */ +#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */ +#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */ +#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */ +#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */ +#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */ +#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */ +#define SPEFSCR_OV 0x00004000 /* Integer overflow */ +#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */ +#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */ +#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */ +#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */ +#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */ +#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */ +#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */ +#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */ +#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */ +#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */ +#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */ +#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ + /* Special Purpose Registers (SPRNs)*/ #define SPRN_CTR 0x009 /* Count Register */ #define SPRN_DSCR 0x11 diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index a56f4d61aa72..601ddbc46002 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -423,36 +423,6 @@ #define SGR_NORMAL 0 /* Speculative fetching allowed. */ #define SGR_GUARDED 1 /* Speculative fetching disallowed. */ -/* Bit definitions for SPEFSCR. */ -#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */ -#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */ -#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */ -#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */ -#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */ -#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */ -#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */ -#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */ -#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */ -#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */ -#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */ -#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */ -#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */ -#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */ -#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */ -#define SPEFSCR_OV 0x00004000 /* Integer overflow */ -#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */ -#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */ -#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */ -#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */ -#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */ -#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */ -#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */ -#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */ -#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */ -#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */ -#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */ -#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ - /* * The IBM-403 is an even more odd special case, as it is much * older than the IBM-405 series. We put these down here incase someone -- cgit v1.2.3 From e60f57f50f861f29052e0e3563ac453da53f2181 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 2 Apr 2009 16:17:36 -0500 Subject: powerpc/math-emu: Change types to work on ppc64 While normally we don't use the math emulation code on ppc64 it can be useful for doing things like emulating the embedded FP instructions. Since performance isn't critical in this scenario its easier to keep the sizes of the various math-emu the same as on ppc32. Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/sfp-machine.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/sfp-machine.h b/arch/powerpc/include/asm/sfp-machine.h index 3d9f831c3c55..3a7a67a0d006 100644 --- a/arch/powerpc/include/asm/sfp-machine.h +++ b/arch/powerpc/include/asm/sfp-machine.h @@ -29,9 +29,9 @@ /* basic word size definitions */ #define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long +#define _FP_W_TYPE unsigned int +#define _FP_WS_TYPE signed int +#define _FP_I_TYPE int #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2)) #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1)) -- cgit v1.2.3 From d91e4ea7047d96733d763f1626f1f21ff4298cef Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 7 Jan 2009 15:53:29 -0600 Subject: powerpc: Add support for CoreInt delivery of interrupts on MPIC CoreInt provides a mechansim to deliver the IRQ vector directly into the core on an interrupt (via the SPR EPR) rather than having to go IACK on the PIC. This is suppose to provide an improvment in interrupt latency by reducing the time to get the IRQ vector. Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/mpic.h | 12 ++++++++++++ arch/powerpc/sysdev/mpic.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 46 insertions(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index c2ccca53b991..a002682f3a6d 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -22,6 +22,14 @@ #define MPIC_GREG_FEATURE_1 0x00010 #define MPIC_GREG_GLOBAL_CONF_0 0x00020 #define MPIC_GREG_GCONF_RESET 0x80000000 +/* On the FSL mpic implementations the Mode field is expand to be + * 2 bits wide: + * 0b00 = pass through (interrupts routed to IRQ0) + * 0b01 = Mixed mode + * 0b10 = reserved + * 0b11 = External proxy / coreint + */ +#define MPIC_GREG_GCONF_COREINT 0x60000000 #define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 #define MPIC_GREG_GCONF_NO_BIAS 0x10000000 #define MPIC_GREG_GCONF_BASE_MASK 0x000fffff @@ -357,6 +365,8 @@ struct mpic #define MPIC_BROKEN_FRR_NIRQS 0x00000800 /* Destination only supports a single CPU at a time */ #define MPIC_SINGLE_DEST_CPU 0x00001000 +/* Enable CoreInt delivery of interrupts */ +#define MPIC_ENABLE_COREINT 0x00002000 /* MPIC HW modification ID */ #define MPIC_REGSET_MASK 0xf0000000 @@ -470,6 +480,8 @@ extern void mpic_end_irq(unsigned int irq); extern unsigned int mpic_get_one_irq(struct mpic *mpic); /* This one gets from the primary mpic */ extern unsigned int mpic_get_irq(void); +/* This one gets from the primary mpic via CoreInt*/ +extern unsigned int mpic_get_coreint_irq(void); /* Fetch Machine Check interrupt from primary mpic */ extern unsigned int mpic_get_mcirq(void); diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 532e205303a2..21b956701596 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -1170,6 +1170,12 @@ struct mpic * __init mpic_alloc(struct device_node *node, mb(); } + /* CoreInt */ + if (flags & MPIC_ENABLE_COREINT) + mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), + mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) + | MPIC_GREG_GCONF_COREINT); + if (flags & MPIC_ENABLE_MCK) mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) @@ -1525,6 +1531,34 @@ unsigned int mpic_get_irq(void) return mpic_get_one_irq(mpic); } +unsigned int mpic_get_coreint_irq(void) +{ +#ifdef CONFIG_BOOKE + struct mpic *mpic = mpic_primary; + u32 src; + + BUG_ON(mpic == NULL); + + src = mfspr(SPRN_EPR); + + if (unlikely(src == mpic->spurious_vec)) { + if (mpic->flags & MPIC_SPV_EOI) + mpic_eoi(mpic); + return NO_IRQ; + } + if (unlikely(mpic->protected && test_bit(src, mpic->protected))) { + if (printk_ratelimit()) + printk(KERN_WARNING "%s: Got protected source %d !\n", + mpic->name, (int)src); + return NO_IRQ; + } + + return irq_linear_revmap(mpic->irqhost, src); +#else + return NO_IRQ; +#endif +} + unsigned int mpic_get_mcirq(void) { struct mpic *mpic = mpic_primary; -- cgit v1.2.3 From 85701e6ac1b75d983610c24cfdaafdaaf56cfbb2 Mon Sep 17 00:00:00 2001 From: Huang Weiyi Date: Tue, 31 Mar 2009 02:41:18 +0000 Subject: powerpc: Remove duplicated #include's Remove duplicated #include's in - arch/powerpc/include/asm/ps3fb.h - arch/powerpc/kernel/setup-common.c Signed-off-by: Huang Weiyi Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/ps3fb.h | 1 - arch/powerpc/kernel/setup-common.c | 1 - 2 files changed, 2 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/ps3fb.h b/arch/powerpc/include/asm/ps3fb.h index 90dbefb8cfc4..e7233a849680 100644 --- a/arch/powerpc/include/asm/ps3fb.h +++ b/arch/powerpc/include/asm/ps3fb.h @@ -21,7 +21,6 @@ #include #include -#include /* ioctl */ #define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index 9774f9fed96e..02fed27af7f6 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3 From 0559f0a7611bdd336b7297dce179f793b565f148 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Tue, 31 Mar 2009 20:12:44 +0000 Subject: powerpc/pseries: Add dispatch dispersion statistics PHYP tells us how often a shared processor dispatch changed physical cpus. This can highlight performance problems caused by the hypervisor. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/lppaca.h | 2 +- arch/powerpc/kernel/lparcfg.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index 68235f7e4a8f..d2a65e8ca6ae 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h @@ -125,7 +125,7 @@ struct lppaca { // NOTE: This value will ALWAYS be zero for dedicated processors and // will NEVER be zero for shared processors (ie, initialized to a 1). volatile u32 yield_count; // PLIC increments each dispatchx00-x03 - u32 reserved6; + volatile u32 dispersion_count; // dispatch changed phys cpu x04-x07 volatile u64 cmo_faults; // CMO page fault count x08-x0F volatile u64 cmo_fault_time; // CMO page fault time x10-x17 u8 reserved7[104]; // Reserved x18-x7F diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 182e0f642f36..78b3f7840ade 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c @@ -434,6 +434,21 @@ static void pseries_cmo_data(struct seq_file *m) seq_printf(m, "cmo_page_size=%lu\n", cmo_get_page_size()); } +static void splpar_dispatch_data(struct seq_file *m) +{ + int cpu; + unsigned long dispatches = 0; + unsigned long dispatch_dispersions = 0; + + for_each_possible_cpu(cpu) { + dispatches += lppaca[cpu].yield_count; + dispatch_dispersions += lppaca[cpu].dispersion_count; + } + + seq_printf(m, "dispatches=%lu\n", dispatches); + seq_printf(m, "dispatch_dispersions=%lu\n", dispatch_dispersions); +} + static int pseries_lparcfg_data(struct seq_file *m, void *v) { int partition_potential_processors; @@ -460,6 +475,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v) parse_ppp_data(m); parse_mpp_data(m); pseries_cmo_data(m); + splpar_dispatch_data(m); seq_printf(m, "purr=%ld\n", get_purr()); } else { /* non SPLPAR case */ -- cgit v1.2.3 From 4a9f9506e7cbee58d2b86329e68e4d37761bb608 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Tue, 31 Mar 2009 20:13:27 +0000 Subject: powerpc/pseries: Scan for all events in rtasd Instead of checking for known events, pass in all 1s so we handle future event types. We were currently missing the IO event type. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/rtas.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h index 0aa0315fb7e8..01c12339b304 100644 --- a/arch/powerpc/include/asm/rtas.h +++ b/arch/powerpc/include/asm/rtas.h @@ -68,7 +68,8 @@ struct rtas_t { #define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */ #define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */ #define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */ -#define RTAS_EVENT_SCAN_ALL_EVENTS 0xf0000000 +#define RTAS_IO_EVENTS 0x08000000 /* set bit 4 */ +#define RTAS_EVENT_SCAN_ALL_EVENTS 0xffffffff /* RTAS event severity */ #define RTAS_SEVERITY_FATAL 0x5 -- cgit v1.2.3 From 1a917bb549deb0b6bcb0321db22e9c27525a1e3d Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Mon, 6 Apr 2009 17:19:50 +0000 Subject: powerpc: Wire up preadv and pwritev [paulus@samba.org: changed to use syscall numbers 320 and 321 since perf_counters is currently using 319.] Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/systbl.h | 3 +++ arch/powerpc/include/asm/unistd.h | 4 +++- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h index fe166491e9dc..d98a30dfd41c 100644 --- a/arch/powerpc/include/asm/systbl.h +++ b/arch/powerpc/include/asm/systbl.h @@ -322,3 +322,6 @@ SYSCALL_SPU(epoll_create1) SYSCALL_SPU(dup3) SYSCALL_SPU(pipe2) SYSCALL(inotify_init1) +SYSCALL(ni_syscall) +COMPAT_SYS_SPU(preadv) +COMPAT_SYS_SPU(pwritev) diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h index e07d0c76ed77..3f06f8ec81c5 100644 --- a/arch/powerpc/include/asm/unistd.h +++ b/arch/powerpc/include/asm/unistd.h @@ -341,10 +341,12 @@ #define __NR_dup3 316 #define __NR_pipe2 317 #define __NR_inotify_init1 318 +#define __NR_preadv 320 +#define __NR_pwritev 321 #ifdef __KERNEL__ -#define __NR_syscalls 319 +#define __NR_syscalls 322 #define __NR__exit __NR_exit #define NR_syscalls __NR_syscalls -- cgit v1.2.3 From 11b55da700eb77905f1c2dde3a0cbeedc665a753 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 6 Apr 2009 17:21:10 +0000 Subject: powerpc: Fix oops when loading modules This fixes a problem reported by Sean MacLennan where loading any module would cause an oops. We weren't marking the pages containing the module text as having hardware execute permission, due to a bug introduced in commit 8d1cf34e ("powerpc/mm: Tweak PTE bit combination definitions"), hence trying to execute the module text caused an exception on processors that support hardware execute permission. This adds _PAGE_HWEXEC to the definitions of PAGE_KERNEL_X and PAGE_KERNEL_ROX to fix this problem. Reported-by: Sean MacLennan Signed-off-by: Paul Mackerras --- arch/powerpc/include/asm/pte-common.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h index d9740e886801..a7e210b6b48c 100644 --- a/arch/powerpc/include/asm/pte-common.h +++ b/arch/powerpc/include/asm/pte-common.h @@ -151,9 +151,11 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); _PAGE_NO_CACHE) #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \ _PAGE_NO_CACHE | _PAGE_GUARDED) -#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC) +#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC | \ + _PAGE_HWEXEC) #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO) -#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC) +#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC | \ + _PAGE_HWEXEC) /* Protection used for kernel text. We want the debuggers to be able to * set breakpoints anywhere, so don't write protect the kernel text -- cgit v1.2.3