From 44def3426e4ac5a2dbdb5c8304397f4daa38eb2f Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Mon, 24 Aug 2020 18:32:45 +0200 Subject: MIPS: Convert R4600_V2_HIT_CACHEOP into a config option Use a new config option to enable R4600 V2 cacheop hit workaround and remove define from different war.h files. Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/mach-generic/war.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/mips/include/asm/mach-generic') diff --git a/arch/mips/include/asm/mach-generic/war.h b/arch/mips/include/asm/mach-generic/war.h index 44d14be2e1e5..4d46a880b832 100644 --- a/arch/mips/include/asm/mach-generic/war.h +++ b/arch/mips/include/asm/mach-generic/war.h @@ -8,7 +8,6 @@ #ifndef __ASM_MACH_GENERIC_WAR_H #define __ASM_MACH_GENERIC_WAR_H -#define R4600_V2_HIT_CACHEOP_WAR 0 #define BCM1250_M3_WAR 0 #define SIBYTE_1956_WAR 0 #define MIPS4K_ICACHE_REFILL_WAR 0 -- cgit v1.2.3