From 1b6012394bec5dc653d495245c5495db08f817f6 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Wed, 4 Dec 2013 15:27:47 +0800 Subject: blackfin: Support L1 SRAM parity checking feature on bf60x Move code for the SEC faults from the IRQ hanlders into IRQ actions. refine bfin fault routine handle Signed-off-by: Sonic Zhang Signed-off-by: Steven Miao --- arch/blackfin/mach-bf609/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/blackfin/mach-bf609') diff --git a/arch/blackfin/mach-bf609/Kconfig b/arch/blackfin/mach-bf609/Kconfig index b0fca44110b0..6584190faeb8 100644 --- a/arch/blackfin/mach-bf609/Kconfig +++ b/arch/blackfin/mach-bf609/Kconfig @@ -17,6 +17,12 @@ config SEC_IRQ_PRIORITY_LEVELS Divide the total number of interrupt priority levels into sub-levels. There is 2 ^ (SEC_IRQ_PRIORITY_LEVELS + 1) different levels. +config L1_PARITY_CHECK + bool "Enable L1 parity check" + default n + help + Enable the L1 parity check in L1 sram. A fault event is raised + when L1 parity error is found. comment "System Cross Bar Priority Assignment" -- cgit v1.2.3