From ec4c54584c504f98c77073c6795936e96f278a15 Mon Sep 17 00:00:00 2001 From: Roman Beranek Date: Fri, 5 May 2023 07:21:08 +0200 Subject: ARM: dts: sunxi: rename tcon's clock output While the rate of TCON0's DCLK matches dotclock for parallel and LVDS outputs, this doesn't hold for DSI. According manuals from Allwinner, DCLK is an abbreviation of Data Clock, not dotclock, so go with that instead. Signed-off-by: Roman Beranek Acked-by: Jernej Skrabec Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/20230505052110.67514-3-me@crly.cz Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun5i.dtsi | 2 +- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +- arch/arm/boot/dts/sun8i-a83t.dtsi | 2 +- arch/arm/boot/dts/sun8i-v3s.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 250d6b87ab4d..2f901a013676 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -286,7 +286,7 @@ clock-names = "ahb", "tcon-ch0", "tcon-ch1"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; status = "disabled"; diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi index 4aa9d88c9ea3..cd4bf60dbb3c 100644 --- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi @@ -190,7 +190,7 @@ clock-names = "ahb", "tcon-ch0", "lvds-alt"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_LCD>, <&ccu RST_BUS_LVDS>; diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 82fdb04122ca..94eb3bfc989e 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -456,7 +456,7 @@ interrupts = ; clocks = <&ccu CLK_BUS_TCON0>, <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>; reset-names = "lcd", "lvds"; diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index b001251644f7..3b9a282c2746 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -191,7 +191,7 @@ <&ccu CLK_TCON0>; clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; + clock-output-names = "tcon-data-clock"; #clock-cells = <0>; resets = <&ccu RST_BUS_TCON0>; reset-names = "lcd"; -- cgit v1.2.3 From de2bdfb7f79d5c655eb056d459e02be2c7f13c8b Mon Sep 17 00:00:00 2001 From: Ludwig Kormann Date: Wed, 10 May 2023 13:15:28 +0200 Subject: arm: dts: sunxi: Add ICnova A20 ADB4006 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add board support for ICnova A20 SomPi compute module on ICnova ADB4006 development board. Specification: SoM - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz - 512MB DDR3 RAM - Fast Ethernet (Phy: Realtek RTL8201CP) ADB4006 - I2C - 2x USB 2.0 - 1x Fast Ethernet port - 1x SATA - 2x buttons (PWRON, Boot) - 2x LEDS - serial console - HDMI - µSD-Card slot - Audio Line-In / Line-Out - GPIO pinheaders https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006 https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM Reviewed-by: Andre Przywara Signed-off-by: Ludwig Kormann Reviewed-by: Jernej Skrabec Link: https://lore.kernel.org/r/20230510111528.2155582-3-ludwig.kormann@ict42.de Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun7i-a20-icnova-a20-adb4006.dts | 137 +++++++++++++++++++++ arch/arm/boot/dts/sun7i-a20-icnova-a20.dtsi | 62 ++++++++++ 3 files changed, 200 insertions(+) create mode 100644 arch/arm/boot/dts/sun7i-a20-icnova-a20-adb4006.dts create mode 100644 arch/arm/boot/dts/sun7i-a20-icnova-a20.dtsi (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 59829fc90315..b4e10c379edf 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1335,6 +1335,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-hummingbird.dtb \ sun7i-a20-itead-ibox.dtb \ sun7i-a20-i12-tvbox.dtb \ + sun7i-a20-icnova-a20-adb4006.dtb \ sun7i-a20-icnova-swac.dtb \ sun7i-a20-lamobo-r1.dtb \ sun7i-a20-linutronix-testbox-v2.dtb \ diff --git a/arch/arm/boot/dts/sun7i-a20-icnova-a20-adb4006.dts b/arch/arm/boot/dts/sun7i-a20-icnova-a20-adb4006.dts new file mode 100644 index 000000000000..577ead1d02a0 --- /dev/null +++ b/arch/arm/boot/dts/sun7i-a20-icnova-a20-adb4006.dts @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2023 In-Circuit GmbH + +/dts-v1/; + +#include "sun7i-a20-icnova-a20.dtsi" + +#include +#include + +/ { + model = "In-Circuit ICnova A20 ADB4006"; + compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20", + "allwinner,sun7i-a20"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + function = LED_FUNCTION_POWER; + color = ; + gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */ + default-state = "on"; + }; + + led-1 { + function = LED_FUNCTION_HEARTBEAT; + color = ; + gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */ + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&ahci { + target-supply = <®_ahci_5v>; + status = "okay"; +}; + +&codec { + status = "okay"; +}; + +&de { + status = "okay"; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&mmc0 { + vmmc-supply = <®_vcc3v3>; + bus-width = <4>; + cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +®_ahci_5v { + status = "okay"; +}; + +&ac_power_supply { + status = "okay"; +}; + +®_usb1_vbus { + status = "okay"; +}; + +®_usb2_vbus { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */ + usb0_vbus_det-gpios = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */ + usb1_vbus-supply = <®_usb1_vbus>; + usb2_vbus-supply = <®_usb2_vbus>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/sun7i-a20-icnova-a20.dtsi b/arch/arm/boot/dts/sun7i-a20-icnova-a20.dtsi new file mode 100644 index 000000000000..46616c6bc899 --- /dev/null +++ b/arch/arm/boot/dts/sun7i-a20-icnova-a20.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// Copyright (C) 2023 In-Circuit GmbH + +#include "sun7i-a20.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_mii_pins>; + phy-handle = <&phy1>; + phy-mode = "mii"; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + axp209: pmic@34 { + reg = <0x34>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&gmac_mdio { + phy1: ethernet-phy@1 { + reg = <1>; + }; +}; + +#include "axp209.dtsi" + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-cpu"; +}; + +®_dcdc3 { + regulator-always-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1400000>; + regulator-name = "vdd-int-dll"; +}; + +®_ldo1 { + regulator-name = "vdd-rtc"; +}; + +®_ldo2 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; -- cgit v1.2.3 From efb09e4ea81a7d513e3c4c81b8108c2b8066bc66 Mon Sep 17 00:00:00 2001 From: Jonathan McDowell Date: Wed, 10 May 2023 13:01:43 +0100 Subject: ARM: dts: sun5i: chip: Enable bluetooth The C.H.I.P has an rtl8723bs device with the bluetooth interface hooked up on UART3. Support for this didn't exist in mainline when the DTS was initially added, but it does now, so enable it. Signed-off-by: Jonathan McDowell Acked-by: Jernej Skrabec Link: https://lore.kernel.org/r/49ff7f3cc79838a55a89baae09a4ba12c88573fb.1683719613.git.noodles@earth.li Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun5i-r8-chip.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i-r8-chip.dts b/arch/arm/boot/dts/sun5i-r8-chip.dts index fd37bd1f3920..4192c23848c3 100644 --- a/arch/arm/boot/dts/sun5i-r8-chip.dts +++ b/arch/arm/boot/dts/sun5i-r8-chip.dts @@ -255,6 +255,12 @@ pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>; status = "okay"; + + bluetooth { + compatible = "realtek,rtl8723bs-bt"; + device-wake-gpios = <&axp_gpio 3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */ + }; }; &usb_otg { -- cgit v1.2.3 From c7ea52ed614227a3e3eaafdbd7b477d0129ab6ed Mon Sep 17 00:00:00 2001 From: Jonathan McDowell Date: Wed, 10 May 2023 13:02:02 +0100 Subject: ARM: dts: sun5i: Add port E pinmux settings for mmc2 These alternate pins for mmc2 are brought out to the 40 pin U14 header on the C.H.I.P and can be used to add an external MMC device with a 4 bit interface. See https://byteporter.com/ntc-chip-micro-sd-slot/ for further details on how. Signed-off-by: Jonathan McDowell Reviewed-by: Jernej Skrabec Link: https://lore.kernel.org/r/7949169f581cab37175602188f44bc26e79a45c0.1683719613.git.noodles@earth.li Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/sun5i.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi index 2f901a013676..d7c7b454a11a 100644 --- a/arch/arm/boot/dts/sun5i.dtsi +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -517,6 +517,15 @@ bias-pull-up; }; + /omit-if-no-ref/ + mmc2_4bit_pe_pins: mmc2-4bit-pe-pins { + pins = "PE4", "PE5", "PE6", "PE7", + "PE8", "PE9"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + mmc2_8bit_pins: mmc2-8bit-pins { pins = "PC6", "PC7", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", -- cgit v1.2.3 From 09d199b6dcb6bd94a1f00cfbfa1ee7d3841444b0 Mon Sep 17 00:00:00 2001 From: Jonathan McDowell Date: Wed, 10 May 2023 13:02:28 +0100 Subject: ARM: dts: axp209: Add iio-hwmon node for internal temperature This adds a DT node to hook up the internal temperature ADC to the iio-hwmon driver. The various voltage + current ADCs are consumed and exposed by their respective drivers, but this is not and is always available. Naming chosen to match the axp20x_ prefix the power sensors use. Signed-off-by: Jonathan McDowell Reviewed-by: Jernej Skrabec Link: https://lore.kernel.org/r/2a9bd53a65c4a154cccba622c60cbffcdceaeb95.1683719613.git.noodles@earth.li Signed-off-by: Jernej Skrabec --- arch/arm/boot/dts/axp209.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi index ca240cd6f6c3..469d0f7d5185 100644 --- a/arch/arm/boot/dts/axp209.dtsi +++ b/arch/arm/boot/dts/axp209.dtsi @@ -48,6 +48,13 @@ * http://dl.linux-sunxi.org/AXP/AXP209%20Datasheet%20v1.0_cn.pdf */ +/ { + pmic-temp { + compatible = "iio-hwmon"; + io-channels = <&axp_adc 4>; /* Internal temperature */ + }; +}; + &axp209 { compatible = "x-powers,axp209"; interrupt-controller; -- cgit v1.2.3