From 016655121e7a17cd83fde4109293dd8954f9c371 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 15 Aug 2016 11:31:32 -0600 Subject: arm64: tegra: Simplify Tegra210 GPIO compatible value The compatible value need only include an entry for the specific HW generation, plus the oldest HW version that introduced changes it is backwards-compatible with; intermediate versions aren't necessary. Since Tegra124 GPIO is backwards-compatible with Tegra30 GPIO, there's no need to include the Tegra124 value in the Tegra210 DTS. This makes the kernel DT better match the copy of the DT files included in U-Boot. Signed-off-by: Stephen Warren Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index c4cfdcf60d26..e3cd50d2715d 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -325,7 +325,7 @@ }; gpio: gpio@6000d000 { - compatible = "nvidia,tegra210-gpio", "nvidia,tegra124-gpio", "nvidia,tegra30-gpio"; + compatible = "nvidia,tegra210-gpio", "nvidia,tegra30-gpio"; reg = <0x0 0x6000d000 0x0 0x1000>; interrupts = , , -- cgit v1.2.3 From 98313c940a622eec4c31c93d924a6c21ae57b29b Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 16 Aug 2016 14:40:57 +0100 Subject: arm64: tegra: Drop clock and reset names for XUSB powergates Drop the clock and reset names for the Tegra210 XUSB powergates because these are not currently used and not required by the Tegra PMC binding documentation. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index e3cd50d2715d..b49639441cf0 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -650,25 +650,19 @@ pd_xusbss: xusba { clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; - clock-names = "xusb-ss"; resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; - reset-names = "xusb-ss"; #power-domain-cells = <0>; }; pd_xusbdev: xusbb { clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>; - clock-names = "xusb-dev"; resets = <&tegra_car 95>; - reset-names = "xusb-dev"; #power-domain-cells = <0>; }; pd_xusbhost: xusbc { clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>; - clock-names = "xusb-host"; resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>; - reset-names = "xusb-host"; #power-domain-cells = <0>; }; }; -- cgit v1.2.3 From bcdbde433542234378219a77bfb549842439a505 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:16 +0100 Subject: arm64: tegra: Add AGIC node for Tegra210 Populate the Audio GIC (AGIC) node for Tegra210. This interrupt controller is used by the Audio Processing Engine to route interrupts to the main CPU interrupt controller. The AGIC is based on the ARM GIC400 and so uses the clock name "clk" as specified by the GIC binding document for GIC400 devices. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index b49639441cf0..0820073a3222 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -955,6 +955,18 @@ #size-cells = <1>; ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; status = "disabled"; + + agic: agic@702f9000 { + compatible = "nvidia,tegra210-agic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x702f9000 0x2000>, + <0x702fa000 0x2000>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_APE>; + clock-names = "clk"; + status = "disabled"; + }; }; spi@70410000 { -- cgit v1.2.3 From 19e61213f6a5897819a7cbfeb6c5ee25f0a7035f Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:17 +0100 Subject: arm64: tegra: Add ADMA node for Tegra210 Populate the ADMA node for Tegra210. The ADMA is used by the Audio Processing Engine (APE) on Tegra210 for moving data between the APE and system memory. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 0820073a3222..9f9bf23cadb0 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -956,6 +956,38 @@ ranges = <0x702c0000 0x0 0x702c0000 0x00040000>; status = "disabled"; + adma: dma@702e2000 { + compatible = "nvidia,tegra210-adma"; + reg = <0x702e2000 0x2000>; + interrupt-parent = <&agic>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + #dma-cells = <1>; + clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; + clock-names = "d_audio"; + status = "disabled"; + }; + agic: agic@702f9000 { compatible = "nvidia,tegra210-agic"; #interrupt-cells = <3>; -- cgit v1.2.3 From 96d1f078ff05046ba1670c3dce353afe38f81065 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:18 +0100 Subject: arm64: tegra: Add SOR power-domain for Tegra210 Add node for SOR power-domain for Tegra210 and populate the SOR power-domain phandle for DPAUX, DSI, MIPI-CAL and SOR and nodes that are dependent on this power-domain. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 9f9bf23cadb0..f6739797150a 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -34,6 +34,7 @@ clock-names = "dpaux", "parent"; resets = <&tegra_car 207>; reset-names = "dpaux"; + power-domains = <&pd_sor>; status = "disabled"; state_dpaux1_aux: pinmux-aux { @@ -108,6 +109,7 @@ clock-names = "dsi", "lp", "parent"; resets = <&tegra_car 48>; reset-names = "dsi"; + power-domains = <&pd_sor>; nvidia,mipi-calibrate = <&mipi 0x0c0>; /* DSIA & DSIB pads */ status = "disabled"; @@ -137,6 +139,7 @@ clock-names = "dsi", "lp", "parent"; resets = <&tegra_car 82>; reset-names = "dsi"; + power-domains = <&pd_sor>; nvidia,mipi-calibrate = <&mipi 0x300>; /* DSIC & DSID pads */ status = "disabled"; @@ -178,6 +181,7 @@ pinctrl-1 = <&state_dpaux_i2c>; pinctrl-2 = <&state_dpaux_off>; pinctrl-names = "aux", "i2c", "off"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -197,6 +201,7 @@ pinctrl-1 = <&state_dpaux1_i2c>; pinctrl-2 = <&state_dpaux1_off>; pinctrl-names = "aux", "i2c", "off"; + power-domains = <&pd_sor>; status = "disabled"; }; @@ -209,6 +214,7 @@ clock-names = "dpaux", "parent"; resets = <&tegra_car 181>; reset-names = "dpaux"; + power-domains = <&pd_sor>; status = "disabled"; state_dpaux_aux: pinmux-aux { @@ -648,6 +654,26 @@ #power-domain-cells = <0>; }; + pd_sor: sor { + clocks = <&tegra_car TEGRA210_CLK_SOR0>, + <&tegra_car TEGRA210_CLK_SOR1>, + <&tegra_car TEGRA210_CLK_CSI>, + <&tegra_car TEGRA210_CLK_DSIA>, + <&tegra_car TEGRA210_CLK_DSIB>, + <&tegra_car TEGRA210_CLK_DPAUX>, + <&tegra_car TEGRA210_CLK_DPAUX1>, + <&tegra_car TEGRA210_CLK_MIPI_CAL>; + resets = <&tegra_car TEGRA210_CLK_SOR0>, + <&tegra_car TEGRA210_CLK_SOR1>, + <&tegra_car TEGRA210_CLK_CSI>, + <&tegra_car TEGRA210_CLK_DSIA>, + <&tegra_car TEGRA210_CLK_DSIB>, + <&tegra_car TEGRA210_CLK_DPAUX>, + <&tegra_car TEGRA210_CLK_DPAUX1>, + <&tegra_car TEGRA210_CLK_MIPI_CAL>; + #power-domain-cells = <0>; + }; + pd_xusbss: xusba { clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>; resets = <&tegra_car TEGRA210_CLK_XUSB_SS>; @@ -942,6 +968,7 @@ reg = <0x0 0x700e3000 0x0 0x100>; clocks = <&tegra_car TEGRA210_CLK_MIPI_CAL>; clock-names = "mipi-cal"; + power-domains = <&pd_sor>; #nvidia,mipi-calibrate-cells = <1>; }; -- cgit v1.2.3 From 9fab004dcb3aa451a580e6362346d2f00daaccbe Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:19 +0100 Subject: arm64: tegra: Add ACONNECT, ADMA and AGIC nodes Tegra210 Smaug Populate the ACONNECT, ADMA and AGIC nodes for Tegra210 Smaug which are used for audio use-cases. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 431266a48e9c..2d50a889ddff 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1574,6 +1574,18 @@ status = "okay"; }; + aconnect@702c0000 { + status = "okay"; + + dma@702e2000 { + status = "okay"; + }; + + agic@702f9000 { + status = "okay"; + }; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; -- cgit v1.2.3 From b4f10afdad56b94ffe076b3c68b3d74d5fc95a44 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:20 +0100 Subject: arm64: tegra: Enable DPAUX for Tegra210 Smaug The Tegra210 Smaug uses I2C6 for interfacing to various audio chips. I2C6 shares pads with the DPAUX interface and to allow I2C6 to request the pads owned by DPAUX, the DPAUX device needs to be enabled. Enable DPAUX for Tegra210 Smaug. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 2d50a889ddff..2c4672527d75 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -27,6 +27,12 @@ reg = <0x0 0x80000000 0x0 0xc0000000>; }; + host1x@50000000 { + dpaux: dpaux@545c0000 { + status = "okay"; + }; + }; + pinmux: pinmux@700008d4 { pinctrl-names = "boot"; pinctrl-0 = <&state_boot>; -- cgit v1.2.3 From 3ce510a06aea6cf8964e9fc1037c80f8434210fd Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:21 +0100 Subject: arm64: tegra: Add the various audio devices for Tegra210 Smaug The Tegra210 Smaug includes the Realtek RT5677 audio codec, Nuvoton NAU8825 headset codec and the Maxim MAX98357a audio amplifier. Add the nodes for these devices for the Tegra210 Smaug. Signed-off-by: Jon Hunter [treding@nvidia.com: use interrupts property consistently] Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 45 +++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 2c4672527d75..393af9f5d56b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1562,6 +1562,46 @@ }; }; + i2c@7000d100 { + status = "okay"; + clock-frequency = <400000>; + + nau8825@1a { + compatible = "nuvoton,nau8825"; + reg = <0x1a>; + interrupt-parent = <&gpio>; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_CLK_OUT_2>; + clock-names = "mclk"; + + nuvoton,jkdet-enable; + nuvoton,jkdet-polarity = ; + nuvoton,vref-impedance = <2>; + nuvoton,micbias-voltage = <6>; + nuvoton,sar-threshold-num = <4>; + nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; + nuvoton,sar-hysteresis = <1>; + nuvoton,sar-voltage = <0>; + nuvoton,sar-compare-time = <0>; + nuvoton,sar-sampling-time = <0>; + nuvoton,short-key-debounce = <2>; + nuvoton,jack-insert-debounce = <7>; + nuvoton,jack-eject-debounce = <7>; + status = "okay"; + }; + + audio-codec@2d { + compatible = "realtek,rt5677"; + reg = <0x2d>; + interrupt-parent = <&gpio>; + interrupts = ; + realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>; + gpio-controller; + #gpio-cells = <2>; + status = "okay"; + }; + }; + pmc@7000e400 { nvidia,invert-interrupt; nvidia,suspend-mode = <0>; @@ -1664,6 +1704,11 @@ }; }; + max98357a { + compatible = "maxim,max98357a"; + status = "okay"; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; -- cgit v1.2.3 From 4d3457826abb14ae07ea6a0e500d838181eada25 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Tue, 9 Aug 2016 16:21:22 +0100 Subject: arm64: tegra: Enable XUSB controller on Tegra210 Smaug Enable the XUSB controller on Tegra210 Smaug. The Smaug has a USB Type-C connector with one of the USB2.0 lanes and one of the USB3.0 lanes populated. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 57 +++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts index 393af9f5d56b..c2becb603e11 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts @@ -1614,6 +1614,63 @@ status = "okay"; }; + usb@70090000 { + phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, + <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; + phy-names = "usb2-0", "usb3-0"; + + dvddio-pex-supply = <&avddio_1v05>; + hvddio-pex-supply = <&pp1800>; + avdd-usb-supply = <&pp3300>; + avdd-pll-utmip-supply = <&pp1800>; + avdd-pll-uerefe-supply = <&pp1050_avdd>; + dvdd-pex-pll-supply = <&avddio_1v05>; + hvdd-pex-pll-e-supply = <&pp1800>; + + status = "okay"; + }; + + padctl@7009f000 { + status = "okay"; + + pads { + usb2 { + status = "okay"; + + lanes { + usb2-0 { + nvidia,function = "xusb"; + status = "okay"; + }; + }; + }; + + pcie { + status = "okay"; + + lanes { + pcie-6 { + nvidia,function = "usb3-ss"; + status = "okay"; + }; + }; + }; + }; + + ports { + usb2-0 { + status = "okay"; + vbus-supply = <&usbc_vbus>; + mode = "otg"; + }; + + usb3-0 { + nvidia,usb2-companion = <0>; + status = "okay"; + }; + }; + }; + sdhci@700b0600 { bus-width = <8>; non-removable; -- cgit v1.2.3 From 988232412e6711a9bbdc06d4e008b552bbf7cd06 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Wed, 30 Mar 2016 10:15:16 +0100 Subject: arm64: tegra: Select PM_GENERIC_DOMAINS Enable PM_GENERIC_DOMAINS for 64-bit Tegra devices. This is required to ensure that devices dependent upon a particular power domain are probed only after that power domain has been powered up. Signed-off-by: Jon Hunter Reviewed-by: Ulf Hansson Signed-off-by: Thierry Reding --- arch/arm64/Kconfig.platforms | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index bb2616b16157..0a7620c4b9dd 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -161,6 +161,8 @@ config ARCH_TEGRA select GENERIC_CLOCKEVENTS select HAVE_CLK select PINCTRL + select PM + select PM_GENERIC_DOMAINS select RESET_CONTROLLER help This enables support for the NVIDIA Tegra SoC family. -- cgit v1.2.3