From 5dc289e08a4d0704583d8df70181cbeb47c817d9 Mon Sep 17 00:00:00 2001 From: AngeloGioacchino Del Regno Date: Tue, 21 Nov 2023 13:50:43 +0100 Subject: arm64: dts: mediatek: mt8192: Add Smart Voltage Scaling node Add the MediaTek SVS node: this will lower the voltage of various components of the SoC based on chip quality (read from fuses) in order to save power and generate less heat. Link: https://lore.kernel.org/r/20231121125044.78642-20-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi index 238f6eb25832..6dd32dbfb832 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -809,6 +809,18 @@ #thermal-sensor-cells = <1>; }; + svs: svs@1100bc00 { + compatible = "mediatek,mt8192-svs"; + reg = <0 0x1100bc00 0 0x400>; + interrupts = ; + clocks = <&infracfg CLK_INFRA_THERM>; + clock-names = "main"; + nvmem-cells = <&svs_calibration>, <&lvts_e_data1>; + nvmem-cell-names = "svs-calibration-data", "t-calibration-data"; + resets = <&infracfg MT8192_INFRA_RST3_THERM_CTRL_PTP_SWRST>; + reset-names = "svs_rst"; + }; + pwm0: pwm@1100e000 { compatible = "mediatek,mt8183-disp-pwm"; reg = <0 0x1100e000 0 0x1000>; -- cgit v1.2.3