From 32b5f4b63487a24712c3bfa1d6a8eb9257beb8bd Mon Sep 17 00:00:00 2001 From: Martin Blumenstingl Date: Sat, 20 Jun 2020 18:23:47 +0200 Subject: arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock Add the "timing-adjustment" clock now that we know how it is connected to the PRG_ETHERNET registers. It is used internally to generate the RGMII RX delay on the MAC side (if needed). Signed-off-by: Martin Blumenstingl Signed-off-by: Kevin Hilman Reviewed-by: Neil Armstrong Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts/amlogic/meson-gxl.dtsi') diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index fe7aaf8873f2..beb5fc79d186 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -131,8 +131,9 @@ ðmac { clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; mdio0: mdio { #address-cells = <1>; -- cgit v1.2.3