From f91f9cd505f92e4227ffda7e5799a33d4f34bf36 Mon Sep 17 00:00:00 2001
From: Oskar Schirmer <oskar@linutronix.de>
Date: Thu, 17 Feb 2011 16:43:02 +0100
Subject: arm: tcc8k: Fix bus clock calculation
There are two dividers used to derive bus clock from system clock:
system clock is divided by SCKDIV+1, then by BCKDIV+1. SCKDIV divider
has been ignored up to now, which is no problem as long as it is 0.
Take SCKDIV into account for bus clock calculation.
Signed-off-by: Oskar Schirmer <oskar@linutronix.de>
Cc: bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/arm/mach-tcc8k/clock.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
(limited to 'arch/arm/mach-tcc8k/clock.c')
diff --git a/arch/arm/mach-tcc8k/clock.c b/arch/arm/mach-tcc8k/clock.c
index 8d8c99f89558..e7cdae5c77a4 100644
--- a/arch/arm/mach-tcc8k/clock.c
+++ b/arch/arm/mach-tcc8k/clock.c
@@ -308,10 +308,17 @@ static unsigned long get_rate_sys(struct clk *clk)
static unsigned long get_rate_bus(struct clk *clk)
{
- unsigned int div;
+ unsigned int reg, sdiv, bdiv, rate;
- div = (__raw_readl(CKC_BASE + CLKCTRL_OFFS) >> 4) & 0xff;
- return get_rate_sys(clk) / (div + 1);
+ reg = __raw_readl(CKC_BASE + CLKCTRL_OFFS);
+ rate = get_rate_sys(clk);
+ sdiv = (reg >> 20) & 3;
+ if (sdiv)
+ rate /= sdiv + 1;
+ bdiv = (reg >> 4) & 0xff;
+ if (bdiv)
+ rate /= bdiv + 1;
+ return rate;
}
static unsigned long get_rate_cpu(struct clk *clk)
--
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