From 34e12121f9f46dbeda1017cac4615c96ffe16c6d Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:44:48 +0900 Subject: ARM: shmobile: Remove unused headers from hotplug.c This file has no SoC-specific references in it, and fortunately it is still independent of OF so there is no real reason to drag in these headers. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/hotplug.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/hotplug.c b/arch/arm/mach-shmobile/hotplug.c index a1524e3367b0..efd0b36a4175 100644 --- a/arch/arm/mach-shmobile/hotplug.c +++ b/arch/arm/mach-shmobile/hotplug.c @@ -14,12 +14,8 @@ #include #include #include -#include #include -#include -#include #include -#include static cpumask_t dead_cpus; -- cgit v1.2.3 From d62242d7f63d6c874f783d8a691534080df1cb59 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:44:57 +0900 Subject: ARM: shmobile: Remove partial CPU Hotplug from EMEV2 Remove partial CPU hotplug support from EMEV2 SMP code. The upstream EMEV2 SMP support code has no CPU shutdown or reset ability so we cannot reboot the secondary CPU cores. Regular SMP operation is however still working as expected. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-emev2.c | 28 ---------------------------- 1 file changed, 28 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 953eb1f9388d..72620b1f87c8 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -62,29 +62,6 @@ static unsigned int __init emev2_get_core_count(void) return scu_base ? scu_get_core_count(scu_base) : 1; } -static int emev2_platform_cpu_kill(unsigned int cpu) -{ - return 0; /* not supported yet */ -} - -static int __maybe_unused emev2_cpu_kill(unsigned int cpu) -{ - int k; - - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. - */ - for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) - return emev2_platform_cpu_kill(cpu); - mdelay(1); - } - - return 0; -} - - static void __cpuinit emev2_secondary_init(unsigned int cpu) { gic_secondary_init(0); @@ -126,9 +103,4 @@ struct smp_operations emev2_smp_ops __initdata = { .smp_prepare_cpus = emev2_smp_prepare_cpus, .smp_secondary_init = emev2_secondary_init, .smp_boot_secondary = emev2_boot_secondary, -#ifdef CONFIG_HOTPLUG_CPU - .cpu_kill = emev2_cpu_kill, - .cpu_die = shmobile_cpu_die, - .cpu_disable = shmobile_cpu_disable, -#endif }; -- cgit v1.2.3 From da252b8ee542e95d35374b1d31006f8fe5d59f6a Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:45:06 +0900 Subject: ARM: shmobile: Move EMEV2 CPU boot vector setup code Move the boot vector setup code for the EMEV2 SoC to match the sh73a0 and r8a7779 implementations. With this in place all SoC specific SMP implementations for mach-shmobile uses the ->smp_prepare_cpus() callback to setup the boot vector. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-emev2.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 72620b1f87c8..64278215adaa 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -74,9 +74,6 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * /* enable cache coherency */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); - /* Tell ROM loader about our vector (in headsmp.S) */ - emev2_set_boot_vector(__pa(shmobile_secondary_vector)); - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); return 0; } @@ -87,6 +84,9 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) scu_enable(scu_base); + /* Tell ROM loader about our vector (in headsmp.S) */ + emev2_set_boot_vector(__pa(shmobile_secondary_vector)); + /* enable cache coherency on CPU0 */ modify_scu_cpu_psr(0, 3 << (cpu * 8)); } -- cgit v1.2.3 From f313ae4e98f2c0825a5a808e4b822214836b5085 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:45:16 +0900 Subject: ARM: shmobile: Remove sh73a0_get_core_count() Reduce the number of lines of code in smp-sh73a0.c by getting rid of the sh73a0_get_core_count() function. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index acb46a94ccdf..81c0f4ba1846 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -52,13 +52,6 @@ void __init sh73a0_register_twd(void) } #endif -static unsigned int __init sh73a0_get_core_count(void) -{ - void __iomem *scu_base = scu_base_addr(); - - return scu_get_core_count(scu_base); -} - static void __cpuinit sh73a0_secondary_init(unsigned int cpu) { gic_secondary_init(0); @@ -90,7 +83,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) static void __init sh73a0_smp_init_cpus(void) { - unsigned int ncores = sh73a0_get_core_count(); + unsigned int ncores = scu_get_core_count(scu_base_addr()); shmobile_smp_init_cpus(ncores); } -- cgit v1.2.3 From 0ae56a951de0efbf36a51de5b2e91db10425c771 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:45:25 +0900 Subject: ARM: shmobile: Remove r8a7779_get_core_count() Reduce the number of lines of code in smp-r8a7779.c by getting rid of the r8a7779_get_core_count() function. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 3a4acf23edcf..f46b51658c3a 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -87,13 +87,6 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) __raw_writel(tmp, scu_base + 8); } -static unsigned int __init r8a7779_get_core_count(void) -{ - void __iomem *scu_base = scu_base_addr(); - - return scu_get_core_count(scu_base); -} - static int r8a7779_platform_cpu_kill(unsigned int cpu) { struct r8a7779_pm_ch *ch = NULL; @@ -178,7 +171,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) static void __init r8a7779_smp_init_cpus(void) { - unsigned int ncores = r8a7779_get_core_count(); + unsigned int ncores = scu_get_core_count(scu_base_addr()); shmobile_smp_init_cpus(ncores); } -- cgit v1.2.3 From 2f747dbab424396b797d8abfb5d54c5e19003885 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 00:45:34 +0900 Subject: ARM: shmobile: Remove emev2_get_core_count() Reduce the number of lines of code in smp-emev2.c by getting rid of the emev2_get_core_count() function. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-emev2.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 64278215adaa..4ede41339a70 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -50,18 +50,6 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) } -static unsigned int __init emev2_get_core_count(void) -{ - if (!scu_base) { - scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); - emev2_clock_init(); /* need ioremapped SMU */ - } - - WARN_ON_ONCE(!scu_base); - - return scu_base ? scu_get_core_count(scu_base) : 1; -} - static void __cpuinit emev2_secondary_init(unsigned int cpu) { gic_secondary_init(0); @@ -93,7 +81,14 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) static void __init emev2_smp_init_cpus(void) { - unsigned int ncores = emev2_get_core_count(); + unsigned int ncores; + + if (!scu_base) { + scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); + emev2_clock_init(); /* need ioremapped SMU */ + } + + ncores = scu_base ? scu_get_core_count(scu_base) : 1; shmobile_smp_init_cpus(ncores); } -- cgit v1.2.3 From df2ddd7b9b781f0aee7fc90e6bed21e62ebf7564 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Fri, 8 Feb 2013 19:38:25 +0100 Subject: ARM: shmobile: add MMCIF and SDHI DT clock aliases to sh73a0 and r8a7740 Add clock lookup entries for SDHI and MMCIF device names, for the FDT case. Signed-off-by: Guennadi Liakhovetski Acked-by: Laurent Pinchart Acked-by: Linus Walleij [horms+renesas@verge.net.au: resolved trivial conflict in clock-r8a7740.c] Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7740.c | 4 ++++ arch/arm/mach-shmobile/clock-sh73a0.c | 3 +++ 2 files changed, 7 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 19ce885a3b43..1a9b9a29442a 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -611,11 +611,15 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP320]), CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), + CLKDEV_DEV_ID("e6850000.sdhi", &mstp_clks[MSTP314]), CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), + CLKDEV_DEV_ID("e6860000.sdhi", &mstp_clks[MSTP313]), CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]), + CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP309]), CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), + CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), /* ICK */ CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]), diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index afa5423a0f93..5fa106b61149 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -581,10 +581,13 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e6822000.i2c", &mstp_clks[MSTP323]), /* I2C1 */ CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP322]), /* USB */ CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ + CLKDEV_DEV_ID("ee100000.sdhi", &mstp_clks[MSTP314]), /* SDHI0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ + CLKDEV_DEV_ID("ee120000.sdhi", &mstp_clks[MSTP313]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ + CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */ CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ -- cgit v1.2.3 From c58a1545e39ed1ff54dd2c167d3d25ae62c0dbd3 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 29 Jan 2013 14:21:46 +0900 Subject: ARM: mach-shmobile: r8a7779: Allow initialisation of GIC by DT This allows the GIC interrupt controller of the r8a7779 SoC to be initialised using a flattened device tree blob. Signed-off-by: Simon Horman --- v3 * Fix copy-paste error and use unique reg values for each CPU v2 As suggested by Mark Rutland * Add reg and device_type to cpus * Remove #address-cells from gic --- arch/arm/boot/dts/r8a7779.dtsi | 50 ++++++++++++++++++++++++++++ arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/intc-r8a7779.c | 27 +++++++++++---- 3 files changed, 72 insertions(+), 6 deletions(-) create mode 100644 arch/arm/boot/dts/r8a7779.dtsi (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi new file mode 100644 index 000000000000..8c6d52cee6c6 --- /dev/null +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -0,0 +1,50 @@ +/* + * Device Tree Source for Renesas r8a7740 + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Simon Horman + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "renesas,r8a7779"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <3>; + }; + }; + + gic: interrupt-controller@f0001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xf0001000 0x1000>, + <0xf0000100 0x100>; + }; +}; diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index e48606d8a2be..3f067100bb05 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -59,6 +59,7 @@ extern void r8a7740_pinmux_init(void); extern void r8a7740_pm_init(void); extern void r8a7779_init_irq(void); +extern void r8a7779_init_irq_dt(void); extern void r8a7779_map_io(void); extern void r8a7779_earlytimer_init(void); extern void r8a7779_add_early_devices(void); diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c index 8807c27f71f9..f9cc4bc9c798 100644 --- a/arch/arm/mach-shmobile/intc-r8a7779.c +++ b/arch/arm/mach-shmobile/intc-r8a7779.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -43,13 +44,8 @@ static int r8a7779_set_wake(struct irq_data *data, unsigned int on) return 0; /* always allow wakeup */ } -void __init r8a7779_init_irq(void) +static void __init r8a7779_init_irq_common(void) { - void __iomem *gic_dist_base = IOMEM(0xf0001000); - void __iomem *gic_cpu_base = IOMEM(0xf0000100); - - /* use GIC to handle interrupts */ - gic_init(0, 29, gic_dist_base, gic_cpu_base); gic_arch_extn.irq_set_wake = r8a7779_set_wake; /* route all interrupts to ARM */ @@ -63,3 +59,22 @@ void __init r8a7779_init_irq(void) __raw_writel(0xbffffffc, INT2SMSKCR3); __raw_writel(0x003fee3f, INT2SMSKCR4); } + +void __init r8a7779_init_irq(void) +{ + void __iomem *gic_dist_base = IOMEM(0xf0001000); + void __iomem *gic_cpu_base = IOMEM(0xf0000100); + + /* use GIC to handle interrupts */ + gic_init(0, 29, gic_dist_base, gic_cpu_base); + + r8a7779_init_irq_common(); +} + +#ifdef CONFIG_OF +void __init r8a7779_init_irq_dt(void) +{ + irqchip_init(); + r8a7779_init_irq_common(); +} +#endif -- cgit v1.2.3 From 10e8d4f6dddb0f9dc408c2f2bde8399b243a42ca Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Wed, 21 Nov 2012 22:00:15 +0900 Subject: ARM: mach-shmobile: r8a7779: Minimal setup using DT Allow a minimal setup of the r8a7779 SoC using a flattened device tree. In particular, configure the i2c and ethernet controllers using a flattened device tree. SCI serial controller and TMU clock source, whose drivers do not yet support configuration using a flattened device tree, are still configured using C code in order to allow booting of a board with this SoC. The ethernet controller also requires a regulator which is a board property. A sample snippet DT for the marzen board is as follows: /dts-v1/; /include/ "r8a7779.dtsi" / { fixedregulator3v3: fixedregulator@0 { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; &lan0 { vddvario-supply = <&fixedregulator3v3>; vdd33a-supply = <&fixedregulator3v3>; }; Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7779.dtsi | 45 +++++++++++++++++++++ arch/arm/mach-shmobile/include/mach/common.h | 2 + arch/arm/mach-shmobile/setup-r8a7779.c | 59 +++++++++++++++++++++++++--- 3 files changed, 100 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi index 8c6d52cee6c6..2913759e93e2 100644 --- a/arch/arm/boot/dts/r8a7779.dtsi +++ b/arch/arm/boot/dts/r8a7779.dtsi @@ -47,4 +47,49 @@ reg = <0xf0001000 0x1000>, <0xf0000100 0x100>; }; + + i2c0: i2c@0xffc70000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc70000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 79 0x4>; + }; + + i2c1: i2c@0xffc71000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc71000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 82 0x4>; + }; + + i2c2: i2c@0xffc72000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc72000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 80 0x4>; + }; + + i2c3: i2c@0xffc73000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc73000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 81 0x4>; + }; + + lan0: lan0@18000000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x18000000 0x100>; + phy-mode = "mii"; + interrupt-parent = <&gic>; + interrupts = <0 28 0x4>; + reg-io-width = <4>; + }; }; diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 3f067100bb05..c72d301a8d98 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -63,7 +63,9 @@ extern void r8a7779_init_irq_dt(void); extern void r8a7779_map_io(void); extern void r8a7779_earlytimer_init(void); extern void r8a7779_add_early_devices(void); +extern void r8a7779_add_early_devices_dt(void); extern void r8a7779_add_standard_devices(void); +extern void r8a7779_add_standard_devices_dt(void); extern void r8a7779_clock_init(void); extern void r8a7779_pinmux_init(void); extern void r8a7779_pm_init(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index c54ff9b29fe5..922dd4db21a0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -321,7 +322,7 @@ static struct platform_device i2c3_device = { .num_resources = ARRAY_SIZE(rcar_i2c3_res), }; -static struct platform_device *r8a7779_early_devices[] __initdata = { +static struct platform_device *r8a7779_early_devices_dt[] __initdata = { &scif0_device, &scif1_device, &scif2_device, @@ -330,15 +331,15 @@ static struct platform_device *r8a7779_early_devices[] __initdata = { &scif5_device, &tmu00_device, &tmu01_device, +}; + +static struct platform_device *r8a7779_early_devices[] __initdata = { &i2c0_device, &i2c1_device, &i2c2_device, &i2c3_device, }; -static struct platform_device *r8a7779_late_devices[] __initdata = { -}; - void __init r8a7779_add_standard_devices(void) { #ifdef CONFIG_CACHE_L2X0 @@ -349,10 +350,10 @@ void __init r8a7779_add_standard_devices(void) r8a7779_init_pm_domains(); + platform_add_devices(r8a7779_early_devices_dt, + ARRAY_SIZE(r8a7779_early_devices_dt)); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); - platform_add_devices(r8a7779_late_devices, - ARRAY_SIZE(r8a7779_late_devices)); } /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ @@ -367,6 +368,8 @@ void __init r8a7779_earlytimer_init(void) void __init r8a7779_add_early_devices(void) { + early_platform_add_devices(r8a7779_early_devices_dt, + ARRAY_SIZE(r8a7779_early_devices_dt)); early_platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); @@ -386,3 +389,47 @@ void __init r8a7779_add_early_devices(void) * command line in case of the marzen board. */ } + +#ifdef CONFIG_USE_OF +void __init r8a7779_add_early_devices_dt(void) +{ + shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ + + early_platform_add_devices(r8a7779_early_devices_dt, + ARRAY_SIZE(r8a7779_early_devices_dt)); + + /* Early serial console setup is not included here. + * See comment in r8a7779_add_early_devices(). + */ +} + +static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = { + {}, +}; + +void __init r8a7779_add_standard_devices_dt(void) +{ + /* clocks are setup late during boot in the case of DT */ + r8a7779_clock_init(); + + platform_add_devices(r8a7779_early_devices_dt, + ARRAY_SIZE(r8a7779_early_devices_dt)); + of_platform_populate(NULL, of_default_bus_match_table, + r8a7779_auxdata_lookup, NULL); +} + +static const char *r8a7779_compat_dt[] __initdata = { + "renesas,r8a7779", + NULL, +}; + +DT_MACHINE_START(SH73A0_DT, "Generic R8A7779 (Flattened Device Tree)") + .map_io = r8a7779_map_io, + .init_early = r8a7779_add_early_devices_dt, + .nr_irqs = NR_IRQS_LEGACY, + .init_irq = r8a7779_init_irq_dt, + .init_machine = r8a7779_add_standard_devices_dt, + .init_time = shmobile_timer_init, + .dt_compat = r8a7779_compat_dt, +MACHINE_END +#endif /* CONFIG_USE_OF */ -- cgit v1.2.3 From aa8d3bb177a3ba64407d98c75d5c6c5130ff2182 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:46:38 +0900 Subject: ARM: shmobile: Kill off sh73a0 scu_base_addr() function Replace scu_base_addr() with a static shmobile_scu_base variable and introduce SH73A0_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 81c0f4ba1846..0757f4a94bf5 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -39,13 +39,12 @@ #define PSTR_SHUTDOWN_MODE 3 -static void __iomem *scu_base_addr(void) -{ - return (void __iomem *)0xf0000000; -} +#define SH73A0_SCU_BASE IOMEM(0xf0000000) + +static void __iomem *shmobile_scu_base; #ifdef CONFIG_HAVE_ARM_TWD -static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); +static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29); void __init sh73a0_register_twd(void) { twd_local_timer_register(&twd_local_timer); @@ -71,21 +70,22 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) { - scu_enable(scu_base_addr()); + scu_enable(shmobile_scu_base); /* Map the reset vector (in headsmp-sh73a0.S) */ __raw_writel(0, APARMBAREA); /* 4k */ __raw_writel(__pa(sh73a0_secondary_vector), SBAR); /* enable cache coherency on booting CPU */ - scu_power_mode(scu_base_addr(), SCU_PM_NORMAL); + scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); } static void __init sh73a0_smp_init_cpus(void) { - unsigned int ncores = scu_get_core_count(scu_base_addr()); + /* setup sh73a0 specific SCU base */ + shmobile_scu_base = SH73A0_SCU_BASE; - shmobile_smp_init_cpus(ncores); + shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base)); } #ifdef CONFIG_HOTPLUG_CPU @@ -121,7 +121,7 @@ static void sh73a0_cpu_die(unsigned int cpu) flush_cache_all(); /* Set power off mode. This takes the CPU out of the MP cluster */ - scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF); + scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); /* Enter shutdown mode */ cpu_do_idle(); -- cgit v1.2.3 From 3b94afa38350ad5b592df5b6539a20a253e04b53 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:46:48 +0900 Subject: ARM: shmobile: Kill off r8a7779 scu_base_addr() function Replace scu_base_addr() with a static shmobile_scu_base variable and introduce R8A7779_SCU_BASE. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index f46b51658c3a..d92188d702ab 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -31,6 +31,9 @@ #include #define AVECR IOMEM(0xfe700040) +#define R8A7779_SCU_BASE IOMEM(0xf0000000) + +static void __iomem *shmobile_scu_base; static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ @@ -56,11 +59,6 @@ static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = { [3] = &r8a7779_ch_cpu3, }; -static void __iomem *scu_base_addr(void) -{ - return (void __iomem *)0xf0000000; -} - static DEFINE_SPINLOCK(scu_lock); static unsigned long tmp; @@ -75,7 +73,7 @@ void __init r8a7779_register_twd(void) static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) { - void __iomem *scu_base = scu_base_addr(); + void __iomem *scu_base = shmobile_scu_base; spin_lock(&scu_lock); tmp = __raw_readl(scu_base + 8); @@ -153,7 +151,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) { int cpu = cpu_logical_map(0); - scu_enable(scu_base_addr()); + scu_enable(shmobile_scu_base); /* Map the reset vector (in headsmp.S) */ __raw_writel(__pa(shmobile_secondary_vector), AVECR); @@ -171,9 +169,10 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) static void __init r8a7779_smp_init_cpus(void) { - unsigned int ncores = scu_get_core_count(scu_base_addr()); + /* setup r8a7779 specific SCU base */ + shmobile_scu_base = R8A7779_SCU_BASE; - shmobile_smp_init_cpus(ncores); + shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base)); } struct smp_operations r8a7779_smp_ops __initdata = { -- cgit v1.2.3 From d8a28ed1bc06128f8761b332c74759db1dc7d82c Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:46:57 +0900 Subject: ARM: shmobile: Rework EMEV2 scu_base variable Rename the static scu_base variable into shmobile_scu_base. Later in the series the shmobile_scu_base variable will be made into a global variable so this is preparation only. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-emev2.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 4ede41339a70..136867ea1e93 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -32,8 +32,9 @@ #define EMEV2_SCU_BASE 0x1e000000 +static void __iomem *shmobile_scu_base; + static DEFINE_SPINLOCK(scu_lock); -static void __iomem *scu_base; static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) { @@ -42,10 +43,10 @@ static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) /* we assume this code is running on a different cpu * than the one that is changing coherency setting */ spin_lock(&scu_lock); - tmp = readl(scu_base + 8); + tmp = readl(shmobile_scu_base + 8); tmp &= ~clr; tmp |= set; - writel(tmp, scu_base + 8); + writel(tmp, shmobile_scu_base + 8); spin_unlock(&scu_lock); } @@ -70,7 +71,7 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) { int cpu = cpu_logical_map(0); - scu_enable(scu_base); + scu_enable(shmobile_scu_base); /* Tell ROM loader about our vector (in headsmp.S) */ emev2_set_boot_vector(__pa(shmobile_secondary_vector)); @@ -83,12 +84,12 @@ static void __init emev2_smp_init_cpus(void) { unsigned int ncores; - if (!scu_base) { - scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); + if (!shmobile_scu_base) { + shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); emev2_clock_init(); /* need ioremapped SMU */ } - ncores = scu_base ? scu_get_core_count(scu_base) : 1; + ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1; shmobile_smp_init_cpus(ncores); } -- cgit v1.2.3 From ec0d84a8d5522aaed3f932caff30a0b165c8cf44 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:47:07 +0900 Subject: ARM: shmobile: Move headsmp-sh73a0.S to headsmp-scu.S Rename headsmp-sh73a0.S into headsmp-scu.S and introduce shmobile_secondary_vector_scu(). The goal is to be able to share the function above between all mach-shmobile SoCs that use SCU for SMP. So far only sh73a0 use this. At this time the SCU base address is still hard coded in headsmp-scu.S to 0xf0000000, but this will be changed in the future. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 2 +- arch/arm/mach-shmobile/headsmp-scu.S | 50 ++++++++++++++++++++++++++++ arch/arm/mach-shmobile/include/mach/common.h | 2 +- arch/arm/mach-shmobile/smp-sh73a0.c | 4 +-- 4 files changed, 54 insertions(+), 4 deletions(-) create mode 100644 arch/arm/mach-shmobile/headsmp-scu.S (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index e1fac57514b9..245a8736754a 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o # SMP objects smp-y := platsmp.o headsmp.o smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o -smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-sh73a0.o +smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S new file mode 100644 index 000000000000..4ee287d9c508 --- /dev/null +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -0,0 +1,50 @@ +/* + * Shared SCU setup for mach-shmobile + * + * Copyright (C) 2012 Bastian Hecht + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + + __CPUINIT +/* + * Reset vector for secondary CPUs. + * + * First we turn on L1 cache coherency for our CPU. Then we jump to + * shmobile_invalidate_start that invalidates the cache and hands over control + * to the common ARM startup code. + * This function will be mapped to address 0 by the SBAR register. + * A normal branch is out of range here so we need a long jump. We jump to + * the physical address as the MMU is still turned off. + */ + .align 12 +ENTRY(shmobile_secondary_vector_scu) + mrc p15, 0, r0, c0, c0, 5 @ read MIPDR + and r0, r0, #3 @ mask out cpu ID + lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits + mov r1, #0xf0000000 @ SCU base address + ldr r2, [r1, #8] @ SCU Power Status Register + mov r3, #3 + bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) + str r2, [r1, #8] @ write back + + ldr pc, 1f +1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET +ENDPROC(shmobile_secondary_vector_scu) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index c72d301a8d98..20acf000b46b 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -8,6 +8,7 @@ extern void shmobile_setup_delay(unsigned int max_cpu_core_mhz, struct twd_local_timer; extern void shmobile_setup_console(void); extern void shmobile_secondary_vector(void); +extern void shmobile_secondary_vector_scu(void); struct clk; extern int shmobile_clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); @@ -44,7 +45,6 @@ extern void sh73a0_add_standard_devices_dt(void); extern void sh73a0_clock_init(void); extern void sh73a0_pinmux_init(void); extern void sh73a0_pm_init(void); -extern void sh73a0_secondary_vector(void); extern struct clk sh73a0_extal1_clk; extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 0757f4a94bf5..de7518f745f0 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -72,9 +72,9 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) { scu_enable(shmobile_scu_base); - /* Map the reset vector (in headsmp-sh73a0.S) */ + /* Map the reset vector (in headsmp-scu.S) */ __raw_writel(0, APARMBAREA); /* 4k */ - __raw_writel(__pa(sh73a0_secondary_vector), SBAR); + __raw_writel(__pa(shmobile_secondary_vector_scu), SBAR); /* enable cache coherency on booting CPU */ scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); -- cgit v1.2.3 From 4c8228455d1008136d748e6973dd72578bab4697 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:47:17 +0900 Subject: ARM: shmobile: Common shmobile_scu_base in headsmp-scu.S Update the code in headsmp-scu.S to use a global shmobile_scu_base variable both for convenient SCU base address storage and for the early SCU setup code in shmobile_secondary_vector_scu. With this patch applied r8a7779, sh73a0 and EMEV2 all make use of the global shmobile_scu_base variable. However only sh73a0 makes use of the SCU bring up code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 4 +-- arch/arm/mach-shmobile/headsmp-scu.S | 8 ++++- arch/arm/mach-shmobile/headsmp-sh73a0.S | 50 ---------------------------- arch/arm/mach-shmobile/include/mach/common.h | 1 + arch/arm/mach-shmobile/smp-emev2.c | 2 -- arch/arm/mach-shmobile/smp-r8a7779.c | 2 -- arch/arm/mach-shmobile/smp-sh73a0.c | 2 -- 7 files changed, 10 insertions(+), 59 deletions(-) delete mode 100644 arch/arm/mach-shmobile/headsmp-sh73a0.S (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index 245a8736754a..d7d20579bef7 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -16,8 +16,8 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o smp-y := platsmp.o headsmp.o smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o -smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o -smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o +smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o +smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o # IRQ objects obj-$(CONFIG_ARCH_SH7372) += entry-intc.o diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S index 4ee287d9c508..0b9317062b2a 100644 --- a/arch/arm/mach-shmobile/headsmp-scu.S +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -39,7 +39,8 @@ ENTRY(shmobile_secondary_vector_scu) mrc p15, 0, r0, c0, c0, 5 @ read MIPDR and r0, r0, #3 @ mask out cpu ID lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits - mov r1, #0xf0000000 @ SCU base address + ldr r1, =shmobile_scu_base + ldr r1, [r1] @ SCU base address ldr r2, [r1, #8] @ SCU Power Status Register mov r3, #3 bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) @@ -48,3 +49,8 @@ ENTRY(shmobile_secondary_vector_scu) ldr pc, 1f 1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET ENDPROC(shmobile_secondary_vector_scu) + + .text + .globl shmobile_scu_base +shmobile_scu_base: + .space 4 diff --git a/arch/arm/mach-shmobile/headsmp-sh73a0.S b/arch/arm/mach-shmobile/headsmp-sh73a0.S deleted file mode 100644 index bec4c0d9b713..000000000000 --- a/arch/arm/mach-shmobile/headsmp-sh73a0.S +++ /dev/null @@ -1,50 +0,0 @@ -/* - * SMP support for SoC sh73a0 - * - * Copyright (C) 2012 Bastian Hecht - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - - __CPUINIT -/* - * Reset vector for secondary CPUs. - * - * First we turn on L1 cache coherency for our CPU. Then we jump to - * shmobile_invalidate_start that invalidates the cache and hands over control - * to the common ARM startup code. - * This function will be mapped to address 0 by the SBAR register. - * A normal branch is out of range here so we need a long jump. We jump to - * the physical address as the MMU is still turned off. - */ - .align 12 -ENTRY(sh73a0_secondary_vector) - mrc p15, 0, r0, c0, c0, 5 @ read MIPDR - and r0, r0, #3 @ mask out cpu ID - lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits - mov r1, #0xf0000000 @ SCU base address - ldr r2, [r1, #8] @ SCU Power Status Register - mov r3, #3 - bic r2, r2, r3, lsl r0 @ Clear bits of our CPU (Run Mode) - str r2, [r1, #8] @ write back - - ldr pc, 1f -1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET -ENDPROC(sh73a0_secondary_vector) diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 20acf000b46b..84dcaa4279b2 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -95,6 +95,7 @@ extern int shmobile_cpu_is_dead(unsigned int cpu); static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; } #endif +extern void __iomem *shmobile_scu_base; extern void shmobile_smp_init_cpus(unsigned int ncores); static inline void __init shmobile_init_late(void) diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 136867ea1e93..bc8e071d55c6 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -32,8 +32,6 @@ #define EMEV2_SCU_BASE 0x1e000000 -static void __iomem *shmobile_scu_base; - static DEFINE_SPINLOCK(scu_lock); static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index d92188d702ab..7fd58a3a26d8 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -33,8 +33,6 @@ #define AVECR IOMEM(0xfe700040) #define R8A7779_SCU_BASE IOMEM(0xf0000000) -static void __iomem *shmobile_scu_base; - static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ .chan_bit = 1, /* ARM1 */ diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index de7518f745f0..2244fd074f72 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -41,8 +41,6 @@ #define SH73A0_SCU_BASE IOMEM(0xf0000000) -static void __iomem *shmobile_scu_base; - #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29); void __init sh73a0_register_twd(void) -- cgit v1.2.3 From 1af4b3fa1912f20a3dd1e231e90b439c0226b9b1 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:47:27 +0900 Subject: ARM: shmobile: Update EMEV2 to use scu_power_mode() Update the SMP code for EMEV2 to make use of the shared SCU function scu_power_mode() together with the early setup code in shmobile_secondary_vector_scu. With this patch in place the secondary CPUs modify the SCU setting during early boot instead of letting other CPUs deal with the coherency setting before boot. In other words, we used to setup coherency before boot in emev2_boot_secondary() but that bit is now instead handled by the code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-emev2.c | 42 ++++++++------------------------------ 1 file changed, 8 insertions(+), 34 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index bc8e071d55c6..8225c16b371b 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c @@ -28,27 +28,9 @@ #include #include #include -#include #define EMEV2_SCU_BASE 0x1e000000 -static DEFINE_SPINLOCK(scu_lock); - -static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) -{ - unsigned long tmp; - - /* we assume this code is running on a different cpu - * than the one that is changing coherency setting */ - spin_lock(&scu_lock); - tmp = readl(shmobile_scu_base + 8); - tmp &= ~clr; - tmp |= set; - writel(tmp, shmobile_scu_base + 8); - spin_unlock(&scu_lock); - -} - static void __cpuinit emev2_secondary_init(unsigned int cpu) { gic_secondary_init(0); @@ -56,36 +38,28 @@ static void __cpuinit emev2_secondary_init(unsigned int cpu) static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle) { - cpu = cpu_logical_map(cpu); - - /* enable cache coherency */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); - - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu))); return 0; } static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) { - int cpu = cpu_logical_map(0); - scu_enable(shmobile_scu_base); - /* Tell ROM loader about our vector (in headsmp.S) */ - emev2_set_boot_vector(__pa(shmobile_secondary_vector)); + /* Tell ROM loader about our vector (in headsmp-scu.S) */ + emev2_set_boot_vector(__pa(shmobile_secondary_vector_scu)); - /* enable cache coherency on CPU0 */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); + /* enable cache coherency on booting CPU */ + scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); } static void __init emev2_smp_init_cpus(void) { unsigned int ncores; - if (!shmobile_scu_base) { - shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); - emev2_clock_init(); /* need ioremapped SMU */ - } + /* setup EMEV2 specific SCU base */ + shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); + emev2_clock_init(); /* need ioremapped SMU */ ncores = shmobile_scu_base ? scu_get_core_count(shmobile_scu_base) : 1; -- cgit v1.2.3 From 342ab8741cf3da5505e0d253784d19365a2eca8f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 13 Feb 2013 22:49:47 +0900 Subject: ARM: shmobile: Make EMEV2 setup functions static Adjust emev2_init_delay() and emev2_add_standard_devices_dt() to become static. They are not used outside this file anyway. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-emev2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c index 47662a581c0a..e4545c152722 100644 --- a/arch/arm/mach-shmobile/setup-emev2.c +++ b/arch/arm/mach-shmobile/setup-emev2.c @@ -404,7 +404,7 @@ void __init emev2_add_standard_devices(void) ARRAY_SIZE(emev2_late_devices)); } -void __init emev2_init_delay(void) +static void __init emev2_init_delay(void) { shmobile_setup_delay(533, 1, 3); /* Cortex-A9 @ 533MHz */ } @@ -439,7 +439,7 @@ static const struct of_dev_auxdata emev2_auxdata_lookup[] __initconst = { { } }; -void __init emev2_add_standard_devices_dt(void) +static void __init emev2_add_standard_devices_dt(void) { of_platform_populate(NULL, of_default_bus_match_table, emev2_auxdata_lookup, NULL); -- cgit v1.2.3 From 8a444474efbe808471366fb57f31ec802846a818 Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Fri, 22 Feb 2013 18:17:51 +0100 Subject: ARM: shmobile: sh73a0: fix Z and ZG clock hierarchy Z and ZG clocks on sh73a0 have pll0 as their parent, not pll1. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-sh73a0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 5fa106b61149..71843dd39e16 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -265,12 +265,12 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, static struct clk div4_clks[DIV4_NR] = { [DIV4_I] = DIV4(FRQCRA, 20, 0xdff, CLK_ENABLE_ON_INIT), - [DIV4_ZG] = DIV4(FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT), + [DIV4_ZG] = SH_CLK_DIV4(&pll0_clk, FRQCRA, 16, 0xd7f, CLK_ENABLE_ON_INIT), [DIV4_M3] = DIV4(FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT), [DIV4_B] = DIV4(FRQCRA, 8, 0xdff, CLK_ENABLE_ON_INIT), [DIV4_M1] = DIV4(FRQCRA, 4, 0x1dff, 0), [DIV4_M2] = DIV4(FRQCRA, 0, 0x1dff, 0), - [DIV4_Z] = DIV4(FRQCRB, 24, 0x97f, 0), + [DIV4_Z] = SH_CLK_DIV4(&pll0_clk, FRQCRB, 24, 0x97f, 0), [DIV4_ZTR] = DIV4(FRQCRB, 20, 0xdff, 0), [DIV4_ZT] = DIV4(FRQCRB, 16, 0xdff, 0), [DIV4_ZX] = DIV4(FRQCRB, 12, 0xdff, 0), -- cgit v1.2.3 From 4eca134f71a5d3095b54279b7e643b3c2df9512c Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 15 Feb 2013 21:38:20 +0900 Subject: ARM: shmobile: sh73a0: Remove sh73a0_init_irq_dt() This is not needed as irq_set_wake is only used for suspend to ram which is not a requirement for bringing up boards using DT. Reported-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/intc-sh73a0.c | 8 -------- arch/arm/mach-shmobile/setup-sh73a0.c | 3 ++- 2 files changed, 2 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c index 91faba666d46..a81a1d804e2e 100644 --- a/arch/arm/mach-shmobile/intc-sh73a0.c +++ b/arch/arm/mach-shmobile/intc-sh73a0.c @@ -460,11 +460,3 @@ void __init sh73a0_init_irq(void) sh73a0_pint1_cascade.handler = sh73a0_pint1_demux; setup_irq(gic_spi(34), &sh73a0_pint1_cascade); } - -#ifdef CONFIG_OF -void __init sh73a0_init_irq_dt(void) -{ - irqchip_init(); - gic_arch_extn.irq_set_wake = sh73a0_set_wake; -} -#endif diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index bdab575f88bc..49483f4c76c5 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -921,7 +922,7 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") .map_io = sh73a0_map_io, .init_early = sh73a0_add_early_devices_dt, .nr_irqs = NR_IRQS_LEGACY, - .init_irq = sh73a0_init_irq_dt, + .init_irq = irqchip_init, .init_machine = sh73a0_add_standard_devices_dt, .init_time = shmobile_timer_init, .dt_compat = sh73a0_boards_compat_dt, -- cgit v1.2.3 From f998950788a4a488e37189b1bb056295cf1fe2f9 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 15 Feb 2013 21:38:20 +0900 Subject: ARM: shmobile: sh73a0: Add smp ops to DT_MACHINE_START This a board to be brought up with SMP enabled without a board file present. Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-sh73a0.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 49483f4c76c5..c7630aaaa260 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -919,6 +919,7 @@ static const char *sh73a0_boards_compat_dt[] __initdata = { }; DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") + .smp = smp_ops(sh73a0_smp_ops), .map_io = sh73a0_map_io, .init_early = sh73a0_add_early_devices_dt, .nr_irqs = NR_IRQS_LEGACY, -- cgit v1.2.3 From e4e240841d62e24589cc2544430fe0c62699733a Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 15 Feb 2013 21:38:20 +0900 Subject: ARM: shmobile: sh73a0: Remove warning about SMP Remove warning about SMP not working with the clock initialisation sheme used for reference DT. This is resolved by not selecting CONFIG_PREEMPT. Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-sh73a0.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index c7630aaaa260..37baa481ce3b 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -879,14 +879,6 @@ void __init sh73a0_add_early_devices(void) #ifdef CONFIG_USE_OF -/* Please note that the clock initialisation shcheme used in - * sh73a0_add_early_devices_dt() and sh73a0_add_standard_devices_dt() - * does not work with SMP as there is a yet to be resolved lock-up in - * workqueue initialisation. - * - * CONFIG_SMP should be disabled when using this code. - */ - void __init sh73a0_add_early_devices_dt(void) { shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ -- cgit v1.2.3 From 3b00f9342623a5ebc19bea663199864252bf3e93 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 19 Feb 2013 10:53:05 +0900 Subject: ARM: shmobile: sh73a0: Do not use early devices with DT reference Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 2 +- arch/arm/mach-shmobile/setup-sh73a0.c | 24 +++++++++--------------- 2 files changed, 10 insertions(+), 16 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 84dcaa4279b2..44cdeccaccd2 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -34,12 +34,12 @@ extern int sh7372_do_idle_sysc(unsigned long sleep_mode); extern struct clk sh7372_extal1_clk; extern struct clk sh7372_extal2_clk; +extern void sh73a0_init_delay(void); extern void sh73a0_init_irq(void); extern void sh73a0_init_irq_dt(void); extern void sh73a0_map_io(void); extern void sh73a0_earlytimer_init(void); extern void sh73a0_add_early_devices(void); -extern void sh73a0_add_early_devices_dt(void); extern void sh73a0_add_standard_devices(void); extern void sh73a0_add_standard_devices_dt(void); extern void sh73a0_clock_init(void); diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 37baa481ce3b..2257a915746d 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -811,7 +811,7 @@ static struct platform_device ipmmu_device = { .num_resources = ARRAY_SIZE(ipmmu_resources), }; -static struct platform_device *sh73a0_early_devices_dt[] __initdata = { +static struct platform_device *sh73a0_devices_dt[] __initdata = { &scif0_device, &scif1_device, &scif2_device, @@ -848,8 +848,8 @@ void __init sh73a0_add_standard_devices(void) /* Clear software reset bit on SY-DMAC module */ __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); - platform_add_devices(sh73a0_early_devices_dt, - ARRAY_SIZE(sh73a0_early_devices_dt)); + platform_add_devices(sh73a0_devices_dt, + ARRAY_SIZE(sh73a0_devices_dt)); platform_add_devices(sh73a0_early_devices, ARRAY_SIZE(sh73a0_early_devices)); platform_add_devices(sh73a0_late_devices, @@ -868,8 +868,8 @@ void __init sh73a0_earlytimer_init(void) void __init sh73a0_add_early_devices(void) { - early_platform_add_devices(sh73a0_early_devices_dt, - ARRAY_SIZE(sh73a0_early_devices_dt)); + early_platform_add_devices(sh73a0_devices_dt, + ARRAY_SIZE(sh73a0_devices_dt)); early_platform_add_devices(sh73a0_early_devices, ARRAY_SIZE(sh73a0_early_devices)); @@ -879,15 +879,9 @@ void __init sh73a0_add_early_devices(void) #ifdef CONFIG_USE_OF -void __init sh73a0_add_early_devices_dt(void) +void __init sh73a0_init_delay(void) { shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ - - early_platform_add_devices(sh73a0_early_devices_dt, - ARRAY_SIZE(sh73a0_early_devices_dt)); - - /* setup early console here as well */ - shmobile_setup_console(); } static const struct of_dev_auxdata sh73a0_auxdata_lookup[] __initconst = { @@ -899,8 +893,8 @@ void __init sh73a0_add_standard_devices_dt(void) /* clocks are setup late during boot in the case of DT */ sh73a0_clock_init(); - platform_add_devices(sh73a0_early_devices_dt, - ARRAY_SIZE(sh73a0_early_devices_dt)); + platform_add_devices(sh73a0_devices_dt, + ARRAY_SIZE(sh73a0_devices_dt)); of_platform_populate(NULL, of_default_bus_match_table, sh73a0_auxdata_lookup, NULL); } @@ -913,7 +907,7 @@ static const char *sh73a0_boards_compat_dt[] __initdata = { DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") .smp = smp_ops(sh73a0_smp_ops), .map_io = sh73a0_map_io, - .init_early = sh73a0_add_early_devices_dt, + .init_early = sh73a0_init_delay, .nr_irqs = NR_IRQS_LEGACY, .init_irq = irqchip_init, .init_machine = sh73a0_add_standard_devices_dt, -- cgit v1.2.3 From 916ddc355f061b636a71ee5e1d0eb977ee8a6938 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 19 Feb 2013 10:53:05 +0900 Subject: ARM: shmobile: r8a7779: Do not use early devices with DT reference Do not initialise any early devices when using the minimal DT reference code. Only the delay needs to be initialised. Cc: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 2 +- arch/arm/mach-shmobile/setup-r8a7779.c | 25 +++++++++---------------- 2 files changed, 10 insertions(+), 17 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 44cdeccaccd2..b8a4872f77b3 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -58,12 +58,12 @@ extern void r8a7740_clock_init(u8 md_ck); extern void r8a7740_pinmux_init(void); extern void r8a7740_pm_init(void); +extern void r8a7779_init_delay(void); extern void r8a7779_init_irq(void); extern void r8a7779_init_irq_dt(void); extern void r8a7779_map_io(void); extern void r8a7779_earlytimer_init(void); extern void r8a7779_add_early_devices(void); -extern void r8a7779_add_early_devices_dt(void); extern void r8a7779_add_standard_devices(void); extern void r8a7779_add_standard_devices_dt(void); extern void r8a7779_clock_init(void); diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 922dd4db21a0..b1f7a45b56b9 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -322,7 +322,7 @@ static struct platform_device i2c3_device = { .num_resources = ARRAY_SIZE(rcar_i2c3_res), }; -static struct platform_device *r8a7779_early_devices_dt[] __initdata = { +static struct platform_device *r8a7779_devices_dt[] __initdata = { &scif0_device, &scif1_device, &scif2_device, @@ -350,8 +350,8 @@ void __init r8a7779_add_standard_devices(void) r8a7779_init_pm_domains(); - platform_add_devices(r8a7779_early_devices_dt, - ARRAY_SIZE(r8a7779_early_devices_dt)); + platform_add_devices(r8a7779_devices_dt, + ARRAY_SIZE(r8a7779_devices_dt)); platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); } @@ -368,8 +368,8 @@ void __init r8a7779_earlytimer_init(void) void __init r8a7779_add_early_devices(void) { - early_platform_add_devices(r8a7779_early_devices_dt, - ARRAY_SIZE(r8a7779_early_devices_dt)); + early_platform_add_devices(r8a7779_devices_dt, + ARRAY_SIZE(r8a7779_devices_dt)); early_platform_add_devices(r8a7779_early_devices, ARRAY_SIZE(r8a7779_early_devices)); @@ -391,16 +391,9 @@ void __init r8a7779_add_early_devices(void) } #ifdef CONFIG_USE_OF -void __init r8a7779_add_early_devices_dt(void) +void __init r8a7779_init_delay(void) { shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */ - - early_platform_add_devices(r8a7779_early_devices_dt, - ARRAY_SIZE(r8a7779_early_devices_dt)); - - /* Early serial console setup is not included here. - * See comment in r8a7779_add_early_devices(). - */ } static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = { @@ -412,8 +405,8 @@ void __init r8a7779_add_standard_devices_dt(void) /* clocks are setup late during boot in the case of DT */ r8a7779_clock_init(); - platform_add_devices(r8a7779_early_devices_dt, - ARRAY_SIZE(r8a7779_early_devices_dt)); + platform_add_devices(r8a7779_devices_dt, + ARRAY_SIZE(r8a7779_devices_dt)); of_platform_populate(NULL, of_default_bus_match_table, r8a7779_auxdata_lookup, NULL); } @@ -425,7 +418,7 @@ static const char *r8a7779_compat_dt[] __initdata = { DT_MACHINE_START(SH73A0_DT, "Generic R8A7779 (Flattened Device Tree)") .map_io = r8a7779_map_io, - .init_early = r8a7779_add_early_devices_dt, + .init_early = r8a7779_init_delay, .nr_irqs = NR_IRQS_LEGACY, .init_irq = r8a7779_init_irq_dt, .init_machine = r8a7779_add_standard_devices_dt, -- cgit v1.2.3 From e792120264ee869dc98bdec3842aa5731de0705b Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 19 Feb 2013 10:53:05 +0900 Subject: ARM: shmobile: r8a7779: Do not initialise i2c as an early device It is sufficient to initialise i2c as a late device. Cc: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7779.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index b1f7a45b56b9..7f8daf17947c 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -333,7 +333,7 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = { &tmu01_device, }; -static struct platform_device *r8a7779_early_devices[] __initdata = { +static struct platform_device *r8a7779_late_devices[] __initdata = { &i2c0_device, &i2c1_device, &i2c2_device, @@ -352,8 +352,8 @@ void __init r8a7779_add_standard_devices(void) platform_add_devices(r8a7779_devices_dt, ARRAY_SIZE(r8a7779_devices_dt)); - platform_add_devices(r8a7779_early_devices, - ARRAY_SIZE(r8a7779_early_devices)); + platform_add_devices(r8a7779_late_devices, + ARRAY_SIZE(r8a7779_late_devices)); } /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ @@ -370,8 +370,6 @@ void __init r8a7779_add_early_devices(void) { early_platform_add_devices(r8a7779_devices_dt, ARRAY_SIZE(r8a7779_devices_dt)); - early_platform_add_devices(r8a7779_early_devices, - ARRAY_SIZE(r8a7779_early_devices)); /* Early serial console setup is not included here due to * memory map collisions. The SCIF serial ports in r8a7779 -- cgit v1.2.3 From 73e5709875e8b28c63ef8261d61c9eb06b499964 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:46:57 +0900 Subject: ARM: shmobile: Fix base address readout in headsmp-scu.S Rework the early SCU setup code in headsmp-scu.S to read the base address in the same way as we use to fetch the address of the invalidation function. Reported-by: Bastian Hecht Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/headsmp-scu.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S index 0b9317062b2a..7d113f898e7f 100644 --- a/arch/arm/mach-shmobile/headsmp-scu.S +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -39,7 +39,7 @@ ENTRY(shmobile_secondary_vector_scu) mrc p15, 0, r0, c0, c0, 5 @ read MIPDR and r0, r0, #3 @ mask out cpu ID lsl r0, r0, #3 @ we will shift by cpu_id * 8 bits - ldr r1, =shmobile_scu_base + ldr r1, 2f ldr r1, [r1] @ SCU base address ldr r2, [r1, #8] @ SCU Power Status Register mov r3, #3 @@ -48,6 +48,7 @@ ENTRY(shmobile_secondary_vector_scu) ldr pc, 1f 1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET +2: .long shmobile_scu_base - PAGE_OFFSET + PLAT_PHYS_OFFSET ENDPROC(shmobile_secondary_vector_scu) .text -- cgit v1.2.3 From 76853504c35ef5cf488cf6bac4b65677f3bb672e Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:07 +0900 Subject: ARM: shmobile: Rework SH73A0_SCU_BASE IOMEM() usage Rework the IOMEM() usage for the SCU base address in the case of sh73a0. Removes recently introduced build warnings: arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].start') [enabled by default] arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: initialization makes integer from pointer without a cast [enabled by default] /arch/arm/mach-shmobile/smp-sh73a0.c:45:15: warning: (near initialization for 'twd_local_timer.res[0].end') [enabled by default] Reported-by: Arnd Bergmann Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 2244fd074f72..593f8de28c5e 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -39,7 +39,7 @@ #define PSTR_SHUTDOWN_MODE 3 -#define SH73A0_SCU_BASE IOMEM(0xf0000000) +#define SH73A0_SCU_BASE 0xf0000000 #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29); @@ -81,7 +81,7 @@ static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) static void __init sh73a0_smp_init_cpus(void) { /* setup sh73a0 specific SCU base */ - shmobile_scu_base = SH73A0_SCU_BASE; + shmobile_scu_base = IOMEM(SH73A0_SCU_BASE); shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base)); } -- cgit v1.2.3 From abf88136f73da52162d7e70bd1d8d4294c08bf1e Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:16 +0900 Subject: ARM: shmobile: Use R8A7779_SCU_BASE with TWD Rework the IOMEM() usage for the SCU base address in the case of r8a7779. Adjusts the TWD to use R8A7779_SCU_BASE. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 7fd58a3a26d8..e69ce259a2d7 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -31,7 +31,7 @@ #include #define AVECR IOMEM(0xfe700040) -#define R8A7779_SCU_BASE IOMEM(0xf0000000) +#define R8A7779_SCU_BASE 0xf0000000 static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ @@ -61,8 +61,7 @@ static DEFINE_SPINLOCK(scu_lock); static unsigned long tmp; #ifdef CONFIG_HAVE_ARM_TWD -static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); - +static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29); void __init r8a7779_register_twd(void) { twd_local_timer_register(&twd_local_timer); @@ -168,7 +167,7 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) static void __init r8a7779_smp_init_cpus(void) { /* setup r8a7779 specific SCU base */ - shmobile_scu_base = R8A7779_SCU_BASE; + shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base)); } -- cgit v1.2.3 From bbf2627c77355ee07cb589904efaf814cfc223d1 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:25 +0900 Subject: ARM: shmobile: Update r8a7779 to check SCU for hotplug Update the r8a7779 CPU Hotplug code to use SCU PSR to wait for the target CPU core. Previously the shared code in hotplug.c was used to let cpu_kill() wait for cpu_die(). With this change in place the r8a7779 SMP code does not depend on hotplug.c anymore. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 38 ++++++++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index e69ce259a2d7..63c8db966fb2 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -68,6 +69,16 @@ void __init r8a7779_register_twd(void) } #endif +static int r8a7779_scu_psr_core_disabled(int cpu) +{ + unsigned long mask = 3 << (cpu * 8); + + if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) + return 1; + + return 0; +} + static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) { void __iomem *scu_base = shmobile_scu_base; @@ -89,9 +100,6 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) cpu = cpu_logical_map(cpu); - /* disable cache coherency */ - modify_scu_cpu_psr(3 << (cpu * 8), 0); - if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) ch = r8a7779_ch_cpu[cpu]; @@ -110,7 +118,7 @@ static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu) * finish before asking SoC-specific code to power off the CPU core. */ for (k = 0; k < 1000; k++) { - if (shmobile_cpu_is_dead(cpu)) + if (r8a7779_scu_psr_core_disabled(cpu)) return r8a7779_platform_cpu_kill(cpu); mdelay(1); @@ -119,6 +127,24 @@ static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu) return 0; } +static void __maybe_unused r8a7779_cpu_die(unsigned int cpu) +{ + dsb(); + flush_cache_all(); + + /* disable cache coherency */ + modify_scu_cpu_psr(3 << (cpu * 8), 0); + + /* Endless loop until power off from r8a7779_cpu_kill() */ + while (1) + cpu_do_idle(); +} + +static int __maybe_unused r8a7779_cpu_disable(unsigned int cpu) +{ + /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */ + return cpu == 0 ? -EPERM : 0; +} static void __cpuinit r8a7779_secondary_init(unsigned int cpu) { @@ -179,7 +205,7 @@ struct smp_operations r8a7779_smp_ops __initdata = { .smp_boot_secondary = r8a7779_boot_secondary, #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = r8a7779_cpu_kill, - .cpu_die = shmobile_cpu_die, - .cpu_disable = shmobile_cpu_disable, + .cpu_die = r8a7779_cpu_die, + .cpu_disable = r8a7779_cpu_disable, #endif }; -- cgit v1.2.3 From 8bbcd729d219ca7cdc06ad3b0dea161c4c41b807 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:35 +0900 Subject: ARM: shmobile: Update r8a7779 to use scu_power_mode() Update the SMP code for R8A7779 to make use of the shared SCU function scu_power_mode() together with the early setup code in shmobile_secondary_vector_scu. With this patch in place the secondary CPUs modify the SCU setting during early boot instead of letting other CPUs deal with the coherency setting before boot. In other words, we used to setup coherency before boot in r8a7779_boot_secondary() but that bit is now instead handled by the code in shmobile_secondary_vector_scu. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 32 +++++--------------------------- 1 file changed, 5 insertions(+), 27 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 63c8db966fb2..bdd38091dc9e 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -58,9 +58,6 @@ static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = { [3] = &r8a7779_ch_cpu3, }; -static DEFINE_SPINLOCK(scu_lock); -static unsigned long tmp; - #ifdef CONFIG_HAVE_ARM_TWD static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29); void __init r8a7779_register_twd(void) @@ -79,20 +76,6 @@ static int r8a7779_scu_psr_core_disabled(int cpu) return 0; } -static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) -{ - void __iomem *scu_base = shmobile_scu_base; - - spin_lock(&scu_lock); - tmp = __raw_readl(scu_base + 8); - tmp &= ~clr; - tmp |= set; - spin_unlock(&scu_lock); - - /* disable cache coherency after releasing the lock */ - __raw_writel(tmp, scu_base + 8); -} - static int r8a7779_platform_cpu_kill(unsigned int cpu) { struct r8a7779_pm_ch *ch = NULL; @@ -133,7 +116,7 @@ static void __maybe_unused r8a7779_cpu_die(unsigned int cpu) flush_cache_all(); /* disable cache coherency */ - modify_scu_cpu_psr(3 << (cpu * 8), 0); + scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); /* Endless loop until power off from r8a7779_cpu_kill() */ while (1) @@ -158,9 +141,6 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct cpu = cpu_logical_map(cpu); - /* enable cache coherency */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); - if (cpu < ARRAY_SIZE(r8a7779_ch_cpu)) ch = r8a7779_ch_cpu[cpu]; @@ -172,15 +152,13 @@ static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus) { - int cpu = cpu_logical_map(0); - scu_enable(shmobile_scu_base); - /* Map the reset vector (in headsmp.S) */ - __raw_writel(__pa(shmobile_secondary_vector), AVECR); + /* Map the reset vector (in headsmp-scu.S) */ + __raw_writel(__pa(shmobile_secondary_vector_scu), AVECR); - /* enable cache coherency on CPU0 */ - modify_scu_cpu_psr(0, 3 << (cpu * 8)); + /* enable cache coherency on booting CPU */ + scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); r8a7779_pm_init(); -- cgit v1.2.3 From eebadd676499e4c8aee181a669cc8a386e308c31 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:44 +0900 Subject: ARM: shmobile: Use sh73a0-specific cpu disable code Convert the sh73a0 CPU Hotplug code to use a local implementation of ->cpu_disable(). With this change in place the sh73a0 SMP code does no longer depend on hotplug.c. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-sh73a0.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 593f8de28c5e..5ae502b16437 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -124,6 +124,11 @@ static void sh73a0_cpu_die(unsigned int cpu) /* Enter shutdown mode */ cpu_do_idle(); } + +static int sh73a0_cpu_disable(unsigned int cpu) +{ + return 0; /* CPU0 and CPU1 supported */ +} #endif /* CONFIG_HOTPLUG_CPU */ struct smp_operations sh73a0_smp_ops __initdata = { @@ -134,6 +139,6 @@ struct smp_operations sh73a0_smp_ops __initdata = { #ifdef CONFIG_HOTPLUG_CPU .cpu_kill = sh73a0_cpu_kill, .cpu_die = sh73a0_cpu_die, - .cpu_disable = shmobile_cpu_disable_any, + .cpu_disable = sh73a0_cpu_disable, #endif }; -- cgit v1.2.3 From fd0865c3f7054d9068007fd280681cb4ea7929a1 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:47:54 +0900 Subject: ARM: shmobile: Rearrange r8a7779 cpu hotplug code Update the r8a7779 SMP code and CPU Hotplug in particular to follow the same style as sh73a0. This means dropping __maybe_unused for #ifdef CONFIG_HOTPLUG_CPU. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7779.c | 96 ++++++++++++++++++------------------ 1 file changed, 49 insertions(+), 47 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index bdd38091dc9e..ea4535a5c4e2 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c @@ -66,16 +66,6 @@ void __init r8a7779_register_twd(void) } #endif -static int r8a7779_scu_psr_core_disabled(int cpu) -{ - unsigned long mask = 3 << (cpu * 8); - - if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) - return 1; - - return 0; -} - static int r8a7779_platform_cpu_kill(unsigned int cpu) { struct r8a7779_pm_ch *ch = NULL; @@ -92,43 +82,6 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) return ret ? ret : 1; } -static int __maybe_unused r8a7779_cpu_kill(unsigned int cpu) -{ - int k; - - /* this function is running on another CPU than the offline target, - * here we need wait for shutdown code in platform_cpu_die() to - * finish before asking SoC-specific code to power off the CPU core. - */ - for (k = 0; k < 1000; k++) { - if (r8a7779_scu_psr_core_disabled(cpu)) - return r8a7779_platform_cpu_kill(cpu); - - mdelay(1); - } - - return 0; -} - -static void __maybe_unused r8a7779_cpu_die(unsigned int cpu) -{ - dsb(); - flush_cache_all(); - - /* disable cache coherency */ - scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); - - /* Endless loop until power off from r8a7779_cpu_kill() */ - while (1) - cpu_do_idle(); -} - -static int __maybe_unused r8a7779_cpu_disable(unsigned int cpu) -{ - /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */ - return cpu == 0 ? -EPERM : 0; -} - static void __cpuinit r8a7779_secondary_init(unsigned int cpu) { gic_secondary_init(0); @@ -176,6 +129,55 @@ static void __init r8a7779_smp_init_cpus(void) shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base)); } +#ifdef CONFIG_HOTPLUG_CPU +static int r8a7779_scu_psr_core_disabled(int cpu) +{ + unsigned long mask = 3 << (cpu * 8); + + if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) + return 1; + + return 0; +} + +static int r8a7779_cpu_kill(unsigned int cpu) +{ + int k; + + /* this function is running on another CPU than the offline target, + * here we need wait for shutdown code in platform_cpu_die() to + * finish before asking SoC-specific code to power off the CPU core. + */ + for (k = 0; k < 1000; k++) { + if (r8a7779_scu_psr_core_disabled(cpu)) + return r8a7779_platform_cpu_kill(cpu); + + mdelay(1); + } + + return 0; +} + +static void r8a7779_cpu_die(unsigned int cpu) +{ + dsb(); + flush_cache_all(); + + /* disable cache coherency */ + scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); + + /* Endless loop until power off from r8a7779_cpu_kill() */ + while (1) + cpu_do_idle(); +} + +static int r8a7779_cpu_disable(unsigned int cpu) +{ + /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */ + return cpu == 0 ? -EPERM : 0; +} +#endif /* CONFIG_HOTPLUG_CPU */ + struct smp_operations r8a7779_smp_ops __initdata = { .smp_init_cpus = r8a7779_smp_init_cpus, .smp_prepare_cpus = r8a7779_smp_prepare_cpus, -- cgit v1.2.3 From 5e4460fcc845ae669e20eac67558871d3f0ca432 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Feb 2013 22:48:03 +0900 Subject: ARM: shmobile: Remove unused hotplug.c Each CPU Hotplug implementation for mach-shmobile is now self-contained, so this change removes unused helper code in hotplug.c. The two CPU Hotplug capable SoCs sh73a0 and r8a7779 remain unchanged. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 - arch/arm/mach-shmobile/hotplug.c | 64 ---------------------------- arch/arm/mach-shmobile/include/mach/common.h | 10 ----- 3 files changed, 75 deletions(-) delete mode 100644 arch/arm/mach-shmobile/hotplug.c (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index d7d20579bef7..b646ff4d742a 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -14,7 +14,6 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o # SMP objects smp-y := platsmp.o headsmp.o -smp-$(CONFIG_HOTPLUG_CPU) += hotplug.o smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o diff --git a/arch/arm/mach-shmobile/hotplug.c b/arch/arm/mach-shmobile/hotplug.c deleted file mode 100644 index efd0b36a4175..000000000000 --- a/arch/arm/mach-shmobile/hotplug.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * SMP support for R-Mobile / SH-Mobile - * - * Copyright (C) 2010 Magnus Damm - * - * Based on realview, Copyright (C) 2002 ARM Ltd, All Rights Reserved - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include -#include -#include - -static cpumask_t dead_cpus; - -void shmobile_cpu_die(unsigned int cpu) -{ - /* hardware shutdown code running on the CPU that is being offlined */ - flush_cache_all(); - dsb(); - - /* notify platform_cpu_kill() that hardware shutdown is finished */ - cpumask_set_cpu(cpu, &dead_cpus); - - /* wait for SoC code in platform_cpu_kill() to shut off CPU core - * power. CPU bring up starts from the reset vector. - */ - while (1) { - /* - * here's the WFI - */ - asm(".word 0xe320f003\n" - : - : - : "memory", "cc"); - } -} - -int shmobile_cpu_disable(unsigned int cpu) -{ - cpumask_clear_cpu(cpu, &dead_cpus); - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} - -int shmobile_cpu_disable_any(unsigned int cpu) -{ - cpumask_clear_cpu(cpu, &dead_cpus); - return 0; -} - -int shmobile_cpu_is_dead(unsigned int cpu) -{ - return cpumask_test_cpu(cpu, &dead_cpus); -} diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index b8a4872f77b3..1ca1ad938d19 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -85,16 +85,6 @@ int shmobile_cpuidle_init(void); static inline int shmobile_cpuidle_init(void) { return 0; } #endif -extern void shmobile_cpu_die(unsigned int cpu); -extern int shmobile_cpu_disable(unsigned int cpu); -extern int shmobile_cpu_disable_any(unsigned int cpu); - -#ifdef CONFIG_HOTPLUG_CPU -extern int shmobile_cpu_is_dead(unsigned int cpu); -#else -static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; } -#endif - extern void __iomem *shmobile_scu_base; extern void shmobile_smp_init_cpus(unsigned int ncores); -- cgit v1.2.3 From 386e9464fab9beb6d55081edb120f2ed9a22ca41 Mon Sep 17 00:00:00 2001 From: Bastian Hecht Date: Tue, 26 Feb 2013 11:03:27 -0600 Subject: ARM: mach-shmobile: r8a7740: Add DT names to clock list This adds temporarily the alternative device names to the clock list that are used when booting via Device Tree setup. Signed-off-by: Bastian Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7740.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index 1a9b9a29442a..1feb9a2286a8 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -593,18 +593,27 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]), CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), + CLKDEV_DEV_ID("e6c80000.sci", &mstp_clks[MSTP200]), CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), + CLKDEV_DEV_ID("e6c70000.sci", &mstp_clks[MSTP201]), CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), + CLKDEV_DEV_ID("e6c60000.sci", &mstp_clks[MSTP202]), CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), + CLKDEV_DEV_ID("e6c50000.sci", &mstp_clks[MSTP203]), CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), + CLKDEV_DEV_ID("e6c40000.sci", &mstp_clks[MSTP204]), CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), + CLKDEV_DEV_ID("e6c30000.sci", &mstp_clks[MSTP206]), CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), + CLKDEV_DEV_ID("e6cb0000.sci", &mstp_clks[MSTP207]), CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]), + CLKDEV_DEV_ID("e6cd0000.sci", &mstp_clks[MSTP222]), CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]), + CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]), CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), -- cgit v1.2.3 From 652f9452781630cb624928c48803db353cdeb09f Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 25 Feb 2013 01:39:44 -0800 Subject: ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID R-Car H1 datasheet GIC number is indicating GIC ICCIAR / interrupt ID number, not SPI number, but current marzen board code is using gic_spi() with un-understandable calculation. This patch adds new gic_iid() macro which means ICCIAR / interrupt ID, and used the number currently written on datasheet. Signed-off-by: Kuninori Morimoto [ horms+renesas@verge.net.au: Split board-marzen.c portion into a separate patch ] Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/irqs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h index 06a5da3c3050..992ed213cec1 100644 --- a/arch/arm/mach-shmobile/include/mach/irqs.h +++ b/arch/arm/mach-shmobile/include/mach/irqs.h @@ -5,6 +5,7 @@ /* GIC */ #define gic_spi(nr) ((nr) + 32) +#define gic_iid(nr) (nr) /* ICCIAR / interrupt ID */ /* INTCS */ #define INTCS_VECT_BASE 0x3400 -- cgit v1.2.3 From abe0e14b0b51b26bdf80ccaf4d7ee99a4b261af0 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Mar 2013 23:11:20 -0800 Subject: ARM: shmobile: r8a7779: fixup DT machine name r8a7779 is not sh73a0 Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 7f8daf17947c..932285841b71 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -414,7 +414,7 @@ static const char *r8a7779_compat_dt[] __initdata = { NULL, }; -DT_MACHINE_START(SH73A0_DT, "Generic R8A7779 (Flattened Device Tree)") +DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") .map_io = r8a7779_map_io, .init_early = r8a7779_init_delay, .nr_irqs = NR_IRQS_LEGACY, -- cgit v1.2.3 From dbe95ad00b95a8baaedd87ce84996d95e5811055 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Mar 2013 23:11:41 -0800 Subject: ARM: shmobile: r8a7779: use gic_iid macro "ARM: shmobile: add gic_iid macro for ICCIAR / interrupt ID" enabled to use gic_iid macro. This patch exchange current GIC interrupt setting from gic_spi() to gic_iid() Signed-off-by: Kuninori Morimoto [ horms+renesas@verge.net.au: Updated git commit id in changelog ] Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7779.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 932285841b71..0068b9f85bc0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -92,7 +92,7 @@ static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(88)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)), }; static struct platform_device scif0_device = { @@ -109,7 +109,7 @@ static struct plat_sci_port scif1_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(89)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)), }; static struct platform_device scif1_device = { @@ -126,7 +126,7 @@ static struct plat_sci_port scif2_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(90)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)), }; static struct platform_device scif2_device = { @@ -143,7 +143,7 @@ static struct plat_sci_port scif3_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(91)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)), }; static struct platform_device scif3_device = { @@ -160,7 +160,7 @@ static struct plat_sci_port scif4_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(92)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)), }; static struct platform_device scif4_device = { @@ -177,7 +177,7 @@ static struct plat_sci_port scif5_platform_data = { .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scbrr_algo_id = SCBRR_ALGO_2, .type = PORT_SCIF, - .irqs = SCIx_IRQ_MUXED(gic_spi(93)), + .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)), }; static struct platform_device scif5_device = { @@ -204,7 +204,7 @@ static struct resource tmu00_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gic_spi(32), + .start = gic_iid(0x40), .flags = IORESOURCE_IRQ, }, }; @@ -234,7 +234,7 @@ static struct resource tmu01_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gic_spi(33), + .start = gic_iid(0x41), .flags = IORESOURCE_IRQ, }, }; @@ -256,7 +256,7 @@ static struct resource rcar_i2c0_res[] = { .end = 0xffc70fff, .flags = IORESOURCE_MEM, }, { - .start = gic_spi(79), + .start = gic_iid(0x6f), .flags = IORESOURCE_IRQ, }, }; @@ -274,7 +274,7 @@ static struct resource rcar_i2c1_res[] = { .end = 0xffc71fff, .flags = IORESOURCE_MEM, }, { - .start = gic_spi(82), + .start = gic_iid(0x72), .flags = IORESOURCE_IRQ, }, }; @@ -292,7 +292,7 @@ static struct resource rcar_i2c2_res[] = { .end = 0xffc72fff, .flags = IORESOURCE_MEM, }, { - .start = gic_spi(80), + .start = gic_iid(0x70), .flags = IORESOURCE_IRQ, }, }; @@ -310,7 +310,7 @@ static struct resource rcar_i2c3_res[] = { .end = 0xffc73fff, .flags = IORESOURCE_MEM, }, { - .start = gic_spi(81), + .start = gic_iid(0x71), .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3 From 195f96220143dc2672bfb84db9aad3ee536a6c98 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Sun, 3 Mar 2013 23:30:19 -0800 Subject: ARM: shmobile: tidyup chip series definition order for r8a7740/r8a7779 move r8a7740_meram_workaround() to r8a7740 area from r8a7779 area Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/include/mach/common.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h index 1ca1ad938d19..86fcdf9fde1b 100644 --- a/arch/arm/mach-shmobile/include/mach/common.h +++ b/arch/arm/mach-shmobile/include/mach/common.h @@ -50,6 +50,7 @@ extern struct clk sh73a0_extal2_clk; extern struct clk sh73a0_extcki_clk; extern struct clk sh73a0_extalr_clk; +extern void r8a7740_meram_workaround(void); extern void r8a7740_init_irq(void); extern void r8a7740_map_io(void); extern void r8a7740_add_early_devices(void); @@ -69,8 +70,6 @@ extern void r8a7779_add_standard_devices_dt(void); extern void r8a7779_clock_init(void); extern void r8a7779_pinmux_init(void); extern void r8a7779_pm_init(void); -extern void r8a7740_meram_workaround(void); - extern void r8a7779_register_twd(void); #ifdef CONFIG_SUSPEND -- cgit v1.2.3 From a7b9837c7749bf3333151a7d060d239caff1569d Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Wed, 27 Feb 2013 23:39:14 +0300 Subject: ARM: mach-shmobile: r8a7779: add SATA support Add SATA clock for r8a7779 SoC (for both device tree and usual cases). Register SATA controller as a "late" platform device on r8a7779 SoC. Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7779.c | 4 ++++ arch/arm/mach-shmobile/setup-r8a7779.c | 26 ++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 1db36537255c..0f66d356e1bc 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -87,6 +87,7 @@ static struct clk div4_clks[DIV4_NR] = { }; enum { MSTP323, MSTP322, MSTP321, MSTP320, + MSTP115, MSTP101, MSTP100, MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, @@ -99,6 +100,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP322] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 22, 0), /* SDHI1 */ [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ + [MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0), /* SATA */ [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */ [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */ [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ @@ -156,6 +158,8 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), /* MSTP32 clocks */ + CLKDEV_DEV_ID("sata_rcar", &mstp_clks[MSTP115]), /* SATA */ + CLKDEV_DEV_ID("fc600000.sata", &mstp_clks[MSTP115]), /* SATA w/DT */ CLKDEV_DEV_ID("ehci-platform.1", &mstp_clks[MSTP101]), /* USB EHCI port2 */ CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */ CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 0068b9f85bc0..10031fef074a 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -322,6 +323,30 @@ static struct platform_device i2c3_device = { .num_resources = ARRAY_SIZE(rcar_i2c3_res), }; +static struct resource sata_resources[] = { + [0] = { + .name = "rcar-sata", + .start = 0xfc600000, + .end = 0xfc601fff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = gic_spi(100), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sata_device = { + .name = "sata_rcar", + .id = -1, + .resource = sata_resources, + .num_resources = ARRAY_SIZE(sata_resources), + .dev = { + .dma_mask = &sata_device.dev.coherent_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; + static struct platform_device *r8a7779_devices_dt[] __initdata = { &scif0_device, &scif1_device, @@ -338,6 +363,7 @@ static struct platform_device *r8a7779_late_devices[] __initdata = { &i2c1_device, &i2c2_device, &i2c3_device, + &sata_device, }; void __init r8a7779_add_standard_devices(void) -- cgit v1.2.3 From d60cd5f16b5af62672209eddd64f70be3f68d17b Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 8 Mar 2013 02:31:03 +0300 Subject: ARM: shmobile: R8A7779: use gic_iid() in SATA IRQ resource Commit "ARM: shmobile: r8a7779: use gic_iid macro" switched R8A7779 platform devices to using gic_iid() macro instead of gic_spi() but commit "ARM: mach- shmobile: r8a7779: add SATA support" added another use of gic_spi(). Convert the SATA IRQ resource to using gic_iid(). Signed-off-by: Sergei Shtylyov Acked-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7779.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 10031fef074a..042df35e71a0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -331,7 +331,7 @@ static struct resource sata_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = gic_spi(100), + .start = gic_iid(0x84), .flags = IORESOURCE_IRQ, }, }; -- cgit v1.2.3 From d75bc78b508d0a95d7738290d8ec9923691f4301 Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Thu, 31 Jan 2013 02:45:01 +0100 Subject: r8a7779: Add Display Unit clock support Signed-off-by: Phil Edworthy [Rename device from to rcarfb to rcar-du] Signed-off-by: Laurent Pinchart [Manual conflict resolution] Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a7779.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c index 0f66d356e1bc..d9edeaf66007 100644 --- a/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/arch/arm/mach-shmobile/clock-r8a7779.c @@ -88,7 +88,7 @@ static struct clk div4_clks[DIV4_NR] = { enum { MSTP323, MSTP322, MSTP321, MSTP320, MSTP115, - MSTP101, MSTP100, + MSTP103, MSTP101, MSTP100, MSTP030, MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, MSTP016, MSTP015, MSTP014, @@ -101,6 +101,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */ [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */ [MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0), /* SATA */ + [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR1, 3, 0), /* DU */ [MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */ [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */ [MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */ @@ -184,6 +185,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */ CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */ + CLKDEV_DEV_ID("rcar-du.0", &mstp_clks[MSTP103]), /* DU */ }; void __init r8a7779_clock_init(void) -- cgit v1.2.3